WO2015103815A1 - 一种多断点的软件调试装置、方法和计算机存储介质 - Google Patents

一种多断点的软件调试装置、方法和计算机存储介质 Download PDF

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WO2015103815A1
WO2015103815A1 PCT/CN2014/074564 CN2014074564W WO2015103815A1 WO 2015103815 A1 WO2015103815 A1 WO 2015103815A1 CN 2014074564 W CN2014074564 W CN 2014074564W WO 2015103815 A1 WO2015103815 A1 WO 2015103815A1
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breakpoint
instruction
real
pipeline
ide
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PCT/CN2014/074564
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English (en)
French (fr)
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郝宇
安康
王志忠
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深圳市中兴微电子技术有限公司
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Publication of WO2015103815A1 publication Critical patent/WO2015103815A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/362Software debugging

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  • Multi-breakpoint software debugging device method and computer storage medium
  • the present invention relates to software debugging techniques, and more particularly to a software debugging apparatus, method and computer storage medium for multiple breakpoints. Background technique
  • Microprocessor debugging techniques are widely used in software fault location, software code analysis, and reverse engineering, and are critical to the design and use of microprocessors.
  • Debugging the software of the microprocessor generally includes the following two aspects: Setting a breakpoint in the software program, causing the program to execute to the set breakpoint position, generating an interrupt and stopping execution; the user can perform a single step operation on the program Or let it go out of the interrupted state and continue to execute.
  • breakpoint technique is an indispensable and decisive technique in the software debugging of microprocessors.
  • the current breakpoint technology is mainly divided into two types:
  • This technique uses several breakpoint registers to store pointers at breakpoints.
  • the microprocessor executes an instruction, it constantly compares the pointer of the executed instruction with the breakpoint pointer in the breakpoint register according to the configuration. When a match occurs.
  • the pipeline that generates the interrupt and freezes the microprocessor jumps into a specific block for processing.
  • the obvious disadvantage of this type of hardware breakpoint is that due to the number of breakpoint registers, hardware breakpoints can only implement a limited number of breakpoints, which can be very limited during debugging.
  • the software multi-breakpoint scheme This technique is currently widely used.
  • the general practice is to replace the instruction at the breakpoint position in the instruction memory executed by the microprocessor with a breakpoint instruction, and back up the real instruction at the breakpoint to another memory.
  • the processor pipeline parses the instruction at the breakpoint position, knows that the instruction at the breakpoint position is an interrupt after the breakpoint instruction, and freezes the pipeline to jump into the specified block for processing, after the interrupt is generated.
  • the above software multi-breakpoint debugging technology needs to back up the real instructions at the breakpoint position.
  • the embodiments of the present invention mainly provide a multi-breakpoint software debugging device, a method, and a computer storage medium, which are simple and easy to implement software debugging of multiple breakpoints, and save the board on the board. Storage resources.
  • the embodiment of the present invention provides a multi-breakpoint software debugging device, where the software debugging device includes: a driver, a microprocessor, an instruction memory, and a microcode integrated development environment IDE; wherein the driver is configured to acquire a software program. Breakpoint information, send the breakpoint information to the instruction memory, and replace the real instruction at the breakpoint with a breakpoint instruction according to the breakpoint information in the instruction memory, after reporting the interrupt to the IDE, according to the IDE
  • the command replaces the breakpoint instruction with the real instruction, triggers the microprocessor to unfreeze the pipeline, and replaces the real instruction at the breakpoint with a breakpoint instruction again in the gap where the breakpoint instruction is executed;
  • the microprocessor is configured to report an interrupt to the driver when the breakpoint instruction is executed
  • the IDE freezes the pipeline, and thaws the pipeline according to the trigger of the driver, and fetches the real instructions at the breakpoint;
  • the instruction memory is configured to store a breakpoint instruction and breakpoint information
  • the IDE is configured to provide a user with an interactive interface for issuing commands.
  • the breakpoint information includes a breakpoint location address; the breakpoint instruction is an in-situ jump instruction; and the gap executed by the breakpoint instruction is any two gaps in which the breakpoint instruction performs the jump in place.
  • the driver is further configured to parse a command from the IDE into a specific register or a memory read/write signal to be sent to the microprocessor and/or the instruction memory through a bus.
  • the driver is further configured to store the real command at the breakpoint position and the breakpoint to the host computer where the IDE is located.
  • the microprocessor includes: a pipeline and a debugging module; wherein, the pipeline is configured to send a notification to the debugging module after parsing that the current instruction is a breakpoint instruction, when the execution of the breakpoint instruction is performed, and After the thawing, the real instructions at the breakpoint are fetched;
  • the debugging module is configured to, after receiving the notification from the pipeline, freeze the pipeline, report the interruption to the driver, and unfreeze the pipeline according to the trigger of the driver.
  • the debugging module is configured to generate a stop signal to freeze the pipeline after receiving the notification from the pipeline.
  • the embodiment of the invention further provides a software debugging method for multiple breakpoints, and the software debugging method comprises:
  • Microcode integrated development environment IDE sets breakpoints in software programs
  • the driver obtains breakpoint information in the software program, and replaces the real instruction at the breakpoint with a breakpoint instruction according to the breakpoint information;
  • the microprocessor When executing the breakpoint instruction, the microprocessor reports the interrupt to the IDE and freezes the pipeline; the driver converts the breakpoint instruction back to the real instruction according to a command issued by the IDE;
  • the microprocessor thaws the pipeline and fetches the real instructions at the breakpoint
  • the drive replaces the real instruction at the breakpoint with a breakpoint command again in the gap where the breakpoint instruction is executed.
  • the breakpoint information includes a breakpoint location address.
  • the software debugging methods in the above scheme also include: The drive will be at the breakpoint position and the true at the breakpoint The real instructions are stored to the host computer where the IDE is located.
  • the driver converts the breakpoint instruction back to the real instruction according to a command issued by the IDE, and the microprocessor unfreezes the pipeline, and fetches the real instruction at the breakpoint, and the gap between the driver and the breakpoint instruction is executed.
  • the real instruction at the breakpoint is replaced with a breakpoint command again: the drive converts the breakpoint instruction back to the real instruction according to the single-step operation command or the resume operation command issued by the IDE, and when the real instruction is replaced, the microprocessor Thaw the pipeline, fetch the real instruction at the breakpoint, and after the completion of the fetch of the real instruction, replace the real instruction at the breakpoint with the breakpoint instruction again in the gap of any two executions of the breakpoint instruction.
  • a computer storage medium provided by an embodiment of the present invention, wherein a computer program for executing the multi-breakpoint software debugging method is stored.
  • the embodiment of the invention provides a multi-breakpoint software debugging device, method and computer storage medium.
  • the micro-code integrated development environment IDE, integrated development environment
  • sets a breakpoint in the software program and the driver obtains a breakpoint in the software program.
  • Information, according to the breakpoint information replace the real instruction at the breakpoint with a breakpoint instruction.
  • the microprocessor reports the interrupt to the IDE, and freezes the pipeline, and the driver issues the command according to the IDE.
  • the microprocessor Converting the breakpoint instruction back to the real instruction, the microprocessor unfreezes the pipeline, and fetches the real instruction at the breakpoint, and the driver replaces the real instruction at the breakpoint with the breakpoint instruction again in the gap where the breakpoint instruction is executed;
  • the present application utilizes the characteristics of the breakpoint instruction and the gap of the pipeline freeze to complete the operation of the replacement instruction, not only can continue to retain the breakpoint in the instruction memory, but also does not need to additionally increase the storage space on the board to store the instruction of the breakpoint position. It saves a lot of hardware storage resources and simplifies debugging steps.
  • FIG. 1 is a schematic structural diagram of a software debugging apparatus for a multi-breakpoint according to an embodiment of the present invention
  • FIG. 2 is a schematic structural diagram of a microprocessor and an instruction memory in a software debugging apparatus according to an embodiment of the present invention
  • 3 is a flowchart of a software debugging method for multiple breakpoints according to an embodiment of the present invention
  • FIG. 4 is a flowchart of a software setting method for a breakpoint according to an embodiment of the present invention
  • FIG. 5 is a flowchart of performing a single-step operation according to an embodiment of the present invention.
  • FIG. 6 is a flowchart of performing a continuation operation according to an embodiment of the present invention. detailed description
  • the IDE sets a breakpoint in the software program; the driver acquires breakpoint information in the software program, and replaces the real instruction at the breakpoint with a breakpoint instruction according to the breakpoint information;
  • the microprocessor reports the interrupt to the IDE and freezes the pipeline; the driver switches the breakpoint instruction back to the real instruction according to the command issued by the IDE; the microprocessor unfreezes the pipeline and fetches the real instruction at the breakpoint.
  • the driver replaces the real instruction at the breakpoint with a breakpoint instruction again in the gap where the breakpoint instruction is executed, and implements software debugging of the multiple breakpoints by the above method.
  • the structure of the software debugging device for multiple breakpoints provided by the embodiment of the present invention is as shown in FIG. 1.
  • the software debugging device includes: a driver 10, a microprocessor 11, an instruction memory 12, and an IDE.
  • the driver 10 is configured to acquire breakpoint information in the software program, send the breakpoint information to the instruction memory, and replace the real instruction at the breakpoint with a breakpoint instruction according to the breakpoint information in the instruction memory. After the interrupt is reported to the IDE 13, the breakpoint instruction is exchanged back to the real instruction according to the command issued by the IDE 13, the microprocessor 11 is triggered to unfreeze the pipeline, and the real instruction at the breakpoint is replaced again in the gap where the breakpoint instruction is executed. Breakpoint instruction;
  • the microprocessor 11 is configured to, when executing the breakpoint instruction, report the interrupt to the IDE 13 through the driver 10, freeze the pipeline, and unfreeze the pipeline according to the trigger of the driver 10, and fetch the real instruction at the breakpoint. ;
  • the instruction memory 12 is configured to store a breakpoint instruction and breakpoint information
  • the IDE 13 is configured to provide an interactive interface for issuing commands to the user;
  • the breakpoint information includes a breakpoint location address
  • the breakpoint instruction is an in-situ jump instruction, and the gap executed by the breakpoint instruction is a gap of any two times in which the breakpoint instruction performs the jump in place;
  • the driver 10 is further configured to parse a command from the IDE 13 into a specific register or a memory read/write signal to be sent to the microprocessor 11 and/or the instruction memory 12 via a bus; the command includes: Point commands and commands such as a Step operation or a Continue operation;
  • the IDE 13 is installed on the host computer. After issuing commands to the microprocessor 11 and the instruction memory 12, the driver 10 is further configured to store the real-time instructions at the breakpoint position and the breakpoint to the IDE 13 Host computer.
  • FIG. 2 is a structural diagram of a microprocessor 11 and an instruction memory 12 according to an embodiment of the present invention.
  • the microprocessor 11 specifically includes: a pipeline 20 and a debug module 21;
  • the pipeline 20 is configured to send a notification to the debugging module 21 after the execution of the breakpoint instruction, and find that the current command is a breakpoint instruction, and fetch the real instruction at the breakpoint after thawing;
  • the debugging module 21 is configured to, after receiving the notification from the pipeline 20, freeze the pipeline, report the interruption to the driver 10, and thaw the pipeline according to the trigger of the driver 10;
  • the debugging module 21 is specifically configured to generate a stall signal to freeze the pipeline after receiving the notification from the pipeline 20;
  • the IDE 13 installed on the host computer can release the pipeline freeze by operating a register in the debug module 21 through the bus, so that the microprocessor 11 can perform a single step operation or continue operation;
  • the IDE 13 installed on the upper computer can also store the instruction memory 12 through the bus.
  • the stored instruction content is modified, and the instruction memory 12 can be composed of an SRAM.
  • the embodiment of the invention provides a software debugging method for multiple breakpoints. As shown in FIG. 3, the software debugging method includes the following steps:
  • Step 301 setting a breakpoint in the software program
  • the user sets a breakpoint in the software program through the IDE, and the number and location of the breakpoints are set by the user according to the requirements;
  • Step 302 The driver acquires breakpoint information in the software program, and replaces the real instruction at the breakpoint with a breakpoint instruction according to the breakpoint information;
  • the driver obtains, from the IDE, a command for setting a breakpoint in the software program and the breakpoint information; the breakpoint information includes a breakpoint location address; and then, the software program is determined according to the breakpoint location address
  • the real instruction corresponding to the interrupt point location address is replaced with a breakpoint instruction in the instruction memory, and the breakpoint instruction is an in-place jump instruction;
  • the step further includes, after replacing the real instruction with a breakpoint instruction, storing the breakpoint position and the real instruction at the breakpoint to the host computer where the IDE is located.
  • Step 303 When executing the breakpoint instruction, the microprocessor reports the interrupt and freezes the pipeline;
  • the microprocessor reports the interrupt to the IDE while freezing the pipeline; since the breakpoint instruction itself is an in-place jump instruction, the breakpoint instruction jumps to At the current fetch address of the microprocessor, the instructions in the delay slot on the pipeline are flushed to the NOP command.
  • Step 304 The driver converts the breakpoint instruction back to the real instruction according to a command issued by the IDE, and the microprocessor unfreezes the pipeline, and fetches the real instruction at the breakpoint, and the driver stops the breakpoint in the gap where the breakpoint instruction is executed.
  • the real instruction is replaced again with a breakpoint instruction;
  • the driver converts the breakpoint instruction back to the real instruction according to the single-step operation command or the operation operation command issued by the IDE, and when the real instruction is replaced, the microprocessor Thaw the pipeline, execute the breakpoint instruction, and at the same time complete the fetching of the real instruction at the breakpoint, since the breakpoint instruction continues to jump in place, thus, the gap between any two executions of the breakpoint instruction may be broken.
  • the real instruction at the point is replaced again with a breakpoint instruction.
  • FIG. 4 specifically shows the flow of the setting method of the microprocessor software breakpoint.
  • the flow shown in the figure is the specific operation steps of step 301 and step 302 in FIG. 3, including:
  • Step 401 The IDE starts the debugging mode
  • the user can set a breakpoint in the software program, and the position and number of the breakpoints are determined by the user according to the debugging needs.
  • Step 402 The driver obtains a breakpoint command and a breakpoint location address from the IDE. Specifically, after the user sets a breakpoint through the IDE, the driver obtains a breakpoint command and a breakpoint location address from the IDE, which is the next step. Replace the instructions to prepare.
  • Step 403 The driver replaces the real instruction at the breakpoint with a breakpoint instruction according to the breakpoint location address;
  • Step 404 The driver backs up the breakpoint location address and the real instruction.
  • the driver saves all the breakpoint location addresses in the software program and the real instructions at the breakpoint location address to the host computer where the IDE is located for backup.
  • the IDE When the microprocessor executes the breakpoint instruction and reports the interrupt, the IDE continues to perform the single step operation, and the specific process is as shown in FIG. 5;
  • the interrupt register is read to determine whether there is an interrupt. When there is an interrupt, it indicates that the microprocessor has generated an interrupt and freezes the pipeline. At this time, a single-step operation can be performed, when there is no interruption.
  • the fetch address is specifically ex-2pc; then the driver triggers the microprocessor to execute Determining the in-place jump instruction, and simultaneously completing the fetching of the real instruction at the fetch address; the driver then replacing the real instruction at the ex-2pc back to the in-situ jump instruction Trap instruction; The driver triggers the microprocessor to execute the in-situ jump instruction again, and finally, the microprocessor executes the real instruction to complete the entire single-step operation;
  • the microprocessor when the current fetch address is compared with the breakpoint position recorded in the drive, and the fetch address does not correspond to the breakpoint position, it indicates that the microprocessor currently executes the command. Not a breakpoint instruction, the microprocessor continues to execute the next instruction, completing the operation.
  • Figure 6 is a flow chart of the execution of the IDE after the microprocessor executes the breakpoint instruction and reports the interrupt. The specific flow is similar to that shown in Figure 5;
  • the interrupt register is read to determine whether there is an interrupt.
  • an interrupt it indicates that the microprocessor has generated an interrupt and freezes the pipeline.
  • the resume operation can be performed.
  • the current fetch address in the microprocessor is read, and the fetch address is compared with the breakpoint position stored in the drive record, and the Whether the fetch address corresponds to the breakpoint position, and when the fetch address corresponds to the breakpoint position, it indicates that the currently executed instruction of the microprocessor is an in-place jump instruction;
  • the driver replaces the instruction at the fetch address ex-2pc with the real instruction that needs to be executed.
  • the fetch address is specifically ex-2pc; then the driver triggers the microprocessor to execute Said in-situ jump instruction, at the same time completing the fetching of the real instruction at the fetch address; the driver then replacing the real instruction at the ex-2pc back to the in-situ jump instruction Trap instruction; The triggering microprocessor executes the in-situ jump instruction again.
  • the driver triggers the microprocessor to execute the software program at full speed to complete the entire continuation operation.
  • the software debugging method for multiple breakpoints is in the form of a software function module. When implemented and sold or used as a standalone product, it can also be stored on a computer readable storage medium. Based on such understanding, those skilled in the art will appreciate that embodiments of the present application can be provided as a method, apparatus, or computer program product. Thus, the present application can take the form of a hardware embodiment, a software embodiment, or a combination of software and hardware.
  • the application can be in the form of one or more computer program products embodied on a computer usable storage medium having computer usable program code, including but not limited to a USB flash drive, a removable hard drive, a read only memory (ROM, Read-Only Memory), disk storage, CD-ROM, optical storage, etc.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing a process or a plurality of processes and/or block diagrams of the functions specified in a block or blocks of the method flow of the embodiments of the present invention
  • a computer storage medium provided by the above embodiment stores a computer program for executing a software debugging method for multiple breakpoints according to an embodiment of the present invention.
  • the software debugging apparatus, method and computer storage medium of the microprocessor software multi-breakpoint provided by the embodiments of the present invention implement the microprocessor software debugging process by using the breakpoint instruction and the freeze pipeline.
  • the flexible setting of multiple breakpoints saves the storage space on the board more than the existing breakpoint debugging technology, and the debugging method is also more convenient.

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Abstract

本发明公开了一种多断点的软件调试装置和方法,该软件调试装置包括:驱动器、微处理器、指令存储器和微码集成开发环境(IDE);上述软件调试装置通过在软件程序中设置断点,获取断点信息,将断点处的指令替换成断点指令,在执行到断点指令时,上报中断、冻结流水线,根据IDE下发的命令将所述断点指令换回真实指令,解冻流水线,对断点处的真实指令进行取指,在断点指令执行的间隙将断点处的真实指令再次替换成断点指令的方法来实现多断点的软件调试;本发明还公开了一种计算机存储介质,用于存储执行上述软件调试方法的计算机程序。

Description

一种多断点的软件调试装置、 方法和计算机存储介质 技术领域
本发明涉及软件调试技术, 尤其涉及一种多断点的软件调试装置、 方 法和计算机存储介质。 背景技术
微处理器调试技术广泛地应用于软件故障定位、 软件代码分析以及逆 向工程领域, 对微处理器的设计和使用有至关重要的作用。
对微处理器的软件进行调试一般包括以下两个方面的内容: 在软件程 序中设置断点, 使程序执行到所设置的断点位置时产生中断并停止执行; 用户可以对程序执行单步操作或使之摆脱中断状态继续往下执行。
从上述内容可以看出, 断点技术是微处理器的软件调试中不可或缺并 有决定性作用的技术。 当前的断点技术主要分为两种:
第一种, 硬件断点的方案。 这种技术釆用若干个断点寄存器来存储断 点位置的指针, 在微处理器执行指令时, 根据配置不断将所执行指令的指 针与断点寄存器中的断点指针进行对比, 当发生匹配时, 产生中断并冻结 微处理器的流水线跳入特定程序段进行处理。 这种硬件断点的显而易见的 缺点就是, 由于断点寄存器的数量限制, 硬件断点只能实现数量有限的几 个断点, 在调试过程中会有很多的限制。
第二种, 软件多断点方案。 这技术当前使用非常广泛, 一般做法是将 微处理器执行的指令存储器中的断点位置的指令替换成断点指令, 并将断 点处的真实指令备份到另一个存储器中, 当微处理器执行到断点位置时, 处理器流水线解析断点位置处的指令, 获知该断点位置处的指令为断点指 令后产生中断, 并冻结流水线跳入指定程序段进行处理, 在产生中断后使 用高级语言来解析该断点处的真实指令, 利用 PC++来使程序跳入断点后一 条指令开始执行。 上述软件多断点调试技术需要对断点位置的真实指令进 行备份, 在替换回真实指令时需要高级语言来解析断点处的真实指令, 如 此, 实现该方案需要消耗大量额外的存储空间来存储备份断点处的真实指 令, 还需要替换流水线中指令, 实现困难。 发明内容
为解决现有存在的问题, 本发明实施例主要提供一种多断点的软件调 试装置、 方法和计算机存储介质, 简单易行的实现了多断点的软件调试, 同时节省了单板上的存储资源。
本发明实施例的技术方案是这样实现的:
本发明实施例提供了一种多断点的软件调试装置, 该软件调试装置包 括: 驱动器、 微处理器、 指令存储器和微码集成开发环境 IDE; 其中, 所述驱动器, 配置为获取软件程序中的断点信息, 将所述断点信息发 送给指令存储器, 并根据指令存储器中的断点信息将断点处的真实指令替 换成断点指令, 在上报中断给 IDE后, 根据 IDE下发的命令将所述断点指 令换回真实指令, 触发微处理器解冻流水线, 并在断点指令执行的间隙将 断点处的真实指令再次替换成断点指令;
所述微处理器, 配置为当执行到断点指令时, 通过驱动器上报中断给
IDE, 冻结流水线, 并根据驱动器的触发解冻流水线, 对断点处的真实指令 进行取指;
所述指令存储器, 配置为存储断点指令和断点信息;
所述 IDE, 配置为为用户提供下发命令的交互界面。
上述方案中, 所述断点信息包括断点位置地址; 所述断点指令为原地 跳转指令; 所述断点指令执行的间隙为断点指令在原地执行跳转的任意两 次的间隙。 上述方案中, 所述驱动器, 还配置为将来自所述 IDE的命令解析成具 体的寄存器或存储器读写信号通过总线发送给所述微处理器和 /或指令存储 器。
上述方案中, 所述驱动器, 还配置为将断点位置和断点处的真实指令 存储到 IDE所在的上位机。
上述方案中, 所述微处理器包括: 流水线和调试模块; 其中, 所述流水线, 配置为当执行到断点指令时, 解析发现当前指令为断点 指令后向所述调试模块发送通知, 并在解冻后对断点处的真实指令进行取 指;
所述调试模块, 配置为当接收到来自所述流水线的通知后, 冻结流水 线, 上报中断给驱动器, 并根据驱动器的触发解冻流水线。
上述方案中, 所述调试模块, 配置为当接收到来自所述流水线的通知 后, 产生停止信号来冻结流水线。
本发明实施例还提供了一种多断点的软件调试方法, 该软件调试方法 包括:
微码集成开发环境 IDE在软件程序中设置断点;
驱动器获取软件程序中的断点信息, 根据所述断点信息将断点处的真 实指令替换成断点指令;
当执行到所述断点指令时, 微处理器上报中断给 IDE, 并冻结流水线; 驱动器根据 IDE下发的命令将所述断点指令换回真实指令;
微处理器解冻流水线, 对断点处的真实指令进行取指;
驱动器在断点指令执行的间隙将断点处的真实指令再次替换成断点指 令。
上述方案中, 所述断点信息包括断点位置地址。
上述方案中的软件调试方法还包括: 驱动器将断点位置和断点处的真 实指令存储到 IDE所在的上位机。
上述方案中, 所述驱动器根据 IDE下发的命令将所述断点指令换回真 实指令, 微处理器解冻流水线, 对断点处的真实指令进行取指, 驱动器在 断点指令执行的间隙将断点处的真实指令再次替换成断点指令为: 驱动器 根据 IDE下发的单步操作命令或继续操作命令, 将所述断点指令换回真实 指令, 在换回真实指令时, 微处理器解冻流水线, 对断点处的真实指令进 行取指, 在对所述真实指令取指完成后, 在任意两次执行断点指令的间隙 将断点处的真实指令再次替换成断点指令。
本发明实施例提供的一种计算机存储介质, 其中存储有计算机程序, 该计算机程序用于执行所述多断点的软件调试方法。
本发明实施例提供了一种多断点的软件调试装置、 方法和计算机存储 介质, 微码集成开发环境 ( IDE, Integrated Development Environment )在软 件程序中设置断点, 驱动器获取软件程序中的断点信息, 根据所述断点信 息将断点处的真实指令替换成断点指令, 当执行到所述断点指令时, 微处 理器上报中断给 IDE, 并冻结流水线, 驱动器根据 IDE下发的命令将所述 断点指令换回真实指令, 微处理器解冻流水线, 对断点处的真实指令进行 取指, 驱动器在断点指令执行的间隙将断点处的真实指令再次替换成断点 指令; 如此, 本申请利用断点指令的特性和流水线冻结的空隙来完成替换 指令的操作, 不仅可以在指令存储器中继续保留断点, 而且不用额外增加 单板上的存储空间来存储断点位置的指令, 节省大量的硬件存储资源的同 时也简化了调试步骤。 附图说明
图 1为本发明实施例提供的多断点的软件调试装置的结构示意图; 图 2 为本发明实施例提供的软件调试装置中微处理器和指令存储器的 结构示意图; 图 3为本发明实施例提供的多断点的软件调试方法流程图; 图 4为本发明实施例提供的断点的软件设置方法流程图;
图 5为本发明实施例提供的执行单步操作的流程图;
图 6为本发明实施例提供的执行继续操作的流程图。 具体实施方式
本发明实施例中, IDE 在软件程序中设置断点; 驱动器获取软件程序 中的断点信息, 根据所述断点信息将断点处的真实指令替换成断点指令; 当执行到所述断点指令时, 微处理器上报中断给 IDE, 并冻结流水线; 驱 动器根据 IDE下发的命令将所述断点指令换回真实指令; 微处理器解冻流 水线, 对断点处的真实指令进行取指; 驱动器在断点指令执行的间隙将断 点处的真实指令再次替换成断点指令, 通过上述方法来实现多断点的软件 调试。
下面通过附图及具体实施例对本发明 #丈进一步的详细说明;
本发明实施例提供的多断点的软件调试装置的结构如图 1 所示, 该软 件调试装置包括: 驱动器(Driver ) 10、微处理器 11、指令存储器 12和 IDE
13; 其中,
所述驱动器 10, 配置为获取软件程序中的断点信息, 将所述断点信息 发送给指令存储器, 并根据指令存储器中的断点信息将断点处的真实指令 替换成断点指令,在上报中断给 IDE 13后,根据 IDE 13下发的命令将所述 断点指令换回真实指令, 触发微处理器 11解冻流水线, 并在断点指令执行 的间隙将断点处的真实指令再次替换成断点指令;
所述微处理器 11, 配置为当执行到所述断点指令时, 通过驱动器 10上 报中断给 IDE 13, 冻结流水线, 并根据驱动器 10的触发解冻流水线, 对断 点处的真实指令进行取指;
所述指令存储器 12, 配置为存储断点指令和断点信息; 所述 IDE 13, 配置为为用户提供下发命令的交互界面;
其中, 所述断点信息包括断点位置地址;
所述断点指令为原地跳转指令, 所述断点指令执行的间隙为断点指令 在原地执行跳转的任意两次的间隙;
所述驱动器 10,还配置为将来自所述 IDE 13的命令解析成具体的寄存 器或存储器读写信号通过总线发送给所述微处理器 11和 /或指令存储器 12; 所述命令包括: 设置断点命令以及执行单步( Step )操作或继续( Continue ) 操作等命令;
所述 IDE 13安装在上位机上, 在为微处理器 11和或指令存储器 12下 发命令后, 所述驱动器 10, 还配置为将断点位置和断点处的真实指令存储 到 IDE 13所在的上位机。
图 2所示为本发明实施例提供的微处理器 11和指令存储器 12的结构 图, 如图所示, 所述微处理器 11具体包括: 流水线 20和调试(Debug )模 块 21 ; 其中,
所述流水线 20, 配置为当执行到断点指令时, 解析发现当前指令为断 点指令后向所述调试模块 21发送通知, 并在解冻后对断点处的真实指令进 行取指;
所述调试模块 21, 配置为当接收到来自所述流水线 20的通知后, 冻结 流水线, 上报中断给驱动器 10, 并根据驱动器 10的触发解冻流水线;
所述调试模块 21, 具体配置为当接收到来自所述流水线 20的通知后, 产生停止(stall )信号来冻结流水线;
所述上位机上安装的 IDE 13可以通过总线操作所述调试模块 21 中的 寄存器来解除流水线冻结, 从而使微处理器 11可以执行单步操作或继续操 作;
所述上位机上安装的 IDE 13还可以通过总线来对指令存储器 12中存 储的指令内容进行修改, 所述指令存储器 12可以由 SRAM组成。
本发明实施例提供一种多断点的软件调试方法, 如图 3 所示, 该软件 调试方法包括以下步骤:
步骤 301 : 在软件程序中设置断点;
具体的, 调试开始后, 用户通过 IDE在软件程序中设置断点, 断点的 数量和位置由用户根据需求来设定;
步骤 302: 驱动器获取软件程序中的断点信息,根据所述断点信息将断 点处的真实指令替换为断点指令;
具体的, 首先, 驱动器从所述 IDE中获得用户在软件程序中设置断点 的命令以及断点信息; 所述断点信息包括断点位置地址; 然后, 根据所述 断点位置地址将软件程序中断点位置地址对应的真实指令替换成指令存储 器中的断点指令, 所述断点指令为原地跳转指令;
本步骤还包括, 在将所述真实指令替换成断点指令后, 将所述断点位 置和所述断点处的真实指令存储到 IDE所在的上位机。
步骤 303: 当执行到所述断点指令时, 微处理器上报中断, 并冻结流水 线;
具体的, 当软件程序执行到所述断点指令时,微处理器上报中断给 IDE 的同时冻结流水线; 由于所述断点指令本身为原地跳转指令, 因此, 断点 指令会跳转到微处理器当前的取指地址处, 同时会将流水线上延迟槽内的 指令都刷新成 NOP指令。
步骤 304: 驱动器根据 IDE下发的命令将所述断点指令换回真实指令, 微处理器解冻流水线, 对断点处的真实指令进行取指, 驱动器在断点指令 执行的间隙将断点处的真实指令再次替换成断点指令;
具体的, 在上报中断后, 驱动器根据 IDE下发的单步操作命令或继续 操作命令, 将所述断点指令换回真实指令, 在换回真实指令时, 微处理器 解冻流水线, 执行所述断点指令, 同时完成对断点处的真实指令进行取指, 由于所述断点指令继续在原地跳转, 这样, 可以在任意两次执行断点指令 的间隙将断点处的真实指令再次替换成断点指令。
图 4具体的呈现了微处理器软件断点的设置方法流程, 图中所示流程 为图 3中步骤 301与步骤 302的具体操作步骤, 包括:
步骤 401 : IDE开启调试模式;
具体的, IDE 开启调试模式后, 用户可以在软件程序中设置断点, 所 述断点的位置和数量由用户根据调试需要来确定。
步骤 402: 驱动器从所述 IDE获得打断点的命令以及断点位置地址; 具体的, 用户通过 IDE设置断点之后, 驱动器从所述 IDE中获取断点 命令以及断点位置地址, 为下一步替换指令做准备。
步骤 403:驱动器根据所述断点位置地址将断点处的真实指令替换成断 点指令;
步骤 404: 驱动器将所述断点位置地址和所述真实指令备份;
具体的, 驱动器将软件程序中的所有断点位置地址和所述断点位置地 址处的真实指令都保存至 IDE所在上位机进行备份。
当微处理器执行到断点指令并上报中断后, IDE继续执行单步操作时, 具体流程如图 5所示;
首先,在 IDE开始执行单步操作时读取中断寄存器来判断是否有中断, 当有中断时, 则表示微处理器已经产生中断并冻结了流水线, 此时可以执 行单步操作, 当没有中断时, 表示微处理器的流水线正常工作, 此时不能 执行单步操作; 然后读取微处理器中当前取指地址, 并将所述取指地址和 所述驱动器记录存储的断点位置进行对比, 判断所述取指地址是否与所述 断点位置对应, 当所述取指地址与所述断点位置对应时, 则表示微处理器 当前执行的指令是原地跳转指令; 然后, 所述驱动器将所述取指地址 ex— 2pc处的指令替换为原来需执行 的真实指令, 本实施例中取指地址具体为 ex— 2pc; 接下来所述驱动器触发 微处理器执行所述原地跳转指令, 同时完成对所述取指地址处的真实指令 的取指; 所述驱动器再将所述 ex— 2pc处的真实指令替换回所述原地跳转指 令 Trap指令; 所述驱动器触发微处理器再一次执行所述原地跳转指令, 最 后, 所述微处理器执行所述真实指令完成整个单步操作;
如图所示, 当将所述当前的取指地址和所述驱动器中记录的断点位置 进行对比, 所述取指地址与所述断点位置不对应时, 表示微处理器当前执 行的指令不是断点指令, 微处理器继续执行下一条指令, 完成操作。
图 6所示为当微处理器执行到断点指令并上报中断后, IDE执行继续 操作时的流程图, 具体流程与图 5所示相似;
首先,在 IDE开始执行继续操作时读取中断寄存器来判断是否有中断, 当有中断时, 则表示微处理器已经产生中断并冻结了流水线, 此时可以执 行继续操作, 当没有中断时, 表示微处理器的流水线正常工作, 此时不能 执行继续操作; 然后读取微处理器中当前取指地址, 并将所述取指地址和 所述驱动器记录存储的断点位置进行对比, 判断所述取指地址是否与所述 断点位置对应, 当所述取指地址与所述断点位置对应时, 则表示微处理器 当前执行的指令是原地跳转指令;
然后, 所述驱动器将所述取指地址 ex— 2pc处的指令替换为原来需执行 的真实指令, 本实施例中取指地址具体为 ex— 2pc; 接下来所述驱动器触发 微处理器执行所述原地跳转指令, 同时完成对所述取指地址处的真实指令 的取指; 所述驱动器再将所述 ex— 2pc处的真实指令替换回所述原地跳转指 令 Trap指令; 驱动器触发微处理器再一次执行所述原地跳转指令, 最后, 驱动器触发微处理器全速执行软件程序, 完成整个继续操作。
本发明实施例所述多断点的软件调试方法如果以软件功能模块的形式 实现并作为独立的产品销售或使用时, 也可以存储在一个计算机可读取存 储介质中。 基于这样的理解, 本领域内的技术人员应明白, 本申请的实施 例可提供为方法、 装置、 或计算机程序产品。 因此, 本申请可釆用硬件实 施例、 软件实施例、 或结合软件和硬件方面的实施例的形式。 而且, 本申 请可釆用在一个或多个其中包含有计算机可用程序代码的计算机可用存储 介质上实施的计算机程序产品的形式, 所述存储介质包括但不限于 U盘、 移动硬盘、只读存储器( ROM, Read-Only Memory )、磁盘存储器、 CD-ROM, 光学存储器等;
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备 上, 使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机 实现的处理, 从而在计算机或其他可编程设备上执行的指令提供用于实现 本发明实施例方法流程中的一个流程或多个流程和 /或方框图一个方框或 多个方框中指定的功能的步骤;
上述实施例提供的一种计算机存储介质, 存储有计算机程序, 该计算 机程序用于执行本发明实施例的多断点的软件调试方法。
从上述实施例可以看出, 本发明实施例提供的微处理器软件多断点的 软件调试装置、 方法和计算机存储介质, 通过利用断点指令和冻结流水线 来实现微处理器软件调试过程中的多断点的灵活设置, 比现有断点调试技 术更加节省单板上的存储空间, 调试方法也更加简便。
以上所述, 仅为本发明的较佳实施例而已, 并非用于限定本发明的保 护范围, 凡在本发明的精神和原则之内所作的任何修改、 等同替换和改进 等, 均应包含在本发明的保护范围之内。

Claims

权利要求书
1、 一种多断点的软件调试装置, 该软件调试装置包括: 驱动器、 微处 理器、 指令存储器和微码集成开发环境 IDE; 其中,
所述驱动器, 配置为获取软件程序中的断点信息, 将所述断点信息发 送给指令存储器, 并根据指令存储器中的断点信息将断点处的真实指令替 换成断点指令, 在上报中断给 IDE后, 根据 IDE下发的命令将所述断点指 令换回真实指令, 触发微处理器解冻流水线, 并在断点指令执行的间隙将 断点处的真实指令再次替换成断点指令;
所述微处理器, 配置为当执行到断点指令时, 通过驱动器上报中断给 IDE, 冻结流水线, 并根据驱动器的触发解冻流水线, 对断点处的真实指令 进行取指;
所述指令存储器, 配置为存储断点指令和断点信息;
所述 IDE, 配置为为用户提供下发命令的交互界面。
2、 根据权利要求 1所述的软件调试装置, 其中, 所述断点信息包括断 点位置地址; 所述断点指令为原地跳转指令; 所述断点指令执行的间隙为 断点指令在原地执行跳转的任意两次的间隙。
3、 根据权利要求 2所述的软件调试装置, 其中, 所述驱动器, 还配置 为将来自所述 IDE的命令解析成具体的寄存器或存储器读写信号通过总线 发送给所述微处理器和 /或指令存储器。
4、 根据权利要求 3所述的的软件调试装置, 其中, 所述驱动器, 还配 置为将断点位置和断点处的真实指令存储到 IDE所在的上位机。
5、 根据权利要求 4所述的软件调试装置, 其中, 所述微处理器包括: 流水线和调试模块; 其中,
所述流水线, 配置为当执行到断点指令时, 解析发现当前指令为断点 指令后向所述调试模块发送通知, 并在解冻后对断点处的真实指令进行取 指;
所述调试模块, 配置为当接收到来自所述流水线的通知后, 冻结流水 线, 上报中断给驱动器, 并根据驱动器的触发解冻流水线。
6、 根据权利要求 5所述的软件调试装置, 其中, 所述调试模块, 配置 为当接收到来自所述流水线的通知后, 产生停止信号来冻结流水线。
7、 一种多断点的软件调试方法, 该软件调试方法包括:
微码集成开发环境 IDE在软件程序中设置断点;
驱动器获取软件程序中的断点信息, 根据所述断点信息将断点处的真 实指令替换成断点指令;
当执行到所述断点指令时, 微处理器上报中断给 IDE, 并冻结流水线; 驱动器根据 IDE下发的命令将所述断点指令换回真实指令;
微处理器解冻流水线, 对断点处的真实指令进行取指;
驱动器在断点指令执行的间隙将断点处的真实指令再次替换成断点指 令。
8、 根据权利要求 7所述的软件调试方法, 其中, 所述断点信息包括断 点位置地址。
9、 根据权利要求 8所述的软件调试方法, 其中, 该软件调试方法还包 括: 驱动器将断点位置和断点处的真实指令存储到 IDE所在的上位机。
10、根据权利要求 7所述的软件调试方法, 其中, 所述驱动器根据 IDE 下发的命令将所述断点指令换回真实指令, 微处理器解冻流水线, 对断点 处的真实指令进行取指, 驱动器在断点指令执行的间隙将断点处的真实指 令再次替换成断点指令为: 驱动器根据 IDE下发的单步操作命令或继续操 作命令, 将所述断点指令换回真实指令, 在换回真实指令时, 微处理器解 冻流水线, 对断点处的真实指令进行取指, 在对所述真实指令取指完成后, 在任意两次执行断点指令的间隙将断点处的真实指令再次替换成断点指 令。
11、 一种计算机存储介质, 存储有计算机程序, 该计算机程序用于执 行权利要求 7至 10任一所述的软件调试方法。
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