WO2014205690A1 - 视频压缩编码方法及编码器 - Google Patents
视频压缩编码方法及编码器 Download PDFInfo
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- WO2014205690A1 WO2014205690A1 PCT/CN2013/078027 CN2013078027W WO2014205690A1 WO 2014205690 A1 WO2014205690 A1 WO 2014205690A1 CN 2013078027 W CN2013078027 W CN 2013078027W WO 2014205690 A1 WO2014205690 A1 WO 2014205690A1
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- H—ELECTRICITY
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/436—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation using parallelised computational arrangements
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- the present application relates to the field of data processing, and in particular, to a video compression coding method and an encoder.
- Rate video compression coding technology has become a key technology to improve the quality of video services.
- the H.264 or AVS standard has become the mainstream video compression coding standard currently applied on the market.
- the H.264 or AVS standard has greatly improved the computational complexity, and the high-definition resolution and ultra-high-definition video real-time compression coding has become a popular high-definition resolution and ultra-high-definition video service. bottleneck.
- the existing macroblock-level parallel video compression coding uses a whole row of macroblocks as a task distribution unit. Since the encoding of the lower macroblock row depends on the upper macroblock row as a reference, the encoding speed of the corresponding thread in the lower macroblock row is higher than that of the macroblock row. When the upper macroblock row corresponds to the encoding speed of the thread, the corresponding thread of the lower macroblock row will wait, resulting in the macroblock level parallel video compression encoding failing to fully utilize the computing power of the processor and reducing the video compression coding performance.
- the present application provides a video compression coding method and an encoder to reduce the number of parallel data and the number of synchronizations between macroblocks in video compression coding, and improve video compression coding performance.
- the present application provides a video compression coding method, including:
- the main control module distributes the image frames to be encoded to the idle frame coding module one by one according to the first idle state information of the frame coding module;
- the frame coding module After receiving the image frame, the frame coding module sends an encoding trigger signal to the idle block coding module according to the second idle state information of the block coding module.
- the block coding module After receiving the coding trigger signal, the block coding module selects, according to the coding state information of the block obtained in the corresponding image frame, the block with the coding condition but not coded to perform coding, and updates the coding state information of the block after the coding is completed. And second idle state information;
- the frame encoding module detects whether the encoding of the corresponding image frame is completed, and if so, updates the first idle state information.
- the present application provides a video compression encoder, including a main control module, a frame coding module, and a block coding module, where:
- a main control module configured to distribute the image frames to be encoded to the idle frame coding module one by one according to a predetermined order according to the first idle state information of the frame coding module;
- a frame encoding module configured to: after receiving the image frame, send an encoding trigger signal to the idle block encoding module according to the second idle state information of the block encoding module; and detect whether the encoding of the corresponding image frame is completed, and if so, update the first Idle state information;
- a block coding module configured to: after receiving the coding trigger signal, select, according to the coding state information of the block that is divided in the corresponding image frame, mutually encode the block with the coding condition but not coded, and update the block after the coding is completed. Encoding status information and second idle status information.
- the main control module distributes the image frames to be encoded to the idle frame coding module one by one in a predetermined order, and the idle block coding module in the frame coding module is based on the blocks in the corresponding image frame.
- the coding state information is mutually exclusive selected by the block with the coding condition but not coded, and the coding state information of the block is updated after the coding is completed, and the idle state information of the frame coding module is updated after the coding of the image frame is completed. In this way, the block can be used as a task distribution unit.
- FIG. 1 is a flowchart of a video compression and coding method according to Embodiment 1 of the present application;
- FIG. 2 is a structural diagram of a video compression encoder according to Embodiment 1 of the present application.
- FIG. 3 is a structural diagram of a main control module 201 in a video compression encoder according to Embodiment 2 of the present application;
- step 103 is a specific flowchart of step 103 in a video compression and coding method according to Embodiment 3 of the present application;
- FIG. 5 is a schematic diagram of a longitudinal position of a block in a video compression coding method according to Embodiment 3 of the present application;
- FIG. 6 is a structural diagram of a block coding module 203 in a video compression encoder according to Embodiment 3 of the present application;
- FIG. 7 is a specific flowchart of step 103 in the video compression coding method according to Embodiment 4 of the present application.
- FIG. 8 is a structural diagram of a block coding module 203 in a video compression encoder according to Embodiment 4 of the present application.
- Embodiment 1 is a diagrammatic representation of Embodiment 1:
- the video compression coding method of this embodiment is mainly based on a video compression encoder as shown in FIG. 2.
- the shared memory stores data required for video compression coding, and the data mainly includes image frames to be encoded, and various status information, such as first idle state information and second idle state information described below. And coding status information, etc.
- the control elements in the video compression encoder provide the corresponding threads, and each thread can access the data stored in the shared memory.
- the main control module 201, the frame encoding module 202, and the block encoding module 203 in the video compression encoder are all driven by independent threads. Based on this, the above video compression coding method mainly includes the following processes:
- Step 101 The main control module distributes the image frames to be encoded to the idle frame coding module one by one according to the first idle state information of the frame coding module.
- the first idle state information is used to indicate whether the frame coding module is in an active state or an idle state, and may include an identifier of the frame coding module and a symbol indicating whether it is idle, and the main control module may be configured according to the first idle state information.
- the predetermined order is generally a sequence of image frames when displayed, and the image frames in the display order are preferentially sent to the frame encoding module for processing. Each frame encoding module processes only one image frame.
- Step 102 After receiving the image frame, the frame coding module sends an encoding trigger signal to the idle block coding module according to the second idle state information of the block coding module.
- the second idle state information is used to indicate whether the block coding module is in an active state or an idle state, and may include an identifier of the block coding module and a symbol indicating whether it is idle, and the frame coding module may be configured according to the second idle state information. Find the block encoding module that is free.
- the coded trigger signal is used to trigger the block coding module to work on the block.
- Step 103 After receiving the coding trigger signal, the block coding module randomly selects a block with coding conditions but not coding to perform coding according to the coding state information of the block obtained in the corresponding image frame, and updates the block after the coding is completed.
- Encoding status information and second idle status information The image frame is divided into blocks each having a predetermined specification and having an initial encoding state before encoding, that is, an uncoded state, such as 8 pixels x 8 pixels, or 16 pixels x 16 pixels.
- the encoding status information is used to indicate whether the block has been encoded, which may include an identifier of the block and a symbol indicating whether it has been encoded, etc.
- the identification of the block may be established by establishing a two-dimensional coordinate axis with the displayed erect image, the block
- the logo can consist of its lateral position as well as its longitudinal position.
- the block coding module can find an uncoded block based on the coding state information. Further, the block coding module may select a block having an encoding condition from among uncoded blocks, for example, a block having an inter-frame coding condition or an intra-frame coding condition.
- the intra coding condition refers to: in the image frame to which the current block belongs, the left block, the upper left block, the upper block, and the upper right block of the current block have been encoded.
- the inter-frame coding condition refers to: on the one hand, in the image frame to which the current block belongs, the left block, the upper left block, the upper block, and the upper right block of the current block have been encoded, and on the other hand, the reference picture frame on which the current block motion depends All blocks within the motion search range have been encoded.
- the block coding module may encode the block to include mode selection (inter coding mode or intra coding mode), interframe coding or intra coding, reconstruction of the block line, and entropy coding, where the block is reconstructed.
- entropy coding may include filtering, interpolation, and the like.
- the block coding module mutually selects blocks with coding conditions but not coding, and is designed to ensure that different block coding modules do not select the same block.
- the block coding module will update the coding state information of the block, so that the coding state of the block is changed from the uncoded state to the encoded state, and after the block coding module processes a block, the block coding module is updated.
- the second idle state information causes the second idle state information of the block coding module to change from the working state to the idle state.
- Step 104 The frame encoding module detects whether the encoding of the corresponding image frame is completed, and if so, updates the first idle state information. Specifically, the frame encoding module may determine, according to the encoding state information of the block, whether the corresponding image frame has been encoded. For example, when all blocks in an image frame are in an encoded state, it can be determined that the entire image frame has been encoded. Furthermore, the first idle state information of the frame coding module can be changed from the working state to the idle state, thereby informing the master module.
- the code stream corresponding to the image frame may be output.
- the main control module 201 is configured to distribute the image frames to be encoded to the idle frame coding module one by one according to the first idle state information of the frame coding module.
- the frame encoding module 202 is configured to: after receiving the image frame, send an encoding trigger signal to the idle block encoding module according to the second idle state information of the block encoding module; and detect whether the encoding of the corresponding image frame is completed, and if yes, update the first Idle state information;
- the block coding module 203 is configured to: after receiving the coding trigger signal, randomly select, according to the coding state information of the block obtained in the corresponding image frame, a block with coding conditions but not coding to perform coding, and update after the coding is completed. Encoding status information of the block and second idle status information.
- the main control module distributes the image frames to be encoded to the idle frame coding module one by one in a predetermined order, and the idle block coding module in the frame coding module is mutually exclusive according to the coding state information of the blocks in the corresponding image frame. Randomly selecting a block with coding conditions but not coding for encoding, and updating the coding state information of the block after the encoding is completed, and updating the idle state information of the frame encoding module after the encoding of the image frame is completed.
- multiple frame coding modules can simultaneously process the image frames in parallel
- multiple block coding modules can simultaneously parallel different blocks in one image frame.
- Embodiment 2 is a diagrammatic representation of Embodiment 1:
- step 101 is specifically:
- the main control module sequentially marks the image frames to be encoded as 1, 2, 3, ..., N in a predetermined order.
- the frame coding module is sequentially labeled as 1, 2, 3, ..., K according to the allocation order, when it is necessary to encode the nth image frame, n ⁇ [1, 2, 3, ..., N], to determine whether n is greater than K, if n ⁇ K, indicating that at least the nth frame coding module is idle, at this time, the main control module only needs to send the nth image frame to the nth frame coding module for processing; if n>K, then according to The first idle state information of the frame coding module detects whether the qth frame coding module completes the coding of the corresponding nKth image frame.
- n cannot divide K
- q is the remainder obtained by dividing n by K
- q is K
- the qth frame coding module detects the encoding of the corresponding nKth image frame
- the nth image frame is sent to the qth frame coding module for processing, and the qth frame coding module is detected.
- the encoding of the nKth image frame is not completed, waiting for the qth frame encoding module to complete the encoding of the corresponding nKth image frame, and waiting for After completion, the n-th image frame is transmitted to the q-th frame encoding module for processing.
- K is 5 and n is 60, it means that 5 frame coding modules can be processed at the same time.
- K takes 5 n takes 59, indicating that 5 frame encoding modules can be processed at the same time
- encoding the 59th image frame it is necessary to detect whether the fourth frame encoding module completes the 54th image frame. Encoding, if yes, characterizes that the fourth frame coding module is idle, and transmits the 59th image frame to the fourth frame coding module for processing.
- the main control module 201 in the video compression encoder of this embodiment specifically includes the structure shown in FIG. 3:
- the marking module 301 is configured to: if the number of frame encoding modules is K, the number of image frames to be encoded is N, K and N are positive integers, and the image frames to be encoded are sequentially labeled as 1, 2, 3, ... in a predetermined order. , N, and the frame coding module is sequentially labeled as 1, 2, 3, ..., K in the order of allocation;
- the detection control module 302 is configured to: when encoding the nth image frame, n ⁇ [1, 2, 3, . . . , N], determine whether n is greater than K, and if yes, according to the first idle state of the frame encoding module Information, detecting whether the qth frame coding module completes the coding corresponding to the nKth image frame. When n cannot divide K, q is the remainder obtained by dividing n by K. When n can divide K, q is K, and if so, The nth image frame is sent to the qth frame encoding module for processing.
- Embodiment 3 is a diagrammatic representation of Embodiment 3
- the encoding status information includes first indication information indicating whether the block has been encoded, and second indication information indicating a longitudinal position of the block in the image frame.
- step 103 may specifically include the process shown in FIG. 4:
- Step 401 After receiving the coding trigger signal, the block coding module assigns a selection weight value to the block with the coding condition but not coded according to the coding state information of the block in the corresponding image frame, wherein the vertical position is higher. Block, the greater the selection weight value. For example, as shown in FIG. 5, the longitudinal position of the *-marked block in the image frame corresponds to an ordinate of 3, which can be given a weight value of 120, and the longitudinal position of the #-marked block in the image frame corresponds to an ordinate of 4 It can be given a weight value of 100.
- Step 402 The block coding module randomly selects blocks with coding conditions but not coding to perform coding according to the selection weight value. Specifically, the greater the weight value assigned to the block, the greater the probability of being selected in the random selection.
- the block coding module 203 in the video compression encoder of this embodiment specifically includes the structure shown in FIG. 6:
- the task selection module 602 is configured to, after receiving the encoding trigger signal, assign a selection weight value to the second indication information that is encoded but not encoded according to the encoding state information of the block in the corresponding image frame, wherein the vertical position is The high block has a larger selection weight value, and when idle, the block having the encoding condition but not encoded is randomly selected to be input to the encoding module 601 for processing in accordance with the selection weight value.
- Embodiment 4 is a diagrammatic representation of Embodiment 4:
- step 103 may specifically include the process shown in FIG. 7:
- Step 701 The block coding module performs intra coding or inter coding on the block.
- Step 702 After completing intra coding or inter coding of the block, the block coding module updates the coding state information of the block. Specifically, after the encoding of the block is completed, the block encoding module changes the encoding state information of the block from the unencoded state to the encoded state.
- Step 703 after the update of the coding state information of the block is completed, the block coding module determines whether the row of the block that has completed the intra-frame coding or the inter-frame coding completes the coding, and if so, performs line reconstruction and entropy coding, otherwise continues to mutually exclusively select A block with encoding conditions but not encoded is encoded.
- Step 704 after the reconstruction of the row and the entropy coding are completed, the block coding module updates the second idle state information. Specifically, after completing the reconstruction of the row and entropy coding, the block coding module is changed from the working state to the idle state, so that the coding of the next block can be triggered.
- the block coding module 203 in the video compression encoder of this embodiment specifically includes the structure shown in FIG. 8:
- a progress update module 801 configured to: after the encoding module completes encoding of the block, update the encoding state information
- the determining module 802 is configured to determine, after the process of the progress update module is completed, whether the line of the block that has completed the intra-frame coding or the inter-frame coding is completed.
- the reconstruction and entropy coding module 803 is configured to perform line reconstruction and entropy coding when the determining module determines that the block of the intra-frame coding or the inter-frame coding is completed.
- the module status update module 804 is configured to update the second idle state information after the reconstruction of the row and the entropy coding are completed.
- the above embodiments can be applied to standards such as H.264, AVS, MPEG2, MPEG4 or HEVC.
- the block may be a macroblock or a maximum coding unit (Largest Coding). Unit, LCU), etc.
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Abstract
本申请公开了一种视频压缩编码方法及编码器，主控模块将待编码的图像帧按照预定顺序逐个分发至空闲的帧编码模块后，帧编码模块中空闲的块编码模块根据对应图像帧中块的编码状态信息，互斥地选取具备编码条件但未编码的块进行编码，并在编码完成后更新块的编码状态信息，而当图像帧的编码完成后，更新帧编码模块的空闲状态信息。这样就能真正做到以块为任务分发单位，只要图像中可立即编码的块的数目超过块编码线程数，所有线程就能够被充分利用，大大减少了对下方宏块进行编码的线程出现等待的情况，进而减少了块间同步的次数，降低了并行视频压缩编码通信代价，提高了视频压缩编码性能。
Description
本申请涉及数据处理领域，尤其涉及一种视频压缩编码方法及编码器。
随着视频服务的普及，各种分辨率的视频得到越来越多的应用，尤其是高清分辨率及超高清分辨率的视频逐渐开始进入网络视频服务，相应地，高清分辨率及超高清分辨率视频压缩编码技术成为提高视频服务质量的关键技术。
目前，H.264或AVS标准已经成为当前市场上应用的主流视频压缩编码标准。相对于MPEG2等以往的标准而言，H.264或AVS标准由于运算复杂度的大幅提高，高清分辨率及超高清分辨率的视频实时压缩编码成为推广高清分辨率及超高清分辨率视频服务的瓶颈。
虽然目前已有一系列基于硬件编码芯片或半硬件嵌入式***（如FPGA，DSP等）的高清分辨率视频压缩编码器投入市场，但由于基于硬件的编码***存在开发周期长、产品定型后修改不便、不便于搭建分布式编码云平台等缺点，基于软件的视频压缩编码成为互联网视频服务中一个主要的视频压缩编码方案，特别是随着多核CPU的普及，基于软件实现的视频压缩编码器已经广泛利用了CPU并行计算能力，来进行并行视频压缩编码。典型的并行视频压缩编码包括GOP级并行、帧级并行及条带并行等。宏块级并行由于其具有延迟低及不影响编码性能的优点，被广泛应用于视频压缩编码中。
现有的宏块级并行视频压缩编码是以整行宏块作为任务分发单位，由于下方宏块行的编码依赖于作为参考的上方宏块行，在下方宏块行对应线程的编码速度高于其上方宏块行对应线程的编码速度时，会导致下方宏块行对应线程出现等待，从而导致宏块级并行视频压缩编码无法充分利用处理器的计算能力，降低了视频压缩编码性能。
本申请提供一种视频压缩编码方法及编码器，以减少视频压缩编码中并行数据的排空及宏块间同步次数，提高视频压缩编码性能。
根据本申请的第一方面，本申请提供一种视频压缩编码方法，包括：
主控模块根据帧编码模块的第一空闲状态信息，将待编码的图像帧按照预定顺序逐个分发至空闲的帧编码模块；
帧编码模块接收到图像帧后，根据块编码模块的第二空闲状态信息，向空闲的块编码模块发送编码触发信号；
块编码模块接收到编码触发信号后，根据对应图像帧中被划分所得块的编码状态信息，互斥地选取具备编码条件但未编码的块进行编码，并在编码完成后更新块的编码状态信息及第二空闲状态信息；
帧编码模块检测是否完成对应图像帧的编码，若是，更新第一空闲状态信息。
根据本申请的第二方面，本申请提供一种视频压缩编码器，包括主控模块、帧编码模块及块编码模块，其中：
主控模块，用于根据帧编码模块的第一空闲状态信息，将待编码的图像帧按照预定顺序逐个分发至空闲的帧编码模块；
帧编码模块，用于在接收到图像帧后，根据块编码模块的第二空闲状态信息，向空闲的块编码模块发送编码触发信号；并检测是否完成对应图像帧的编码，若是，更新第一空闲状态信息；
块编码模块，用于在接收到编码触发信号后，根据对应图像帧中被划分所得块的编码状态信息，互斥地选取具备编码条件但未编码的块进行编码，并在编码完成后更新块的编码状态信息及第二空闲状态信息。
本申请的有益效果是：
通过提供一种视频压缩编码方法及编码器，主控模块将待编码的图像帧按照预定顺序逐个分发至空闲的帧编码模块后，帧编码模块中空闲的块编码模块根据对应图像帧中块的编码状态信息，互斥地选取具备编码条件但未编码的块进行编码，并在编码完成后更新块的编码状态信息，而当图像帧的编码完成后，更新帧编码模块的空闲状态信息。这样就能真正做到以块为任务分发单位，只要图像中可立即编码的块的数目超过块编码线程数，所有线程就能够被充分利用，大大减少了对下方宏块进行编码的线程出现等待的情况，进而减少了块间同步的次数，降低了并行视频压缩编码通信代价，提高了视频压缩编码性能。
图1为本申请实施例一的视频压缩编码方法的流程图；
图2为本申请实施例一的视频压缩编码器的结构图；
图3为本申请实施例二的视频压缩编码器中主控模块201的结构图；
图4为本申请实施例三的视频压缩编码方法中步骤103的具体流程图；
图5为本申请实施例三的视频压缩编码方法中块的纵向位置示意图；
图6为本申请实施例三的视频压缩编码器中块编码模块203的结构图；
图7为本申请实施例四的视频压缩编码方法中步骤103的具体流程图；
图8为本申请实施例四的视频压缩编码器中块编码模块203的结构图。
下面通过具体实施方式结合附图对本申请作进一步详细说明。
实施例一：
请参考图1，本实施例的视频压缩编码方法主要基于如图2所示的视频压缩编码器。在该视频压缩编码器中，共享内存存储有视频压缩编码所需的数据，这些数据主要包括待编码的图像帧，以及多种状态信息，如下述的第一空闲状态信息、第二空闲状态信息及编码状态信息等。同时，视频压缩编码器中的控制元件提供相应的线程，每条线程均可以访问共享内存中存储的数据。视频压缩编码器中的主控模块201、帧编码模块202及块编码模块203均由独立的线程驱动。基于此，上述视频压缩编码方法主要包括如下流程：
步骤101，主控模块根据帧编码模块的第一空闲状态信息，将待编码的图像帧按照预定顺序逐个分发至空闲的帧编码模块。具体地，第一空闲状态信息用于指示帧编码模块是处于工作状态还是空闲状态，其可包括帧编码模块的标识以及指示其是否空闲的符号等，主控模块根据第一空闲状态信息即可查找得到空闲的帧编码模块。而上述预定顺序一般为图像帧在显示时的先后顺序，显示顺序在先的图像帧优先发送到帧编码模块进行处理。每个帧编码模块仅针对一个图像帧进行处理。
步骤102，帧编码模块接收到图像帧后，根据块编码模块的第二空闲状态信息，向空闲的块编码模块发送编码触发信号。具体地，第二空闲状态信息用于指示块编码模块是处于工作状态还是空闲状态，其可包括块编码模块的标识以及指示其是否空闲的符号等，帧编码模块根据第二空闲状态信息即可查找得到空闲的块编码模块。编码触发信号用于触发块编码模块工作，以对块进行编码处理。
步骤103，块编码模块接收到编码触发信号后，根据对应图像帧中被划分所得块的编码状态信息，互斥地随机选取具备编码条件但未编码的块进行编码，并在编码完成后更新块的编码状态信息及第二空闲状态信息。图像帧被划分成若干块，每个块具有预定的规格并且在编码前具有初始的编码状态，即未编码状态，例如8像素×8像素，或16像素×16像素等规格。编码状态信息用于指示块是否已编码，其可包括块的标识以及指示其是否已编码的符号等，块的标识可以通过如下方式建立：以显示的正立图像建立二维坐标轴，块的标识可由其横向位置以及纵向位置组成。块编码模块根据编码状态信息可查找得到未编码的块。另外，块编码模块还可以从未编码的块中选取具备编码条件的块，例如，具备帧间编码条件或具备帧内编码条件的块。帧内编码条件是指：在当前块所属图像帧内，当前块的左块、左上块、上块及右上块已完成编码。帧间编码条件是指：一方面，在当前块所属图像帧内，当前块的左块、左上块、上块及右上块已完成编码，另一方面，当前块运动所依赖的参考图像帧中，运动搜索范围内的所有块已完成编码。块编码模块对块进行编码大致可包括模式选择（帧间编码模式或帧内编码模式）、帧间编码或帧内编码、块所在行的重建及熵编码等处理，其中，块所在行的重建及熵编码可包括滤波、插值等处理。块编码模块互斥地选取具备编码条件但未编码的块，旨在保证不同的块编码模块不会选取到同一个块。当块的编码完成后，块编码模块将更新块的编码状态信息，使块的编码状态从未编码状态变为已编码状态，并在块编码模块对某一块处理完毕后，更新块编码模块的第二空闲状态信息，使该块编码模块的第二空闲状态信息由工作状态变为空闲状态。
步骤104，帧编码模块检测是否完成对应图像帧的编码，若是，更新第一空闲状态信息。具体地，帧编码模块可根据块的编码状态信息判断对应图像帧是否已完成编码。例如，当图像帧中所有块都为已编码状态，则可判断整个图像帧已完成编码。进而该帧编码模块的第一空闲状态信息可从工作状态变为空闲状态，从而告知主控模块。
当完成整个图像帧的编码后，可输出该图像帧对应的码流。
相应地，如图2所示的本实施例的视频压缩编码器中：
主控模块201用于根据帧编码模块的第一空闲状态信息，将待编码的图像帧按照预定顺序逐个分发至空闲的帧编码模块；
帧编码模块202用于在接收到图像帧后，根据块编码模块的第二空闲状态信息，向空闲的块编码模块发送编码触发信号；并检测是否完成对应图像帧的编码，若是，更新第一空闲状态信息；
块编码模块203用于在接收到编码触发信号后，根据对应图像帧中被划分所得块的编码状态信息，互斥地随机选取具备编码条件但未编码的块进行编码，并在编码完成后更新块的编码状态信息及第二空闲状态信息。
通过实施本实施例，主控模块将待编码的图像帧按照预定顺序逐个分发至空闲的帧编码模块后，帧编码模块中空闲的块编码模块根据对应图像帧中块的编码状态信息，互斥地随机选取具备编码条件但未编码的块进行编码，并在编码完成后更新块的编码状态信息，而当图像帧的编码完成后，更新帧编码模块的空闲状态信息。这样，在主控模块的控制下，多个帧编码模块可同时对图像帧进行并行处理，而在帧编码模块的控制下，多个块编码模块可同时对一个图像帧内的不同块进行并行处理，因此能这样就能真正做到以块为任务分发单位，只要图像中可立即编码的块的数目超过块编码线程数，所有线程就能够被充分利用，大大减少了对下方宏块进行编码的线程出现等待的情况，进而减少了块间同步的次数，降低了并行视频压缩编码通信代价，提高了视频压缩编码性能。
实施例二：
本实施例在实施例一基础上增加了如下内容：
在视频压缩编码方法中，步骤101具体为：
若帧编码模块数量为K，待编码的图像帧数量为N，K与N均为正整数，主控模块将待编码的图像帧按照预定顺序依次标记为1,2,3,…,N，并将帧编码模块按照分配次序依次标记为1,2,3,…,K，当需要对第n个图像帧进行编码，n∈[1,2,3,…,N]，判断n是否大于K，若n≤K，表示至少第n个帧编码模块空闲，此时主控模块只需将第n个图像帧发送至第n个帧编码模块进行处理即可；若n＞K，则根据帧编码模块的第一空闲状态信息，检测第q个帧编码模块是否完成对应第n-K个图像帧的编码，当n不能整除K时，q为n除以K所得余数，当n能整除K时，q为K，检测到第q个帧编码模块完成对应第n-K个图像帧的编码时，则将第n个图像帧发送至第q个帧编码模块进行处理，检测到第q个帧编码模块没有完成对应第n-K个图像帧的编码时，等待第q个帧编码模块完成对应第n-K个图像帧的编码，并在等待结束后，将第n个图像帧发送至第q个帧编码模块进行处理。例如，当K取5，n取60时，表示有5个帧编码模块可以同时处理，那么要对第60个图像帧进行编码时，需检测第5个帧编码模块是否完成对第55个图像帧的编码，若是，则表征第5个帧编码模块空闲，将第60个图像帧发送至第5个帧编码模块进行处理。当K取5，n取59时，表示有5个帧编码模块可以同时处理，那么要对第59个图像帧进行编码时，需检测第4个帧编码模块是否完成对第54个图像帧的编码，若是，则表征第4个帧编码模块空闲，将第59个图像帧发送至第4个帧编码模块进行处理。
相应地，本实施例的视频压缩编码器中主控模块201具体包括如图3所示的结构：
标记模块301，用于若帧编码模块数量为K，待编码的图像帧数量为N，K与N均为正整数，将待编码的图像帧按照预定顺序依次标记为1,2,3,…,N，并将帧编码模块按照分配次序依次标记为1,2,3,…,K；
检测控制模块302，用于当需要对第n个图像帧进行编码，n∈[1,2,3,…,N]，判断n是否大于K，若是，则根据帧编码模块的第一空闲状态信息，检测第q个帧编码模块是否完成对应第n-K个图像帧的编码，当n不能整除K时，q为n除以K所得余数，当n能整除K时，q为K，若是，则将第n个图像帧发送至第q个帧编码模块进行处理。
实施例三：
本实施例在实施例一或实施例二基础上增加了如下内容：
编码状态信息包括用于指示块是否已编码的第一指示信息，以及用于指示块在图像帧中的纵向位置的第二指示信息。
在视频压缩编码方法中，步骤103具体可包括如图4所示的流程：
步骤401，块编码模块接收到编码触发信号后，根据对应图像帧中块的编码状态信息，对具备编码条件但未编码的块参照第二指示信息赋予选择权重值，其中，纵向位置越高的块，选择权重值越大。例如，如图5所示，*标记的块在图像帧中的纵向位置对应纵坐标为3，其可被赋予权重值120，而#标记的块在图像帧中的纵向位置对应纵坐标为4，其可被赋予权重值100。
步骤402，块编码模块按照选择权重值，互斥地随机选择具备编码条件但未编码的块进行编码。具体地，当块被赋予的权重值越大，在随机选择中，被选的几率也越大。
相应地，本实施例的视频压缩编码器中块编码模块203具体包括如图6所示的结构：
编码模块601，用于对块进行编码；
任务选取模块602，用于在接收到编码触发信号后，根据对应图像帧中块的编码状态信息，对具备编码条件但未编码的块参照第二指示信息赋予选择权重值，其中，纵向位置越高的块，选择权重值越大，并当空闲时，按照选择权重值，互斥地随机选择具备编码条件但未编码的块输入到编码模块601进行处理。
实施例四：
在实施例在实施例一至三中任一实施例的基础上增加了如下内容：
在视频压缩编码方法中，步骤103具体可包括如图7所示的流程：
步骤701，块编码模块对块进行帧内编码或帧间编码。
步骤702，当完成对块的帧内编码或帧间编码后，块编码模块更新块的编码状态信息。具体地，在完成对块的编码后，块编码模块将块的编码状态信息从未编码状态变为已编码状态。
步骤703，块的编码状态信息更新完成后，块编码模块判断已完成帧内编码或帧间编码的块所在行是否完成编码，若是，则进行行的重建及熵编码，否则继续互斥地选取具备编码条件但未编码的块进行编码。
步骤704，当行的重建及熵编码完成后，块编码模块更新第二空闲状态信息。具体的，在完成行的重建及熵编码后，将块编码模块从工作状态变为空闲状态，从而可被触发进行下一个块的编码。
相应地，本实施例的视频压缩编码器中块编码模块203具体包括如图8所示的结构：
进度更新模块801，用于在编码模块完成对块的编码后，更新编码状态信息；
判断模块802，用于当进度更新模块处理完成后，判断已完成帧内编码或帧间编码的块所在行是否完成编码；
重建及熵编码模块803，用于在判断模块判断为已完成帧内编码或帧间编码的块所在行完成编码时，进行行的重建及熵编码；
模块状态更新模块804，用于当行的重建及熵编码完成后，更新第二空闲状态信息。
需要进一步说明的有如下几点：
1、上述各实施例可应用于H.264、AVS、MPEG2、MPEG4或HEVC等标准。
2、上述各实施例中，块可以是宏块，也可以是最大编码单元（Largest Coding
Unit，LCU）等。
以上内容是结合具体的实施方式对本申请所作的进一步详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换。
Claims (10)
- 一种视频压缩编码方法，其特征在于，包括：主控模块根据帧编码模块的第一空闲状态信息，将待编码的图像帧按照预定顺序逐个分发至空闲的帧编码模块；帧编码模块接收到图像帧后，根据块编码模块的第二空闲状态信息，向空闲的块编码模块发送编码触发信号；块编码模块接收到编码触发信号后，根据对应图像帧中被划分所得块的编码状态信息，互斥地选取具备编码条件但未编码的块进行编码，并在编码完成后更新块的编码状态信息及第二空闲状态信息；帧编码模块检测是否完成对应图像帧的编码，若是，更新第一空闲状态信息。
- 如权利要求1所述的视频压缩编码方法，其特征在于，主控模块根据帧编码模块的第一空闲状态信息，将待编码的图像帧按照预定顺序逐个分发至空闲的帧编码模块具体为：若帧编码模块数量为K，待编码的图像帧数量为N，K与N均为正整数，主控模块将待编码的图像帧按照预定顺序依次标记为1,2,3,…,N，并将帧编码模块按照分配次序依次标记为1,2,3,…,K，当需要对第n个图像帧进行编码，n∈[1,2,3,…,N]，判断n是否大于K，若是，则根据帧编码模块的第一空闲状态信息，检测第q个帧编码模块是否完成对应第n-K个图像帧的编码，当n不能整除K时，q为n除以K所得余数，当n能整除K时，q为K，若是，则将第n个图像帧发送至第q个帧编码模块进行处理。
- 如权利要求1或2所述的视频压缩编码方法，其特征在于，编码状态信息包括用于指示块是否已编码的第一指示信息，以及用于指示块在图像帧中的纵向位置的第二指示信息，块编码模块接收到编码触发信号后，根据对应图像帧中被划分所得块的编码状态信息，互斥地选取具备编码条件但未编码的块进行编码具体包括：块编码模块接收到编码触发信号后，根据对应图像帧中块的编码状态信息，对具备编码条件但未编码的块参照第二指示信息赋予选择权重值，其中，纵向位置越高的块，选择权重值越大；块编码模块按照选择权重值，互斥地随机选择具备编码条件但未编码的块进行编码。
- 如权利要求1至3中任一项所述的视频压缩编码方法，其特征在于，具备编码条件的块是指具备帧间编码条件或帧内编码条件的块。
- 如权利要求4所述的视频压缩编码方法，其特征在于，块编码模块接收到编码触发信号后，根据对应图像帧中被划分所得块的编码状态信息，互斥地选取具备编码条件但未编码的块进行编码，并在编码完成后更新块的编码状态信息及第二空闲状态信息包括：块编码模块对块进行帧内编码或帧间编码；当完成对块的帧内编码或帧间编码后，块编码模块更新块的编码状态信息；块的编码状态信息更新完成后，块编码模块判断已完成帧内编码或帧间编码的块所在行是否完成编码，若是，则进行行的重建及熵编码；当行的重建及熵编码完成后，块编码模块更新第二空闲状态信息。
- 一种视频压缩编码器，其特征在于，包括主控模块、帧编码模块及块编码模块，其中：主控模块，用于根据帧编码模块的第一空闲状态信息，将待编码的图像帧按照预定顺序逐个分发至空闲的帧编码模块；帧编码模块，用于在接收到图像帧后，根据块编码模块的第二空闲状态信息，向空闲的块编码模块发送编码触发信号；并检测是否完成对应图像帧的编码，若是，更新第一空闲状态信息；块编码模块，用于在接收到编码触发信号后，根据对应图像帧中被划分所得块的编码状态信息，互斥地选取具备编码条件但未编码的块进行编码，并在编码完成后更新块的编码状态信息及第二空闲状态信息。
- 如权利要求6所述的视频压缩编码器，其特征在于，主控模块包括：标记模块，用于若帧编码模块数量为K，待编码的图像帧数量为N，K与N均为正整数，将待编码的图像帧按照预定顺序依次标记为1,2,3,…,N，并将帧编码模块按照分配次序依次标记为1,2,3,…,K；检测控制模块，用于当需要对第n个图像帧进行编码，n∈[1,2,3,…,N]，判断n是否大于K，若是，则根据帧编码模块的第一空闲状态信息，检测第q个帧编码模块是否完成对应第n-K个图像帧的编码，当n不能整除K时，q为n除以K所得余数，当n能整除K时，q为K，若是，则将第n个图像帧发送至第q个帧编码模块进行处理。
- 如权利要求6或7所述的视频压缩编码器，其特征在于，编码状态信息包括用于指示块是否已编码的第一指示信息，以及用于指示块在图像帧中的纵向位置的第二指示信息，块编码模块包括：编码模块，用于对块进行编码；任务选取模块，用于在接收到编码触发信号后，根据对应图像帧中块的编码状态信息，对具备编码条件但未编码的块参照第二指示信息赋予选择权重值，其中，纵向位置越高的块，选择权重值越大，并当空闲时，按照选择权重值，互斥地随机选择具备编码条件但未编码的块输入到编码模块进行处理。
- 如权利要求6至8中任一项所述的视频压缩编码器，其特征在于，具备编码条件的块是指具备帧间编码条件或帧内编码条件的块。
- 如权利要求9所述的视频压缩编码器，其特征在于，块编码模块还包括：进度更新模块，用于在编码模块完成对块的编码后，更新编码状态信息；判断模块，用于当进度更新模块处理完成后，判断已完成帧内编码或帧间编码的块所在行是否完成编码；熵编码模块，用于在判断模块判断为已完成帧内编码或帧间编码的块所在行完成编码时，进行行的重建及熵编码；模块状态更新模块，用于当行的重建及熵编码完成后，更新第二空闲状态信息。
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