WO2014198550A1 - Method for producing a nitride compound semiconductor component - Google Patents
Method for producing a nitride compound semiconductor component Download PDFInfo
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- WO2014198550A1 WO2014198550A1 PCT/EP2014/061139 EP2014061139W WO2014198550A1 WO 2014198550 A1 WO2014198550 A1 WO 2014198550A1 EP 2014061139 W EP2014061139 W EP 2014061139W WO 2014198550 A1 WO2014198550 A1 WO 2014198550A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 109
- -1 nitride compound Chemical class 0.000 title claims abstract description 36
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 53
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 29
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 29
- 239000010703 silicon Substances 0.000 claims abstract description 29
- 239000000463 material Substances 0.000 claims abstract description 26
- 230000007423 decrease Effects 0.000 claims abstract description 12
- 229910052782 aluminium Inorganic materials 0.000 claims description 39
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 38
- 238000000034 method Methods 0.000 claims description 29
- 230000005693 optoelectronics Effects 0.000 claims description 12
- 239000010410 layer Substances 0.000 description 166
- 230000000052 comparative effect Effects 0.000 description 6
- 239000013078 crystal Substances 0.000 description 6
- 230000007547 defect Effects 0.000 description 6
- 238000001816 cooling Methods 0.000 description 5
- 230000005855 radiation Effects 0.000 description 5
- 238000002441 X-ray diffraction Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 239000002346 layers by function Substances 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 238000013139 quantization Methods 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 230000003595 spectral effect Effects 0.000 description 2
- 238000003917 TEM image Methods 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000003102 growth factor Substances 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 239000002096 quantum dot Substances 0.000 description 1
- 230000011514 reflex Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/0251—Graded layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/025—Physical imperfections, e.g. particular concentration or distribution of impurities
Definitions
- the invention relates to a method for producing a nitride compound semiconductor device on a substrate having a silicon surface.
- Nitride compound semiconductors are commonly used in LEDs or
- Laser diodes are used, usually in blue
- Emit spectral range Depending on the composition of the semiconductor material, for example, an emission in the ultraviolet or green spectral range is possible. Luminescence conversion by means of phosphors, the
- Nitride compound semiconductor based LEDs are therefore of considerable importance for LED lighting systems.
- the nitride compound semiconductor layers are typically epitaxially grown on a growth substrate that conforms to the lattice constant and crystal structure of the growth factor
- Nitride compound semiconductor material is adjusted. Suitable substrate materials are in particular sapphire, GaN or SiC. However, these substrate materials are comparatively expensive. The growth of nitride compound semiconductors
- nitride compound semiconductors used growth temperature of about 1000 ° C to room temperature generated large tensile stresses in GaN.
- WO 2011/039181 A1 discloses processes for the production of nitride compound semiconductor components
- the publication WO 2013/045355 Al describes a method for producing nitride compound semiconductor components on silicon substrates, in which a layer structure is arranged between the silicon substrate and the functional layer sequence of the optoelectronic component, in which a masking layer of a silicon nitride-containing material is embedded. Embedding the masking layer achieves a reduction in dislocation density.
- the invention is based on the object, a further
- Specify nitride compound semiconductor device on a substrate with a silicon surface can be achieved by the particularly low defect densities in the semiconductor layer sequence, and which is characterized by a relatively low production cost.
- the growth substrate may in particular be a silicon substrate.
- the growth substrate may be an SOI substrate (Silicon On Insulator).
- a buffer layer having Al x In y Ga x - y N with O x 1, O x y y and x + y ⁇ 1 is applied to the silicon surface
- the buffer layer preferably has Al x Gai x N with 0 ⁇ x ⁇ 1.
- Semiconductor layer sequence is based on a nitride compound semiconductor. "On a nitride compound semiconductor based "means in this context that the semiconductor layer sequence or at least one layer thereof comprises a III-nitride compound semiconductor material, preferably Al m In y Ga m - n N, where 0 ⁇ m ⁇ 1, 0 ⁇ n ⁇ 1 and m + n ⁇ 1. This material does not necessarily have a III-nitride compound semiconductor material, preferably Al m In y Ga m - n N, where 0 ⁇ m ⁇ 1, 0 ⁇ n ⁇ 1 and m + n ⁇ 1. This material does not necessarily have a III-nitride compound semiconductor material, preferably Al m In y Ga m - n N, where 0 ⁇ m ⁇ 1, 0 ⁇ n ⁇ 1 and m + n ⁇ 1. This material does not necessarily have a III-nitride compound semiconductor material, preferably Al m In y
- the above formula contains only the essential constituents of the crystal lattice (Al, In, Ga, N), even if these may be partially replaced by small amounts of other substances.
- the nitride compound semiconductor device is according to
- the semiconductor layer sequence contains in particular an active layer of the optoelectronic component.
- Example a light-emitting diode layer sequence.
- the active layer is in particular one during operation of the component
- Radiation-emitting layer for example, as a pn junction, as a double heterostructure, as a single quantum well structure or multiple quantum well structure
- the light-emitting diode layer sequence may include, for example, an n-type semiconductor region and a p-type semiconductor region
- the buffer layer is provided with an in
- the buffer layer advantageously has one varying material composition, such that a lateral lattice constant of the buffer layer gradually or continuously increases in a first region and in a second region, that of the first region in the growth direction
- the lateral lattice constant is to be understood here and below as meaning the lattice constant in the direction perpendicular to the direction of growth.
- the buffer layer preferably consists exclusively of the first region and the second region, i. the buffer layer has no further regions apart from the first region and the second region following in the growth direction.
- the buffer layer has a smaller lateral lattice constant than a semiconductor layer of the semiconductor layer sequence adjoining the buffer layer.
- Buffer layer having such a varying lattice constant, a particularly low defect density in the
- Lattice constant of the buffer layer in the second region is gradually or continuously reduced so that they are at the interface to the subsequent
- Interface to the semiconductor layer sequence addition but end in the region of the interface.
- the buffer layer has a smaller lateral
- Lattice constant has as the adjacent semiconductor layer of the semiconductor layer sequence, the
- the spatial variation of the lattice constant of the buffer layer in the growth direction takes place in that the
- Material composition is gradually or continuously changed during growth. This is preferably realized by the fact that the aluminum content x of the material Al x In y Gai x - y N of the buffer layer decreases in the first region and increases again in the second region. Since the
- Lattice constant is reduced in this material system with increasing aluminum content, is achieved in this way that the lattice constant increases in the first region and decreases in the second region.
- the buffer layer can be
- the buffer layer advantageously has an aluminum content x.sub.0.8, preferably 0.times.0.9, at an interface with the growth substrate.
- the buffer layer has AIN at the interface with the growth substrate.
- the aluminum content x in the buffer layer advantageously has a minimum, wherein at least x ⁇ 0.6, preferably x -S 0.2, particularly preferably x -S 0.1 applies.
- the aluminum content is gradually or continuously reduced in the first range to decrease to a value of x ⁇ 0.6, preferably x-S 0.2 or even x ⁇ 0.1, and in the following second range is increased again gradually or continuously.
- Aluminum content x is thus reached at the boundary between the first region and the second region.
- the buffer layer advantageously has an aluminum content x.gtoreq.0.6, preferably x.sub.0.8 or even x.gtoreq.0.9.
- a semiconductor layer of the semiconductor layer sequence adjoining the buffer layer preferably has Al m In n Ga m - n N, where m ⁇ 0.5. Preferably, m ⁇ 0.2 or even m ⁇ 0.1.
- the adjacent to the buffer layer semiconductor layer of the semiconductor layer sequence thus advantageously has a much lower aluminum content than the buffer layer at the interface to the semiconductor layer sequence.
- the silicon surface of the growth substrate is a (111) plane.
- the (111) plane of a silicon crystal is particularly well suited for growing a hexagonal nitride compound semiconductor material due to the quasi-hexagonal crystal structure.
- the semiconductor layer sequence is advantageously connected to a carrier substrate on a surface lying opposite the growth substrate. Since the carrier substrate does not have to be suitable for growing a nitride compound semiconductor material, it can advantageously be selected on the basis of other criteria, in particular a good thermal and / or electrical conductivity. In the case of an optoelectronic nitride compound semiconductor device, before the semiconductor layer sequence is connected to the carrier substrate, a mirror layer can be applied to the semiconductor substrate
- Semiconductor layer sequence can be applied to those emitted during operation of the optoelectronic nitride compound semiconductor device in the direction of the carrier substrate
- the buffer layer can be at least partially removed, for example by an etching process.
- the remaining remainder of the buffer layer is on in this case arranged the radiation exit side of the optoelectronic component.
- Figure 1 is applied to a silicon substrate
- FIG. 3 shows a coating applied to a silicon substrate
- Figure 4 is a graph of measured
- Growth substrate 1 is provided, which has a silicon surface.
- the growth substrate 1 can
- the growth substrate 1 for example, be a silicon wafer.
- the growth substrate 1 it is also possible for the growth substrate 1 to be an SOI substrate.
- the silicon surface of the growth substrate 1 is preferably a (111) crystal plane which, because of its hexagonal symmetry, is particularly good for growing
- Nitride compound semiconductors is suitable. Then Nitride compound semiconductors is suitable. The
- Nitride compound semiconductor materials used substrates of sapphire, GaN or SiC has the advantage that it is relatively inexpensive.
- a buffer layer 2 of Al x In y Gai- x - y N is first grown in the method with O.sub.x 1, O.sub.y 1 and x + y ⁇ 1.
- the indium component y 0, ie the buffer layer has Al x Ga x -N with 0 ⁇ x ⁇ 1.
- the illustrated embodiment the
- Material composition of the buffer layer 2 during growth has been varied such that the lateral lattice constant of the buffer layer 2 in a first region 2a continuously increases and decreases continuously in a subsequent in the growth direction second region 2b.
- Embodiment is a light-emitting diode layer sequence is shown schematically in Figure 1.
- the aluminum content x of the buffer layer 2 is at the interface between the growth substrate 1 and the
- the aluminum content x initially decreases continuously in the first region 2a. This has the consequence that the lateral lattice constant of the
- Nitride compound semiconductor material continuously increased.
- the aluminum content x reaches a minimum and, correspondingly, the lattice constant of the nitride compound semiconductor material reaches a maximum.
- the aluminum component x advantageously has a
- a next step a
- the semiconductor layer sequence 3 is the light-emitting diode layer sequence of an optoelectronic component.
- Light-emitting diode layer sequence 3 is based on a nitride compound semiconductor.
- the light-emitting diode layer sequence 3 contains in particular an active layer 5 which is suitable for the emission of radiation.
- the active layer 5 may be formed, for example, as a pn junction, a double heterostructure, a single quantum well structure, or a multiple quantum well structure.
- Designation Quantum well structure includes any
- Quantum well structure no information about the dimensionality of the quantization. It thus includes quantum wells, quantum wires and quantum dots and any combination of these structures.
- the light-emitting diode layer sequence 3 contains at least one semiconductor layer 4 of a first conductivity type and at least one semiconductor layer 6 of a second
- the aluminum content of the buffer layer 2 is preferably increased continuously in the second region 2b in such a way that the aluminum content at the interface to the
- Light emitting diode layer sequence 3 is greater than that Aluminum content of the semiconductor layer 4 of
- Light-emitting diode layer sequence 3 which adjoins the buffer layer 2.
- the semiconductor layer 4 adjoining the light-emitting diode layer sequence 3 advantageously has Al m In n Ga m - n N, where m ⁇ 0.5. In particular, m ⁇ 0.2 or even m ⁇ 0.1. Due to the fact that the aluminum content of the
- Buffer layer 2 adjacent semiconductor layer 4 is smaller than the aluminum content of the buffer layer 2 at the
- the adjacent to the buffer layer 2 semiconductor layer 4 is grown with a compressive strain. This has the advantage that a tensile stress, the cooling of the
- Layer system can occur from the growth temperature to room temperature, counteracted.
- Embodiment of the method for producing a nitride compound semiconductor device shown The layer sequence differs from the embodiment of Figure 1 in that the aluminum content x in the
- Buffer layer 2 is not continuous, but varies gradually. In a first region 2a facing the growth substrate 1, the aluminum content x in the buffer layer 2 gradually decreases and decreases in one of the
- the buffer layer 2 has a plurality of partial layers in the first region 2a, wherein the aluminum content x decreases step by step from partial layer to partial layer. Furthermore, the buffer layer has a plurality of partial layers in the second region 2b, wherein the
- Aluminum content x gradually increases from partial layer to partial layer.
- the second embodiment corresponds to the first embodiment described above.
- a layer sequence on a growth substrate 1 made of silicon is not
- the buffer layer 2 at the interface with the light-emitting diode layer sequence 3 has substantially the same lattice constant as that of the buffer layer 2
- Layer sequence Sl is less than in the layer sequence S3, which was prepared according to the comparative example not according to the invention.
- Reflections in the examination by means of X-ray diffraction indicate a reduced defect density of the layer sequence in the exemplary embodiment according to the invention.
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Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016518909A JP6138359B2 (en) | 2013-06-11 | 2014-05-28 | Method for manufacturing nitride compound semiconductor device |
DE112014002779.0T DE112014002779B8 (en) | 2013-06-11 | 2014-05-28 | Process for manufacturing a nitride compound semiconductor device |
CN201480033604.4A CN105308720B (en) | 2013-06-11 | 2014-05-28 | Method for manufacturing nitride compound semiconductor device |
US14/891,924 US9660137B2 (en) | 2013-06-11 | 2014-05-28 | Method for producing a nitride compound semiconductor device |
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Application Number | Priority Date | Filing Date | Title |
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DE102013106044.7 | 2013-06-11 | ||
DE102013106044 | 2013-06-11 |
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WO2014198550A1 true WO2014198550A1 (en) | 2014-12-18 |
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PCT/EP2014/061139 WO2014198550A1 (en) | 2013-06-11 | 2014-05-28 | Method for producing a nitride compound semiconductor component |
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US (1) | US9660137B2 (en) |
JP (1) | JP6138359B2 (en) |
CN (1) | CN105308720B (en) |
DE (1) | DE112014002779B8 (en) |
WO (1) | WO2014198550A1 (en) |
Cited By (2)
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DE102018119634A1 (en) * | 2018-08-13 | 2020-02-13 | Osram Opto Semiconductors Gmbh | METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT AND WORKPIECE |
US11018278B2 (en) | 2017-03-02 | 2021-05-25 | Osram Oled Gmbh | Semiconductor body |
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WO2019035274A1 (en) * | 2017-08-14 | 2019-02-21 | ソニー株式会社 | Template substrate, electronic device, light-emitting device, method for producing template substrate and method for producing electronic device |
KR20190079787A (en) * | 2017-12-28 | 2019-07-08 | 삼성전자주식회사 | Manufacturing method of semiconductor light emitting device |
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JP6138359B2 (en) | 2017-05-31 |
US9660137B2 (en) | 2017-05-23 |
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US20160093765A1 (en) | 2016-03-31 |
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CN105308720A (en) | 2016-02-03 |
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