WO2014152523A1 - Graphene growth on planes offset from a substrate - Google Patents

Graphene growth on planes offset from a substrate Download PDF

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Publication number
WO2014152523A1
WO2014152523A1 PCT/US2014/027434 US2014027434W WO2014152523A1 WO 2014152523 A1 WO2014152523 A1 WO 2014152523A1 US 2014027434 W US2014027434 W US 2014027434W WO 2014152523 A1 WO2014152523 A1 WO 2014152523A1
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WO
WIPO (PCT)
Prior art keywords
exposed side
graphene
substrate
side walls
foundation material
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PCT/US2014/027434
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French (fr)
Inventor
Mark Alan Davis
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Solan, LLC
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Publication of WO2014152523A1 publication Critical patent/WO2014152523A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02527Carbon, e.g. diamond-like carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition

Definitions

  • the disclosed implementations generally relate to graphene -based devices and the methods by which graphene-based devices are manufactured.
  • Graphene structures e.g., graphene quantum dots, graphene nanoribbons, graphene nanonetworks, graphene plasmonics, and graphene super-lattices
  • graphene can be used in electronics, composite materials, and for energy generation and storage.
  • Some of the properties of some graphene-based structures are dependent on the dimensions of and/or the number of defects in one or more graphene sheets forming a stack (i.e. layer or film).
  • Conventional methods of manufacturing graphene-based structures include growing a substantially uniform graphene film and then patterning (e.g., by etching, oxidation, etc.) the graphene film to produce isolated graphene segments, such as graphene nanoribbons.
  • patterning graphene can damage the desirable properties of graphene by introducing defects, especially along the edges of the resulting graphene segments.
  • One aspect of the disclosure is a method of manufacturing a device including a plurality of graphene stacks. Each respective graphene stack in the plurality of graphene stacks is in a corresponding plane that intersects a plane of a substrate.
  • the method includes forming a plurality of exposed side walls in a foundation material covering the substrate. Each exposed side wall in the plurality of exposed side walls is in a respective plane that is at an offset angle to the plane of the substrate.
  • a plurality of prohibitive caps is formed at the respective ends of the plurality of exposed side walls in the foundation material. The plurality of prohibitive caps isolate graphene growth to within the plurality of exposed side walls in the foundation material.
  • Respective graphene stacks in the plurality of graphene stacks are grown on each of the exposed side walls in the plurality of exposed side walls.
  • Each graphene stack in the plurality of graphene stacks is oriented along the corresponding exposed side wall in the plurality of exposed side walls in the foundation material.
  • At least one of the graphene stacks on a respective one of the plurality of exposed side walls in the foundation material has a length less than the smallest dimension that can be produced by lithography on a plane parallel to the plane of the substrate.
  • forming the plurality of exposed side walls in the foundation material covering the substrate includes patterning the substrate to include a plurality of side walls in the substrate. In such implementations, each side wall in the plurality of side walls is coated with the foundation material. In some implementations, forming the plurality of exposed side walls in the foundation material covering the substrate also includes removing at least some of the foundation material to form the plurality of exposed side walls in the foundation material.
  • removing at least some of the foundation material includes at least one of dry etching, wet etching and plasma etching.
  • depositing the foundation material comprises at least one of atomic layer deposition, chemical vapor deposition, electroplating, spin on glass, sputtering and evaporation.
  • forming the plurality of exposed side walls in the foundation material covering the substrate includes depositing the foundation material on the substrate, and patterning the foundation material to form the plurality of exposed side walls in the foundation material by removing at least some of the foundation material.
  • removing at least some of the foundation material includes at least one of dry etching, wet etching and plasma etching.
  • depositing the foundation material comprises at least one of atomic layer deposition, chemical vapor deposition, electroplating, and spin on glass.
  • At least one exposed side wall in the plurality of exposed side walls in the foundation material is characterized by a substantially flat surface. In some implementations, at least one exposed side wall in the plurality of exposed side walls in the foundation material is characterized by a curved surface. In some implementations, each exposed side wall in the plurality of exposed side walls in the foundation material forms at least a portion of a step, a trench and a hole. In some implementations, at least one exposed side wall in the plurality of exposed side walls is characterized by a different dimension than another exposed side wall in the plurality of exposed side walls.
  • a graphene stack in the plurality of graphene stacks includes one or more sheets of graphene. In some implementations, each graphene stack in the plurality of graphene stacks includes between 1 to 500, 5 to 100, or 10 ot 50 graphene sheets. In some implementations, the respective plane of at least one graphene stack in the plurality of graphene stacks is substantially perpendicular to the plane of the substrate. In some implementations, the respective plane of at least one graphene stack in the plurality of graphene stacks is less than perpendicular to the plane of the substrate.
  • the substrate comprises at least one of silicon, doped silicon and silicon dioxide (Si0 2 ).
  • the substrate substantially comprises a material selected from the group consisting of: neoceram, barosilicate glass, germanium arsenide, a IV-V semiconductor material, a substantially metallic material, a high temperature glass, and a combination thereof.
  • the substrate substantially comprises silicon, monocrystalline silicon, Si0 2 glass, soda lime glass, lead glass, doped Si0 2 , aluminosilicate glass, borosilicate glass, dichroic glass, germanium/semiconductor glass, glass ceramic, silicate/fused silica, quartz or chalcogenide/sulphide glass.
  • a graphene stack in the plurality of graphene stacks has an optical band gap.
  • the method also includes isolating a first exposed side wall in the plurality of exposed side walls from a second exposed side wall in the plurality of exposed side walls by removing at least a portion of the foundation material between the first exposed side wall and the second exposed side wall.
  • removing the portion of the foundation material includes a planarization process to remove at least some of the foundation material in a plane parallel to the substrate.
  • the method also includes coating at least one graphene stack in the plurality of graphene stacks with a protective film.
  • the foundation material includes at least one of silicon carbide (SiC), ruthenium, iridium, platinum, copper, cobalt, nickel, palladium and stainless steel.
  • growing a respective stack in the plurality of graphene stacks on each exposed side wall in the plurality of exposed side walls includes at least one of an epitaxial growth process and chemical vapor deposition.
  • an exposed side wall in the plurality of exposed side walls in the foundation material forms a conical receptor.
  • the conical receptor is defined by a central axis substantially perpendicular to the plane of the substrate and a circular base in a plane parallel to the plane of the substrate.
  • an exposed side wall in the plurality of exposed side walls in the foundation material forms a frustum of a right circular cone.
  • the right circular code is defined by a central axis substantially perpendicular to the plane of the substrate and a lower base in a plane parallel to the plane of the substrate.
  • an exposed side wall in the plurality of exposed side walls in the foundation material forms an inverted conical receptor, where the conical receptor is defined by a central axis substantially perpendicular to the plane of the substrate and a circular base in a plane parallel to the plane of the substrate.
  • an exposed side wall in the plurality of exposed side walls in the foundation material forms an inverted frustum of a right circular cone, where the right circular code is defined by a central axis substantially perpendicular to the plane of the substrate and a lower base in a plane parallel to the plane of the substrate.
  • an exposed side wall in the plurality of exposed side walls in the foundation material forms a pyramid.
  • an exposed side wall in the plurality of exposed side walls in the foundation material forms a non-symmetrical structure.
  • the non-symmetrical structure includes an ellipsoid.
  • an exposed side wall in the plurality of exposed side walls in the foundation material forms cavity or hole that is ultimately lined with graphene.
  • an exposed side wall in the plurality of exposed side walls has a length in the range of 3-20 Angstroms.
  • the present disclosure further provides devices fabricated using any of the methods disclosed herein.
  • Figure 1 is an illustration of a cross-sectional view of an implementation of a device including a plurality of graphene stacks manufactured by a method in accordance with some implementations.
  • Figure 2 is an illustration of a cross-sectional view of another implementation of a device including a plurality of graphene stacks manufactured by a method in accordance with some implementations.
  • Figures 3A-3B are illustrations of cross-sectional views of various fabrication stages of a device including a plurality of graphene stacks manufactured by a method in accordance with some implementations.
  • Figure 4 is a flowchart of an implementation of a method of manufacturing a device including a plurality of graphene stacks.
  • graphene structures such as graphene nanoribbons, graphene nanonetworks, graphene poles/pillars, and graphene based nanohole superlattices that have at least one dimension that is not necessarily limited by a critical dimension of a lithographic process.
  • some implementations enable manufacturing a graphene structure that has a planar width that is smaller than the smallest dimension that can be produced by a lithographic process on a plane parallel to the plane of the substrate.
  • aspects of various implementations are used to enable manufacturing graphene structures on surfaces that are in one or more planes that intersect the plane of the substrate.
  • some implementations include a method of manufacturing a device including a plurality of graphene stacks that includes forming a plurality of exposed side walls in a foundation material covering the substrate. Prohibitive caps are formed at the respective ends of each side wall. The prohibitive caps isolate graphene growth to the side wall areas. A respective graphene stack in the plurality of graphene stacks is grown on each exposed side wall such that each graphene stack in the plurality of graphene stacks is oriented along the corresponding exposed side wall.
  • Another aspect of the disclosure includes devices produced by the methods disclosed herein.
  • graphite-based structures e.g. graphene quantum dots, graphene nanoribbons (GNRs), graphene nanonetworks, graphene plasmonics and graphene super-lattices
  • GNRs graphene quantum dots
  • graphene nanoribbons GNRs
  • graphene nanonetworks graphene plasmonics
  • graphene super-lattices exhibit many exceptional chemical, mechanical, electronic and optical properties, and are very desirable for use in electronic devices, composite materials, and energy generation and storage.
  • Such graphite-based structures in general comprise a graphene layer, typically nanometers thick and having a characteristic dimension also in the nanometers range.
  • GNRs are required to have a width within a few nanometers due to the inverse relationship between the band gap and the width of the GNRs.
  • various methods are provided for fabricating graphite- based structures while achieving desired size, specified geometries, and characterized electronic properties of the graphite -based structures. These methods include, but are not limited to, (1) the combination of e-beam lithography and oxygen plasma etching; (2) stripping of graphite that is sonochemically processed; and (3) bottom-up chemical synthesis, e.g., by cyclodehydrogenation of l ,4-diiodo-2,3,5,6-tetraphenylbenzene6, or 10,10'-dibromo-9,9'-bianthryl, polyanthrylene oligomers self-assembled on Au(l 1 1), Ag(l 1 1) or silica substrates, to name a few examples.
  • graphene sheets are stacked, with different pitch and critical dimensions, such that devices have multiple pass functionality.
  • structures comprising multiple levels of graphene layers allow for more versatile and efficient band gap devices.
  • layered materials refer to a material comprising a plurality of sheets, with each sheet having a substantially planar structure.
  • the term “stacks” refers to one or more sheets of a material (e.g., one or more layers of graphene).
  • a graphene stack can also refer to one, a few, several, several tens, several hundreds or several thousands sheets of graphene, where each such sheet is a one-atom thick sheet composed of sp -hybridized carbon.
  • graphene structures is used interchangeably with “graphene.”
  • the term “stacks” is interchangeable with the terms “graphene stacks” and “stacks of graphene.”
  • the term “substrate” refers to one layer or multiple layers.
  • a substrate is glass, Si, Si0 2 , SiC, or another material.
  • the term “substrate” is equivalent to and interchangeable with the term “substrate stack.”
  • the term “substrate” hereinafter refers to any combination of layers upon which additional processing operations are performed. For instance, when one or more layers of a respective material (e.g., Si0 2 , S1 3 N 4 ) is grown on a silicon wafer, the term substrate alternatively refers (e.g., depending on context) to the silicon alone or to the silicon wafer inclusive of the one or more layers.
  • foundation material refers to any material that is suitable for growing graphene.
  • foundation materials are catalytic metals, e.g., Pt, Au, Fe, Rh, Ti, Ir, Ru, Ni, or Cu.
  • foundation materials are non-metal materials, such as Si, SiC, non-stoichiometric SiC (e.g., boron doped or otherwise), and other carbon enhanced materials.
  • carbon enhanced refers to any materials into which carbon has been added.
  • FIG. 1 is an illustration of a cross-sectional view of an implementation of a device 100 including a plurality of graphene stacks manufactured by a method in accordance with some implementations. While certain specific features are illustrated, those skilled in the art will appreciate from the present disclosure that various other features (e.g. metal connecting lines, layers of other materials, etc.) have not been illustrated for the sake of brevity and so as not to obscure more pertinent aspects of the implementations disclosed herein. To that end, the device 100 includes patterned substrate 102 having a plurality of elements 104 (e.g., elements 104-1 , 104-2, 104-N). Each respective element in the plurality of elements 104 is separated from an adjacent element by a corresponding trench (e.g., trench 106-1 , 106-2, and the like) in a plurality of trenches 106 on the substrate 102.
  • a corresponding trench e.g., trench 106-1 , 106-2, and the like
  • a substrate 102 is a solid substance in the form of a planar slice.
  • the substrate 102 can be rigid or flexible.
  • the substrate 102 is made of a dielectric material, a semiconducting material, a metallic material, or a combination of such materials.
  • Exemplary dielectric materials include glass, silicon dioxide, neoceram, and sapphire.
  • Exemplary semiconducting materials include silicon (Si), silicon carbide (SiC), germanium (Ge), boron nitride (BN), and molybdenum sulfide (MoS).
  • Exemplary metallic materials comprise copper (Cu), nickel (Ni), platinum (Pt), gold (Au), cobalt (Co), ruthenium (Ru), palladium (Pd), titanium (Ti), silver (Ag), aluminum (Al), cadmium (Cd), iridium (Ir), combinations thereof, and alloys thereof.
  • the substrate 102 comprises Si, Si0 2 , SiC, Cu, Ni, or other materials.
  • the substrate 102 substantially comprises neoceram, borosilicate glass, germanium arsenide, a IV -V semiconductor material, a substantially metallic material, a high temperature glass, or a combination thereof.
  • the substrate 102 substantially comprises silicon, monocrystalline silicon, Si0 2 glass, soda lime glass, lead glass, doped Si0 2 , aluminosilicate glass, borosilicate glass, dichroic glass, germanium/semiconductor glass, glass ceramic, silicate/fused silica, quartz or chalcogenide/sulphide glass.
  • the substrate is made of poly methyl methacrylate (PMMA), polyethylene terephthalate (PET), polyvinyl alcohol (PVA), or cellulose acetate (CA).
  • the substrate 102 includes one layer. In some implementations, the substrate 102 includes a plurality of layers. In some implementations, a substrate comprises a plurality of overlying layers, in which one or more layers are different from one or more other layers. In some implementations, a layer of another material is applied onto the substrate. In some implementations, the substrate has crystallographic symmetry. In some implementations, the substrate is an amorphous solid.
  • elements 104 are features configured or generated on substrate 102. In general, at least a portion of the element is on or above the substrate. In some implementations, a trench 106 between elements 104 is a recess formed in the substrate such as by etching, a space on or above the substrate formed for example by depositing two adjacent elements on or above the substrate, or a combination thereof.
  • a first element (e.g., first element 104-1) in the plurality of elements 104 has a first surface (e.g., first surface 204-1).
  • a first trench (e.g., first trench 106-1) in the plurality of trenches 106 separates the first element from an adjacent element in the plurality of elements, and the first trench has a second surface (e.g., second surface 206-1).
  • the first surface (e.g., first surface 204-1) and the second surface (e.g., second surface 206-1) are separated by a first side wall of the first element (e.g., first side wall 208-1-b of first element 104-1).
  • the first side wall has a first height (e.g., side wall 208-1 has a first height Dl) in a direction substantially perpendicular to a common plane (not shown).
  • the first height Dl is between 1 Angstrom and 1 nm, 10 nm and 2 ⁇ , between 15 nm and 1 ⁇ , or between 10 nm and 500 nm.
  • the first surface is characterized by a first average elevation.
  • the second surface is characterized by a second average elevation.
  • the first average elevation is other than the second average elevation.
  • the first surface 204- 1 of first element 104-1 is characterized by first elevation HI
  • second surface 206-1 of trench 106-1 is characterized by second elevation H2, where HI is distinct from H2.
  • a first orthogonal projection of the first surface and a second orthogonal projection of the second surface onto a common plane are contiguous or overlapping in some implementations.
  • the first side wall is either perpendicular to the first surface or undercuts the first surface.
  • the first orthogonal projection of the first surface of the first element on the common plane is characterized by a first dimension (e.g., width) and the second orthogonal projection of the second surface of the first trench on the common plane is characterized by a second dimension (.e.g., width).
  • the first dimension is between 3 nm and 120 nm, between 8 nm and 90 nm, between 3 nm and 40 nm, or between 3 nm and 30 nm.
  • the second dimension is between 3 nm and 500 nm, between 3 nm and 300 nm, between 10 nm and 100 nm, or between 3 nm and 40 nm.
  • the first orthogonal projection of the first surface of the first element on the common plane is characterized by being isolated and/or disjointed.
  • an "orthogonal projection onto a common plane” comprises a projection of an image of a surface onto a plane without enlarging the image. Stated differently, the dimensions of the contours of the surface, when projected onto a common plane exactly match the actual dimensions of the surface that is projected.
  • the construct of "orthogonal projection onto a common plane” has utility when two or more surfaces, which may be spatially separated on a z-axis, are projected along the z-axis onto a common plane. Such a projection is useful for illustrating whether the two projected surfaces are contiguous or overlapping.
  • the device 100 also includes graphene stacks on each of the side walls 208 of each respective element in the plurality of elements 104.
  • generating graphene includes generating a respective graphene stack (e.g., graphene stacks 302-1 , 302-2, 302-3, and the like) on each of the side walls of each respective element of the plurality of elements 104.
  • generating graphene includes generating a respective graphene stack (e.g., graphene stacks 302-1 , 302-2, 302-3, and the like) on the first side wall 208-1-a of the first element 104-1 of the plurality of elements 104.
  • the generated graphene stacks 302 are segmented (e.g., mutually disjoint, discontinuous, non-overlapping and/or isolated from one another).
  • the respective graphene stack comprises about 1 to 500 graphene sheets. In some implementations, the graphene stack comprises 1 graphene sheet. In various implementations, the graphene stack comprises between 2 and 10 graphene sheets, between 10 and 30 graphene sheets, between 25 and 50 graphene sheets, between 50 and 100 graphene sheets, or over 100 graphene sheets. In some implementations, the graphene stack has a thickness that is between 1 to 100 nm. In some implementations, a sheet is a substantially two- dimensional or one-atom thick substance. In some implementations, a graphene sheet is a one- atom-thick substance with carbon atoms arranged in a hexagonal lattice.
  • a graphene sheet is a carbon-based sheet which comprises additional materials such as boron, oxides, dopants and/or edge atomic substitutes. In some implementations, a graphene sheet is a carbon-based sheet doped with boron or other elements.
  • Figure 2 is an illustration of a cross-sectional view of another implementation of device 200 including a plurality of graphene stacks manufactured by a method in accordance with some implementations.
  • the device 200 illustrated in Figure 2 is similar to and adapted from the device 100 illustrated in Figure 1.
  • Elements common to each figure include common reference numbers, and only the differences between Figures 1 and 2 are described herein for the sake of brevity.
  • certain specific features are illustrated, those skilled in the art will appreciate from the present disclosure that various other features have not been illustrated for the sake of brevity and so as not to obscure more pertinent aspects of the example implementations disclosed herein.
  • the device 200 is formed by generating a respective graphene stack on one of the two side walls 208 of each respective element (e.g., on corresponding side walls, lying in parallel planes, of the respective elements) of the plurality of elements 104.
  • generating graphene includes generating a respective graphene stack (e.g., graphene stacks 302-1 , 302-2, 302-3, and the like) on the side wall (e.g., lying along parallel planes; e.g., side wall 208-1-b of element 104-1 , side wall 208-2-b of element 104-2, and the like that lie in parallel planes) of each respective element of the plurality of elements 104.
  • the generated graphene stacks 302 are segmented (e.g., mutually disjoint, discontinuous, non- overlapping or isolated from one another).
  • Figures 3A-3B are illustrations of cross-sectional views 300 of various stages of graphene device manufactured by a method in accordance with some implementations. Those skilled in the art will appreciate from the present disclosure that the features illustrated in Figures 3A-3B are produced by a wide array of manufacturing processes, such as but not limited to, conformal deposition of a metal based graphene initiating layer and an anisoptropic etching of portions of the metal based graphene initiating layer. Additionally, a graphene stack is grown on at least one of the respective side walls of each element of the plurality of elements 104.
  • a substrate comprises a plurality of materials and/or layers including, for example, a first material of a first substrate layer 103 and a second material of a base substrate 102.
  • a substrate includes a single material and/or a single layer of a single material.
  • the first substrate layer 103 is patterned to form a plurality of elements 104 (e.g., elements 104-1 and 104-2).
  • each element in the plurality of elements 104 is separated from an adjacent element on the substrate by a corresponding trench (e.g., trench 106- 1 , 106-2, and the like) in a plurality of trenches 106 defined by the first and second substrate layers 103, 102.
  • a corresponding trench e.g., trench 106- 1 , 106-2, and the like
  • at least some trenches in the plurality of trenches 106 are defined within a single layer of material.
  • the plurality of trenches 106 is formed by removing portions of the first substrate layer 103.
  • the predetermined regions of the substrate layer 103 are removed by etching the plurality of trenches 106 into the substrate layer 103.
  • the substrate layer 103 comprises a photoresist material and portions of the substrate layer 103 (e.g., here, photoresist material) are removed using photolithography.
  • the substrate comprises a single layer (e.g., made of a substrate material).
  • the plurality of trenches 106 is formed by removing portions of substrate material from portions of the substrate.
  • portions of the substrate material are removed by etching the plurality of trenches into the substrate.
  • the plurality of trenches are etched into the substrate or into respective substrate layer 103 by photolithography, X-ray lithography, reactive ion-etching, plasma etching, sputter etching, e-beam direct writing, or a combination thereof.
  • the plurality of elements 104 is formed by selectively patterning or growing a Block co-polymer (e.g., blocks of two or more monomers, such as polystyrene and poly(methyl methacrylate) (PMMA), covalently bonded together) on portions of substrate 102 at regions of the substrate corresponding to the plurality of elements 104.
  • a Block co-polymer e.g., blocks of two or more monomers, such as polystyrene and poly(methyl methacrylate) (PMMA), covalently bonded together
  • the block copolymer is patterned using methods such as photolithography or dry etching to define the plurality of elements on the substrate.
  • a graphene initiating layer or foundation material e.g., metal based graphene initiating layer 402 is uniformly deposited (e.g., deposited uniformly, such as with uniform, consistent or regular thickness) onto substantially all of the exposed surfaces (e.g., including onto top surfaces 204 and side walls 208 of each element in the plurality of elements 104 and onto trench surfaces 206 of trenches 106) of the patterned substrate.
  • the graphene initiating layer substantially comprises a metal selected from the group consisting of: platinum, gold, palladium, ruthenium, aluminum, titanium, tungsten, cadmium, copper, nickel, nickel foam, iron, or combinations thereof.
  • the metal graphene initiating layer is conformally deposited through atomic layer deposition (ALD) onto the first surface 204-1 and the first side wall 208-1- b of the first element 104-1 and onto the second surface 206-1 of the first trench 106-1.
  • the metal graphene initiating layer is conformally deposited through chemical vapor deposition (CVD) onto the first surface 204-1 and the first side wall 208- 1-b of the first element 104-1 and onto the second surface 206-1 of the first trench 106-1.
  • ALD atomic layer deposition
  • CVD chemical vapor deposition
  • a foundation material is uniformly deposited on a un-patterned planar substrate material. Subsequently, the foundation material is patterned to produce a plurality of exposed side walls on which graphene can grow.
  • portions of the graphene initiating layer e.g., the graphene initiating layer on the top surface of each element, such as graphene initiating layer on first surface 204-1 of element 104-1 ; and the graphene initiating layer on the trench surface of each trench, such as graphene initiating layer on second surface 206-1 of trench 106-1) are directionally etched (e.g., anisotropically etched, or etched preferentially in one or more directions or axes of etching compared to at least another direction or axis; in other words, a preferential etch-rate in one or more directions or axes of etching is substantially greater than an etch rate in at least another direction or axis) so as to retain the graphene initiating layer on the side walls of the respective elements but substantially remove the graphene initiating layer on surfaces parallel to the
  • a prohibitive cap (e.g., 210-1 and 210-2) is formed at the respective ends of each exposed graphene initiating layer on the side walls of the elements 104.
  • a prohibitive cap isolates graphene growth to the side wall areas coated with a foundation material.
  • a prohibitive cap comprises a material that discourages and/or fails to encourage graphene growth.
  • a prohibitive cap is formed by a portion of the substrate.
  • a prohibitive cap is formed by a material deposited after the foundation material.
  • a graphite-based structure is formed by generating graphene using the graphene initiating layer (e.g., generating graphene stacks 302-1 -a and 302- 1 -b, 302-2-a and 302-2-b using segmented metal graphene initiating layers 402-1 -a and 402- 1-b, 402-2-a and 402-2-b, respectively).
  • graphene is generated using the graphene initiating layer 402 by growing a carbon material on the graphene initiating layer thereby forming the graphite-based structure.
  • the carbon material is deposited on the graphene initiating layer and the deposited carbon material is heated thereby forming the graphite -based structure.
  • FIG. 4 is a flowchart of an implementation of a method 400 of manufacturing a device including a plurality of graphene stacks.
  • method 400 includes forming side walls in a foundation material covering the substrate, forming prohibitive caps at the respective ends of each side wall, and growing a respective graphene stack on each side wall such that each graphene stack is oriented along the corresponding exposed side wall.
  • method 400 includes forming a plurality of exposed side walls in a foundation material covering the substrate.
  • each exposed side wall in the plurality of exposed side walls is in a respective plane that is at an offset angle to the plane of the substrate. In some embodiments this offset angle is an acute or an obtuse or a right angle.
  • forming the plurality of exposed side walls in the foundation material covering the substrate includes patterning the substrate to include a plurality of side walls in the substrate, and coating each side wall in the plurality of side walls with the foundation material.
  • forming the plurality of exposed side walls in the foundation material covering the substrate includes depositing the foundation material on the substrate, and patterning the foundation material to form the plurality of exposed side walls in the foundation material by removing at least some of the foundation material.
  • the method 400 includes forming a plurality of prohibitive caps at the respective ends of the plurality of exposed side walls in the foundation material.
  • the plurality of prohibitive caps isolate graphene growth to within the plurality of exposed side walls in the foundation material.
  • forming a plurality of prohibitive caps includes depositing material on the surfaces parallel to the plane of the substrate.
  • a prohibitive cap comprises a material that discourages and/or fails to encourage graphene growth.
  • forming a plurality of prohibitive caps includes removing a portion of the foundation material.
  • forming a plurality of prohibitive caps includes exposing a portion of the substrate material, which is configured to resist graphene growth thereon.
  • the method 400 includes growing a respective graphene stack in the plurality of graphene stacks on each exposed side wall in the plurality of exposed side walls, wherein each graphene stack in the plurality of graphene stacks is oriented along the corresponding exposed side wall in the plurality of exposed side walls in the foundation material.
  • first contact could be termed a second contact
  • second contact could be termed a first contact, which changing the meaning of the description, so long as all occurrences of the "first contact” are renamed consistently and all occurrences of the second contact are renamed consistently.
  • the first contact and the second contact are both contacts, but they are not the same contact.
  • the phrase “if it is determined [that a stated condition precedent is true]” or “if [a stated condition precedent is true]” or “when [a stated condition precedent is true]” may be construed to mean “upon determining” or “in response to determining” or “in accordance with a determination” or “upon detecting” or “in response to detecting” that the stated condition precedent is true, depending on the context.

Abstract

The various implementations described herein provide methods of manufacturing a graphene structure that has a planar width that is smaller than the smallest dimension that can be produced by a lithographic process on a plane parallel to the plane of the substrate. In particular, one aspect of the disclosure includes methods of manufacturing a device including a plurality of graphene stacks that includes forming a plurality of exposed side walls in a foundation material covering the substrate and forming prohibitive caps at the respective ends of each side wall. The prohibitive caps isolate graphene growth to the side wall areas. A respective graphene stack in the plurality of graphene stacks is grown on each exposed side wall such that each graphene stack in the plurality of graphene stacks is oriented along the corresponding exposed side wall. Another aspect of the disclosure includes devices produced by the methods disclosed herein.

Description

Graphene Growth on Planes Offset From a Substrate
CROSS REFERENCE TO RELATED PATENT APPLICATION
[0001] This application claims priority to United States Patent Application No.
61/794,482, filed March 15, 2013, entitled "Graphene Growth on Planes Offset from a Substrate," which is hereby incorporated by reference herein in its entirety.
TECHNICAL FIELD
[0002] The disclosed implementations generally relate to graphene -based devices and the methods by which graphene-based devices are manufactured.
BACKGROUND
[0003] Graphene structures (e.g., graphene quantum dots, graphene nanoribbons, graphene nanonetworks, graphene plasmonics, and graphene super-lattices) exhibit chemical, mechanical, electronic, and optical properties that have wide ranging applications. For example, graphene can be used in electronics, composite materials, and for energy generation and storage.
[0004] Some of the properties of some graphene-based structures are dependent on the dimensions of and/or the number of defects in one or more graphene sheets forming a stack (i.e. layer or film). Conventional methods of manufacturing graphene-based structures include growing a substantially uniform graphene film and then patterning (e.g., by etching, oxidation, etc.) the graphene film to produce isolated graphene segments, such as graphene nanoribbons. However, patterning graphene can damage the desirable properties of graphene by introducing defects, especially along the edges of the resulting graphene segments.
[0005] Moreover, conventional methods of patterning graphene rely on lithographic processes to create masks having the planar features that define the graphene segments in a plane parallel to the substrate. A drawback of lithographic processes generally is that lithography limits how narrow a planar graphene segment can be to the critical dimension of the lithographic process, which is typically defined as the smallest planar feature length that can be patterned using the lithographic process. As a result, dimension dependent properties of graphene are also limited by the critical dimension of the lithographic process. For example, the band gap energy of a graphene nanoribbon varies as an inverse function of the width of the graphene nanoribbon. In turn, using conventional methods, the maximum band gap energy of a graphene nanoribbon that can be fabricated is limited by the critical dimension of the lithographic process.
SUMMARY
[0006] Various implementations of methods and devices that are within the scope of the appended claims each have several aspects, no single one of which is solely responsible for the attributes described herein. Without limiting the scope of the claims, some prominent features are described herein. After considering the discussion herein, and particularly the section entitled "Detailed Description," one will understand how aspects of various implementations are used to enable methods of manufacturing a graphene stack that has a planar width that is smaller than the smallest dimension that can be produced by a lithographic process on a plane parallel to the plane of the substrate.
[0007] One aspect of the disclosure is a method of manufacturing a device including a plurality of graphene stacks. Each respective graphene stack in the plurality of graphene stacks is in a corresponding plane that intersects a plane of a substrate. In some implementations, the method includes forming a plurality of exposed side walls in a foundation material covering the substrate. Each exposed side wall in the plurality of exposed side walls is in a respective plane that is at an offset angle to the plane of the substrate. Further, in the method, a plurality of prohibitive caps is formed at the respective ends of the plurality of exposed side walls in the foundation material. The plurality of prohibitive caps isolate graphene growth to within the plurality of exposed side walls in the foundation material. Respective graphene stacks in the plurality of graphene stacks are grown on each of the exposed side walls in the plurality of exposed side walls. Each graphene stack in the plurality of graphene stacks is oriented along the corresponding exposed side wall in the plurality of exposed side walls in the foundation material.
[0008] In some implementations, at least one of the graphene stacks on a respective one of the plurality of exposed side walls in the foundation material has a length less than the smallest dimension that can be produced by lithography on a plane parallel to the plane of the substrate. [0009] In some implementations, forming the plurality of exposed side walls in the foundation material covering the substrate includes patterning the substrate to include a plurality of side walls in the substrate. In such implementations, each side wall in the plurality of side walls is coated with the foundation material. In some implementations, forming the plurality of exposed side walls in the foundation material covering the substrate also includes removing at least some of the foundation material to form the plurality of exposed side walls in the foundation material. In some implementations, removing at least some of the foundation material includes at least one of dry etching, wet etching and plasma etching. In some implementations, depositing the foundation material comprises at least one of atomic layer deposition, chemical vapor deposition, electroplating, spin on glass, sputtering and evaporation.
[0010] In some implementations, forming the plurality of exposed side walls in the foundation material covering the substrate includes depositing the foundation material on the substrate, and patterning the foundation material to form the plurality of exposed side walls in the foundation material by removing at least some of the foundation material. In some implementations, removing at least some of the foundation material includes at least one of dry etching, wet etching and plasma etching. In some implementations, depositing the foundation material comprises at least one of atomic layer deposition, chemical vapor deposition, electroplating, and spin on glass.
[0011] In some implementations, at least one exposed side wall in the plurality of exposed side walls in the foundation material is characterized by a substantially flat surface. In some implementations, at least one exposed side wall in the plurality of exposed side walls in the foundation material is characterized by a curved surface. In some implementations, each exposed side wall in the plurality of exposed side walls in the foundation material forms at least a portion of a step, a trench and a hole. In some implementations, at least one exposed side wall in the plurality of exposed side walls is characterized by a different dimension than another exposed side wall in the plurality of exposed side walls.
[0012] In some implementations, a graphene stack in the plurality of graphene stacks includes one or more sheets of graphene. In some implementations, each graphene stack in the plurality of graphene stacks includes between 1 to 500, 5 to 100, or 10 ot 50 graphene sheets. In some implementations, the respective plane of at least one graphene stack in the plurality of graphene stacks is substantially perpendicular to the plane of the substrate. In some implementations, the respective plane of at least one graphene stack in the plurality of graphene stacks is less than perpendicular to the plane of the substrate.
[0013] In some implementations, the substrate comprises at least one of silicon, doped silicon and silicon dioxide (Si02). In some implementations, the substrate substantially comprises a material selected from the group consisting of: neoceram, barosilicate glass, germanium arsenide, a IV-V semiconductor material, a substantially metallic material, a high temperature glass, and a combination thereof. In some implementations, the substrate substantially comprises silicon, monocrystalline silicon, Si02 glass, soda lime glass, lead glass, doped Si02, aluminosilicate glass, borosilicate glass, dichroic glass, germanium/semiconductor glass, glass ceramic, silicate/fused silica, quartz or chalcogenide/sulphide glass.
[0014] In some implementations, a graphene stack in the plurality of graphene stacks has an optical band gap.
[0015] In some implementations, the method also includes isolating a first exposed side wall in the plurality of exposed side walls from a second exposed side wall in the plurality of exposed side walls by removing at least a portion of the foundation material between the first exposed side wall and the second exposed side wall. In some implementations, removing the portion of the foundation material includes a planarization process to remove at least some of the foundation material in a plane parallel to the substrate.
[0016] In some implementations, the method also includes coating at least one graphene stack in the plurality of graphene stacks with a protective film.
[0017] In some implementations, the foundation material includes at least one of silicon carbide (SiC), ruthenium, iridium, platinum, copper, cobalt, nickel, palladium and stainless steel.
[0018] In some implementations, growing a respective stack in the plurality of graphene stacks on each exposed side wall in the plurality of exposed side walls includes at least one of an epitaxial growth process and chemical vapor deposition.
[0019] In some implementations, an exposed side wall in the plurality of exposed side walls in the foundation material forms a conical receptor. Here, the conical receptor is defined by a central axis substantially perpendicular to the plane of the substrate and a circular base in a plane parallel to the plane of the substrate.
[0020] In some implementations, an exposed side wall in the plurality of exposed side walls in the foundation material forms a frustum of a right circular cone. Here, the right circular code is defined by a central axis substantially perpendicular to the plane of the substrate and a lower base in a plane parallel to the plane of the substrate.
[0021] In some implementations, an exposed side wall in the plurality of exposed side walls in the foundation material forms an inverted conical receptor, where the conical receptor is defined by a central axis substantially perpendicular to the plane of the substrate and a circular base in a plane parallel to the plane of the substrate.
[0022] In some implementations, an exposed side wall in the plurality of exposed side walls in the foundation material forms an inverted frustum of a right circular cone, where the right circular code is defined by a central axis substantially perpendicular to the plane of the substrate and a lower base in a plane parallel to the plane of the substrate.
[0023] In some implementations, an exposed side wall in the plurality of exposed side walls in the foundation material forms a pyramid.
[0024] In some implementations, an exposed side wall in the plurality of exposed side walls in the foundation material forms a non-symmetrical structure. In some implementations, the non-symmetrical structure includes an ellipsoid.
[0025] In some implementations, an exposed side wall in the plurality of exposed side walls in the foundation material forms cavity or hole that is ultimately lined with graphene.
[0026] In some implementations, an exposed side wall in the plurality of exposed side walls has a length in the range of 3-20 Angstroms.
[0027] The present disclosure further provides devices fabricated using any of the methods disclosed herein.
BRIEF DESCRIPTION OF THE DRAWINGS
[0028] So that the present disclosure can be understood in greater detail, a more particular description may be had by reference to aspects of various implementations, some of which are illustrated in the appended drawings. The appended drawings, however, merely illustrate the more pertinent aspects of the present disclosure and are therefore not to be considered limiting, for the description may admit to other effective aspects and features.
[0029] Figure 1 is an illustration of a cross-sectional view of an implementation of a device including a plurality of graphene stacks manufactured by a method in accordance with some implementations.
[0030] Figure 2 is an illustration of a cross-sectional view of another implementation of a device including a plurality of graphene stacks manufactured by a method in accordance with some implementations.
[0031] Figures 3A-3B are illustrations of cross-sectional views of various fabrication stages of a device including a plurality of graphene stacks manufactured by a method in accordance with some implementations.
[0032] Figure 4 is a flowchart of an implementation of a method of manufacturing a device including a plurality of graphene stacks.
[0033] In accordance with common practice the various features illustrated in the drawings may not be drawn to scale. The dimensions of the various features may be arbitrarily expanded or reduced for clarity. In addition, some of the drawings may not depict all of the components of a given system, method or device. Finally, like reference numerals may be used to denote like features throughout the specification and figures.
DETAILED DESCRIPTION
[0034] As noted above, dimension dependent properties of graphene are limited by a critical dimension of a lithographic process when graphene structures are defined on a plane parallel to a planar substrate. By contrast, various implementations described herein provide methods of manufacturing graphene structures, such as graphene nanoribbons, graphene nanonetworks, graphene poles/pillars, and graphene based nanohole superlattices that have at least one dimension that is not necessarily limited by a critical dimension of a lithographic process. In particular, some implementations enable manufacturing a graphene structure that has a planar width that is smaller than the smallest dimension that can be produced by a lithographic process on a plane parallel to the plane of the substrate. Additionally and/or alternatively, aspects of various implementations are used to enable manufacturing graphene structures on surfaces that are in one or more planes that intersect the plane of the substrate.
[0035] Briefly, some implementations include a method of manufacturing a device including a plurality of graphene stacks that includes forming a plurality of exposed side walls in a foundation material covering the substrate. Prohibitive caps are formed at the respective ends of each side wall. The prohibitive caps isolate graphene growth to the side wall areas. A respective graphene stack in the plurality of graphene stacks is grown on each exposed side wall such that each graphene stack in the plurality of graphene stacks is oriented along the corresponding exposed side wall. Another aspect of the disclosure includes devices produced by the methods disclosed herein.
[0036] Numerous details are described herein in order to provide a thorough understanding of example implementations illustrated in the accompanying drawings. However, the invention may be practiced without many of the specific details and is only limited by the language of the claims. Well-known methods, structure and components have not been described in exhaustive detail so as not to unnecessarily obscure more pertinent aspects of the implementations described herein.
[0037] In some implementations, graphite-based structures, e.g. graphene quantum dots, graphene nanoribbons (GNRs), graphene nanonetworks, graphene plasmonics and graphene super-lattices, exhibit many exceptional chemical, mechanical, electronic and optical properties, and are very desirable for use in electronic devices, composite materials, and energy generation and storage. Such graphite-based structures in general comprise a graphene layer, typically nanometers thick and having a characteristic dimension also in the nanometers range. For example, in order to obtain adequate band gaps for operation at room temperature, GNRs are required to have a width within a few nanometers due to the inverse relationship between the band gap and the width of the GNRs.
[0038] In some implementations, various methods are provided for fabricating graphite- based structures while achieving desired size, specified geometries, and characterized electronic properties of the graphite -based structures. These methods include, but are not limited to, (1) the combination of e-beam lithography and oxygen plasma etching; (2) stripping of graphite that is sonochemically processed; and (3) bottom-up chemical synthesis, e.g., by cyclodehydrogenation of l ,4-diiodo-2,3,5,6-tetraphenylbenzene6, or 10,10'-dibromo-9,9'-bianthryl, polyanthrylene oligomers self-assembled on Au(l 1 1), Ag(l 1 1) or silica substrates, to name a few examples.
[0039] In some implementations, different pitch and duty cycle combinations in graphene devices are utilized to improve efficiency. In particular, in some implementations, graphene sheets are stacked, with different pitch and critical dimensions, such that devices have multiple pass functionality. Similarly, in some implementations, structures comprising multiple levels of graphene layers allow for more versatile and efficient band gap devices.
[0040] The disclosed implementations are described in the context of methods for fabricating thin films from layered materials and in the context of thin films made therefrom. In this specification and claims, layered materials refer to a material comprising a plurality of sheets, with each sheet having a substantially planar structure.
[0041] As used herein, the term "stacks" refers to one or more sheets of a material (e.g., one or more layers of graphene). For instance, a graphene stack can also refer to one, a few, several, several tens, several hundreds or several thousands sheets of graphene, where each such sheet is a one-atom thick sheet composed of sp -hybridized carbon. As used herein, the term "graphene structures" is used interchangeably with "graphene." As used herein, the term "stacks" is interchangeable with the terms "graphene stacks" and "stacks of graphene."
[0042] As used herein, the term "substrate" refers to one layer or multiple layers. In some implementations, a substrate is glass, Si, Si02, SiC, or another material. When referring to multiple layers, the term "substrate" is equivalent to and interchangeable with the term "substrate stack." Moreover, it should be understood that the term "substrate" hereinafter refers to any combination of layers upon which additional processing operations are performed. For instance, when one or more layers of a respective material (e.g., Si02, S13N4) is grown on a silicon wafer, the term substrate alternatively refers (e.g., depending on context) to the silicon alone or to the silicon wafer inclusive of the one or more layers.
[0043] As used herein, the term "foundation material" refers to any material that is suitable for growing graphene. In some implementations, foundation materials are catalytic metals, e.g., Pt, Au, Fe, Rh, Ti, Ir, Ru, Ni, or Cu. In some other implementations, foundation materials are non-metal materials, such as Si, SiC, non-stoichiometric SiC (e.g., boron doped or otherwise), and other carbon enhanced materials. As used herein, the phrase "carbon enhanced" materials refers to any materials into which carbon has been added.
[0044] Those of ordinary skill in the art will realize that the following detailed description of the present application is illustrative only and is not intended to be in any way limiting. Other implementations of the present application will readily suggest themselves to such skilled persons having benefit of this disclosure. Reference will now be made in detail to implementations of the present application as illustrated in the accompanying drawings. The same reference indicators will be used throughout the drawings and the following detailed description to refer to the same or like parts.
[0045] In the interest of clarity, not all of the routine features of the implementations described herein are shown and described. It will, of course, be appreciated that in the development of any such actual implementation, numerous implementation-specific decisions must be made in order to achieve the developer's specific goals, such as compliance with application- and business-related constraints, and that these specific goals will vary from one implementation to another and from one developer to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking of engineering for those of ordinary skill in the art having the benefit of this disclosure.
[0046] Figure 1 is an illustration of a cross-sectional view of an implementation of a device 100 including a plurality of graphene stacks manufactured by a method in accordance with some implementations. While certain specific features are illustrated, those skilled in the art will appreciate from the present disclosure that various other features (e.g. metal connecting lines, layers of other materials, etc.) have not been illustrated for the sake of brevity and so as not to obscure more pertinent aspects of the implementations disclosed herein. To that end, the device 100 includes patterned substrate 102 having a plurality of elements 104 (e.g., elements 104-1 , 104-2, 104-N). Each respective element in the plurality of elements 104 is separated from an adjacent element by a corresponding trench (e.g., trench 106-1 , 106-2, and the like) in a plurality of trenches 106 on the substrate 102.
[0047] In some implementations, a substrate 102 is a solid substance in the form of a planar slice. The substrate 102 can be rigid or flexible. In some implementations, the substrate 102 is made of a dielectric material, a semiconducting material, a metallic material, or a combination of such materials. Exemplary dielectric materials include glass, silicon dioxide, neoceram, and sapphire. Exemplary semiconducting materials include silicon (Si), silicon carbide (SiC), germanium (Ge), boron nitride (BN), and molybdenum sulfide (MoS). Exemplary metallic materials comprise copper (Cu), nickel (Ni), platinum (Pt), gold (Au), cobalt (Co), ruthenium (Ru), palladium (Pd), titanium (Ti), silver (Ag), aluminum (Al), cadmium (Cd), iridium (Ir), combinations thereof, and alloys thereof. In some implementations, the substrate 102 comprises Si, Si02, SiC, Cu, Ni, or other materials. In some implementations, the substrate 102 substantially comprises neoceram, borosilicate glass, germanium arsenide, a IV -V semiconductor material, a substantially metallic material, a high temperature glass, or a combination thereof.
[0048] In some implementations, the substrate 102 substantially comprises silicon, monocrystalline silicon, Si02 glass, soda lime glass, lead glass, doped Si02, aluminosilicate glass, borosilicate glass, dichroic glass, germanium/semiconductor glass, glass ceramic, silicate/fused silica, quartz or chalcogenide/sulphide glass. In some implementations, the substrate is made of poly methyl methacrylate (PMMA), polyethylene terephthalate (PET), polyvinyl alcohol (PVA), or cellulose acetate (CA).
[0049] In some implementations, the substrate 102 includes one layer. In some implementations, the substrate 102 includes a plurality of layers. In some implementations, a substrate comprises a plurality of overlying layers, in which one or more layers are different from one or more other layers. In some implementations, a layer of another material is applied onto the substrate. In some implementations, the substrate has crystallographic symmetry. In some implementations, the substrate is an amorphous solid.
[0050] In some implementations, elements 104 are features configured or generated on substrate 102. In general, at least a portion of the element is on or above the substrate. In some implementations, a trench 106 between elements 104 is a recess formed in the substrate such as by etching, a space on or above the substrate formed for example by depositing two adjacent elements on or above the substrate, or a combination thereof.
[0051] A first element (e.g., first element 104-1) in the plurality of elements 104 has a first surface (e.g., first surface 204-1). A first trench (e.g., first trench 106-1) in the plurality of trenches 106 separates the first element from an adjacent element in the plurality of elements, and the first trench has a second surface (e.g., second surface 206-1). The first surface (e.g., first surface 204-1) and the second surface (e.g., second surface 206-1) are separated by a first side wall of the first element (e.g., first side wall 208-1-b of first element 104-1). In some implementations, the first side wall has a first height (e.g., side wall 208-1 has a first height Dl) in a direction substantially perpendicular to a common plane (not shown). In various implementations, the first height Dl is between 1 Angstrom and 1 nm, 10 nm and 2 μιη, between 15 nm and 1 μιη, or between 10 nm and 500 nm. The first surface is characterized by a first average elevation. The second surface is characterized by a second average elevation. The first average elevation is other than the second average elevation. For example, the first surface 204- 1 of first element 104-1 is characterized by first elevation HI and second surface 206-1 of trench 106-1 is characterized by second elevation H2, where HI is distinct from H2.
[0052] A first orthogonal projection of the first surface and a second orthogonal projection of the second surface onto a common plane (not shown) are contiguous or overlapping in some implementations. For example, the first side wall is either perpendicular to the first surface or undercuts the first surface. In some implementations, the first orthogonal projection of the first surface of the first element on the common plane is characterized by a first dimension (e.g., width) and the second orthogonal projection of the second surface of the first trench on the common plane is characterized by a second dimension (.e.g., width). In some implementations, the first dimension is between 3 nm and 120 nm, between 8 nm and 90 nm, between 3 nm and 40 nm, or between 3 nm and 30 nm. In some implementations, the second dimension is between 3 nm and 500 nm, between 3 nm and 300 nm, between 10 nm and 100 nm, or between 3 nm and 40 nm. In some implementations, the first orthogonal projection of the first surface of the first element on the common plane is characterized by being isolated and/or disjointed.
[0053] It will be understood that a fair amount of process variation occurs in the dimensions (e.g., width, height, elevation, etc.) of the features described herein and thus, to a certain extent, dimensions disclosed herein necessarily represent a characteristic or average dimension, taking into account this process variation. Thus, as described herein, numerical values and numerical ranges are given for many characteristic dimensions of the devices and features disclosed herein. It will be appreciated that these dimension are small and therefore, such dimensions may be subject to process variation. For example, the "height" of a side wall may vary. One of skill in the art will appreciate, therefore, that the numerical values and numerical ranges given for many characteristic dimensions of the devices and features disclosed herein are necessarily average values across such devices and features. For instance, in some implementations such dimensions may vary by five percent or less, ten percent or less, twenty percent or less, thirty percent or less, an order of magnitude or less, or by two or magnitudes or less due to process variations.
[0054] In some implementations, an "orthogonal projection onto a common plane" comprises a projection of an image of a surface onto a plane without enlarging the image. Stated differently, the dimensions of the contours of the surface, when projected onto a common plane exactly match the actual dimensions of the surface that is projected. The construct of "orthogonal projection onto a common plane" has utility when two or more surfaces, which may be spatially separated on a z-axis, are projected along the z-axis onto a common plane. Such a projection is useful for illustrating whether the two projected surfaces are contiguous or overlapping.
[0055] The device 100 also includes graphene stacks on each of the side walls 208 of each respective element in the plurality of elements 104. In some implementations, generating graphene includes generating a respective graphene stack (e.g., graphene stacks 302-1 , 302-2, 302-3, and the like) on each of the side walls of each respective element of the plurality of elements 104. In some implementations, generating graphene includes generating a respective graphene stack (e.g., graphene stacks 302-1 , 302-2, 302-3, and the like) on the first side wall 208-1-a of the first element 104-1 of the plurality of elements 104. The generated graphene stacks 302 (e.g., including graphene stack 302-1 on the side walls 208-1 of element 104-1 , graphene stack 302-2 on the side walls 208-2 of element 104-2, and the like) are segmented (e.g., mutually disjoint, discontinuous, non-overlapping and/or isolated from one another).
[0056] In some implementations, the respective graphene stack comprises about 1 to 500 graphene sheets. In some implementations, the graphene stack comprises 1 graphene sheet. In various implementations, the graphene stack comprises between 2 and 10 graphene sheets, between 10 and 30 graphene sheets, between 25 and 50 graphene sheets, between 50 and 100 graphene sheets, or over 100 graphene sheets. In some implementations, the graphene stack has a thickness that is between 1 to 100 nm. In some implementations, a sheet is a substantially two- dimensional or one-atom thick substance. In some implementations, a graphene sheet is a one- atom-thick substance with carbon atoms arranged in a hexagonal lattice. In some implementations, a graphene sheet is a carbon-based sheet which comprises additional materials such as boron, oxides, dopants and/or edge atomic substitutes. In some implementations, a graphene sheet is a carbon-based sheet doped with boron or other elements.
[0057] Figure 2 is an illustration of a cross-sectional view of another implementation of device 200 including a plurality of graphene stacks manufactured by a method in accordance with some implementations. The device 200 illustrated in Figure 2 is similar to and adapted from the device 100 illustrated in Figure 1. Elements common to each figure include common reference numbers, and only the differences between Figures 1 and 2 are described herein for the sake of brevity. Moreover, while certain specific features are illustrated, those skilled in the art will appreciate from the present disclosure that various other features have not been illustrated for the sake of brevity and so as not to obscure more pertinent aspects of the example implementations disclosed herein. To that end, the device 200 is formed by generating a respective graphene stack on one of the two side walls 208 of each respective element (e.g., on corresponding side walls, lying in parallel planes, of the respective elements) of the plurality of elements 104. In some implementations, generating graphene includes generating a respective graphene stack (e.g., graphene stacks 302-1 , 302-2, 302-3, and the like) on the side wall (e.g., lying along parallel planes; e.g., side wall 208-1-b of element 104-1 , side wall 208-2-b of element 104-2, and the like that lie in parallel planes) of each respective element of the plurality of elements 104. The generated graphene stacks 302 (e.g., including graphene stack 302-1 on the side wall 208-1-b of element 104-1 , graphene stack 302-2 on the side wall 208-2-b of element 104-2, and the like) are segmented (e.g., mutually disjoint, discontinuous, non- overlapping or isolated from one another).
[0058] Figures 3A-3B are illustrations of cross-sectional views 300 of various stages of graphene device manufactured by a method in accordance with some implementations. Those skilled in the art will appreciate from the present disclosure that the features illustrated in Figures 3A-3B are produced by a wide array of manufacturing processes, such as but not limited to, conformal deposition of a metal based graphene initiating layer and an anisoptropic etching of portions of the metal based graphene initiating layer. Additionally, a graphene stack is grown on at least one of the respective side walls of each element of the plurality of elements 104. [0059] With reference to Figure 3A(1), in some implementations, a substrate comprises a plurality of materials and/or layers including, for example, a first material of a first substrate layer 103 and a second material of a base substrate 102. In some implementations a substrate includes a single material and/or a single layer of a single material. With reference to Figure 3A(2), the first substrate layer 103 is patterned to form a plurality of elements 104 (e.g., elements 104-1 and 104-2). In some implementations, each element in the plurality of elements 104 is separated from an adjacent element on the substrate by a corresponding trench (e.g., trench 106- 1 , 106-2, and the like) in a plurality of trenches 106 defined by the first and second substrate layers 103, 102. In some implementations, at least some trenches in the plurality of trenches 106 are defined within a single layer of material. In some implementations, the plurality of trenches 106 is formed by removing portions of the first substrate layer 103. In some implementations, the predetermined regions of the substrate layer 103 are removed by etching the plurality of trenches 106 into the substrate layer 103. In some implementations, the substrate layer 103 comprises a photoresist material and portions of the substrate layer 103 (e.g., here, photoresist material) are removed using photolithography.
[0060] In some implementations, the substrate comprises a single layer (e.g., made of a substrate material). In such implementations, the plurality of trenches 106 is formed by removing portions of substrate material from portions of the substrate. In some implementations, portions of the substrate material are removed by etching the plurality of trenches into the substrate. In some implementations, the plurality of trenches are etched into the substrate or into respective substrate layer 103 by photolithography, X-ray lithography, reactive ion-etching, plasma etching, sputter etching, e-beam direct writing, or a combination thereof. In some implementations, the plurality of elements 104 is formed by selectively patterning or growing a Block co-polymer (e.g., blocks of two or more monomers, such as polystyrene and poly(methyl methacrylate) (PMMA), covalently bonded together) on portions of substrate 102 at regions of the substrate corresponding to the plurality of elements 104. In some implementations, the block copolymer is patterned using methods such as photolithography or dry etching to define the plurality of elements on the substrate.
[0061] With reference to Figure 3A(3), in some implementations, a graphene initiating layer or foundation material (e.g., metal based graphene initiating layer 402) is uniformly deposited (e.g., deposited uniformly, such as with uniform, consistent or regular thickness) onto substantially all of the exposed surfaces (e.g., including onto top surfaces 204 and side walls 208 of each element in the plurality of elements 104 and onto trench surfaces 206 of trenches 106) of the patterned substrate. In some implementations, the graphene initiating layer substantially comprises a metal selected from the group consisting of: platinum, gold, palladium, ruthenium, aluminum, titanium, tungsten, cadmium, copper, nickel, nickel foam, iron, or combinations thereof. In some implementations, the metal graphene initiating layer is conformally deposited through atomic layer deposition (ALD) onto the first surface 204-1 and the first side wall 208-1- b of the first element 104-1 and onto the second surface 206-1 of the first trench 106-1. In some implementations, the metal graphene initiating layer is conformally deposited through chemical vapor deposition (CVD) onto the first surface 204-1 and the first side wall 208- 1-b of the first element 104-1 and onto the second surface 206-1 of the first trench 106-1. Alternatively, with continued reference to Figures 3A(l)-(3), in some implementations, a foundation material is uniformly deposited on a un-patterned planar substrate material. Subsequently, the foundation material is patterned to produce a plurality of exposed side walls on which graphene can grow.
[0062] With reference to Figure 3B(4), after conformally depositing graphene initiating layer (e.g., metal based graphene initiating layer 402), portions of the graphene initiating layer (e.g., the graphene initiating layer on the top surface of each element, such as graphene initiating layer on first surface 204-1 of element 104-1 ; and the graphene initiating layer on the trench surface of each trench, such as graphene initiating layer on second surface 206-1 of trench 106-1) are directionally etched (e.g., anisotropically etched, or etched preferentially in one or more directions or axes of etching compared to at least another direction or axis; in other words, a preferential etch-rate in one or more directions or axes of etching is substantially greater than an etch rate in at least another direction or axis) so as to retain the graphene initiating layer on the side walls of the respective elements but substantially remove the graphene initiating layer on surfaces parallel to the plane of the substrate (e.g., on first side wall 208- 1-b of element 104-1 , side wall 208-2-b of element 104-2, and the like). Additionally, in some implementations, a prohibitive cap (e.g., 210-1 and 210-2) is formed at the respective ends of each exposed graphene initiating layer on the side walls of the elements 104. In some implementations, a prohibitive cap isolates graphene growth to the side wall areas coated with a foundation material. In some implementations, a prohibitive cap comprises a material that discourages and/or fails to encourage graphene growth. In some implementations, a prohibitive cap is formed by a portion of the substrate. In some implementations, a prohibitive cap is formed by a material deposited after the foundation material.
[0063] With reference to Figure 3B(5), a graphite-based structure is formed by generating graphene using the graphene initiating layer (e.g., generating graphene stacks 302-1 -a and 302- 1 -b, 302-2-a and 302-2-b using segmented metal graphene initiating layers 402-1 -a and 402- 1-b, 402-2-a and 402-2-b, respectively). In some embodiments, graphene is generated using the graphene initiating layer 402 by growing a carbon material on the graphene initiating layer thereby forming the graphite-based structure. In some embodiments, the carbon material is deposited on the graphene initiating layer and the deposited carbon material is heated thereby forming the graphite -based structure.
[0064] Figure 4 is a flowchart of an implementation of a method 400 of manufacturing a device including a plurality of graphene stacks. Briefly, method 400 includes forming side walls in a foundation material covering the substrate, forming prohibitive caps at the respective ends of each side wall, and growing a respective graphene stack on each side wall such that each graphene stack is oriented along the corresponding exposed side wall.
[0065] To that end, as represented by block 4-1 , method 400 includes forming a plurality of exposed side walls in a foundation material covering the substrate. In some implementations, each exposed side wall in the plurality of exposed side walls is in a respective plane that is at an offset angle to the plane of the substrate. In some embodiments this offset angle is an acute or an obtuse or a right angle. In some implementations, as represented by block 4- la, forming the plurality of exposed side walls in the foundation material covering the substrate includes patterning the substrate to include a plurality of side walls in the substrate, and coating each side wall in the plurality of side walls with the foundation material. In some implementations, as represented by block 4- lb, forming the plurality of exposed side walls in the foundation material covering the substrate includes depositing the foundation material on the substrate, and patterning the foundation material to form the plurality of exposed side walls in the foundation material by removing at least some of the foundation material.
[0066] As represented by block 4-2, the method 400 includes forming a plurality of prohibitive caps at the respective ends of the plurality of exposed side walls in the foundation material. In some implementations, the plurality of prohibitive caps isolate graphene growth to within the plurality of exposed side walls in the foundation material. In some implementations, as represented by 4-2a, forming a plurality of prohibitive caps includes depositing material on the surfaces parallel to the plane of the substrate. In some implementations, a prohibitive cap comprises a material that discourages and/or fails to encourage graphene growth. In some implementations, as represented by 4-2b, forming a plurality of prohibitive caps includes removing a portion of the foundation material. In some implementations, as represented by 4-2c, forming a plurality of prohibitive caps includes exposing a portion of the substrate material, which is configured to resist graphene growth thereon.
[0067] As represented by block 4-3, the method 400 includes growing a respective graphene stack in the plurality of graphene stacks on each exposed side wall in the plurality of exposed side walls, wherein each graphene stack in the plurality of graphene stacks is oriented along the corresponding exposed side wall in the plurality of exposed side walls in the foundation material.
[0068] The foregoing description, for purpose of explanation, has been described with reference to specific implementations. However, the illustrative discussions above are not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations are possible in view of the above teachings. The implementations were chosen and described in order to best explain the principles of the invention and its practical applications, to thereby enable others skilled in the art to best utilize the invention and various implementations with various modifications as are suited to the particular use contemplated.
[0069] Therefore, it should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the present disclosure one skilled in the art should appreciate that an aspect described herein may be implemented independently of any other aspects and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented and/or a method may be practiced using any number of the aspects set forth herein. In addition, such an apparatus may be implemented and/or such a method may be practiced using other structure and/or functionality in addition to or other than one or more of the aspects set forth herein. [0070] It will also be understood that, although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first contact could be termed a second contact, and, similarly, a second contact could be termed a first contact, which changing the meaning of the description, so long as all occurrences of the "first contact" are renamed consistently and all occurrences of the second contact are renamed consistently. The first contact and the second contact are both contacts, but they are not the same contact.
[0071] The terminology used herein is for the purpose of describing particular implementations only and is not intended to be limiting of the claims. As used in the description of the implementations and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
[0072] As used herein, the term "if may be construed to mean "when" or "upon" or "in response to determining" or "in accordance with a determination" or "in response to detecting," that a stated condition precedent is true, depending on the context. Similarly, the phrase "if it is determined [that a stated condition precedent is true]" or "if [a stated condition precedent is true]" or "when [a stated condition precedent is true]" may be construed to mean "upon determining" or "in response to determining" or "in accordance with a determination" or "upon detecting" or "in response to detecting" that the stated condition precedent is true, depending on the context.

Claims

What is claimed is:
1. A method of manufacturing a device including a plurality of graphene stacks, each respective graphene stack in the plurality of graphene stacks is in a corresponding plane that intersects a plane of a substrate, the method comprising:
forming a plurality of exposed side walls in a foundation material covering the substrate, wherein each exposed side wall in the plurality of exposed side walls is in a respective plane that is at an offset angle to the plane of the substrate;
forming a plurality of prohibitive caps at the respective ends of the plurality of exposed side walls in the foundation material, wherein the plurality of prohibitive caps isolate graphene growth to within the plurality of exposed side walls in the foundation material; and
growing a respective graphene stack in the plurality of graphene stacks on each exposed side wall in the plurality of exposed side walls, wherein each graphene stack in the plurality of graphene stacks is oriented along the corresponding exposed side wall in the plurality of exposed side walls in the foundation material.
2. The method of claim 1, wherein at least one of the graphene stacks on a respective one of the plurality of exposed side walls in the foundation material has a width less than the smallest dimension that can be produced by lithography on a plane parallel to the plane of the substrate.
3. The method of claim 2, wherein the length of at least one of the graphene stacks on a respective one of the plurality of exposed side walls in the foundation material is measured in Angstroms or nanometers.
4. The method of any one of claims 1-3, wherein forming the plurality of exposed side walls in the foundation material covering the substrate comprises:
patterning the substrate to include a plurality of side walls in the substrate; and coating each side wall in the plurality of side walls with the foundation material.
5. The method of claim 4, wherein forming the plurality of exposed side walls in the foundation material covering the substrate further comprises removing at least some of the foundation material to form the plurality of exposed side walls in the foundation material.
6. The method of claim 4, wherein removing at least some of the foundation material comprises at least one of dry etching, wet etching and plasma etching.
7. The method of any one of claims 1-3, wherein forming the plurality of exposed side walls in the foundation material covering the substrate comprises:
depositing the foundation material on the substrate; and
patterning the foundation material to form the plurality of exposed side walls in the foundation material by removing at least some of the foundation material.
8. The method of claim 7, wherein removing at least some of the foundation material comprises at least one of dry etching, wet etching and plasma etching
9. The method of any one of claims 1-8, wherein at least one exposed side wall in the plurality of exposed side walls in the foundation material is characterized by a substantially flat surface.
10. The method of any one of claims 1-8, wherein at least one exposed side wall in the plurality of exposed side walls in the foundation material is characterized by a curved surface.
11. The method of any one of claims 1-8, wherein each exposed side wall in the plurality of exposed side walls in the foundation material forms at least a portion of a step, a trench or a hole.
12. The method of any one of claims 1-8, wherein at least one exposed side wall in the plurality of exposed side walls is characterized by a different dimension than another exposed side wall in the plurality of exposed side walls.
13. The method of any one of claims 1-12, wherein a graphene stack in the plurality of graphene stacks includes one or more sheets of graphene.
14. The method of any one of claims 1-13, wherein the respective plane of at least one graphene stack in the plurality of graphene stacks is substantially perpendicular to the plane of the substrate.
15. The method of any one of claims 1-13, wherein the respective plane of at least one graphene stack in the plurality of graphene stacks is less than perpendicular to the plane of the substrate.
16. The method of claim 15, wherein the respective plane of at least one graphene stack in the plurality of graphene stacks is no more than 85 degrees offset relative to the plane of the substrate.
17. The method of any one of claims 1-16, wherein the substrate comprises at least one of silicon, doped silicon and silicon dioxide.
18. The method of any one of claims 1-16, wherein the substrate substantially comprises a material selected from the group consisting of: neoceram, barosilicate glass, germanium arsenide, a IV-V semiconductor material, a substantially metallic material, a high temperature glass, and a combination thereof.
19. The method of any one of claims 1-16, wherein the substrate comprises silicon, monocrystalline silicon, Si02 glass, soda lime glass, lead glass, doped Si02, aluminosilicate glass, borosilicate glass, dichroic glass, germanium/semiconductor glass, glass ceramic, silicate/fused silica, quartz or chalcogenide/sulphide glass.
20. The method of any one of claims 1-19, wherein each graphene stack in the plurality of graphene stacks comprises between 1 to 500 graphene sheets.
21. The method of any one of claims 1-20, wherein a graphene stack in the plurality of graphene stacks has a band gap.
22. The method of claim 7, wherein depositing the foundation material comprises at least one of atomic layer deposition, chemical vapor deposition, electroplating, spin on glass, sputtering and evaporation.
23. The method of claim 1 further comprising isolating a first exposed side wall in the plurality of exposed side walls from a second exposed side wall in the plurality of exposed side walls by removing at least a portion of the foundation material between the first exposed side wall and the second exposed side wall.
24. The method of claim 23, wherein removing the portion of the foundation material comprises a planarization process to remove at least some of the foundation material in a plane parallel to the substrate.
25. The method of any one of claims 1-24, further comprising coating at least one graphene stack in the plurality of graphene stacks with a protective film.
26. The method of any one of claims 1-25, wherein the foundation material includes at least one of silicon carbide (SiC), ruthenium, iridium, platinum, copper, cobalt, nickel, palladium and stainless steel.
27. The method of claim 1 , wherein the growing a respective stack in the plurality of graphene stacks on each exposed side wall in the plurality of exposed side walls includes at least one of an epitaxial growth process and chemical vapor deposition.
28. The method of claim 1, wherein an exposed side wall in the plurality of exposed side walls in the foundation material forms a conical receptor, wherein the conical receptor is defined by a central axis substantially perpendicular to the plane of the substrate and a circular base in a plane parallel to the plane of the substrate.
29. The method of claim 1, wherein an exposed side wall in the plurality of exposed side walls in the foundation material forms a frustum of a right circular cone, wherein the right circular code is defined by a central axis substantially perpendicular to the plane of the substrate and a lower base in a plane parallel to the plane of the substrate.
30. The method of claim 1, wherein an exposed side wall in the plurality of exposed side walls in the foundation material forms an inverted conical receptor, wherein the conical receptor is defined by a central axis substantially perpendicular to the plane of the substrate and a circular base in a plane parallel to the plane of the substrate.
31. The method of claim 1 , wherein an exposed side wall in the plurality of exposed side walls in the foundation material forms an inverted frustum of a right circular cone, wherein the right circular code is defined by a central axis substantially perpendicular to the plane of the substrate and a lower base in a plane parallel to the plane of the substrate.
32. The method of claim 1, wherein an exposed side wall in the plurality of exposed side walls in the foundation material forms a non-symmetrical structure.
33. The method of claim 32, wherein the non-symmetrical structure is an ellipsoid.
34. The method of claim 1, wherein an exposed side wall in the plurality of exposed side walls in the foundation material forms a pyramid.
35. The method of claim 1, wherein an exposed side wall in the plurality of exposed side walls has a length in the range of 3-20 Angstroms.
36. A device fabricated using the method of any of claims 1-35.
PCT/US2014/027434 2013-03-15 2014-03-14 Graphene growth on planes offset from a substrate WO2014152523A1 (en)

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