WO2014139204A1 - Method and device for managing data in flash memory device - Google Patents

Method and device for managing data in flash memory device Download PDF

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Publication number
WO2014139204A1
WO2014139204A1 PCT/CN2013/075264 CN2013075264W WO2014139204A1 WO 2014139204 A1 WO2014139204 A1 WO 2014139204A1 CN 2013075264 W CN2013075264 W CN 2013075264W WO 2014139204 A1 WO2014139204 A1 WO 2014139204A1
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flash memory
memory block
data
level cell
cell flash
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PCT/CN2013/075264
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French (fr)
Chinese (zh)
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尹慧
邓恩华
李志雄
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深圳市江波龙电子有限公司
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Publication of WO2014139204A1 publication Critical patent/WO2014139204A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory

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  • the present invention belongs to the field of data storage technologies of memories, and in particular, to a method and apparatus for data management in a flash memory storage device.
  • Flash memory can be divided into single-level cell flash memory according to its internal architecture (Single-Level Cell, SLC) and multi-level cell flash (Multi-Level Cell, MLC).
  • SLC Single-Level Cell
  • MLC Multi-Level Cell
  • Each bit of the SLC stores one bit of information; each cell of the MLC stores at least two bits of information, wherein the MLC includes 2 bits/cell, 3 bits/cell, 4bit/cell and more bits of flash memory.
  • the data writing of the SLC is performed by applying a voltage to the charge of the floating gate, and eliminating the stored charge through the source, in such a manner as to store an information bit (1 represents cancellation, 0 represents writing).
  • MLC uses different levels of charge in the floating gate, so it can store multiple bits of information in a single transistor, and generate multiple states in a single transistor through the unit's write and sense control.
  • SLC and MLC the same capacity unit has to store 1 bit different from the storage multi-bit stability and complexity. SLC is more stable than MLC, and SLC write speed is faster.
  • the flash memory internally contains a plurality of memory blocks, each of which is composed of a plurality of pages.
  • All pages of the SLC are fast and stable, while only a portion of the pages in the MLC block are fast and stable, and the structure is similar to the pages in the SLC.
  • a cell contains two bits (0, 1 bit), 0 bits are called least significant bits, and 1 bit is called non-least significant bit, which can generate four states (00, 01). , 11, 10), to write into different pages within the block, wherein two bits of each cell are respectively written in the least significant bit page and the non-least significant bit page of the block, wherein the least significant bit page is fast and A stable and reliable page, and the least significant bit page of the same model of flash memory has the same distribution across all blocks.
  • 3 bit/cell flash memory one unit contains 3 bits (0, 1, 2 bits), of which 0 bits are called least significant bits, and 1 and 2 bits are called non-least significant bits.
  • the least significant bit page is used to describe a fast and stable page in the MLC, and the non-least significant bit page is used to describe other pages in the MLC.
  • a single flash storage device often uses both SLC and MLC or only MLC to increase the storage capacity of the flash storage device.
  • the flash memory storage device including the MLC is applied to a smart device such as a smart phone or a tablet computer, the data reading and writing speed of the flash storage device is affected to some extent, and the mass production efficiency of the application layer in the smart device is not high. Problems such as long system installation time.
  • An object of the present invention is to provide a method for data management in a flash memory storage device, so as to solve the problem that the existing flash memory storage device including the MLC is applied to the smart device, resulting in low mass production efficiency of the application layer in the smart device.
  • the embodiment of the present invention is implemented as a method for data management in a flash memory storage device, where the flash memory device includes at least one multi-level cell flash memory, and the method includes:
  • the data When data is first written to the flash storage device, the data is written to the least significant bit page of the multi-level cell flash memory block and/or the flash page of the single-layer cell flash memory block in the flash memory device.
  • Another object of the present invention is to provide an apparatus for data management in a flash memory storage device, where the flash memory storage device includes at least one multi-level cell flash memory, and the device includes:
  • a data writing unit configured to write the data to a least significant bit page and/or a single layer unit of the multi-level cell flash memory block in the flash memory device when writing data to the flash memory device for the first time The flash page of the flash memory block.
  • the embodiment of the present invention has the beneficial effects that in an embedded storage system, such as a smart device such as a smart phone or a tablet computer including an MLC flash storage device, the first written data is generally data amount.
  • an embedded storage system such as a smart device such as a smart phone or a tablet computer including an MLC flash storage device
  • the first written data is generally data amount.
  • Larger and more important data such as system installation data, because the data write time of the least significant bit page of the multi-level cell flash memory block and the single-layer cell flash page is much smaller than the data write time of the non-least significant bit page, and
  • the least significant bit page and the single layer unit flash page are stable and reliable flash pages, so when data is first written into the flash storage device, the data is written to the multi-level cell flash storage in the flash storage device.
  • the least significant bit page of the block and/or the flash page of the single-layer cell flash memory block can greatly improve the speed of data writing and reduce the time of data writing, thereby reducing the mass production time of the smart device application layer and improving Its mass production efficiency. Moreover, since the least significant bit page and the single-layer unit flash page are stable and reliable, the stability of the written data can be improved, and the utility model has strong practicability.
  • FIG. 1 is a flowchart of implementing a data management method in a flash memory storage device according to Embodiment 1 of the present invention
  • FIG. 2 is a structural diagram of a data management apparatus in a flash memory storage device according to Embodiment 2 of the present invention.
  • FIG. 3 is a structural diagram of a flash memory storage device according to Embodiment 3 of the present invention.
  • Embodiment 1 is a diagrammatic representation of Embodiment 1:
  • FIG. 1 is a flowchart showing an implementation process of a data management method in a flash memory storage device according to Embodiment 1 of the present invention. The process is detailed as follows:
  • step S101 when data is first written into the flash storage device, the data is written to the least significant bit page and/or single layer unit flash storage of the multi-level cell flash memory block in the flash memory device.
  • the flash page of the block when data is first written into the flash storage device, the data is written to the least significant bit page and/or single layer unit flash storage of the multi-level cell flash memory block in the flash memory device.
  • the flash page of the block when data is first written into the flash storage device, the data is written to the least significant bit page and/or single layer unit flash storage of the multi-level cell flash memory block in the flash memory device.
  • the data written to the flash storage device for the first time is generally relatively large and important.
  • Data such as system installation data. Since the MLC contains non-least significant page bits, if the data is written to the non-least significant page position, the data read and write speed will be seriously affected, resulting in the mass production efficiency of the application layer in the smart device is not as high as the system installation. Long time and other issues. Therefore, in order to solve the above problem, the present embodiment writes the data to the least significant bit page of the multi-level cell flash memory block in the flash memory device and/or when writing data to the flash memory device for the first time.
  • the flash page of the single-layer cell flash memory block because the data write time of the least significant bit page of the multi-level cell flash memory block and the flash page of the single-layer cell flash memory block is much smaller than the data write time of the non-least significant bit page,
  • the least significant bit page and the single-layer unit flash page are stable and reliable flash pages, so the speed of data writing can be greatly improved, the time for data writing can be reduced, thereby reducing the mass production time of the smart device application layer and improving Its mass production efficiency.
  • the least significant bit page and the single-layer cell flash page are stable and reliable, the stability of the write data can be improved.
  • the empty multi-level cell flash memory block is a multi-level cell flash memory block in which data is not written
  • the empty single-layer cell flash memory block is a single-layer cell flash memory block in which data is not written.
  • the embodiment further includes the following steps:
  • this embodiment further includes:
  • the storage space of the least significant bit page and the non-least significant bit page in the multi-level cell flash memory block is merged.
  • the embodiment further includes:
  • Merging the multi-level cell flash memory block when the number of empty multi-level cell flash memory blocks and/or the number of empty single-layer cell flash memory blocks reaches a preset threshold and the flash memory device is idle The storage space of the least significant bit page and the non-least significant bit page.
  • the threshold is a proportional value.
  • the "proportional” value is different from the “number” value.
  • the “number” value is a static value, and the “proportional” value is a dynamic value. For example, if the "number” value is set, " The value of the number is 6, and a flash storage device has a small storage space and only five memory blocks, which cannot satisfy the conditions for data writing. And if the ratio is set to "scale”, for example, "proportion" is 20%, if there are only 5 memory blocks, then the number of empty multi-level cell flash memory blocks and/or the number of empty single-layer cell flash memory blocks is greater than When one is available, data can be written.
  • the embodiment further includes identifying a status of the storage block, where the status identifier includes “busy”, “idle”, “discarded”, and the like.
  • the merging the storage spaces of the least significant bit page and the non-least significant bit page in the multi-level cell flash memory block specifically includes:
  • the data when data is first written into the flash memory device, the data is written to the least significant bit page and/or the single layer unit flash memory block of the multi-level cell flash memory block in the flash memory device. Flash pages that increase the speed and stability of data writes that include multi-level cell flash storage devices. Moreover, when the number of the multi-level cell flash memory blocks in which the storage device is free and/or empty and/or the number of empty single-layer cell flash memory blocks is less than a preset threshold, data merge and transfer storage are performed, thereby The overall performance of flash storage devices can be improved without sacrificing the capacity of flash storage devices.
  • 4GB flash storage device that is all MLC flash (2bit/cell flash) as an example.
  • the flash storage device will reserve some empty storage blocks for data exchange or replace bad storage blocks, so its actual storage capacity. Less than 4G, for ease of understanding, the embodiment is exemplified by 4G.) If only the least significant bit page is used, the storage space provided by the flash storage device is 2G, so the method may reduce the flash storage device. Storage capacity, which is to increase data write speed and stability by sacrificing capacity.
  • the number of empty multi-level cell flash memory blocks is greater than a preset threshold, the data is written to the lowest of the multi-level cell flash memory block.
  • a valid bit page if the number of empty multi-level cell flash memory blocks reaches a preset threshold and/or data merge and transfer storage when the flash memory device is idle, thereby enabling the capacity of the flash memory device not to be sacrificed Improve its overall performance.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • FIG. 2 is a diagram showing the structure of a data management device in a flash memory storage device according to Embodiment 2 of the present invention. For convenience of description, only parts related to the embodiment of the present invention are shown.
  • the data management device in the flash storage device can be applied to a flash storage device, and can be a software unit, a hardware unit or a combination of hardware and software running in the flash storage device, or can be integrated into the flash storage device as a separate pendant. Or run in an application system of a flash storage device.
  • the data management device in the flash memory device includes a data writing unit 21, wherein:
  • the data writing unit 21 is configured to write the data to the least significant page of the multi-level cell flash memory block in the flash memory device when writing data to the flash memory device for the first time and/or A flash memory page of a single-level cell flash memory block.
  • the device further includes:
  • the determining unit 22 is configured to determine whether the number of the multi-level cell flash memory blocks of the flash memory device and/or the number of empty single-layer cell flash memory blocks is greater than a preset threshold, and if so, the data
  • the writing unit 21 writes the data to a least significant bit page of the multi-level cell flash memory block in the flash memory device and/or a flash page of the single-layer cell flash memory block;
  • the empty multi-level cell flash memory block is a multi-level cell flash memory block in which data is not written
  • the empty single-layer cell flash memory block is a single-layer cell flash memory block in which data is not written.
  • the device further includes:
  • the merging unit 23 is configured to combine the least effective of the multi-level cell flash memory block when the number of empty multi-level cell flash memory blocks and/or the number of empty single-layer cell flash memory blocks reaches a preset threshold The storage space for the bit page and the non-least significant bit page.
  • the merging unit 23 is further configured to merge storage spaces of the least significant bit page and the non-least significant bit page in the multi-level cell flash memory block when the flash memory device is idle.
  • the merging unit 23 is specifically configured to obtain an empty multi-level cell flash memory block and/or an empty single-layer cell flash memory block, and the multi-level cell flash memory that writes data only on the non-least significant bit page Data transfer on the memory block is stored to all flash pages of the empty multi-level cell flash memory block and/or all flash pages on the empty single-layer cell flash memory block, and the non-least significant bit is erased only A multi-level cell flash memory block with data written on the page and data transfer storage.
  • each functional unit and module in the embodiment may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit, and the integrated unit may be hardware.
  • Formal implementation can also be implemented in the form of software functional units.
  • the specific names of the respective functional units and modules are only for the purpose of facilitating mutual differentiation, and are not intended to limit the scope of protection of the present application.
  • Embodiment 3 is a diagrammatic representation of Embodiment 3
  • FIG. 3 is a diagram showing the structure of a flash memory storage device according to Embodiment 3 of the present invention. For convenience of description, only parts related to the embodiment of the present invention are shown.
  • the flash memory device 3 includes the data management device 31, at least one multi-level cell flash memory 32, and/or single-layer cell flash memory 33 in the flash memory device described in the second embodiment.
  • the data management device 31 in the flash storage device writes the data to the lowest of the storage blocks of the multi-level cell flash memory 32 in the flash storage device.
  • the valid bit page and/or single layer unit flash 33 stores the flash page of the block.
  • the flash memory device 3 may further include a printed circuit board (PCB), a RC capacitor, etc., and the data management device 31 in the flash memory device. It can be integrated on the PCB board.
  • PCB printed circuit board
  • the embodiment of the present invention writes the data to the least significant bit page and/or single of the multi-level cell flash memory block in the flash memory device by writing data to the flash memory device for the first time.
  • the flash page of the layer cell flash memory block can improve the data writing speed and stability of the multi-cell flash memory device.
  • data merge and transfer storage are performed, thereby The ability to improve overall performance without sacrificing the capacity of flash storage devices.

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Abstract

The present invention is applicable to the technical field of data storage of memories, and provided are a method and device for managing data in a flash memory device. The flash memory device comprises at least one multi-level cell flash memory. The method comprises: when writing data into the flash memory device for the first time, writing the data into a least significant bit page of a multi-level cell flash memory block of the flash memory device and/or a flash memory page of a single-level cell flash memory block. By means of the present invention, the speed of writing data for the first time can be greatly increased, and the time of writing data for the first time can be reduced, thereby reducing the mass-production time of an application layer of an intelligent device, and improving the mass-production efficiency thereof. Moreover, because the least significant bit page and the single-level cell flash memory page are stable and reliable, the stability of writing data can also be improved.

Description

一种闪存存储设备中数据管理的方法及装置  Method and device for data management in flash storage device 技术领域Technical field
本发明属于存储器的数据存储技术领域,尤其涉及一种闪存存储设备中数据管理的方法及装置。The present invention belongs to the field of data storage technologies of memories, and in particular, to a method and apparatus for data management in a flash memory storage device.
背景技术Background technique
闪存按照其内部构架可以分为单层单元闪存(Single-Level Cell,SLC)和多层单元闪存(Multi-Level Cell,MLC)。SLC的每个单元(cell)中存储1个位(bit)的信息;MLC的每个单元(cell)至少存储2个位(bit)的信息,其中,MLC包括2bit/cell、3bit/cell、4bit/cell以及更多位元的闪存。Flash memory can be divided into single-level cell flash memory according to its internal architecture (Single-Level Cell, SLC) and multi-level cell flash (Multi-Level Cell, MLC). Each bit of the SLC stores one bit of information; each cell of the MLC stores at least two bits of information, wherein the MLC includes 2 bits/cell, 3 bits/cell, 4bit/cell and more bits of flash memory.
SLC的数据写入是通过对浮栅的电荷加电压,经过源极将所存储的电荷消除,通过这样的方式,以存储一个信息位(1代表消除,0代表写入)。而MLC则是在浮栅中使用不同程度的电荷,因此能在单一晶体管中存储多个位的信息,并通过单元的写入与感应的控制,在单一晶体管中产生多种状态,对于SLC及MLC而言,同样容量的单元要存储1位与存储多位的稳定度和复杂度不同,SLC比MLC稳定,且SLC写入速度较快。从数据存储机制方面看,闪存内部包含多个存储块,每个存储块由多个页构成。SLC的所有页都是快速且稳定可靠的,而MLC的块内只有一部分页是快速且稳定可靠的,结构跟SLC内的页类似。例如,以2bit/cell的闪存为例,一个单元包含两个位(0,1位),0位称为最低有效位,1位称为非最低有效位,可产生四种状态(00,01,11,10),以写入块内不同的页内,其中,每个单元的两位分别写入块的最低有效位页和非最低有效位页内,其中,最低有效位页为快速且稳定可靠的页,并且同一型号的闪存其最低有效位页在所有的块内的分布都是一样的。同理,3bit/cell的闪存,一个单元包含3个位(0,1,2位),其中0位称为最低有效位,1和2位称为非最低有效位。用最低有效位页来描述MLC中快速且稳定可靠的页,用非最低有效位页来描述MLC中其它页。The data writing of the SLC is performed by applying a voltage to the charge of the floating gate, and eliminating the stored charge through the source, in such a manner as to store an information bit (1 represents cancellation, 0 represents writing). MLC uses different levels of charge in the floating gate, so it can store multiple bits of information in a single transistor, and generate multiple states in a single transistor through the unit's write and sense control. For SLC and For MLC, the same capacity unit has to store 1 bit different from the storage multi-bit stability and complexity. SLC is more stable than MLC, and SLC write speed is faster. From the aspect of the data storage mechanism, the flash memory internally contains a plurality of memory blocks, each of which is composed of a plurality of pages. All pages of the SLC are fast and stable, while only a portion of the pages in the MLC block are fast and stable, and the structure is similar to the pages in the SLC. For example, taking a 2bit/cell flash memory as an example, a cell contains two bits (0, 1 bit), 0 bits are called least significant bits, and 1 bit is called non-least significant bit, which can generate four states (00, 01). , 11, 10), to write into different pages within the block, wherein two bits of each cell are respectively written in the least significant bit page and the non-least significant bit page of the block, wherein the least significant bit page is fast and A stable and reliable page, and the least significant bit page of the same model of flash memory has the same distribution across all blocks. Similarly, 3 bit/cell flash memory, one unit contains 3 bits (0, 1, 2 bits), of which 0 bits are called least significant bits, and 1 and 2 bits are called non-least significant bits. The least significant bit page is used to describe a fast and stable page in the MLC, and the non-least significant bit page is used to describe other pages in the MLC.
现有技术中,单个闪存存储设备常常同时采用SLC和MLC或者只采用MLC以提高闪存存储设备的存储容量。然而将包含MLC的闪存存储设备应用到智能设备如智能手机、平板电脑等中时,在一定程度上会影响闪存存储设备的数据读写速度,导致智能设备中应用层的量产效率不高如***安装时间长等问题。In the prior art, a single flash storage device often uses both SLC and MLC or only MLC to increase the storage capacity of the flash storage device. However, when the flash memory storage device including the MLC is applied to a smart device such as a smart phone or a tablet computer, the data reading and writing speed of the flash storage device is affected to some extent, and the mass production efficiency of the application layer in the smart device is not high. Problems such as long system installation time.
技术问题technical problem
本发明实施例的目的在于提供一种闪存存储设备中数据管理的方法,以解决现有包含MLC的闪存存储设备应用到智能设备,导致智能设备中应用层的量产效率不高的问题。An object of the present invention is to provide a method for data management in a flash memory storage device, so as to solve the problem that the existing flash memory storage device including the MLC is applied to the smart device, resulting in low mass production efficiency of the application layer in the smart device.
技术解决方案Technical solution
本发明实施例是这样实现的,一种闪存存储设备中数据管理的方法,所述闪存存储设备中包括至少一多层单元闪存,所述方法包括:The embodiment of the present invention is implemented as a method for data management in a flash memory storage device, where the flash memory device includes at least one multi-level cell flash memory, and the method includes:
在首次往所述闪存存储设备中写入数据时,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页。When data is first written to the flash storage device, the data is written to the least significant bit page of the multi-level cell flash memory block and/or the flash page of the single-layer cell flash memory block in the flash memory device.
本发明实施例的另一目的在于提供一种闪存存储设备中数据管理的装置,所述闪存存储设备中包括至少一多层单元闪存,所述装置包括:Another object of the present invention is to provide an apparatus for data management in a flash memory storage device, where the flash memory storage device includes at least one multi-level cell flash memory, and the device includes:
数据写入单元,用于在首次往所述闪存存储设备中写入数据时,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页。a data writing unit, configured to write the data to a least significant bit page and/or a single layer unit of the multi-level cell flash memory block in the flash memory device when writing data to the flash memory device for the first time The flash page of the flash memory block.
本发明实施例的再一目的在于提供一种闪存存储设备,所述闪存存储设备包括所述闪存存储设备中数据管理的装置。It is still another object of embodiments of the present invention to provide a flash memory storage device including means for data management in the flash memory storage device.
有益效果Beneficial effect
本发明实施例与现有技术相比存在的有益效果是:在嵌入式存储***中,如包含MLC闪存存储设备的智能手机、平板电脑等智能设备,其首次写入的数据一般都是数据量比较大且重要的数据,如***安装数据等,由于多层单元闪存存储块的最低有效位页以及单层单元闪存页的数据写入时间远小于非最低有效位页的数据写入时间,且最低有效位页以及单层单元闪存页为稳定可靠的闪存页,因此在首次往所述闪存存储设备中写入数据时,通过将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页,可以大大的提高数据写入的速度,减少数据写入的时间,从而减少所述智能设备应用层的量产时间,提高其量产效率。而且,由于最低有效位页以及单层单元闪存页稳定可靠,因此还能提高写入数据的稳定性,具有较强的实用性。Compared with the prior art, the embodiment of the present invention has the beneficial effects that in an embedded storage system, such as a smart device such as a smart phone or a tablet computer including an MLC flash storage device, the first written data is generally data amount. Larger and more important data, such as system installation data, because the data write time of the least significant bit page of the multi-level cell flash memory block and the single-layer cell flash page is much smaller than the data write time of the non-least significant bit page, and The least significant bit page and the single layer unit flash page are stable and reliable flash pages, so when data is first written into the flash storage device, the data is written to the multi-level cell flash storage in the flash storage device. The least significant bit page of the block and/or the flash page of the single-layer cell flash memory block can greatly improve the speed of data writing and reduce the time of data writing, thereby reducing the mass production time of the smart device application layer and improving Its mass production efficiency. Moreover, since the least significant bit page and the single-layer unit flash page are stable and reliable, the stability of the written data can be improved, and the utility model has strong practicability.
附图说明DRAWINGS
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the embodiments or the description of the prior art will be briefly described below. It is obvious that the drawings in the following description are only the present invention. For some embodiments, other drawings may be obtained from those of ordinary skill in the art in light of the inventive workability.
图1是本发明实施例一提供的闪存存储设备中数据管理方法的实现流程图;1 is a flowchart of implementing a data management method in a flash memory storage device according to Embodiment 1 of the present invention;
图2是本发明实施例二提供的闪存存储设备中数据管理装置的组成结构图;2 is a structural diagram of a data management apparatus in a flash memory storage device according to Embodiment 2 of the present invention;
图3是本发明实施例三提供的闪存存储设备的组成结构图。FIG. 3 is a structural diagram of a flash memory storage device according to Embodiment 3 of the present invention.
本发明的实施方式Embodiments of the invention
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
为了说明本发明所述的技术方案,下面通过具体实施例来进行说明。In order to explain the technical solution described in the present invention, the following description will be made by way of specific embodiments.
实施例一:Embodiment 1:
图1示出了本发明实施例一提供的闪存存储设备中数据管理方法的实现流程,该方法过程详述如下:FIG. 1 is a flowchart showing an implementation process of a data management method in a flash memory storage device according to Embodiment 1 of the present invention. The process is detailed as follows:
在步骤S101中,在首次往所述闪存存储设备中写入数据时,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页。In step S101, when data is first written into the flash storage device, the data is written to the least significant bit page and/or single layer unit flash storage of the multi-level cell flash memory block in the flash memory device. The flash page of the block.
在本实施例中,当将包含MLC的闪存存储设备应用到智能设备如智能手机、平板电脑等中时,首次往所述闪存存储设备中写入的数据一般都是数据量比较大且重要的数据,如***安装数据等。而由于MLC中包含非最低有效页位,如果将所述数据写入非最低有效页位,会严重影响到数据的读写速度,从而导致智能设备中应用层的量产效率不高如***安装时间长等问题。因此,本实施例为了解决上述问题,在首次往所述闪存存储设备中写入数据时,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页,由于多层单元闪存存储块的最低有效位页以及单层单元闪存存储块的闪存页的数据写入时间远小于非最低有效位页的数据写入时间,且最低有效位页以及单层单元闪存页为稳定可靠的闪存页,因此可以大大的提高数据写入的速度,减少数据写入的时间,从而减少所述智能设备应用层的量产时间,提高其量产效率。而且,由于最低有效位页以及单层单元闪存页稳定可靠,因此还能提高写入数据的稳定性。In this embodiment, when the flash storage device including the MLC is applied to a smart device such as a smart phone, a tablet, or the like, the data written to the flash storage device for the first time is generally relatively large and important. Data, such as system installation data. Since the MLC contains non-least significant page bits, if the data is written to the non-least significant page position, the data read and write speed will be seriously affected, resulting in the mass production efficiency of the application layer in the smart device is not as high as the system installation. Long time and other issues. Therefore, in order to solve the above problem, the present embodiment writes the data to the least significant bit page of the multi-level cell flash memory block in the flash memory device and/or when writing data to the flash memory device for the first time. The flash page of the single-layer cell flash memory block, because the data write time of the least significant bit page of the multi-level cell flash memory block and the flash page of the single-layer cell flash memory block is much smaller than the data write time of the non-least significant bit page, The least significant bit page and the single-layer unit flash page are stable and reliable flash pages, so the speed of data writing can be greatly improved, the time for data writing can be reduced, thereby reducing the mass production time of the smart device application layer and improving Its mass production efficiency. Moreover, since the least significant bit page and the single-layer cell flash page are stable and reliable, the stability of the write data can be improved.
进一步的,在首次往所述闪存存储设备中写入数据前,判断所述闪存存储设备中空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量是否大于预先设定的临界值,若是,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页。Further, before writing the data to the flash storage device for the first time, determining whether the number of the multi-level cell flash memory blocks of the flash memory device and/or the number of empty single-layer cell flash memory blocks is greater than a preset The threshold is determined, if so, the data is written to the least significant bit page of the multi-level cell flash memory block and/or the flash page of the single-layer cell flash memory block in the flash memory device.
其中,所述空的多层单元闪存存储块为未写入数据的多层单元闪存存储块,所述空的单层单元闪存存储块为未写入数据的单层单元闪存存储块。The empty multi-level cell flash memory block is a multi-level cell flash memory block in which data is not written, and the empty single-layer cell flash memory block is a single-layer cell flash memory block in which data is not written.
进一步的,由于只使用多层单元闪存存储块中的最低有效位页,会影响到其他非最低有效位页的使用,从而降低所述闪存存储设备的存储容量,因此为了解决这一问题,本实施例还包括如下步骤:Further, since only the least significant bit page in the multi-level cell flash memory block is used, the use of other non-least significant bit pages is affected, thereby reducing the storage capacity of the flash memory device, so in order to solve this problem, The embodiment further includes the following steps:
当空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量达到预先设定的临界值时,合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间。When the number of empty multi-level cell flash memory blocks and/or the number of empty single-layer cell flash memory blocks reaches a preset threshold, merging the least significant bit pages and non-least valid bits in the multi-level cell flash memory block The storage space of the bit page.
进一步的,本实施例还包括:Further, this embodiment further includes:
在所述闪存存储设备空闲时,合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间。When the flash storage device is idle, the storage space of the least significant bit page and the non-least significant bit page in the multi-level cell flash memory block is merged.
更进一步的,为了减少在写入数据时由于空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量达到预先设定的临界值时发生边合并边写入数据的现象,影响数据的写入速度,本实施例还包括:Further, in order to reduce the number of empty multi-level cell flash memory blocks and/or the number of empty single-layer cell flash memory blocks reaching a predetermined threshold value when writing data, the data is written while edge-integrated. The phenomenon of affecting the writing speed of the data, the embodiment further includes:
当空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量达到预先设定的临界值,且所述闪存存储设备空闲时,合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间。Merging the multi-level cell flash memory block when the number of empty multi-level cell flash memory blocks and/or the number of empty single-layer cell flash memory blocks reaches a preset threshold and the flash memory device is idle The storage space of the least significant bit page and the non-least significant bit page.
需要说明的是,本实施例中所述临界值为一比例值, “比例”值与“个数”值是存在不同的,“个数”值是一个静态的值,而“比例”值是一个动态的值,例如如果设置的是“个数”值,“个数”值为6,而某闪存存储设备存储空间较小,其存储块只有5个,则无法满足数据写入的条件。而如果设置的是“比例”,例如“比例”为20%,如果存储块只有5个,那么只要空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量大于1个时,即可以写入数据。It should be noted that, in this embodiment, the threshold is a proportional value. The "proportional" value is different from the "number" value. The "number" value is a static value, and the "proportional" value is a dynamic value. For example, if the "number" value is set, " The value of the number is 6, and a flash storage device has a small storage space and only five memory blocks, which cannot satisfy the conditions for data writing. And if the ratio is set to "scale", for example, "proportion" is 20%, if there are only 5 memory blocks, then the number of empty multi-level cell flash memory blocks and/or the number of empty single-layer cell flash memory blocks is greater than When one is available, data can be written.
另外,为了更好的区分所述存储块,本实施例还包括对所述存储块的状态进行标识,所述状态标识包括“忙”、“空闲”和“丢弃”等。In addition, in order to better distinguish the storage block, the embodiment further includes identifying a status of the storage block, where the status identifier includes “busy”, “idle”, “discarded”, and the like.
在本实施例中,所述合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间具体包括:In this embodiment, the merging the storage spaces of the least significant bit page and the non-least significant bit page in the multi-level cell flash memory block specifically includes:
获取空的多层单元闪存存储块和/或空的单层单元闪存存储块,将只在非最低有效位页上写有数据的多层单元闪存存储块上的数据转移存储至所述空的多层单元闪存存储块的所有闪存页和/或空的单层单元闪存存储块上的所有闪存页,并擦除所述只在非最低有效位页上写有数据且进行了数据转移存储的多层单元闪存存储块。Obtaining an empty multi-level cell flash memory block and/or an empty single-layer cell flash memory block, storing data transfer on the multi-level cell flash memory block with data only on the non-least significant bit page to the empty All flash pages of a multi-level cell flash memory block and/or all flash pages on an empty single-layer cell flash memory block, and erase the data written on the non-least significant bit page and stored for data transfer Multi-level cell flash memory block.
本实施例通过首次往所述闪存存储设备中写入数据时,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页,能够提高包含多层单元闪存存储设备的数据写入速度及稳定性。而且,在所述存储设备空闲和/或空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量小于预设的临界值时,进行数据合并和转移存储,从而能够在不牺牲闪存存储设备容量的前提下提高闪存存储设备的整体性能。In this embodiment, when data is first written into the flash memory device, the data is written to the least significant bit page and/or the single layer unit flash memory block of the multi-level cell flash memory block in the flash memory device. Flash pages that increase the speed and stability of data writes that include multi-level cell flash storage devices. Moreover, when the number of the multi-level cell flash memory blocks in which the storage device is free and/or empty and/or the number of empty single-layer cell flash memory blocks is less than a preset threshold, data merge and transfer storage are performed, thereby The overall performance of flash storage devices can be improved without sacrificing the capacity of flash storage devices.
以全部为MLC闪存(2bit/cell的闪存)的4GB闪存存储设备为例(所述闪存存储设备会有预留一些空的存储块用于数据交换或者替换坏的存储块,因此其实际存储容量小于4G,为了便于理解,本实施例以4G来举例说明),如果只使用其中的最低有效位页,则该闪存存储设备提供的存储空间为2G,因此该方法会降低所述闪存存储设备的存储容量,即是通过牺牲容量来提高数据写入速度和稳定性。而本实施例在首次往所述闪存存储设备中写入数据时,如果空的多层单元闪存存储块的数量大于预先设定的临界值,则将数据写入多层单元闪存存储块的最低有效位页;如果空的多层单元闪存存储块的数量达到预先设定的临界值和/或所述闪存存储设备空闲时做数据合并和转移存储,从而能够在不牺牲闪存存储设备容量的前提下提高其整体性能。Take a 4GB flash storage device that is all MLC flash (2bit/cell flash) as an example. The flash storage device will reserve some empty storage blocks for data exchange or replace bad storage blocks, so its actual storage capacity. Less than 4G, for ease of understanding, the embodiment is exemplified by 4G.) If only the least significant bit page is used, the storage space provided by the flash storage device is 2G, so the method may reduce the flash storage device. Storage capacity, which is to increase data write speed and stability by sacrificing capacity. In this embodiment, when writing data to the flash memory storage device for the first time, if the number of empty multi-level cell flash memory blocks is greater than a preset threshold, the data is written to the lowest of the multi-level cell flash memory block. A valid bit page; if the number of empty multi-level cell flash memory blocks reaches a preset threshold and/or data merge and transfer storage when the flash memory device is idle, thereby enabling the capacity of the flash memory device not to be sacrificed Improve its overall performance.
实施例二:Embodiment 2:
图2示出了本发明实施例二提供的闪存存储设备中数据管理装置的组成结构,为了便于说明,仅示出了与本发明实施例相关的部分。FIG. 2 is a diagram showing the structure of a data management device in a flash memory storage device according to Embodiment 2 of the present invention. For convenience of description, only parts related to the embodiment of the present invention are shown.
该闪存存储设备中数据管理装置可以应用于闪存存储设备中,可以是运行于闪存存储设备内的软件单元、硬件单元或者软硬件相结合的单元,也可以作为独立的挂件集成到闪存存储设备中或者运行于闪存存储设备的应用***中。The data management device in the flash storage device can be applied to a flash storage device, and can be a software unit, a hardware unit or a combination of hardware and software running in the flash storage device, or can be integrated into the flash storage device as a separate pendant. Or run in an application system of a flash storage device.
该闪存存储设备中数据管理装置包括数据写入单元21,其中:The data management device in the flash memory device includes a data writing unit 21, wherein:
所述数据写入单元21,用于在首次往所述闪存存储设备中写入数据时,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页。The data writing unit 21 is configured to write the data to the least significant page of the multi-level cell flash memory block in the flash memory device when writing data to the flash memory device for the first time and/or A flash memory page of a single-level cell flash memory block.
进一步的,所述装置还包括:Further, the device further includes:
判断单元22,用于判断所述闪存存储设备中空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量是否大于预先设定的临界值,若是,则所述数据写入单元21将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页;The determining unit 22 is configured to determine whether the number of the multi-level cell flash memory blocks of the flash memory device and/or the number of empty single-layer cell flash memory blocks is greater than a preset threshold, and if so, the data The writing unit 21 writes the data to a least significant bit page of the multi-level cell flash memory block in the flash memory device and/or a flash page of the single-layer cell flash memory block;
其中,所述空的多层单元闪存存储块为未写入数据的多层单元闪存存储块,所述空的单层单元闪存存储块为未写入数据的单层单元闪存存储块。The empty multi-level cell flash memory block is a multi-level cell flash memory block in which data is not written, and the empty single-layer cell flash memory block is a single-layer cell flash memory block in which data is not written.
进一步的,所述装置还包括:Further, the device further includes:
合并单元23,用于当空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量达到预先设定的临界值时,合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间。The merging unit 23 is configured to combine the least effective of the multi-level cell flash memory block when the number of empty multi-level cell flash memory blocks and/or the number of empty single-layer cell flash memory blocks reaches a preset threshold The storage space for the bit page and the non-least significant bit page.
进一步的,所述合并单元23还用于,在所述闪存存储设备空闲时,合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间。Further, the merging unit 23 is further configured to merge storage spaces of the least significant bit page and the non-least significant bit page in the multi-level cell flash memory block when the flash memory device is idle.
进一步的,所述合并单元23具体用于,获取空的多层单元闪存存储块和/或空的单层单元闪存存储块,将只在非最低有效位页上写有数据的多层单元闪存存储块上的数据转移存储至所述空的多层单元闪存存储块的所有闪存页和/或空的单层单元闪存存储块上的所有闪存页,并擦除所述只在非最低有效位页上写有数据且进行了数据转移存储的多层单元闪存存储块。Further, the merging unit 23 is specifically configured to obtain an empty multi-level cell flash memory block and/or an empty single-layer cell flash memory block, and the multi-level cell flash memory that writes data only on the non-least significant bit page Data transfer on the memory block is stored to all flash pages of the empty multi-level cell flash memory block and/or all flash pages on the empty single-layer cell flash memory block, and the non-least significant bit is erased only A multi-level cell flash memory block with data written on the page and data transfer storage.
所属领域的技术人员可以清楚地了解到,为描述的方便和简洁,仅以上述各功能单元、模块的划分进行举例说明,实际应用中,可以根据需要而将上述功能分配由不同的功能单元或模块完成,即将装置的内部结构划分成不同的功能单元或模块,以完成以上描述的全部或者部分功能。实施例中的各功能单元、模块可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中,上述集成的单元既可以采用硬件的形式实现,也可以采用软件功能单元的形式实现。另外,各功能单元、模块的具体名称也只是为了便于相互区分,并不用于限制本申请的保护范围。上述装置中单元、模块的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。It will be apparent to those skilled in the art that, for convenience and brevity of description, only the division of each functional unit and module described above is exemplified. In practical applications, the above functions may be assigned to different functional units or The module is completed, dividing the internal structure of the device into different functional units or modules to perform all or part of the functions described above. Each functional unit and module in the embodiment may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit, and the integrated unit may be hardware. Formal implementation can also be implemented in the form of software functional units. In addition, the specific names of the respective functional units and modules are only for the purpose of facilitating mutual differentiation, and are not intended to limit the scope of protection of the present application. For the specific working process of the unit and the module in the foregoing device, reference may be made to the corresponding process in the foregoing method embodiment, and details are not described herein again.
实施例三:Embodiment 3:
图3示出了本发明实施例三提供的闪存存储设备的组成结构,为了便于说明,仅示出了与本发明实施例相关的部分。FIG. 3 is a diagram showing the structure of a flash memory storage device according to Embodiment 3 of the present invention. For convenience of description, only parts related to the embodiment of the present invention are shown.
如图3所示,该闪存存储设备3包含实施例二所述的闪存存储设备中数据管理装置31、至少一多层单元闪存32和/或单层单元闪存33。As shown in FIG. 3, the flash memory device 3 includes the data management device 31, at least one multi-level cell flash memory 32, and/or single-layer cell flash memory 33 in the flash memory device described in the second embodiment.
在本实施例中,在首次往所述闪存存储设备3中写入数据时,闪存存储设备中数据管理装置31将所述数据写入所述闪存存储设备中多层单元闪存32存储块的最低有效位页和/或单层单元闪存33存储块的闪存页。In the present embodiment, when data is first written into the flash storage device 3, the data management device 31 in the flash storage device writes the data to the lowest of the storage blocks of the multi-level cell flash memory 32 in the flash storage device. The valid bit page and/or single layer unit flash 33 stores the flash page of the block.
闪存存储设备中数据管理装置31的具体实施例过程如实施例二所述,在此不再赘述。The process of the specific embodiment of the data management device 31 in the flash memory storage device is as described in the second embodiment, and details are not described herein again.
另外,需要说明的是,所属领域的技术人员应该可以清楚地了解到所述闪存存储设备3还可以包括印刷电路板(PCB板)、阻容电容等,所述闪存存储设备中数据管理装置31可以集成在所述PCB板上。In addition, it should be noted that those skilled in the art should clearly understand that the flash memory device 3 may further include a printed circuit board (PCB), a RC capacitor, etc., and the data management device 31 in the flash memory device. It can be integrated on the PCB board.
综上所述,本发明实施例通过首次往所述闪存存储设备中写入数据时,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页,能够提高包含多层单元闪存存储设备的数据写入速度及稳定性。而且,在所述存储设备空闲和/或空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量小于预设的临界值时,进行数据合并和转移存储,从而能够在不牺牲闪存存储设备容量的前提下提高其整体性能。In summary, the embodiment of the present invention writes the data to the least significant bit page and/or single of the multi-level cell flash memory block in the flash memory device by writing data to the flash memory device for the first time. The flash page of the layer cell flash memory block can improve the data writing speed and stability of the multi-cell flash memory device. Moreover, when the number of the multi-level cell flash memory blocks in which the storage device is free and/or empty and/or the number of empty single-layer cell flash memory blocks is less than a preset threshold, data merge and transfer storage are performed, thereby The ability to improve overall performance without sacrificing the capacity of flash storage devices.
本领域普通技术人员还可以理解,实现上述实施例方法中的全部或部分步骤是可以通过程序来指令相关的硬件来完成,所述的程序可以在存储于一计算机可读取存储介质中,所述的存储介质,包括ROM/RAM、磁盘、光盘等。It will also be understood by those skilled in the art that all or part of the steps of the foregoing embodiments may be implemented by a program to instruct related hardware, and the program may be stored in a computer readable storage medium. The storage medium described includes a ROM/RAM, a magnetic disk, an optical disk, and the like.
以上内容是结合具体的优选实施方式对本发明所作的进一步详细说明,不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的普通技术人员来说,在不脱离本发明构思的前提下做出若干等同替代或明显变型,而且性能或用途相同,都应当视为属于本发明由所提交的权利要求书确定的专利保护范围。The above is a further detailed description of the present invention in connection with the specific preferred embodiments, and the specific embodiments of the present invention are not limited to the description. It will be apparent to those skilled in the art that <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; The scope of patent protection as determined by the book.

Claims (11)

  1. 一种闪存存储设备中数据管理的方法,所述闪存存储设备中包括至少一多层单元闪存,其特征在于,所述方法包括:A method for data management in a flash memory device, the flash memory device including at least one multi-level cell flash memory, wherein the method comprises:
    在首次往所述闪存存储设备中写入数据时,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页。When data is first written to the flash storage device, the data is written to the least significant bit page of the multi-level cell flash memory block and/or the flash page of the single-layer cell flash memory block in the flash memory device.
  2. 如权利要求1所述的方法,其特征在于,所述方法还包括:The method of claim 1 wherein the method further comprises:
    判断所述闪存存储设备中空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量是否大于预先设定的临界值,若是,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页;Determining whether the number of the multi-level cell flash memory blocks of the flash memory device and/or the number of empty single-layer cell flash memory blocks is greater than a preset threshold, and if so, writing the data to the flash memory The least significant bit page of the multi-level cell flash memory block in the device and/or the flash page of the single-layer cell flash memory block;
    其中,所述空的多层单元闪存存储块为未写入数据的多层单元闪存存储块,所述空的单层单元闪存存储块为未写入数据的单层单元闪存存储块。The empty multi-level cell flash memory block is a multi-level cell flash memory block in which data is not written, and the empty single-layer cell flash memory block is a single-layer cell flash memory block in which data is not written.
  3. 如权利要求2所述的方法,其特征在于,所述方法还包括:The method of claim 2, wherein the method further comprises:
    当空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量达到预先设定的临界值时,合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间。When the number of empty multi-level cell flash memory blocks and/or the number of empty single-layer cell flash memory blocks reaches a preset threshold, merging the least significant bit pages and non-least valid bits in the multi-level cell flash memory block The storage space of the bit page.
  4. 如权利要求2或3所述的方法,其特征在于,所述方法还包括:The method of claim 2 or 3, wherein the method further comprises:
    在所述闪存存储设备空闲时,合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间。When the flash storage device is idle, the storage space of the least significant bit page and the non-least significant bit page in the multi-level cell flash memory block is merged.
  5. 如权利要求4所述的方法,其特征在于,所述合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间具体包括:The method of claim 4, wherein the merging the storage spaces of the least significant bit page and the non-least significant bit page in the multi-level cell flash memory block comprises:
    获取空的多层单元闪存存储块和/或空的单层单元闪存存储块,将只在非最低有效位页上写有数据的多层单元闪存存储块上的数据转移存储至所述空的多层单元闪存存储块上的所有闪存页和/或空的单层单元闪存存储块上的所有闪存页,并擦除所述只在非最低有效位页上写有数据且进行了数据转移存储的多层单元闪存存储块。Obtaining an empty multi-level cell flash memory block and/or an empty single-layer cell flash memory block, storing data transfer on the multi-level cell flash memory block with data only on the non-least significant bit page to the empty Multi-level cell flash memory stores all flash pages on a block and/or all flash pages on an empty single-layer cell flash memory block, and erases that only data is written on the non-least significant bit page and data transfer storage is performed Multi-level cell flash memory block.
  6. 一种闪存存储设备中数据管理的装置,所述闪存存储设备中包括至少一多层单元闪存,其特征在于,所述装置包括:A device for data management in a flash memory device, the flash memory device including at least one multi-level cell flash memory, wherein the device comprises:
    数据写入单元,用于在首次往所述闪存存储设备中写入数据时,将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页。a data writing unit, configured to write the data to a least significant bit page and/or a single layer unit of the multi-level cell flash memory block in the flash memory device when writing data to the flash memory device for the first time The flash page of the flash memory block.
  7. 如权利要求6所述的装置,其特征在于,所述装置还包括:The device of claim 6 wherein said device further comprises:
    判断单元,用于判断所述闪存存储设备中空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量是否大于预先设定的临界值,若是,则所述数据写入单元将所述数据写入所述闪存存储设备中多层单元闪存存储块的最低有效位页和/或单层单元闪存存储块的闪存页;a determining unit, configured to determine whether the number of the multi-level cell flash memory blocks of the flash memory device and/or the number of empty single-layer cell flash memory blocks is greater than a preset threshold, and if so, the data is written The input unit writes the data to a least significant bit page of the multi-level cell flash memory block of the flash memory device and/or a flash page of the single-layer cell flash memory block;
    其中,所述空的多层单元闪存存储块为未写入数据的多层单元闪存存储块,所述空的单层单元闪存存储块为未写入数据的单层单元闪存存储块。The empty multi-level cell flash memory block is a multi-level cell flash memory block in which data is not written, and the empty single-layer cell flash memory block is a single-layer cell flash memory block in which data is not written.
  8. 如权利要求7所述的装置,其特征在于,所述装置还包括:The device of claim 7 wherein said device further comprises:
    合并单元,用于当空的多层单元闪存存储块的数量和/或空的单层单元闪存存储块的数量达到预先设定的临界值时,合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间。a merging unit for merging the least significant bits of the multi-level cell flash memory block when the number of empty multi-level cell flash memory blocks and/or the number of empty single-layer cell flash memory blocks reaches a preset threshold The storage space for pages and non-least significant digit pages.
  9. 如权利要求7或8所述的装置,其特征在于,所述合并单元还用于,The apparatus according to claim 7 or 8, wherein said merging unit is further configured to:
    在所述闪存存储设备空闲时,合并所述多层单元闪存存储块中最低有效位页和非最低有效位页的存储空间。When the flash storage device is idle, the storage space of the least significant bit page and the non-least significant bit page in the multi-level cell flash memory block is merged.
  10. 如权利要求9所述的装置,其特征在于,所述合并单元具体用于,The apparatus according to claim 9, wherein said merging unit is specifically configured to:
    获取空的多层单元闪存存储块和/或空的单层单元闪存存储块,将只在非最低有效位页上写有数据的多层单元闪存存储块上的数据转移存储至所述空的多层单元闪存存储块的所有闪存页和/或空的单层单元闪存存储块上的所有闪存页,并擦除所述只在非最低有效位页上写有数据且进行了数据转移存储的多层单元闪存存储块。Obtaining an empty multi-level cell flash memory block and/or an empty single-layer cell flash memory block, storing data transfer on the multi-level cell flash memory block with data only on the non-least significant bit page to the empty All flash pages of a multi-level cell flash memory block and/or all flash pages on an empty single-layer cell flash memory block, and erase the data written on the non-least significant bit page and stored for data transfer Multi-level cell flash memory block.
  11. 一种闪存存储设备,其特征在于,所述闪存存储设备包括权利要求6至10任一项所述的闪存存储设备中数据管理的装置。A flash memory storage device, characterized in that the flash memory storage device comprises the device for data management in the flash memory storage device according to any one of claims 6 to 10.
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