WO2014118344A2

WO2014118344A2 - Low power modes for 3g/4g envelope tracking modulator

Info

Publication number: WO2014118344A2
Application number: PCT/EP2014/051964
Authority: WO
Inventors: Gerard Wimpenny
Original assignee: Nujira Limited
Priority date: 2013-02-01
Filing date: 2014-01-31
Publication date: 2014-08-07
Also published as: GB2510394A; GB201301853D0; WO2014118344A3

Abstract

There is provided an envelope tracking modulated supply for providing a supply voltage tracking a reference signal, and comprising a low frequency path for tracking low frequency variations in the reference signal and a high frequency path for tracking high frequency variations in the reference signal, wherein the high frequency path is selectively enabled according to a mode of operation.

Description

LOW POWER MODES FOR 3G/4G ENVELOPE TRACKING MODULATOR

BACKGROUND TO THE INVENTION: Field of the Invention:

The invention relates to envelope tracking modulated power supplies suitable for radio frequency power amplifier applications. The invention is particularly concerned with such power supplies in which a reference signal is used as an input to a low frequency path and a high frequency path, and in which each path generates separate outputs which are combined to form a supply voltage.

Description of the Related Art:

Envelope tracking power supplies for radio frequency power amplifiers are well-known in the art. Typically a reference signal is generated based on an envelope of an input signal to be amplified. An envelope tracking power supply generates a power supply for the power amplifier which tracks the reference signal.

Figure 1 shows a prior art envelope tracking (ET) modulator architecture in which a frequency splitter 12 is used to divide an incoming envelope reference signal on line 10 into a high frequency (HF) path signal on line 14 and a low frequency (LF) path signal on line 16. The frequency splitter 12 may include a low pass filter 18 in the low frequency path and. a high pass filter 20 in the high frequency path. The signal in the LF path on line 16 is amplified by an efficient switched mode amplifier 22 , and the signal in the HF path on line 14 is amplified by a wideband linear amplifier 24. A frequency selective combiner 26 is used to combine the signals in the LF and HF paths after their respective amplification. In Figure 1 the combiner 26 is illustrated as including a low frequency combining element 28 in the low frequency path, and a high frequency combining element 30 in the high frequency path. A combined signal from the combiner 26 on line 32 provides a feed to a load 34 which for purposes of description is illustrated as a resistor. In a typical application the load is a power amplifier (PA) , and the reference signal is derived from an input signal to be amplified by the power amplifier.

An example of a power amplifier system incorporating a supply architecture such as illustrated in Figure 1 can be found in "Band Separation and Efficiency Optimisation in Linear-Assisted Switching Power Amplifiers" _» Yousefzadeh et al . , [IEEE Power Electronics Specialists Conference 2006].

Figure 2 shows an alternative prior art arrangement in which the frequency selective combiner 26 is an inductor-capacitor (LC) combiner. The low frequency combining element is an inductor 28a, and the high frequency combining element is a capacitor 30a. In this arrangement a feedback path 36 takes a signal from the combiner (or modulator) output on line 32, to the input of the linear amplifier 24. The signal on the feedback path 36 is combined in a combiner 38 with the signal in the high frequency path on line 14, to provide a feedback adjusted input to the linear amplifier 24. The inclusion of this feedback path 36 achieves improved tracking accuracy compared to the arrangement of Figure 1.

An example of a power amplifier system incorporating a supply architecture such as illustrated in Figure 2 can be found in "Efficiency Optimisation in Linear-Assisted Switching Power Converters for Envelope Tracking in RF Power Amplifiers", Yousefzadeh et al . , [IEEE Symposium on Circuits and Systems 2005] . 4 051964

3

Envelope tracking modulated power supplies such as described in the prior art as discussed above offer particular efficiency advantages. However in typical applications envelope tracking offers efficiency improvements only at the high operating powers which require significant modula ion of the power amplifier supply voltage . In certain applications, when operating at significant back-off from maximum power, operation in envelope tracking mode may result in efficiency degradation rather than efficiency improvement .

It is an aim of the invention to provide an improved power supply in which an efficiency improvement is offered over a wide range of output powers .

It is an aim of the invention to provide an improved envelope tracking modulated power supply which addresses one or more of the above-stated problems .

SUMMARY OF THE INVENTION:

The invention provides an envelope tracking modulated supply for providing a supply voltage tracking a reference signal , and comprising a low frequency path for tracking low frequency variations in the reference signal and a high requency path for tracking high frequency variations in the reference signal, wherein a power amplifier selectively receives a voltage supply based on either the low frequency path alone or the combination of the low frequency path and the high frequency path.

There may be provided a combining element for providing the power supply by combining the low frequency and high frequency paths , comprising a high frequency blocking element or elements for the low frequency path and a low frequency blocking element or elements for he high frequency path . When the power amplifier receives a voltage supply based on the low frequency path the connection between the high frequency path and the low frequency blocking element be connected to electrical ground.

The low frequency path may be disabled when the connection between the high frequency path and the low frequency blocking element is connected to electrical ground.

The low frequency path may comprise a switched mode power supply for generating an output vol age tracking the reference signal and a supply voltage for a linear amplifier in the high frequency path.

The supply voltage may be enabled when the high frequency path is enabled.

The envelope tracking modulated supply may further comprise a combiner for combining the outputs of the low frequency path and the high frequency path to generate a modulated supply voltage . The combiner may include a high frequency blocking element for the output of the low frequency path and a low frequency blocking element for the output of the high frequency path.

The low frequency blocking element may provide a path for de-coupling the output when the high frequency path is disabled. The low frequency blocking element may be a capacitor .

The high f equency path may be disabled in an average power tracking mode of operation.

The high frequency path may be disabled, and there may be determined the power in the low frequency path. The power in the low frequency path may exceed a threshold, and the supply to the power amplifier may be switched to a DC supply voltage . The power in the low frequency path may be below a threshold, and the supply to the power amplifier may not be switched to a supply voltage .

There may be provided a feedback path from the output of the linear amplifier to the input of the linear amplifier, such that the linear amplifier in the correction path amplifies a signal comprising the full spectrum of the frequencies in the reference signal .

An RF amplifier may include a voltage supply stage . A wireless communica ion system may include a voltage supply stage . A wireless mobile device may include a voltage supply stage .

The invention also provides a method in an envelope tracking modulated supply for providing a supply vol age tracking a reference signal , and comprising a low frequency path for tracking low frequency variations in the reference signal and a high frequency path for tracking high frequency variations in the reference signal , wherein the method comprises providing a voltage supply based on either the low frequency path alone or the combination of the low frequency path and the high frequency path.

The method may further comprise connecting the connection between the combiner and the output of the high frequency path to electrical ground when the high frequency path is disabled.

The method may further comprise disabling the high frequency path in an average power tracking mode of operation. The method may further comprise determining the power in the low frequency path when the high frequency path is disabled, and selectively basing a voltage supply on either the low frequency path alone or a DC supply.

BRIEF DESCRIPTION OF THE FIGURES:

The invention is now described by way of example with reference to the accompanying Figures , in which:

Figure 1 illustrates a prior art envelope tracking modulated supply with high and low frequency paths;

Figure 2 illustrates a prior art envelope tracking modulated supply incorporating feedback in the high frequency path;

Figure 3 illustrates an improved envelope tracking modula ed supply incorporating feedback in the high frequency path, switcher ripple current elimination in the low frequency path, and a preferred implementation of a switched mode supply, in which embodiments of the invention may be advantageou ly incorporated;

Figures 4 (a) and 4 (b) illustrate a buck and boost switch mode voltage supply in accordance with a preferred arrangement ,- Figure 4 (c) illustrates a voltage waveform generated by the switched mode voltage supply of Figures 4 (a) and 4 (b) ;

Figures 5 (a) and 5 (b) illustrate a buck and boost switched mode voltage supply in accordance with a further preferred arrangement ;

Figures 5(c) and 5 (d) illustrate voltage waveforms which may be simultaneously generated in a dual-output buck and boost switched mode voltage supply according to the arrangement of Figure 5 (a) ;

Figure 6 illustrates the implementation of a dual-output buck and boost switched mode voltage supply according to the arrangement of Figure 5 (a) in an envelope tracking modulated supply architecture according to Figure 3 ; Figure 7 illustrates the arrangement of Figure 6 modified in accordance with an embodiment of the invention to facilitate an average power tracking mode of operation; and

Figure 8 illustrates an embodiment in which an improvement is provided for 2G implementation.

DESCRIPTION OF THE PREFERRED EMBODIMENTS:

In the following description the invention is described with reference to exemplary embodiments and implementations. The invention is not limited to the specific details of any arrangements as set out, which are provided for the purposes of understanding the invention.

Embodiments of the invention are described in the following description in the context of application to particular feedback architectures for the linear amplifier in the high frequency correction path. The invention and its embodiments are however not necessarily limited to the particular feedback arrangements in the high frequency correction path as shown.

With reference to Figure 3 there is illustrated the envelope tracking architecture as illustrated in Figure 2 , with the addition of an exemplary implementation of the switched mode amplifier 22.

The switched mode amplifier of Figure 3 preferably also includes an arrangement to address a triangular ripple current flowing in the inductor 28a of Figure 2 as a result of the switching of the switched mode amplifier 22. In the arrangement of Figure 2 this ripple current must be shunted through the output stage of the linear amplifier 24 via the capacitor 30a, in order to avoid the creation of unwanted voltage errors at the combiner output . The consequential ripple current flowing through the output of the linear amplifier 24 reduces its efficiency.

Figure 3 thus shows a preferable arrangement in which the frequency combiner 26 of Figure 2 is adapted to include an additional capacitor 28c and inductor 28b. The magnitude of the coupling factor between inductors 28a and 28b may range between 0 and 1. The inductor 28b is connected between the output of the switched mode amplifier 22 and the inductor 28a. The capacitor 28c is connected between the common connection of the inductors 28a and 28b and electrical ground.

The ripple current due to the switched mode amplifier 22 flowing in the inductor 28b and is now shunted to ground via the capacitor 28c . The loss associated with the ripple current flowing in inductor 28a passing through the linear output stage as occurs in the Figure 2 envelope tracked modulated supply is thus avoided.

As regards the exemplary implementation of the amplifier, in a preferred arrangement the LF path switched mode amplifier 22 is preferably implemented as a peak-curren -mode buck- converter which is a known prior art technique for implementing high bandwidth switched mode power supplies .

As illustrated in Figure 3, the switched mode amplifier 22 includes a pulse width modulator (PW ) 50 which receives a control signal on line 56 , and which controls a pair of switches 52a and 52b . Switch 52a is connected between a supply voltage and a common node 54 , and switch 52b is connected between the common node and electrical ground . The supply voltage is provided by a battery, and is denoted Vbat . The pulse width modulator 50 controls the switches 52a and 52b to provide the low frequency path output to the combiner 26 in dependence on the control signal on line 56. The arrangement T/EP2014/051964

9 of a pulse width modulator in combination with a switched supply is known in the art .

The switched mode amplifier 22 includes an inner current control feedback loop and an outer voltage control feedback loop.

The inner current control feedback loop senses the inductor current either directly or indirectly by sensing current in switch 52a or switch 52b, and provide a feedback path 58 to a combiner 61. The combiner 61 combines the feedback signal with a compensation ramp on line 63. The output of the combiner 61 provides an input to the inverting input of an amplifier 59. The amplifier 59 receives at its non-inverting input an output from an amplifier 60. The amplifier 59 generates the control signal on line 56.

The outer voltage control feedback loop provides a voltage feedback path 62 from the second terminal of the inductor 28b, where it connects to the inductor 28a and capacitor 28c . The feedback path provides a feedback signal to an inverting input of the amplifier 60. The amplifier 60 receives the low frequency path signal on line 16 at its non- inverting input .

Inductor 28b behaves as a current source due to the action of the inner current feedback loop provided by feedback path 58. A compensation ramp is provided on line 63 in this inner current feedback loop, and is used to prevent frequency halving at high duty cycles .

The outer voltage feedback loop provided by feedback path 62 is used to control the voltage at the junction of inductor 28b, inductor 28a, and capacitor 28c .

The peak-current-mode buck-converter as illustrated in Figure 3 operates, in general , as follows . EP2014/051964

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The low pass filter 18 generates a signal representing low frequency variation in the reference signal . This signal on line 16 then comprises a control signal for the pulse signal for the buck switcher, comprising switches 52a and 52b, which has a duty cycle determined by the control signal , such that the voltage at the output of the buck switcher tracks the signal on line 16, i.e. the low frequency variation in the reference signal .

In addition, however, this control signal on line 16 is modified by the inner feedback control loop and the outer feedback voltage control loop .

The outer feedback voltage control loop firstly ad usts the control signal in amplifier 60. The control signal (i.e. the low frequency reference signal) has the feedback signal on feedback path 62 removed therefrom. The feedback voltage on feedback path 62 represents the voltage at the output of the low frequency path, and the removal of this voltage from the low frequency signal on line 16 provides a signal representing the error between the output voltage and the reference voltage .

The inner feedback control loop secondly adjusts the control signal in amplifier 59. The second adjusted control signal (output from amplifier 59) has the signal on feedback path 58 removed therefrom. The feedback signal on feedback path 58 represents the output current .

The output voltage of the switch mode amplifier 22 is provided by a buck switcher formed of the switches 52a, 52b connected to a battery supply voltage Vbat . The linear correction path is added to the buck switcher output , to provide high frequency correction to the low frequency switched voltage , via the AC coupling capacitor 30a. As a result of combining with the correction voltage, the modulated supply is hence capable of providing short term output voltages on line 32 which are higher than the supply voltage Vbat . However the average output voltage on line 32 can be no larger than Vbat .

There are some circumstances in which having an average output voltage which cannot exceed the suppl (battery) voltage may be a problem . For example , this may be a problem when operating with a depleted battery with a low peak-to- average-power ratio (PAPR) signal , as the average output voltage may then need to be higher than the battery voltage . Hence it is desirable for the switched mode power supply 22 to be capable of both buck and boost operation, to boost the average output voltage to a level above the battery voltage Vbat .

It is well known in the art that conventional boost mode converters are difficult to stabilise on account of a right- half -plane (RHP) zero in their response characteristic . This results in such converters exhibiting a much lower closed loop bandwidth for a given switching frequency than a buck converter . Most prior art converters incorporating boost capability suffer from this disadvantage .

This arrangement addresses prior art problems by providing a voltage supply stage comprising an input supply voltage . A first and a second switch are connected in series , the first and second series connected switches being connected in parallel with the input voltage source . A third switch and capacitor are connected i parallel with the first switch. A fourth switch is connected between the connection of the third switch and the capaci or and an output . A fifth switch is connected between the output and electrical ground . In a first phase of operation, the first and fourth switches are closed, and the second, third and fifth switches are open. In a second phase of operation the second, third and fifth switches are closed, and the first and fourth switches are open. The duty cycle of operating phases is controlled such that the average voltage on the output varies between 0 volts and twice the input supply voltage . This is now described more fully with reference to the following Figures .

Figures 4 (a) and 4 (b) illustrate a switched capacitor voltage doubler cascaded with a buck output stage in which all switches are synchronously driven, in accordance with an advantageous arrangement. This embodiment shares the same control characteristics as a conventional buck converter but does not suffer from the bandwidth limitations suffered by most boost and buck-boost converter topologies . The exemplary arrangements include a battery for providing the input voltage source .

The buck output stage in Figures (a) and 4 (b) comprises a battery 100, switches 102 , 104, 106, 108, 110, and a capacitor 112. The battery 100 is connected between nodes 101 and 105. The switch 102 is connected between nodes 101 and 103. The switch 104 is connected between node 103 and node 105. The switch 106 is connected between node 101 and 107. The capacitor 112 is connected between nodes 103 and 107. The switch 108 is connected between node 107 and node 111. The switch 110 is connected between node 105 and node 111. Node 105 is connected to electrical ground . Node 111 is connected to an output 1 ine 114 on which the output voltage is generated , Figure 4(a) shows the operation in a first phase (phase 1) of the switching cycle, and Fig 4(b) shows the operation in a second phase (phase 2 ) of the switching cycle .

In the first phase of operation, as shown in Figure 4 (a) , the switches 102 and 108 are closed, and the switches 104 , 106 and 110 are open. The arrow 202 denotes current flow in the arrangement of Figure 4 (a) .

In the second phase of operation, as shown in Figure 4 (b) , the switches 104 , 106 and 110 are closed, and the switches 102 and 108 are open. The arrows 204 and 206 denote current flow in the arrangement of Figure 4 (b) ,

A controller, which is not shown in Figures 4 (a) and 4 (b) , controls the switching between the first and second phases of operation . By controlling the switching between the first and second phases of operation, and the duration for which each phase is active {i.e. the duty cycle) , the supply voltage can vary between zero volts and twice the battery voltage .

The supply rail to the output buck switches 108 , 110 at node

107 varies between voltages Vbat and 2xVbat , but the average output voltage of this stage can be set to any value between 0V and 2Vbat depending on the waveform duty cycle .

As shown in Figure 4(c) the output voltage on line 114 comprises a pulse which switches between 0V and 2xVbat . The duty cycle of switching between the first and second phases can be varied to provide a desired average voltage between 0 volts and 2 Vbat .

The topology of Figures 4 (a) and 4 (b) does not exhibit a right-half-plane zero and hence does not suffer the problems of the prior art and is capable of high closed loop bandwidth. Figure 5(a) shows an extension of the principle described with reference to Figures 4 (a) and 4 (b) to provide a two output buck-boost converter capable of outputting two output voltages each having values between 0 volts and 2 Vbat .

As illustrated in Figure 5(a), the circuit of Figures 4(a) and 4(b) is extended to include further switches 116 and 118. Switch 116 is connected between node 105 and a node 113. Switch 118 is connected between nodes 107 and 113. Node 113 is connected to an output line 115 on which a second output voltage is generated, the output voltage on line 114 now being referred to as a first output voltage.

In a buck and boost operation the circuit of Figure 5 may be controlled similar to the control of the circuit in Figures 4 (a) and 4 (b) . Figure 5 shows the switches in a first phase of operation, consistent with Figure 4 (a) . In a second phase of operation the switches of Figure 5 may be switched to the positions shown in Figure 4 (b) , with switch 118 open and switch 116 closed . Different voltages are achieved for the first and second voltages by controlling the duty cycle of the switch pairs 108/110 and 118/116 independently . A lower voltage output is produced by curtailing the pulse width of the lower voltage buck output stage .

The arrangement of the switches in Figure 5(b) illustrates a buck only mode of operation, in which the output voltage may only vary between 0V and Vbat . In this mode, switches 106 and 104 are permanently closed, and switch 102 is permanently open. Switches 108 and 110 are toggled in first and second phases of operation to vary the duty cycle of the output waveform and achieve an average voltage between 0 volts and Vbat . Thus if a boost operation is not required, the switched capacitor doubler can be set to a fixed 'through' mode as shown in Figure 5 (b) , with only switching between 0 and Vbat occurring in the buck output stage, thereby reducing losses associated with both stages.

If a peak-current-mode control switcher is used as the switched mode amplifier 22 in the low frequency path, an exemplary implementation of which is illustrated in Figure 3, the loop dynamics are unaffected by the sudden change of supply rail voltage feeding the buck output stage, as the action of the current feedback is to make the inductor behave as an ideal current source .

Figures 5 (c) and 5 (d) illustrate the generation of two supply voltages in buck-boost operation .

As illustrated n Figure 5 (c) , for the first output voltage

Vout1 the pulse width modulator controls the switches to maintain a high average voltage, such that in this example the first output voltage Voutl has an average value higher than Vbat .

As illustrated in Figure 5 (d) , for the second output voltage

Vout2 the pulse width modulator controls the switches to maintain a lower average voltage , such that in this example the second output voltage Vout2 has an average value lower than Vbat .

Figure 6 shows the dual- output buck-boost architecture of

5 (a) applied in the advantageous context of an exemplary envelope tracking modulator. To simplify the illustration, the low frequency path including the pulse width with modulator 50 for controlling the switching of the switcher is not shown in Figure 6. P2014/051964

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The reference numeral 123 denotes the boost-buck switched supply stage of Figure 5(a), which replaces the switches 52a, 52b of the Figure 3 arrangement. The arrow 125 denotes the control signal for the switches of the boost-buck switched supply stage, which are provided by a pulse width modulator (such as pulse width modulator 50 of Figure 3) , operating under the control of a signal representing the low frequency variation in the reference signal.

A main supply is provided on the line 115 corresponding to the second output voltage in Figure 5(a) and is used to provide the low frequency part of the modulator output .

The low frequency voltage output, or switched output voltage, on line 115 is applied to the node 54 as in Figure 3, and provides the low frequency input to the low frequency combining element comprised of inductor 28a.

A lower power auxiliary supply is provided on line 114 corresponding to the first output voltage in Figure 5 (a) , and is used to provide the supply rail to the correction path linear output amplifier 24 through an inductor-capacitor filter arrangement provided by inductor 120 and capacitor 122. This mirrors the inductor-capacitor filter arrangement provided by inductor 28b and capacitor 28c in the low frequency path.

As illustrated further in Figure 6, two switch controllers are provided: a first PWM peak current mode controller 124 and a second PWM peak current mode controller 126.

With reference to Figure 6 there is illustrated an advantageous arrangement in the correction path in which a feedback path for the linear amplifier 24 is taken directly from the output of the linear amplifier, rather than the 14 051964

17 output of the combiner. In addition the high pass filter 20 of the Figure 3 arrangement is eliminated. As a result a full -spectrum representation of the reference signal is provided on the path 14 rather than a signal with low frequency components removed , as in the arrangements of Figures 1 and 2. Such an arrangement offers efficiency improvements over the prior art , as it allows the peak-to-peak supply voltage of the linear amplifier 24 to be minimised. Embodiments of the invention are preferably implemented in such an arrangement , although the invention and embodiments are not limited to such an advantageous arrangement . The invention is advantageously applied in such an architecture .

Each of the controllers 124 and 126 receive the low frequency reference signal (or envelope signal) as an input, such as the signal on line 16 in Figure 3 (or a signal derived therefrom) . The first PWM peak current mode controller 124 controls the switches 118 and 116 which are used to produce the switcher output voltage on line 115, and the second PWM peak current controller 126 synchronises in frequency and phase with the first controller and controls the switches 108 and 110 which are used to produce the voltage supply for the linear amplifier on line 114. Thus each of PWM peak mode controllers 124 and 126 is shown to provide general control signals 125a and 125b, which form part of the control signals 125 to the switched supply stage 123.

Voltage doubler switches are controlled by the PWM waveform of the first or second controller, whichever has the larger duty cycle, to ensure the input to both half -bridge stages (switches 108, 110 and 118, 116) is 2Vbat when switches 108 or 118 are made (closed) . Equivalently, the PWM waveform controlling switches 102 , 104 and 106 is a logical ' OR' function of the P waveforms of controllers 1 and 2 (i.e. controllers 124 and 126) .

The main output supply on line 115 is modulated, whereas the auxiliary output supply - namely the supply voltage to the 1 inear amplifier on line 200 - may be a fixed voltage, or a voltage which is set according to the average the average power of the RF signal on a slot-by-slot basis in a communication system which is time-slot based.

Activation of the boost mode to increase the output voltage to up to double the bat ery voltage can be controlled directly by a baseband controller, for example on a slot-by-slot basis, depending, for example, on any one or combination of the RF power level , the peak-to-average power ratio, and the battery voltage in a time -slot . The baseband controller can control the PWM peak current mode controllers 124 and 126.

With reference to the linear amplifier feedback arrangement of earlier Figures, the signal at the output of the linear amplifier 24 in the high frequency path is not a full -spectrum signal because it does not contain any low frequency components . As a consequence the peak-to-peak amplitude of the signal at this point is greater than the-peak-to-peak amplitude would be if the full spectrum of the envelope signal were present . This reduces the efficiency of the linear amplifier 24 , as its supply rails must be set to allow linear amplification of this larger peak-to-peak signal .

In an alternative improved arrangement as shown in Figure 6 , the feedback path is taken from the output of the linear amplifier 24 itself rather than the output of the combiner, and thus provides a signal which has a full spectrum envelope signal . Hence the feedback signal has lower peak-to-peak amplitude than the signal at the output of the linear amplifier in the prior art linear amplifier feedback arrangement of earlier Figures.

With reference to Figure 6 there is illustrated an advantageous arrangement in which a feedback path for the linear amplifier is taken directly from the output of the linear amplifier rather than the output of the combiner.

Alternatively to Figure 6, autonomous control of the boost setting may be possible by comparing the switcher output voltage or a scaled version of the input reference voltage, for example the signal on line 16 of Figure 3, with a threshold voltage which may be defined as a percentage of the current battery voltage as shown in Figure 7. This reduces the firmware burden on the baseband controller .

With reference to Figure 7, a comparator 128 is introduced which generates a control signal on line 130 for enabling/disabling the voltage doubling circuitry provided by the switches 104 , 102 , 106 and the capacitor 112, generally denoted by reference numeral 132.

The comparator 128 is arranged to compare the output voltage at the switched output , detected at the node at the junction of inductors 28a and 28b and provided as a first input to the comparator 128 , with a threshold value at the second input to the comparator 128. The threshold voltage is provided at the junction of resistors 134 and 136 , the other terminal of resistor 134 connected to Vbat , and the other terminal of resistor 136 connected to electrical ground.

In Figure 7 it is shown that the comparator 128 compares a threshold voltage to the output voltage of the low frequency path. However the output voltage of the low frequency path is derived from the low frequency part of the reference voltage, for example the signal on line 16 of Figure 3 , and the 2014/051964

20 threshold voltage may be compared to any signal which is derived from the low frequency part of the reference voltage . In the arrangement of Figure 7, the threshold voltage may be compared to the signal on line 16 of Figure 3, rather than the output of the low frequency path, for example .

If the voltage doubling circuitry 132 is disabled, the output voltages are generated by the respective output stages comprising switched pairs 108/110 and 116/118 as conventional buck stages . This allows the respective output voltages to switch between OV and Vbat . When enabled, the voltage doubling circuitry 132 allows the respective output voltages to switch between 0V and 2xVbat .

In dependence on the comparison in the comparator 128 , the voltage doubler circuitry 132 is enabled or disabled.

In many applications, envelope tracking only offers an efficiency improvement at high power amplifier operating powers . Typically, if the power amplifier average output power is less than one-tenth of its maximum value, it is more efficient to operate in average power tracking (APT) mode, in which the modulator output voltage is held at a constant value over each slot , but adapted according to the average power level of each slot .

The term slot refers to a time-slot as defined in 3G and 4G (e.g. LTE) standards.

Figure 7 further shows how the envelope tracking architecture of Figure 6 may be re-configured as an APT power supply in which only the main switcher of the low frequency path is active .

The linear amplifier 24 is disabled for example by opening switch 108 to disconnect its power supply. A switch 140 is used to connect the capacitor 30a of the inductor-capacitor combiner to electrical ground, to provide a well -decoupled T/EP2014/051964

21 output for feeding the power amplifier load. In this way the power dissipation associated with the quiescent current of the linear amplifier 24 is saved.

When the high frequency correction path including the linear amplifier is disabled, switch 140 is turned 'on' and the capacitor 30a serves to provide additional de-coupling. No additional circuitry is required other than the switch 140 and its associated control.

When the high frequency correction path is disabled, two inductor-capacitor sections, capacitor 28c and inductor 28b, and capacitor 30a and inductor 28a provide 4^th order filtering of the switched mode supply output . Hence there is provided significantly greater switcher ripple rejection than a conventional 2^nd order filter. This is particularly beneficial for discontinuous mode operation of the PWM controller, as the low frequency ripple may be higher than in continuous mode operation.

The increased output filter rejection provided by the two inductor-capacitor sections when the high frequency path is disabled as discussed above makes it possible to operate in a discontinuous conduction mode (DCM) , such as pulse frequency mode (PFM) or burst mode operation, without exceeding stringent requirements for maximum voltage ripple. This reduces switching losses and enables high efficiency operation to be maintained at much lower output powers than are possible using PWM-only solutions ,

Conventional APT solutions with only one inductor- capacitor section, such as provided by capacitor 28c and inductor 28b, typically cannot achieve sufficiently low ripple in DCM and so may be required to implement an additional low power mode in which a switch is used to connect the power amplifier directly to the battery, bypassing the PWM converter, but sacrificing efficiency.

When operating in 2G (GSM/EDGE) mode, a physically large i ductor may need to be provided at the output of the low frequency path to allow for the potentially large currents which are required in this mode. Currents as high as 2.5A, for example, may need to be handled by the low frequency path. The presence of potentially large currents such as this dictates that the inductors at the output of the PWM 50 need to be large to handle such currents .

Figure 8 illustrates a modified arrangement which supports both 2G and 3G/4G modes in accordance with embodiments of the invention, but which does not require the low frequency pa h to handle large currents and thereby implement a large inductor in accordance with a further embodiment of the invention.

With reference to Figure 8 portions of earlier drawings are shown, and reference numerals corresponding to earlier drawings are shown where appropriate . Only those por ions of earlier drawings are shown which are required to implement this embodiment .

As shown in the embodiment , an output power amplifier 100 is provided having an RF input on line 102 and an RF output on line 104. The RF power amplifier 100 receives a modulated supply voltage on line 106.

In accordance with the foregoing arrangemen s , the modulated power supply on line 106 is provided either by the low frequency path 11 , or by the low frequency path in combination with the high frequency path. When the power supply is provided by only the low frequency path, the switch 140 is closed so that the output of the linear amplifier 24 is connected to ground and the linear amplifier 24 is disabled. Further in accordance with this embodiment , the power supply on line 106 may also be provided directly from the supply voltage, V_batt by use of the switch 105.

The power amplifier 100 provides power amplification in any one of 2G, 3G, or 4G modes of operation. As discussed above, in a 2G mode of operation at medium and low output powers in which the linear amplifier 24 is disabled and switch 140 is closed, the inductors in the low frequency path are required to handle the currents necessary for the voltage supply for the 2G opera ion.

As 2G operation may require the handling of large currents at high output power, the inductors at the output of the low frequency path need to be capable of handling large currents .

However, in accordance with this embodiment , at high outut power the low frequency path can be further bypassed, and the power supply to the amplifier 100 can be provided directly from the supply voltage V_batt by closing switch 105.

At low or medium power , the arrangement of Figure 8 opera es in APT mode as described hereinabove . Low or medium power may be defined according to the maximum current ratings of the inductor in the low frequency path, and therefore may be implementation dependent . The supply to the amplifier 100 is provided purely by the low frequency path.

At high frequency powers the arrangement of Figure 8 may operate in accordance with the preferred embodiment , and is switched to a battery bypass mode in which the power supply for the amplifier 100 is provided directly from the supply voltage V_batt by closing switch 105.

Thus the arrangement of Figure 8 may operate in one of three modes, namely envelope tracking (ET) , in which low frequency and high frequency paths are enabled, average power tracking (APT) in which the high frequency path is disabled and switch 14051964

24

140 is closed, and bypass mode, in which the high frequency path is disabled and switch 140 is closed, and also switch 105 is closed.

The invention and its embodiments relates to the application of envelope tracking (ET) to radio frequency (RF) power amplifiers, and is applicable to a broad range of implementations including cellular handsets, wireless infrastructure, and military power amplifier applications at high frequencies to microwave frequencies .

The invention has been described herein by way of example with reference to embodiments . The invention is not limited to the described embodiments , nor to specific combinations of features in embodiments . Modifications may be made to the embodiments within the scope of the invention. The scope of the invention is defined by the appended claims .

Claims

CLAIMS :

1. An envelope tracking modulated supply for providing a supply voltage tracking a reference signal, and comprising a low frequency path for tracking low frequency variations in the reference signal and a high frequency path for tracking high frequency variations in the reference signal, wherein a power amplifier selectively receives a voltage supply based on either the low frequency path alone or the combination of the low frequency path and the high frequency path.

2. The envelope tracking power supply of claim 1 wherein there is provided a combining element for providing the power supply by combining the low frequency and high frequency paths, comprising a high frequency blocking element or elements for the low frequency path and a low frequency blocking element or elements for the high frequency path.

3. The envelope tracking modulated supply of claim 1 or claim 2 wherein when the power amplifier receives a voltage supply based on the low frequency path the connection between the high frequency path and the low frequency blocking element is connected to electrical ground.

4. The envelope tracking modulated supply of claim 3 wherein the low frequency path is disabled when the connection between the high frequency path and the low frequency blocking element is connected to electrical ground.

5. The envelope tracked power supply of any one of claims 2 to 4 wherein the low frequency blocking element is a capacitor .

6. The envelope tracked power supply of any one of claims 2 to 5 wherein the wherein the high frequency blocking element is an inductor.

7. The envelope tracked supply of any one of claims 1 to 6 wherein the high frequency path is disabled in an average power tracking mode of operation.

8. The envelope tracked supply of any one of claims 1 to 7, wherein when the high frequency path is disabled the power in the low frequency path is determined.

9. The envelope tracked power supply of claim 7 wherein the power amplifier is connected to the additional DC supply when it is determined that the average supply power exceeds a threshold, when the supply voltage is based on the low frequency path alone.

10. The envelope tracked power supply of claim 8 wherein if the power in the low frequency path is below a threshold, the supply to the power amplifier is not connected to the additional DC supply voltage.

11. The envelope tracked supply of claims 1 to 6 wherein the low frequency path comprises a switched mode power supply for generating an output voltage tracking the reference signal and a supply voltage for a linear amplifier in the high frequency path .

12. The envelope tracking modulated supply according to claim 7 wherein the supply voltage is enabled when the high frequency path is enabled.

13. The envelope tracking modulated supply of any preceding claim wherein there is provided a feedback path from the output of the linear amplifier to the input of the linear amplifier, such that the linear amplifier in the correction path amplifies a signal comprising the full spectrum of the frequencies in the reference signal.

14. An RF amplifier including a voltage supply stage of any one of claims 1 to 13.

15. A wireless communication system including a voltage supply stage of any one of claims 1 to 13.

16. A wireless mobile device including a voltage supply stage of any one of claims 1 to 13.

17. A method in an envelope tracking modulated supply for providing a supply voltage tracking a reference signal, and comprising a low frequency path for tracking low frequency variations in the reference signal and a high frequency path for tracking high frequency variations in the reference signal, wherein the method comprises providing a voltage supply based on either the low frequency path alone or the combination of the low frequency path and the high frequency path.

18. The method according to claim 14 further comprises connecting the connection between the combiner and the output of the high frequency path to electrical ground when the high frequency path is disabled.

19. The method of claim 18 further comprising disabling the high frequency path in an average power tracking mode of operation .

20. The method of claims 17 to 19 further comprising determining the power in the low frequency path when the high frequency path is disabled, and selectively basing a voltage supply on either the low frequency path alone or a DC supply.