WO2014021666A1 - Single filter bank and method for designing same - Google Patents

Single filter bank and method for designing same Download PDF

Info

Publication number
WO2014021666A1
WO2014021666A1 PCT/KR2013/006962 KR2013006962W WO2014021666A1 WO 2014021666 A1 WO2014021666 A1 WO 2014021666A1 KR 2013006962 W KR2013006962 W KR 2013006962W WO 2014021666 A1 WO2014021666 A1 WO 2014021666A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
band
band signal
pass filter
filter
Prior art date
Application number
PCT/KR2013/006962
Other languages
French (fr)
Korean (ko)
Inventor
전준현
김동혁
봉정식
박진형
Original Assignee
동국대학교 산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 동국대학교 산학협력단 filed Critical 동국대학교 산학협력단
Publication of WO2014021666A1 publication Critical patent/WO2014021666A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks
    • H03H17/0248—Filters characterised by a particular frequency response or filtering method
    • H03H17/0264—Filter sets with mutual related characteristics
    • H03H17/027—Complementary filters; Phase complementary filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00—Image enhancement or restoration

Definitions

  • the present invention relates to a single filter bank and a method of designing the same, and in particular, to design a single filter bank for frequency band division coding, and using such a single filter bank, when a frequency band of a signal is divided into overlapping bands between adjacent frequency bands.
  • the present invention relates to a single filter bank and a method of designing the same for minimizing the generation of the signal to enable full reproduction of the signal.
  • the filter bank indicates a filter group in the case where the frequency band of the input signal is divided by a plurality of band pass filters and voice analysis is performed by the output from the divided filter group.
  • the frequency band of the band pass filter is set to be narrow at low frequencies or wide at high frequencies by referring to the resolution of the human voice. This frequency band is generally divided into 15 to 30 filters.
  • a two-channel quadrature mirror filter (QMF) bank system divides an input video signal into a plurality of consecutive frequency bands through a tree structure and uses non-ideal filters.
  • QMF quadrature mirror filter
  • Prior art 1 relates to Korean Patent Registration No. 10-548237 (January 24, 2006), which relates to a real-time impulse response measuring apparatus and method.
  • the first analysis filter bank analyzes the white noise signal by band
  • the second analysis filter bank analyzes the input signal of the microphone by band
  • the band adaptation filter estimates the response length of the impulse, and then adds Obtains the error of each band by subtracting the output signals of the second analysis filter bank and the band adaptation filter, and then outputs the coefficient values to the plurality of band adaptation filters to obtain characteristics of the reverberation time after obtaining the impulse response.
  • the echo canceller can be used to initialize the length of the impulse response that the echo canceller is trying to estimate, and when used as an echo canceller, it is possible to implement an echo canceller that can operate in a more general environment by adjusting the length of the impulse response to be estimated in place. Not only that, but it can effectively adjust the amount of echo canceller calculations, A simple impulse response of the desired space by using a de-card can be measured in real time, and there is an effect that can be used in the positioning of the speaker and the microphone is minimized in size of the echo signal in the design of the speaker phone.
  • Prior art 2 is Korean Patent No. 0414399 (2003.12.24), which relates to a filter bank having low power consumption and excellent flexibility using a block filter structure.
  • the prior art 2 is a serial-to-parallel converter for converting the input serial data into parallel vector data; A plurality of delayers for delaying and outputting the parallel vector data by a predetermined time; A plurality of multipliers for multiplying a vector coefficient by an output value of the delay unit and outputting a multiplication value; And a plurality of adders for adding up the first input data and the second input data and outputting a sum value, wherein the output value of the delay unit is provided as an input value of a subsequent delay unit and an input value of a corresponding multiplier.
  • the output value of the adder is provided as first input data of a subsequent adder, and the output value of the multiplier is provided as second input data of a corresponding adder, and the plurality of multipliers do not pass through the delay unit.
  • the output value of the first multiplier into which data is input is provided as the first input data of the adder connected to the first multiplier, where M is the order of the block filter, where a system function is defined and corresponds to the respective multipliers.
  • the vector coefficient is composed of the arguments of the first row of the coefficient matrix of each term constituting the system function, and thus has a block filter structure.
  • the filter of the first channel can be shared in all channels, thus reducing the amount of computation to be calculated in the system and thus reducing the power consumption. There is an advantage.
  • the present invention minimizes the occurrence of overlapping bands existing between adjacent frequency bands during frequency band division of a signal, has a linear phase, and enables full reproduction of the signal.
  • a single filter bank and its design method are provided.
  • a method of designing a single filter bank sets a low pass filter having a 2N order to separate a first band signal from an input signal input from the outside. Obtaining by; Setting a high pass filter having a predetermined delay value based on the low pass filter; Obtaining a second band signal by calculating a difference between the initial input signal delayed by the predetermined delay value and the first band signal; Shortening the first band signal and the second band signal; Interpolating the reduced first and second band signals; Acquiring an inverse signal of the first band signal and synthesizing an initial input signal delayed by a predetermined delay value and an inverse signal of the first band signal to generate a first inverse signal; And acquiring an inverse signal of the second band signal, combining the obtained inverse signal of the second band signal with the first inverse signal, and restoring a signal corresponding to the initial input signal.
  • h n may be a 2N order impulse response
  • Q 0 (Z) may include setting a low pass filter having a 2N order set by a FIR low frequency filter, which is a transfer function.
  • h 2k-1 0.5
  • At least one of which may include a low pass filter.
  • it may include a low pass filter including at least one of a symmetric fully recovered single filter bank or an asymmetric fully recovered single filter bank.
  • the low pass filter comprises a symmetric fully recovered single filter bank
  • the low pass filter comprises an asymmetric fully recovered single filter bank
  • a 3 tap half-band filter is set, Can be.
  • the low pass filter comprises an asymmetric fully recovered single filter bank
  • a 7 tap half-band filter is set, Can be.
  • the low pass filter when the low pass filter is H 0 (z), it has a delay value of m-sample delay, and when the low pass filter is H 0 (z), the delay value of (mN) -sample delay is determined. And setting a high pass filter in which the high pass filter is set to have.
  • a single filter bank receives an input signal from an external source and filters only a signal of a predetermined band to obtain a first band signal, and the first pass filter.
  • a first down sampler for decrementing the first band signal filtered by the filter to a predetermined size, a first signal delay unit receiving an input signal from an external device and delaying the input signal by a predetermined time, and through the first pass filter
  • a first signal operation unit configured to generate a second band signal by combining the filtered first band signal and an input signal delayed by a predetermined time through the first signal delay unit, and decrementing the second band signal to a predetermined size
  • a channel separation stage including a second down sampler;
  • a first upsampler for receiving and interpolating the reduced first band signal from the first down sampler of the channel separation stage, a first reconstruction filter for reconstructing the interpolated first band signal, and the first interpolated first signal.
  • a second signal delay unit for delaying a band signal by a predetermined time, a second up sampler interpolating the second band signal received from the second down sampler of the channel separation stage, and the interpolated second band sampler
  • a second reconstruction filter for reconstructing the signal, a first band signal reconstructed by the first reconstruction filter, a first band signal delayed by a predetermined time through the second signal delay unit, and reconstructed by the second reconstruction filter
  • a channel synthesis stage including a first signal synthesis unit for synthesizing the second band signal.
  • a single filter bank for solving the above problems is a third signal delay unit for receiving an input signal from the outside and delaying by a predetermined time, the input signal from the outside of the predetermined band
  • a second pass filter for filtering only a signal to obtain a third band signal, a fourth delayed signal input by the predetermined time through the third signal delay unit, and a third band signal obtained through the second pass filter
  • a second downlink signal generation unit for generating a band signal, a third down sampler shortening a fourth band signal generated through the second signal operation unit, and a second downlink sampler shortening a third band signal generated through the second pass filter
  • a channel separation stage comprising four down samplers;
  • a third upsampler that receives the reduced fourth band signal from the third down sampler of the channel separation stage, and a third reconstruction filter that receives and restores the interpolated fourth band signal.
  • a fourth upsampler that receives the reduced third band signal from a fourth down sampler, a fourth signal delayer which delays the interpolated third band signal by a predetermined time, and receives the interpolated third band signal
  • a fourth reconstructed filter to be reconstructed, a fourth band signal reconstructed by the third reconstructed filter, a third band signal delayed by a predetermined time through the fourth signal delay unit, and a fourth reconstructed by the fourth reconstructed filter
  • a channel synthesis stage including a second signal synthesis unit for synthesizing the band signals with each other.
  • the single filter bank and its design method of the present invention minimize the occurrence of aliasing bands in adjacent bands among the divided frequency bands when the input image signal is divided into a plurality of frequency bands, and a linear phase. It has the effect of having.
  • the single filter bank and its design method according to the present invention divides the input video signal into a plurality of consecutive frequency bands so that an aliasing band occurring between adjacent frequency bands does not occur. There is an effect of enabling full reproduction of the video signal.
  • the single filter bank and its design method of the present invention uses only a low pass filter, so that the calculation amount is reduced as the configuration is simplified, and the single filter bank can be easily expanded. .
  • FIG. 1 is a flowchart illustrating a method of designing a single filter bank according to an embodiment of the present invention.
  • FIG. 2 is a block diagram illustrating a single filter bank according to an embodiment of the present invention.
  • FIG. 3 is a block diagram illustrating a single filter bank according to another embodiment of the present invention.
  • the QMF (Quadrature Mirror Filter) bank prevents aliasing bands from occurring in adjacent frequency bands when the input video signal is divided into a plurality of consecutive frequency bands, thereby completely reproducing the input video signal. Make this possible.
  • Equation 1 The system transfer function of the QMF bank may be represented by Equation 1 below.
  • H 0 (z) is a decomposition low pass filter
  • H 1 (z) is a decomposition high pass filter
  • G 0 (z) is a synthetic low pass filter
  • G 1 (z) is a synthesis high pass filter.
  • Equation 2 the system transfer function of the QMF bank from which the overlap band frequency is removed.
  • H 0 (z) is a low pass filter
  • H 1 (z) is a high pass filter
  • G 0 (z) and G 1 (z) is used in the synthesis of the signal
  • the recovery signal of this QMF bank is affected by aliasing, amplitude, phase distortion, and the like.
  • a system in which the reconstruction signal is not affected by the overlap, amplitude, and phase distortion is a perfect reconstruction (PR) filter bank.
  • FIG. 1 is a flowchart illustrating a method of designing a single filter bank according to an embodiment of the present invention.
  • the method of designing a single filter bank according to the present invention first sets a low pass filter having an order of 2N, and sets a low pass filter from the input signal input from the outside through the set low pass filter.
  • a one-band signal is obtained (S110).
  • a high pass filter having a predetermined delay value is set based on the set low pass filter (S120).
  • the predetermined delay value is m-sample delay (where m is a positive integer constant), or the low pass filter set through the process S110 is In this case, the predetermined delay value is (mN) -sample delay, and the high pass filter H 1 (z) is set as in Equation 5 above.
  • the first band signal obtained in step S110 and the second band signal obtained in step S130 are each reduced by one half (S140).
  • the interpolation is performed twice with respect to the reduced first band signal and the second band signal (S150).
  • a reconstruction filter for the interpolated first band signal And Acquire an inverse signal by using the first inverse signal, and synthesize the inverse signal of the first band signal obtained by delaying the first input signal delayed by a predetermined delay value of m-sample delay or (mN) -sample delay To generate (S160).
  • a reconstruction filter is performed on the second band signal shortened in step S140.
  • operation S170 an inverse signal is obtained, and the inverse signal of the obtained second band signal is synthesized with the first inverse signal generated in step S160 to restore a signal corresponding to the initial input signal (S170).
  • the first band signal may be obtained from an input signal received from the outside through the low pass filter H 0 (z) set as in Equation 3 below.
  • the low pass filter Is the FIR low-frequency filter, which is the impulse response of the 2N order of filter.
  • transfer function transfer function
  • the low pass filter Becomes a zero-phase low pass filter when the impulse response h n is equal to h 2N-n .
  • a high pass filter H 1 (z) having a predetermined delay value may be defined as in Equation 5 below.
  • Equation 6 the system transfer function T (z) from which the overlap band frequency is removed may be defined as Equation 6 by substituting Equation 3 and Equation 5 into Equation 2.
  • Equation 8 substituting such Q 0 (z) into the system transfer function of the single filter bank gives Equation 8 below.
  • the low pass filter Includes a symmetric fully recovered single filter bank and an asymmetric fully restored single filter bank.
  • each filter bank will be described through an embodiment.
  • the low pass filter Q 0 (z) as shown in Equation 10 below can be designed.
  • the channel separation method using the single filter bank implemented according to the above-described design method of the single filter bank separates the first band signal through the first pass filter from the initial input signal input from the outside.
  • the initial input signal is delayed by a predetermined delay value of m-sample delay or (m-N) -sample delay, and the difference between the delayed initial input signal and the first band signal is calculated to obtain a second band signal.
  • the channel synthesis method using the single filter bank of the present invention first receives and interpolates a first band signal and a second band signal generated from an initial input signal in a decayed state.
  • a first band signal and a second band signal generated from an initial input signal in a decayed state.
  • the reduced state of the first band signal and the second band signal is 1/2, it is preferable to perform double interpolation on the reduced first band signal and the second band signal.
  • the interpolated first band signal is reconstructed into a first reconstruction signal corresponding to the initial input signal input to the channel separation stage based on the reconstruction filter and the signal delay unit.
  • the interpolated second band signal may be restored to a second reconstruction signal corresponding to the initial input signal inputted to the channel separation stage by the reconstruction filter.
  • one signal is generated by combining the first restored signal and the restored second restored signal.
  • FIG. 2 is a block diagram of a single filter bank according to another embodiment of the present invention.
  • the single filter bank of the present invention includes a channel separation stage 400 and a channel synthesis stage 500.
  • the channel separation stage 400 includes a first pass filter 410, a first signal delay unit 420, a first signal operation unit 430, a first down sampler 440, and a second down sampler 441. .
  • the first pass filter 410 receives an input signal x [n] from the outside and separates a first band signal from the input signal X [n].
  • the first pass filter 410 is a low pass filter determined as a predetermined integer filter.
  • the first signal delay unit 420 receives an input signal x [n] from the outside and delays the input signal X [n] by a predetermined time.
  • the first signal calculator 430 generates a second band signal by calculating a difference between the first band signal and an input signal delayed by a predetermined time.
  • the first down sampler 440 decrements the first band signal separated by the first pass filter 410 in half.
  • the second down sampler 441 decrements the second band signal calculated by the first signal operation unit 430 in half.
  • the first band signal and the second band signal reduced through the first down sampler 440 and the second down sampler 441 have the same size as the input signal x [n] received from the outside. do.
  • the shortened first band signal and the second band signal are transmitted to the decoding unit, that is, the channel synthesis terminal 500 through the communication means.
  • the channel synthesis stage 500 includes a first up sampler 510, a second up sampler 511, a first reconstruction filter 520, a second reconstruction filter 521, a second signal delay unit 530, and a first up sampler 510.
  • 1 includes a signal synthesizing unit 540.
  • the first up sampler 510 receives and interpolates the reduced first band signal transmitted from the first down sampler 440 of the channel separation stage 400.
  • the second up sampler 511 interpolates the reduced second band signal transmitted from the second down sampler 441 of the channel separation stage 400.
  • the first up sampler 510 and the second up sampler 511 perform an interpolation process to recover the magnitude of the lost signal when the signal is shortened in the channel separation stage 400.
  • the first reconstruction filter 520 receives the first band signal interpolated by the first upsampler 510 and reconstructs the first band signal to have the same size as the initial input signal input to the channel separation stage 400.
  • the second reconstruction filter 521 receives the second band signal interpolated by the second upsampler 511 and reconstructs the second band signal to have the same size as the initial input signal input to the channel separation stage 400.
  • the second signal delay unit 530 receives the interpolated first band signal from the first upsampler 510 and delays the signal by a predetermined time.
  • the first signal synthesizing unit 540 includes a first reconstruction signal restored by the first reconstruction filter 520, a first band signal delayed by a predetermined time through the second signal delay unit 530, and the first reconstruction signal.
  • the second reconstruction signal reconstructed by the second reconstruction filter 521 is synthesized to generate a signal having the same size as that of the initial input signal input to the channel separation stage 400.
  • FIG. 3 is a block diagram of a single filter bank according to another embodiment of the present invention.
  • the single filter bank of the present invention includes a channel separation stage 600 and a channel synthesis stage 700.
  • the channel separation stage 600 includes a third signal delay unit 610, a second pass filter 620, a second signal operation unit 630, a third down sampler 640, and a fourth down sampler 641. .
  • the third signal delay unit 610 receives the input signal x [n] from the outside and delays the input signal X [n] by a predetermined time.
  • the second pass filter 620 receives the input signal x [n] from the outside and separates the third band signal from the input signal X [n].
  • the second pass filter 620 is a low pass filter determined as a predetermined integer filter.
  • the second signal calculator 630 generates a fourth band signal by calculating a difference between the delayed input signal and the third band signal by a predetermined time.
  • the third down sampler 640 decrements the fourth band signal generated by the signal operation unit 630 to 1/2 size.
  • the fourth down sampler 641 decrements the third band signal separated by the second pass filter 620 into 1/2 size.
  • the shortened third band signal and the fourth band signal are transmitted to the decoder ie, the channel synthesis terminal 700 through a communication means (not shown).
  • the channel synthesis stage 700 includes a third up sampler 710, a fourth up sampler 711, a third reconstruction filter 720, a fourth reconstruction filter 721, a fourth signal delay unit 730, and a second.
  • the signal synthesizer 740 is included.
  • the third up sampler 710 interpolates the shortened fourth band signal transmitted from the first down sampler 640 of the channel separation stage 600.
  • the fourth up sampler 711 interpolates the shortened third band signal transmitted from the fourth down sampler 641 of the channel separation stage 600.
  • the third up sampler 710 and the second up sampler 711 perform an interpolation process to recover the magnitude of the lost signal when the signal is reduced in the channel separation stage 600.
  • the third reconstruction filter 720 receives the fourth band signal interpolated by the third up-sampler 710 and reconstructs the same as the initial input signal input to the channel separation stage 600.
  • the fourth reconstruction filter 721 receives the third band signal interpolated by the fourth up-sampler 711 and reconstructs the signal to have the same size as the initial input signal input to the channel separation stage 600.
  • the fourth signal delay unit 730 receives the third band signal interpolated by the fourth up sampler 711 and delays the signal by a predetermined time.
  • the second signal synthesizing unit 740 may include a restored fourth band signal received from the third reconstruction filter 720, a third band signal delayed by a predetermined time received from the fourth signal delay unit 730, and The restored third band signal received from the fourth reconstruction filter 721 is synthesized to generate a signal having the same size as that of the initial input signal input to the channel separation stage 600.
  • the embodiments of the present invention described above can be implemented in a computer-readable code on a computer-readable recording medium.
  • the computer-readable recording medium includes all kinds of recording devices in which data that can be read by a computer system is stored.
  • Examples of computer-readable recording media include ROM, RAM, CD-ROM, magnetic tape, floppy disks, optical data storage devices, and the like, which may also be implemented in the form of carrier waves (for example, transmission over the Internet). Include.
  • the computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion.
  • functional programs, codes and code segments for implementing the present invention can be easily inferred by programmers in the art to which the present invention belongs.
  • the single filter bank and its design method of the present invention minimize the occurrence of aliasing bands in adjacent bands among the divided frequency bands when the input image signal is divided into a plurality of frequency bands, and a linear phase. It has the effect of having.
  • the single filter bank and its design method according to the present invention divides the input video signal into a plurality of consecutive frequency bands so that an aliasing band occurring between adjacent frequency bands does not occur. There is an effect of enabling full reproduction of the video signal.
  • the single filter bank and its design method of the present invention uses only a low pass filter, so that the calculation amount is reduced as the configuration is simplified, and the single filter bank can be easily expanded. .

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Filters That Use Time-Delay Elements (AREA)

Abstract

The present invention relates to a single filter bank and to a method for designing same. More particularly, the method for designing a single filter bank comprises: a step of setting a low pass filter having 2N degree to separate and acquire a first band signal from an input signal input from an external source; a step of setting a high pass filter having a preset delay value based on the low pass filter; a step of calculating the difference between an initial input signal delayed by a preset delay value and the first band signal to acquire a second band signal; a step of decimating the first band signal and the second band signal; a step of interpolating the decimated first band signal and the decimated second band signal; a step of acquiring a reverse signal of the first band signal, and synthesizing the initial input signal delayed by a preset delay value and the reverse signal of the first band signal to generate a first reverse signal; and a step of acquiring a reverse signal of the second band signal, and synthesizing the acquired reverse signal of the second band signal and the first reverse signal to restore a signal corresponding to the initial input signal. By means of the above-described configuration, the single filter tank and the method for designing same according to the present invention minimize the generation of aliasing band in the adjacent band from among the divided frequency bands and realize a linear phase when an input image signal is divided to a plurality of frequency bands.

Description

싱글 필터 뱅크 및 이의 설계방법Single filter bank and its design method
본 발명은 싱글 필터 뱅크 및 이의 설계방법에 관한 것으로, 특히 주파수 대역 분할 부호화를 위한 싱글 필터 뱅크를 설계하고, 이러한 싱글 필터 뱅크를 이용하여, 신호의 주파수 대역 분할 시, 인접하는 주파수 대역 간 중첩 대역의 발생을 최소화하여 상기 신호의 완전 재생이 가능하도록 하는 싱글 필터 뱅크 및 이의 설계방법에 관한 것이다.The present invention relates to a single filter bank and a method of designing the same, and in particular, to design a single filter bank for frequency band division coding, and using such a single filter bank, when a frequency band of a signal is divided into overlapping bands between adjacent frequency bands. The present invention relates to a single filter bank and a method of designing the same for minimizing the generation of the signal to enable full reproduction of the signal.
필터뱅크(filter bank)란, 입력 신호의 주파수 대역을 다수 개의 대역 통과 필터에 의해 분할하고, 분할된 필터 군으로부터 출력에 의해 음성 분석을 하는 경우의 필터군을 나타낸다. 대역 통과 필터의 주파수 대역은 사람 음성의 분해능을 참고하여 낮은 주파수에서는 좁거나, 또는 높은 주파수에서는 넓게 주파수 대역을 설정한다. 이러한 주파수 대역은 일반적으로 15개 내지 30개의 필터로 분할된다. The filter bank indicates a filter group in the case where the frequency band of the input signal is divided by a plurality of band pass filters and voice analysis is performed by the output from the divided filter group. The frequency band of the band pass filter is set to be narrow at low frequencies or wide at high frequencies by referring to the resolution of the human voice. This frequency band is generally divided into 15 to 30 filters.
특히, 2 채널 QMF(Quadrature Mirror Filter) 뱅크 시스템은 트리 구조(tree structure)를 통해 입력 영상 신호를 연속적인 여러 개의 주파수 대역으로 분리하며, 비이상적인(non-ideal) 필터들을 사용한다. 하지만, 이러한 입력 영상 신호를 연속적인 복수 개의 주파수 대역으로 분리하는 과정의 수행 시, 인접하는 주파수 대역 간에 중첩 대역(aliasing band)이 발생하게 되고, 이로 인해 선형 위상(linear phase)을 가질 수 없을 뿐만 아니라, 입력 영상 신호에 대한 완전한 재생이 불가능한 문제점이 발생했다. In particular, a two-channel quadrature mirror filter (QMF) bank system divides an input video signal into a plurality of consecutive frequency bands through a tree structure and uses non-ideal filters. However, when performing the process of separating the input video signal into a plurality of consecutive frequency bands, an aliasing band is generated between adjacent frequency bands, and thus, it is impossible to have a linear phase. However, there is a problem that complete reproduction of the input image signal is impossible.
상술한 바와 같이, 본 발명의 싱글 필터 뱅크 및 이의 설계방법에 대한 선행기술을 살펴보면 다음과 같다. As described above, the prior art of the single filter bank and its design method of the present invention will be described as follows.
선행기술 1은 한국등록특허 제10-548237호(2006.01.24)로서, 실시간 임펄스 응답 측정장치 및 방법에 관한 것이다. 이러한 선행기술 1은 제1분석필터뱅크가 백색잡음신호를 대역별로 분석하고, 제2 분석필터뱅크가 마이크로폰의 입력신호를 대역별로 분석하며, 대역적응필터가 임펄스의 응답길이를 추정한 후, 가산기가 제2 분석필터뱅크와 대역적응필터의 출력신호를 감산하여 각 밴드의 오차를 구한 후, 그에 따른 계수값을 다수의 대역적응필터로 출력함으로써, 임펄스 응답을 얻은후 그 잔향시간의 특성을 파악하여 반향제거기가 추정하려고 하는 임펄스 응답의 길이를 초기화하는데 사용할 수 있고, 이를 반향제거기에 사용할 경우 추정하려고 하는 임펄스 응답의 길이를 장소에 알맞게 조정함으로써 보다 일반적인 환경에서 동작할 수 있는 반향제거기를 구현할 수 있을 뿐만 아니라 반향제거기의 계산량을 효과적으로 조절할 수 있으며, 또한 피씨에 설치된 사운드 카드를 이용하여 간편하게 원하는 공간의 임펄스 응답을 실시간으로 측정할 수 있고, 또한 스피커폰의 설계시 반향신호의 크기가 최소화되는 스피커와 마이크로폰의 위치설정에 사용될 수 있는 효과가 있다.Prior art 1 relates to Korean Patent Registration No. 10-548237 (January 24, 2006), which relates to a real-time impulse response measuring apparatus and method. In the prior art 1, the first analysis filter bank analyzes the white noise signal by band, the second analysis filter bank analyzes the input signal of the microphone by band, and the band adaptation filter estimates the response length of the impulse, and then adds Obtains the error of each band by subtracting the output signals of the second analysis filter bank and the band adaptation filter, and then outputs the coefficient values to the plurality of band adaptation filters to obtain characteristics of the reverberation time after obtaining the impulse response. The echo canceller can be used to initialize the length of the impulse response that the echo canceller is trying to estimate, and when used as an echo canceller, it is possible to implement an echo canceller that can operate in a more general environment by adjusting the length of the impulse response to be estimated in place. Not only that, but it can effectively adjust the amount of echo canceller calculations, A simple impulse response of the desired space by using a de-card can be measured in real time, and there is an effect that can be used in the positioning of the speaker and the microphone is minimized in size of the echo signal in the design of the speaker phone.
선행기술 2는 한국등록특허 제0414399호(2003.12.24)로서, 블록필터 구조를 사용하여 구현된 소비전력이 적으며, 유연성이 뛰어난 필터뱅크에 관한 것이다. 이러한 선행기술 2는 입력되는 직렬데이터를 병렬벡터데이터로 변환하는 직병렬변환기; 상기 병렬벡터데이터를 소정 시간 지연시켜 출력하는 복수의 지연기; 벡터계수와 상기 지연기의 출력값을 벡터곱셈하여 승산값을 출력하는 복수의 승산기; 및 제1입력데이터와 제2입력데이터를 합산하여 합산값을 출력하는 복수의 가산기;를 포함하며, 상기 지연기의 출력값은 이어지는 다음 단의 지연기의 입력값 및 대응되는 승산기의 입력값으로 제공되고, 상기 가산기의 출력값은 이어지는 다음 단의 가산기의 제1입력데이터로 제공되고, 상기 승산기의 출력값은 대응되는 가산기의 제2입력데이터로 제공되며, 상기 복수의 승산기 중에서 상기 지연기를 통과하지 않은 병렬데이터가 입력되는 제1승산기의 출력값은 상기 제1승산기에 접속되어 있는 가산기의 제1입력데이터로 제공되며, M은 블록필터의 차수일 때, 시스템함수가 정의되고, 상기 각각의 승산기에 대응하는 벡터계수는 상기 시스템 함수를 구성하는 각항의 계수행렬의 첫 번째 행의 인자들로 구성됨으로써, 블록필터 구조를 가질 때, 데시메이터 및 익스팬더들과의 연관관계에 의하여 시스템에서 연산하여야 할 계산량이 상당히 감소되는 장점이 있다. 또한 블록필터를 uniform 필터뱅크에 적용하여 생성된 블록필터뱅크 분석단 및 합성단의 경우, 첫째 채널의 필터가 모든 채널에서 공유될 수 있으므로, 시스템에서 연산하여야 할 계산량이 감소하며 따라서 소비 전력이 줄어드는 장점이 있다.Prior art 2 is Korean Patent No. 0414399 (2003.12.24), which relates to a filter bank having low power consumption and excellent flexibility using a block filter structure. The prior art 2 is a serial-to-parallel converter for converting the input serial data into parallel vector data; A plurality of delayers for delaying and outputting the parallel vector data by a predetermined time; A plurality of multipliers for multiplying a vector coefficient by an output value of the delay unit and outputting a multiplication value; And a plurality of adders for adding up the first input data and the second input data and outputting a sum value, wherein the output value of the delay unit is provided as an input value of a subsequent delay unit and an input value of a corresponding multiplier. And the output value of the adder is provided as first input data of a subsequent adder, and the output value of the multiplier is provided as second input data of a corresponding adder, and the plurality of multipliers do not pass through the delay unit. The output value of the first multiplier into which data is input is provided as the first input data of the adder connected to the first multiplier, where M is the order of the block filter, where a system function is defined and corresponds to the respective multipliers. The vector coefficient is composed of the arguments of the first row of the coefficient matrix of each term constituting the system function, and thus has a block filter structure. By affinity with the foundation and the expander has the advantage that calculation amount can be calculated in the system is significantly reduced. In addition, in the case of the block filter bank analysis stage and the synthesis stage generated by applying the block filter to the uniform filter bank, the filter of the first channel can be shared in all channels, thus reducing the amount of computation to be calculated in the system and thus reducing the power consumption. There is an advantage.
상기와 같은 종래 기술의 문제점을 해결하기 위해, 본 발명은 신호의 주파수 대역 분할 시, 인접하는 주파수 대역 간에 존재하는 중첩 대역의 발생이 최소가 되도록 하고, 선형 위상을 가지며, 신호의 완전 재생이 가능하도록 하는 싱글 필터 뱅크 및 이의 설계방법을 제공하고자 한다.In order to solve the above problems of the prior art, the present invention minimizes the occurrence of overlapping bands existing between adjacent frequency bands during frequency band division of a signal, has a linear phase, and enables full reproduction of the signal. A single filter bank and its design method are provided.
위와 같은 과제를 해결하기 위한 본 발명의 한 실시 예에 따른 싱글 필터 뱅크의 설계방법은 2N 차수를 갖는 저역 통과 필터(low pass filter)를 설정하여 외부로부터 입력된 입력신호로부터 제1 대역신호를 분리하여 획득하는 단계; 상기 저역 통과 필터에 기초하여 기설정된 딜레이값을 가진 고역 통과 필터(high pass filter)를 설정하는 단계; 상기 기설정된 딜레이값에 의해 딜레이된 초기 입력신호와 상기 제1 대역신호간의 차이를 연산하여 제2 대역신호를 획득하는 단계; 상기 제1 대역신호 및 제2 대역신호를 간축하는 단계; 간축된 상기 제1 대역신호 및 제2 대역신호를 보간하는 단계; 상기 제1 대역신호의 역신호를 획득하고, 기설정된 딜레이값에 의해 딜레이된 초기 입력신호와 상기 제1 대역신호의 역신호를 합성하여 제1 역신호를 생성하는 단계; 및 상기 제2 대역신호의 역신호를 획득하고, 획득한 상기 제2 대역신호의 역신호와 상기 제1 역신호를 합성하여 상기 초기 입력신호에 대응하는 신호를 복원하는 단계;를 포함한다. In order to solve the above problems, a method of designing a single filter bank according to an embodiment of the present invention sets a low pass filter having a 2N order to separate a first band signal from an input signal input from the outside. Obtaining by; Setting a high pass filter having a predetermined delay value based on the low pass filter; Obtaining a second band signal by calculating a difference between the initial input signal delayed by the predetermined delay value and the first band signal; Shortening the first band signal and the second band signal; Interpolating the reduced first and second band signals; Acquiring an inverse signal of the first band signal and synthesizing an initial input signal delayed by a predetermined delay value and an inverse signal of the first band signal to generate a first inverse signal; And acquiring an inverse signal of the second band signal, combining the obtained inverse signal of the second band signal with the first inverse signal, and restoring a signal corresponding to the initial input signal.
보다 바람직하게는
Figure PCTKR2013006962-appb-I000001
이때, 상기 hn은 2N 차수의 임펄스 응답이고, Q0(Z)는 전달함수인 FIR 저주파 필터에 의해 설정하는 2N 차수를 갖는 저역 통과 필터를 설정하는 단계를 포함할 수 있다.More preferably
Figure PCTKR2013006962-appb-I000001
In this case, h n may be a 2N order impulse response, and Q 0 (Z) may include setting a low pass filter having a 2N order set by a FIR low frequency filter, which is a transfer function.
특히, 상기 Q0(z)는 hn = h2N-n 일 때, 영 위상(zero-phase) 저역 통과 필터일 수 있다. In particular, Q 0 (z) may be a zero-phase low pass filter when h n = h 2N-n .
보다 바람직하게는 이때, h2k-1 = 0.5, h2n-1 = 0, n= 1,2,…, 2k-1 이며, More preferably, at this time, h 2k-1 = 0.5, h 2n-1 = 0, n = 1,2,... , 2k-1
Figure PCTKR2013006962-appb-I000002
Figure PCTKR2013006962-appb-I000002
중 적어도 하나인 저역 통과 필터를 포함할 수 있다. At least one of which may include a low pass filter.
보다 바람직하게는 대칭 완전 복원 싱글 필터 뱅크 또는 비대칭 완전 복원 싱글 필터 뱅크 중 적어도 하나를 포함하는 저역 통과 필터를 포함할 수 있다. More preferably, it may include a low pass filter including at least one of a symmetric fully recovered single filter bank or an asymmetric fully recovered single filter bank.
특히, 상기 저역 통과 필터가 대칭 완전 복원 싱글 필터 뱅크를 포함하는 경우, n-N=1 일 때,
Figure PCTKR2013006962-appb-I000003
이고, n-N=7 일 때,
Figure PCTKR2013006962-appb-I000004
일 수 있다. In particular, when the low pass filter comprises a symmetric fully recovered single filter bank, when nN = 1,
Figure PCTKR2013006962-appb-I000003
When nN = 7,
Figure PCTKR2013006962-appb-I000004
Can be.
특히, 상기 저역 통과 필터가 비대칭 완전 복원 싱글 필터 뱅크를 포함하는 경우, 3 tap half-band 필터가 설정되며,
Figure PCTKR2013006962-appb-I000005
일 수 있다. In particular, if the low pass filter comprises an asymmetric fully recovered single filter bank, a 3 tap half-band filter is set,
Figure PCTKR2013006962-appb-I000005
Can be.
특히, 상기 저역 통과 필터가 비대칭 완전 복원 싱글 필터 뱅크를 포함하는 경우, 7 tap half-band 필터가 설정되며,
Figure PCTKR2013006962-appb-I000006
일 수 있다. In particular, if the low pass filter comprises an asymmetric fully recovered single filter bank, a 7 tap half-band filter is set,
Figure PCTKR2013006962-appb-I000006
Can be.
보다 바람직하게는 상기 저역 통과 필터가 H0(z)일 때, m-sample delay의 딜레이값을 가지고, 상기 저역 통과 필터가 H0(z)일 때, (m-N)-sample delay의 딜레이값을 갖도록 고역 통과 필터가 설정되는 고역 통과 필터를 설정하는 단계를 포함할 수 있다. More preferably, when the low pass filter is H 0 (z), it has a delay value of m-sample delay, and when the low pass filter is H 0 (z), the delay value of (mN) -sample delay is determined. And setting a high pass filter in which the high pass filter is set to have.
위와 같은 과제를 해결하기 위한 본 발명의 다른 실시 예에 따른 싱글 필터 뱅크는 외부로부터 입력신호를 입력받아 기설정된 대역의 신호만을 필터링하여 제1 대역 신호를 획득하는 제1 통과필터, 상기 제1 통과필터를 통해 필터링된 제1 대역신호를 기설정된 크기로 간축(decimation)하는 제1 다운 샘플러, 외부로부터 입력신호를 입력받아 기설정된 시간만큼 지연시키는 제1 신호지연부, 상기 제1 통과필터를 통해 필터링된 제1 대역신호와, 상기 제1 신호지연부를 통해 기설정된 시간만큼 지연된 입력신호를 합성하여 제2 대역신호를 생성하는 제1 신호연산부, 상기 제2 대역신호를 기설정된 크기로 간축(decimation)하는 제2 다운 샘플러를 포함하는 채널분리단; 및 상기 채널분리단의 제1 다운 샘플러로부터 간축된 제1 대역신호를 입력받아 보간(interpolation)하는 제1 업 샘플러, 보간된 상기 제1 대역신호를 복원하는 제1 복원필터, 보간된 상기 제1 대역신호를 기설정된 시간만큼 지연시키는 제2 신호지연부, 상기 채널분리단의 제2 다운 샘플러로부터 간축된 제2 대역신호를 입력받아 보간(interpolation)하는 제2 업 샘플러, 보간된 상기 제2 대역신호를 복원하는 제2 복원필터, 상기 제1 복원필터를 통해 복원된 제1 대역신호와, 상기 제2 신호지연부를 통해 기설정된 시간만큼 지연된 제1 대역신호 및 상기 제2 복원필터를 통해 복원된 제2 대역신호를 합성하는 제1 신호합성부를 포함하는 채널합성단;을 포함한다. According to another aspect of the present invention, a single filter bank receives an input signal from an external source and filters only a signal of a predetermined band to obtain a first band signal, and the first pass filter. A first down sampler for decrementing the first band signal filtered by the filter to a predetermined size, a first signal delay unit receiving an input signal from an external device and delaying the input signal by a predetermined time, and through the first pass filter A first signal operation unit configured to generate a second band signal by combining the filtered first band signal and an input signal delayed by a predetermined time through the first signal delay unit, and decrementing the second band signal to a predetermined size A channel separation stage including a second down sampler; And a first upsampler for receiving and interpolating the reduced first band signal from the first down sampler of the channel separation stage, a first reconstruction filter for reconstructing the interpolated first band signal, and the first interpolated first signal. A second signal delay unit for delaying a band signal by a predetermined time, a second up sampler interpolating the second band signal received from the second down sampler of the channel separation stage, and the interpolated second band sampler A second reconstruction filter for reconstructing the signal, a first band signal reconstructed by the first reconstruction filter, a first band signal delayed by a predetermined time through the second signal delay unit, and reconstructed by the second reconstruction filter And a channel synthesis stage including a first signal synthesis unit for synthesizing the second band signal.
위와 같은 과제를 해결하기 위한 본 발명의 또 다른 실시 예에 따른 싱글 필터 뱅크는 외부로부터 입력신호를 입력받아 기설정된 시간만큼 지연시키는 제3 신호지연부, 외부로부터 입력신호를 입력받아 기설정된 대역의 신호만을 필터링하여 제3 대역신호를 획득하는 제2 통과필터, 상기 제3 신호지연부를 통해 기설정된 시간만큼 지연된 입력신호와, 상기 제2 통과필터를 통해 획득한 제3 대역신호를 합성하여 제4 대역신호를 생성하는 제2 신호연산부, 상기 제2 신호연산부를 통해 생성된 제4 대역신호를 간축하는 제3 다운 샘플러, 상기 제2 통과필터를 통해 생성된 제3 대역신호를 간축하는 제4 다운 샘플러를 포함하는 채널분리단; 및 상기 채널분리단의 제3 다운 샘플러로부터 간축된 제4 대역신호를 입력받아 보간하는 제3 업 샘플러, 보간된 상기 제4 대역신호를 입력받아 복원하는 제3 복원필터, 상기 채널분리단의 제4 다운 샘플러로부터 간축된 제3 대역신호를 입력받아 보간하는 제4 업 샘플러, 보간된 상기 제3 대역신호를 기설정된 시간만큼 지연시키는 제4 신호지연부, 보간된 상기 제3 대역신호를 입력받아 복원하는 제4 복원필터, 상기 제3 복원필터를 통해 복원된 제4 대역신호와, 상기 제4 신호지연부를 통해 기설정된 시간만큼 지연된 제3 대역신호 및 상기 제4 복원필터를 통해 복원된 제4 대역신호를 상호 합성하는 제2 신호합성부를 포함하는 채널합성단;을 포함한다.A single filter bank according to another embodiment of the present invention for solving the above problems is a third signal delay unit for receiving an input signal from the outside and delaying by a predetermined time, the input signal from the outside of the predetermined band A second pass filter for filtering only a signal to obtain a third band signal, a fourth delayed signal input by the predetermined time through the third signal delay unit, and a third band signal obtained through the second pass filter; A second downlink signal generation unit for generating a band signal, a third down sampler shortening a fourth band signal generated through the second signal operation unit, and a second downlink sampler shortening a third band signal generated through the second pass filter; A channel separation stage comprising four down samplers; And a third upsampler that receives the reduced fourth band signal from the third down sampler of the channel separation stage, and a third reconstruction filter that receives and restores the interpolated fourth band signal. A fourth upsampler that receives the reduced third band signal from a fourth down sampler, a fourth signal delayer which delays the interpolated third band signal by a predetermined time, and receives the interpolated third band signal A fourth reconstructed filter to be reconstructed, a fourth band signal reconstructed by the third reconstructed filter, a third band signal delayed by a predetermined time through the fourth signal delay unit, and a fourth reconstructed by the fourth reconstructed filter And a channel synthesis stage including a second signal synthesis unit for synthesizing the band signals with each other.
본 발명의 싱글 필터 뱅크 및 이의 설계방법은 입력 영상 신호를 복수 개의 주파수 대역으로 분할 시, 분할된 주파수 대역 중 인접하는 대역에 중첩 대역(aliasing band) 발생하는 것을 최소화하고, 선형 위상(linear phase)을 갖는 효과가 있다. The single filter bank and its design method of the present invention minimize the occurrence of aliasing bands in adjacent bands among the divided frequency bands when the input image signal is divided into a plurality of frequency bands, and a linear phase. It has the effect of having.
또한, 본 발명의 싱글 필터 뱅크 및 이의 설계방법은 입력 영상 신호를 복수 개의 연속적인 주파수 대역으로 분할할 때, 서로 인접하는 주파수 대역 간에 발생하는 중첩 대역(aliasing band)이 발생하지 않도록 함으로써, 상기 입력 영상 신호에 대한 완전한 재생이 가능하도록 하는 효과가 있다. In addition, the single filter bank and its design method according to the present invention divides the input video signal into a plurality of consecutive frequency bands so that an aliasing band occurring between adjacent frequency bands does not occur. There is an effect of enabling full reproduction of the video signal.
더불어, 본 발명의 싱글 필터 뱅크 및 이의 설계방법은 저역 통과 필터(Low pass filter)만을 사용함으로써, 그 구성이 간단해짐에 따라 계산량이 감소하고, 싱글 필터 뱅크를 용이하게 확장할 수 있는 효과가 있다. In addition, the single filter bank and its design method of the present invention uses only a low pass filter, so that the calculation amount is reduced as the configuration is simplified, and the single filter bank can be easily expanded. .
도 1은 본 발명의 일 실시 예에 따른 싱글 필터 뱅크의 설계 방법을 나타낸 순서도이다. 1 is a flowchart illustrating a method of designing a single filter bank according to an embodiment of the present invention.
도 2는 본 발명의 일 실시 예에 따른 싱글 필터 뱅크를 나타낸 블록도이다.2 is a block diagram illustrating a single filter bank according to an embodiment of the present invention.
도 3은 본 발명의 다른 실시 예에 따른 싱글 필터 뱅크를 나타낸 블록도이다.3 is a block diagram illustrating a single filter bank according to another embodiment of the present invention.
이하, 본 발명을 바람직한 실시 예와 첨부한 도면을 참고로 하여 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자가 용이하게 실시할 수 있도록 상세히 설명한다. 그러나 본 발명은 여러 가지 상이한 형태로 구현될 수 있으며, 여기에서 설명하는 실시 예에 한정되는 것은 아니다. Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.
QMF(Quadrature Mirror Filter) 뱅크는 입력 영상 신호를 복수 개의 연속적인 주파수 대역으로 분할할 때, 서로 인접하는 주파수 대역에서 중첩 대역(aliasing band)이 발생하는 것을 방지하여, 상기 입력 영상 신호에 대한 완전한 재생이 가능하도록 한다.The QMF (Quadrature Mirror Filter) bank prevents aliasing bands from occurring in adjacent frequency bands when the input video signal is divided into a plurality of consecutive frequency bands, thereby completely reproducing the input video signal. Make this possible.
이러한 QMF 뱅크의 시스템 전달함수는 하기의 수학식 1로 나타낼 수 있다.The system transfer function of the QMF bank may be represented by Equation 1 below.
수학식 1
Figure PCTKR2013006962-appb-M000001
 Equation 1
Figure PCTKR2013006962-appb-M000001
이때, 상기 H0(z)는 분해 저역 통과 필터이고, H1(z)는 분해 고역 통과 필터이며, G0(z)는 합성 저역 통과 필터이고, G1(z)는 합성 고역 통과 필터이다.Wherein H 0 (z) is a decomposition low pass filter, H 1 (z) is a decomposition high pass filter, G 0 (z) is a synthetic low pass filter, and G 1 (z) is a synthesis high pass filter. .
따라서, 상기 QMF뱅크에서 발생한 중첩대역 주파수는 G0(z)=H1(-z)와, G1(z)=-H0(-z) 의 관계를 통해 제거된다. Therefore, the overlapping band frequency generated in the QMF bank is removed through the relationship of G 0 (z) = H 1 (-z) and G 1 (z) =-H 0 (-z).
이에 따라, 상기 중첩대역 주파수가 제거된 QMF 뱅크의 시스템 전달함수는 하기의 수학식 2와 같이 나타낼 수 있다.Accordingly, the system transfer function of the QMF bank from which the overlap band frequency is removed may be expressed by Equation 2 below.
수학식 2
Figure PCTKR2013006962-appb-M000002
 Equation 2
Figure PCTKR2013006962-appb-M000002
이때, 상기 H0(z)는 저역 통과 필터이고, H1(z)는 고역 통과 필터로서, 입력 신호의 분해 시 사용되고, G0(z) 및 G1(z)은 신호의 합성과정에서 사용되며, 상기 T(z)는
Figure PCTKR2013006962-appb-I000007
를 만족하게 된다. 이때, 완전 복원 필터 뱅크의 필터를 얻기 위해서 T(z)를 인수분해한다. 즉, P(z) = H0(z)H1(-z)의 인수분해를 통해 H0(z)와 H1(-z)를 획득한다.In this case, H 0 (z) is a low pass filter, H 1 (z) is a high pass filter, is used when decomposing the input signal, G 0 (z) and G 1 (z) is used in the synthesis of the signal Where T (z) is
Figure PCTKR2013006962-appb-I000007
Will be satisfied. At this time, T (z) is factored to obtain a filter of the complete recovery filter bank. That is, H 0 (z) and H 1 (-z) are obtained by factoring P (z) = H 0 (z) H 1 (-z).
하지만 이러한 QMF 뱅크의 복원 신호는 중첩(aliasing), 진폭(amplitude), 위상왜곡(phase distortion) 등에 의해 영향을 받는다. 이때, 상기 복원 신호가 중첩, 진폭, 위상왜곡의 영향을 받지 않는 시스템은 완전 복원 (PR: Perfect-reconstruction) 필터 뱅크이다. However, the recovery signal of this QMF bank is affected by aliasing, amplitude, phase distortion, and the like. At this time, a system in which the reconstruction signal is not affected by the overlap, amplitude, and phase distortion is a perfect reconstruction (PR) filter bank.
따라서, 이하에서는 본 발명의 싱글 필터 뱅크 및 이의 설계방법을 통해, 입력신호의 주파수 대역을 복수 개의 연속적인 주파수 대역으로 분할 시, 분할된 주파수 대역에 인접하는 주파수 대역에서 발생되는 중첩, 진폭, 위상왜곡에 영향을 받지 않는 완전 복원(perfect reconstruction)의 성질을 가지고, 상기 입력신호의 주파수 대역 분할 시에도, 하나의 필터만을 사용하여 상기 입력신호의 완전한 복원 조건을 만족시킬 수 있다. Therefore, hereinafter, when a frequency band of an input signal is divided into a plurality of consecutive frequency bands through a single filter bank and a design method thereof, overlapping, amplitude, and phase generated in a frequency band adjacent to the divided frequency band It has a property of perfect reconstruction that is not affected by distortion, and even when the frequency band of the input signal is divided, only one filter can satisfy the complete recovery condition of the input signal.
이하, 도 1을 참조하여 본 발명인 싱글 필터 뱅크의 설계 방법에 대하여 자세히 살펴보도록 한다. Hereinafter, a design method of a single filter bank of the present invention will be described in detail with reference to FIG. 1.
도 1은 본 발명의 일 실시 예에 따른 싱글 필터 뱅크의 설계 방법을 나타낸 순서도이다. 1 is a flowchart illustrating a method of designing a single filter bank according to an embodiment of the present invention.
도 1에 도시된 바와 같이, 본 발명인 싱글 필터 뱅크의 설계 방법은 먼저, 2N 차수를 갖는 저역 통과 필터(Low pass filter)를 설정하고, 설정된 상기 저역 통과 필터를 통해 외부로부터 입력된 입력신호로부터 제1 대역신호를 획득한다(S110). As shown in FIG. 1, the method of designing a single filter bank according to the present invention first sets a low pass filter having an order of 2N, and sets a low pass filter from the input signal input from the outside through the set low pass filter. A one-band signal is obtained (S110).
이와 같이, 설정된 상기 저역 통과 필터에 기초하여 기설정된 딜레이값을 가진 고역 통과 필터를 설정한다(S120). In this way, a high pass filter having a predetermined delay value is set based on the set low pass filter (S120).
앞서 과정 S110을 통해 설정된 저역 통과 필터가
Figure PCTKR2013006962-appb-I000008
일 경우에는 기설정된 딜레이값이 m-sample delay(이때, m은 양의 정수인 상수이다.)가 되거나, 또는 상기 과정 S110을 통해 설정된 저역 통과 필터가
Figure PCTKR2013006962-appb-I000009
인 경우에는, 기설정된 딜레이값은 (m-N)-sample delay가 되어, 고역 통과 필터(high pass filter) H1(z)가 앞서 수학식 5와 같이 설정된다. The low pass filter set up earlier in step S110
Figure PCTKR2013006962-appb-I000008
In this case, the predetermined delay value is m-sample delay (where m is a positive integer constant), or the low pass filter set through the process S110 is
Figure PCTKR2013006962-appb-I000009
In this case, the predetermined delay value is (mN) -sample delay, and the high pass filter H 1 (z) is set as in Equation 5 above.
이처럼, 고역 통과 필터 H1(z)가 설정됨에 따라, m-sample delay 또는 (m-N)-sample delay 만큼 딜레이된 초기 입력 신호와, 상기 제 1 대역 신호 간 차이를 연산하여, 제2 대역 신호를 획득한다(S130).As such, as the high pass filter H 1 (z) is set, a difference between the initial input signal delayed by the m-sample delay or the (mN) -sample delay and the first band signal is calculated, and the second band signal is calculated. Acquire (S130).
이후, 상기 과정 S110에서 획득한 상기 제1 대역 신호와, 상기 과정 S130에서 획득한 상기 제2 대역 신호에 대하여 각각 1/2로 간축(decimation)한다(S140). Thereafter, the first band signal obtained in step S110 and the second band signal obtained in step S130 are each reduced by one half (S140).
이어서, 간축된 상기 제1 대역 신호와 제2 대역 신호에 대하여 각각 두 배로 보간(interpolation)한다(S150).Subsequently, the interpolation is performed twice with respect to the reduced first band signal and the second band signal (S150).
이에 따라, 보간된 상기 제1 대역 신호에 대하여, 복원필터
Figure PCTKR2013006962-appb-I000010
및
Figure PCTKR2013006962-appb-I000011
를 이용하여 역신호를 획득하고, 획득한 상기 제1 대역 신호의 역신호를 기설정된 딜레이값인 m-sample delay 또는 (m-N)-sample delay 크기만큼 딜레이된 초기 입력 신호와 합성하여 제1 역신호를 생성한다(S160).Accordingly, a reconstruction filter for the interpolated first band signal
Figure PCTKR2013006962-appb-I000010
And
Figure PCTKR2013006962-appb-I000011
Acquire an inverse signal by using the first inverse signal, and synthesize the inverse signal of the first band signal obtained by delaying the first input signal delayed by a predetermined delay value of m-sample delay or (mN) -sample delay To generate (S160).
이어서, 앞서 과정 S140을 통해 간축된 상기 제2 대역신호에 대하여, 복원필터
Figure PCTKR2013006962-appb-I000012
를 이용하여 역신호를 획득하고, 획득한 상기 제2 대역신호의 역신호를 과정 S160에서 생성된 상기 제1 역신호와 합성하여 초기 입력 신호에 대응하는 신호로서 복원한다(S170).Subsequently, a reconstruction filter is performed on the second band signal shortened in step S140.
Figure PCTKR2013006962-appb-I000012
In operation S170, an inverse signal is obtained, and the inverse signal of the obtained second band signal is synthesized with the first inverse signal generated in step S160 to restore a signal corresponding to the initial input signal (S170).
예를 들어, 하기의 수학식 3과 같이 설정되는 저역 통과 필터 H0(z)를 통해, 외부로부터 입력받은 입력신호로부터 제1 대역신호를 획득할 수 있다.For example, the first band signal may be obtained from an input signal received from the outside through the low pass filter H 0 (z) set as in Equation 3 below.
수학식 3
Figure PCTKR2013006962-appb-M000003
 Equation 3
Figure PCTKR2013006962-appb-M000003
이때, 상기 저역 통과 필터
Figure PCTKR2013006962-appb-I000013
는 FIR 저주파 필터로서 2N 차수(order of filter)의 임펄스 응답(impulse response)인
Figure PCTKR2013006962-appb-I000014
을 갖게 되는데, 전달함수(transfer function)에 의해 하기의 수학식 4와 같이,
Figure PCTKR2013006962-appb-I000015
로 표현될 수 있다.At this time, the low pass filter
Figure PCTKR2013006962-appb-I000013
Is the FIR low-frequency filter, which is the impulse response of the 2N order of filter.
Figure PCTKR2013006962-appb-I000014
By the transfer function (transfer function) as shown in Equation 4,
Figure PCTKR2013006962-appb-I000015
It can be expressed as.
수학식 4
Figure PCTKR2013006962-appb-M000004
 Equation 4
Figure PCTKR2013006962-appb-M000004
또한, 상기 저역 통과 필터
Figure PCTKR2013006962-appb-I000016
는 상기 임펄스 응답 hn 이 h2N-n과 동일한 경우, 영 위상(zero-phase) 저역 통과 필터(low pass filter)가 된다. In addition, the low pass filter
Figure PCTKR2013006962-appb-I000016
Becomes a zero-phase low pass filter when the impulse response h n is equal to h 2N-n .
이러한 상기 저역통과필터 H0(z)를 이용하여 기설정된 딜레이값을 갖는 고역 통과 필터 H1(z)를 하기의 수학식 5와 같이 정의할 수 있다.Using the low pass filter H 0 (z), a high pass filter H 1 (z) having a predetermined delay value may be defined as in Equation 5 below.
수학식 5
Figure PCTKR2013006962-appb-M000005
 Equation 5
Figure PCTKR2013006962-appb-M000005
이때, 상기 m은 양의 정수인 상수이고, 상기 z-m은 m-sample delay를 나타낸다. 이 경우 고주파 대역 신호는 입력 신호에서 저주파 대역 신호를 빼서 획득된다. 중첩대역 주파수가 제거된 시스템 전달함수 T(z)는 수학식 2에 수학식 3 및 수학식 5를 대입하여 하기의 수학식 6과 같이 정의할 수 있다.In this case, m is a positive integer constant, z -m represents m-sample delay. In this case, the high frequency band signal is obtained by subtracting the low frequency band signal from the input signal. The system transfer function T (z) from which the overlap band frequency is removed may be defined as Equation 6 by substituting Equation 3 and Equation 5 into Equation 2.
수학식 6
Figure PCTKR2013006962-appb-M000006
 Equation 6
Figure PCTKR2013006962-appb-M000006
이때, m이 m=2k, k=1,2,3,…이고, N이 N=2k-1, k=1,2,3,…이다. Where m is m = 2k, k = 1,2,3,... And N is N = 2k-1, k = 1,2,3,... to be.
이때, 만약 상기 저역 통과 필터 Q0(z)가 h2k-1=0.5이고, h2n-1=0, n=1,2,…, k-1인 경우에는 하기의 수학식 7을 획득할 수 있다.In this case, if the low pass filter Q 0 (z) is h2k-1 = 0.5, h2n-1 = 0, n = 1,2,... , k-1, can be obtained by Equation 7 below.
수학식 7
Figure PCTKR2013006962-appb-M000007
 Equation 7
Figure PCTKR2013006962-appb-M000007
결국, 이러한 Q0(z)를 싱글 필터 뱅크의 시스템 전달함수에 대입하면, 하기의 수학식 8이 된다. As a result, substituting such Q 0 (z) into the system transfer function of the single filter bank gives Equation 8 below.
수학식 8
Figure PCTKR2013006962-appb-M000008
 Equation 8
Figure PCTKR2013006962-appb-M000008
특히, 저역 통과 필터인
Figure PCTKR2013006962-appb-I000017
는 대칭 완전 복원 싱글 필터 뱅크와 비대칭 완전 복원 싱글 필터 뱅크를 포함하는데, 이하, 각 필터뱅크에 대하여 실시예를 통해 설명하도록 한다. In particular, the low pass filter
Figure PCTKR2013006962-appb-I000017
Includes a symmetric fully recovered single filter bank and an asymmetric fully restored single filter bank. Hereinafter, each filter bank will be described through an embodiment.
먼저, 대칭 완전 복원 싱글 필터 뱅크에서는
Figure PCTKR2013006962-appb-I000018
을 이용하여, n-N=1일 경우에는 저역 통과 필터 Q0(z)가
Figure PCTKR2013006962-appb-I000019
와 같이 나타나고, n-N=7일 경우에는
Figure PCTKR2013006962-appb-I000020
로 나타난다.First, in a symmetric fully restored single filter bank
Figure PCTKR2013006962-appb-I000018
If nN = 1, the low pass filter Q 0 (z) is
Figure PCTKR2013006962-appb-I000019
And when nN = 7
Figure PCTKR2013006962-appb-I000020
Appears.
이어서, 비대칭 완전 복원 싱글 필터 뱅크에서는 K=1, m-N=1일 때, 3-tap의 half-band 필터가 결정되며, 이때, 저역 통과 필터 Q0(z)는 하기의 수학식 9와 같이, 나타날 수 있다. Subsequently, in the asymmetric fully recovered single filter bank, when K = 1 and mN = 1, a 3-tap half-band filter is determined, where the low pass filter Q 0 (z) is expressed by Equation 9 below. May appear.
수학식 9
Figure PCTKR2013006962-appb-M000009
 Equation 9
Figure PCTKR2013006962-appb-M000009
또한, 상술한 바와 마찬가지 방법으로 7-tap의 half-band 필터를 결정하면, 하기의 수학식 10과 같은 저역 통과 필터 Q0(z)를 설계할 수 있다. In addition, if the half-band filter of 7-tap is determined in the same manner as described above, the low pass filter Q 0 (z) as shown in Equation 10 below can be designed.
수학식 10
Figure PCTKR2013006962-appb-M000010
 Equation 10
Figure PCTKR2013006962-appb-M000010
상기 본 발명의 실시예에 따르면, 제시된 저역 통과 필터와 이에 대응하여 복원을 위해 사용되는 고역 통과 필터를 수학식 10과 같이 다항식으로 설정하고, 기설정된 연산을 통해 초기 입력신호에 대한 완전 복원함으로써, 싱글 필터 뱅크 시스템에서의 초기 입력신호에 대한 완전 재생이 가능한 구조를 설계할 수 있다.According to the embodiment of the present invention, by setting the low pass filter and the high pass filter used for reconstruction corresponding to the polynomial, as shown in Equation 10, by fully reconstructing the initial input signal through a predetermined operation, A structure capable of fully reproducing the initial input signal in the single filter bank system can be designed.
이와 같이, 상술한 싱글 필터 뱅크의 설계방법에 따라 구현된 싱글 필터 뱅크를 이용한 채널 분리 방법은 외부로부터 입력되는 초기 입력신호로부터 제1 통과필터를 통해 제1 대역 신호를 분리한다. 이때, 상기 제1 통과필터는 소정 정수형 필터로서, h2k-1 = 0.5, h2n-1 = 0, n=1,2,…,k-1의 특성을 갖는다.As described above, the channel separation method using the single filter bank implemented according to the above-described design method of the single filter bank separates the first band signal through the first pass filter from the initial input signal input from the outside. At this time, the first pass filter is a predetermined integer filter, h 2k-1 = 0.5, h 2n-1 = 0, n = 1, 2, ... , k-1.
이처럼, 기설정된 딜레이 값인 m-sample delay 또는 (m-N)-sample delay 만큼 초기 입력신호를 지연시키고, 지연된 초기 입력신호와, 상기 제 1 대역 신호 간 차이를 연산하여, 제2 대역 신호를 획득한다.As described above, the initial input signal is delayed by a predetermined delay value of m-sample delay or (m-N) -sample delay, and the difference between the delayed initial input signal and the first band signal is calculated to obtain a second band signal.
이후, 상기 제1 대역 신호와, 상기 제2 대역 신호에 대하여 각각 1/2로 간축(decimation)하여 채널을 분리한다. 이때, 상기 제1 통과필터는 소정 정수형 필터로서, h2k-1 = 0.5, h2n-1 = 0, n=1,2,…, k-1의 특성을 갖는다. Thereafter, channels are separated by decimation of the first band signal and the second band signal by 1/2. At this time, the first pass filter is a predetermined integer filter, h 2k-1 = 0.5, h 2n-1 = 0, n = 1, 2, ... , k-1.
이어서, 본 발명의 싱글 필터 뱅크를 이용한 채널 합성 방법은 먼저, 간축(decimation)된 상태의 초기 입력신호로부터 생성된 제1 대역신호 및 제2 대역신호를 입력받아 보간(interpolation)한다. 예를 들어, 상기 제1 대역신호 및 제2 대역신호의 간축된 상태가 1/2인 경우, 간축된 제1 대역신호 및 제2 대역신호에 대하여 두 배의 보간을 수행하는 것이 바람직하다. Subsequently, the channel synthesis method using the single filter bank of the present invention first receives and interpolates a first band signal and a second band signal generated from an initial input signal in a decayed state. For example, when the reduced state of the first band signal and the second band signal is 1/2, it is preferable to perform double interpolation on the reduced first band signal and the second band signal.
이어서, 보간된 상기 제1 대역신호를 복원필터 및 신호지연부에 기초하여 채널분리단으로 입력된 초기 입력신호와 대응하는 제1 복원신호로 복원한다.Subsequently, the interpolated first band signal is reconstructed into a first reconstruction signal corresponding to the initial input signal input to the channel separation stage based on the reconstruction filter and the signal delay unit.
또한, 보간된 상기 제2 대역신호를 복원필터에 의해 채널분리단으로 입력된 초기 입력신호와 대응하는 제2 복원신호로 복원한다.The interpolated second band signal may be restored to a second reconstruction signal corresponding to the initial input signal inputted to the channel separation stage by the reconstruction filter.
이에 따라, 상기 제1 복원신호와, 복원된 상기 제2 복원신호를 합성하여 하나의 신호를 생성한다. Accordingly, one signal is generated by combining the first restored signal and the restored second restored signal.
이러한 싱글 필터 뱅크의 설계 방법에 따라 구현된 싱글 필터 뱅크를 이용하여 부호화기 및 복호화기에서 활용하는 방법에 대해 도 2를 통해 제시하도록 한다.A method of using the single filter bank implemented according to the design method of the single filter bank in the encoder and the decoder will be described with reference to FIG. 2.
도 2는 본 발명의 다른 실시 예에 따른 싱글 필터 뱅크의 블록도이다.2 is a block diagram of a single filter bank according to another embodiment of the present invention.
도 2에 도시된 바와 같이, 본 발명의 싱글 필터 뱅크는 채널분리단(400) 및 채널합성단(500)을 포함한다. As shown in FIG. 2, the single filter bank of the present invention includes a channel separation stage 400 and a channel synthesis stage 500.
채널분리단(400)은 제1 통과필터(410), 제1 신호지연부(420), 제1 신호연산부(430), 제1 다운 샘플러(440) 및 제2 다운 샘플러(441)를 포함한다. The channel separation stage 400 includes a first pass filter 410, a first signal delay unit 420, a first signal operation unit 430, a first down sampler 440, and a second down sampler 441. .
제1 통과필터(410)는 외부로부터 입력신호 x[n]를 입력받아, 상기 입력신호 X[n]로부터 제1 대역신호를 분리한다. 이때, 상기 제1 통과필터(410)는 소정 정수형 필터로서 결정된 저역 통과 필터이다. The first pass filter 410 receives an input signal x [n] from the outside and separates a first band signal from the input signal X [n]. In this case, the first pass filter 410 is a low pass filter determined as a predetermined integer filter.
제1 신호지연부(420)는 외부로부터 입력신호 x[n]를 입력받아, 기설정된 시간만큼 상기 입력신호 X[n]를 지연시킨다. The first signal delay unit 420 receives an input signal x [n] from the outside and delays the input signal X [n] by a predetermined time.
제1 신호연산부(430)는 상기 제1 대역신호와, 기설정된 시간만큼 딜레이된 입력신호와의 차이를 연산하여 제2 대역신호를 생성한다. The first signal calculator 430 generates a second band signal by calculating a difference between the first band signal and an input signal delayed by a predetermined time.
제1 다운 샘플러(440)는 상기 제1 통과필터(410)를 통해 분리된 상기 제1 대역신호를 1/2로 간축(decimation)한다.The first down sampler 440 decrements the first band signal separated by the first pass filter 410 in half.
제2 다운 샘플러(441)는 상기 제1 신호연산부(430)를 통해 연산된 상기 제2 대역신호를 1/2로 간축(decimation)한다.The second down sampler 441 decrements the second band signal calculated by the first signal operation unit 430 in half.
이와 같이, 상기 제1 다운 샘플러(440) 및 제2 다운 샘플러(441)를 통해 간축된 상기 제1 대역신호와 제2 대역신호가 외부로부터 입력받은 상기 입력신호 x[n]과 동일한 크기를 가지게 된다. 또한, 이처럼 간축된 상기 제1 대역신호 및 제2 대역신호는 통신수단을 통해 복호화부 즉, 채널합성단(500)으로 전달된다. As such, the first band signal and the second band signal reduced through the first down sampler 440 and the second down sampler 441 have the same size as the input signal x [n] received from the outside. do. In addition, the shortened first band signal and the second band signal are transmitted to the decoding unit, that is, the channel synthesis terminal 500 through the communication means.
*채널합성단(500)는 제1 업 샘플러(510), 제2 업 샘플러(511), 제1 복원필터(520), 제2 복원필터(521), 제2 신호지연부(530) 및 제1 신호합성부(540)를 포함한다. The channel synthesis stage 500 includes a first up sampler 510, a second up sampler 511, a first reconstruction filter 520, a second reconstruction filter 521, a second signal delay unit 530, and a first up sampler 510. 1 includes a signal synthesizing unit 540.
제1 업 샘플러(510)는 채널분리단(400)의 제1 다운 샘플러(440)로부터 전달되는 간축된 제1 대역신호를 입력받아 보간(interpolation)한다. The first up sampler 510 receives and interpolates the reduced first band signal transmitted from the first down sampler 440 of the channel separation stage 400.
제2 업 샘플러(511)는 채널분리단(400)의 제2 다운 샘플러(441)로부터 전달되는 간축된 제2 대역신호를 입력받아 보간(interpolation)한다. 이러한 상기 제1 업 샘플러(510) 및 제2 업 샘플러(511)는 앞서 채널분리단(400)에서 신호의 간축 시, 손실된 신호의 크기를 복구하기 위하여 보간과정을 수행하는 것이다. The second up sampler 511 interpolates the reduced second band signal transmitted from the second down sampler 441 of the channel separation stage 400. The first up sampler 510 and the second up sampler 511 perform an interpolation process to recover the magnitude of the lost signal when the signal is shortened in the channel separation stage 400.
제1 복원필터(520)는 상기 제1 업 샘플러(510)가 보간한 상기 제1 대역신호를 입력받아 상기 채널분리단(400)으로 입력된 초기 입력신호와 동일한 크기를 갖도록 복원한다. The first reconstruction filter 520 receives the first band signal interpolated by the first upsampler 510 and reconstructs the first band signal to have the same size as the initial input signal input to the channel separation stage 400.
제2 복원필터(521)는 상기 제2 업 샘플러(511)가 보간한 상기 제2 대역신호를 입력받아 상기 채널분리단(400)으로 입력된 초기 입력신호와 동일한 크기를 갖도록 복원한다. The second reconstruction filter 521 receives the second band signal interpolated by the second upsampler 511 and reconstructs the second band signal to have the same size as the initial input signal input to the channel separation stage 400.
제2 신호지연부(530)는 상기 제1 업 샘플러(510)로부터 보간된 제1 대역신호를 입력받아 기설정된 시간만큼 지연시킨다. The second signal delay unit 530 receives the interpolated first band signal from the first upsampler 510 and delays the signal by a predetermined time.
제1 신호합성부(540)는 상기 제1 복원필터(520)를 통해 복원된 제1 복원신호와, 상기 제2 신호지연부(530)를 통해 기설정된 시간만큼 지연된 제1 대역신호 및 상기 제2 복원필터(521)를 통해 복원된 제2 복원신호를 합성하여, 채널분리단(400)으로 입력된 초기 입력신호의 크기와 동일한 크기를 갖는 신호를 생성한다.The first signal synthesizing unit 540 includes a first reconstruction signal restored by the first reconstruction filter 520, a first band signal delayed by a predetermined time through the second signal delay unit 530, and the first reconstruction signal. The second reconstruction signal reconstructed by the second reconstruction filter 521 is synthesized to generate a signal having the same size as that of the initial input signal input to the channel separation stage 400.
이하, 도 3을 참조하여 싱글 필터 뱅크의 다른 실시 예에 대하여 자세히 살펴보도록 한다.Hereinafter, another embodiment of a single filter bank will be described in detail with reference to FIG. 3.
도 3은 본 발명의 다른 실시 예에 따른 싱글 필터 뱅크의 블록도이다.3 is a block diagram of a single filter bank according to another embodiment of the present invention.
도 3에 도시된 바와 같이, 본 발명의 싱글 필터 뱅크는 채널분리단(600) 및 채널합성단(700)을 포함한다.As shown in FIG. 3, the single filter bank of the present invention includes a channel separation stage 600 and a channel synthesis stage 700.
채널분리단(600)은 제3 신호지연부(610), 제2 통과필터(620), 제2 신호연산부(630), 제3 다운 샘플러(640) 및 제4 다운 샘플러(641)를 포함한다.The channel separation stage 600 includes a third signal delay unit 610, a second pass filter 620, a second signal operation unit 630, a third down sampler 640, and a fourth down sampler 641. .
제3 신호지연부(610)는 외부로부터 입력신호 x[n]를 입력받아, 기설정된 시간만큼 상기 입력신호 X[n]를 지연시킨다.The third signal delay unit 610 receives the input signal x [n] from the outside and delays the input signal X [n] by a predetermined time.
제2 통과필터(620)는 외부로부터 입력신호 x[n]를 입력받아, 상기 입력신호 X[n]로부터 제3 대역신호를 분리한다. 이때, 상기 제2 통과필터(620)는 소정 정수형 필터로서 결정된 저역 통과 필터이다.The second pass filter 620 receives the input signal x [n] from the outside and separates the third band signal from the input signal X [n]. In this case, the second pass filter 620 is a low pass filter determined as a predetermined integer filter.
제2 신호연산부(630)는 기설정된 시간만큼 딜레이된 입력신호와 상기 제3 대역신호간 차이를 연산하여 제4 대역신호를 생성한다.The second signal calculator 630 generates a fourth band signal by calculating a difference between the delayed input signal and the third band signal by a predetermined time.
제3 다운 샘플러(640)는 상기 신호연산부(630)를 통해 생성된 제4 대역신호를 1/2 크기로 간축(decimation)한다.The third down sampler 640 decrements the fourth band signal generated by the signal operation unit 630 to 1/2 size.
제4 다운 샘플러(641)는 상기 제2 통과필터(620)를 통해 분리된 제3 대역신호를 1/2 크기로 간축(decimation)한다.The fourth down sampler 641 decrements the third band signal separated by the second pass filter 620 into 1/2 size.
이와 같이 간축된 상기 제3 대역신호 및 제4 대역신호는 통신수단(미도시)을 통해 복호화부인 즉, 채널합성단(700)으로 전달된다.The shortened third band signal and the fourth band signal are transmitted to the decoder ie, the channel synthesis terminal 700 through a communication means (not shown).
채널합성단(700)은 제3 업 샘플러(710), 제4 업 샘플러(711), 제3 복원필터(720), 제4 복원필터(721), 제4 신호지연부(730) 및 제2 신호합성부(740)를 포함한다. The channel synthesis stage 700 includes a third up sampler 710, a fourth up sampler 711, a third reconstruction filter 720, a fourth reconstruction filter 721, a fourth signal delay unit 730, and a second. The signal synthesizer 740 is included.
제3 업 샘플러(710)는 상기 채널분리단(600)의 제1 다운 샘플러(640)로부터 전달되는 간축된 제4 대역신호를 입력받아 보간(interpolation)한다.The third up sampler 710 interpolates the shortened fourth band signal transmitted from the first down sampler 640 of the channel separation stage 600.
제4 업 샘플러(711)는 채널분리단(600)의 제4 다운 샘플러(641)로부터 전달되는 간축된 제3 대역신호를 입력받아 보간(interpolation)한다. 이러한 상기 제3 업 샘플러(710) 및 제2 업 샘플러(711)는 앞서 채널분리단(600)에서 신호의 간축 시, 손실된 신호의 크기를 복구하기 위하여 보간과정을 수행하는 것이다. The fourth up sampler 711 interpolates the shortened third band signal transmitted from the fourth down sampler 641 of the channel separation stage 600. The third up sampler 710 and the second up sampler 711 perform an interpolation process to recover the magnitude of the lost signal when the signal is reduced in the channel separation stage 600.
제3 복원필터(720)는 상기 제3 업 샘플러(710)가 보간한 상기 제4 대역신호를 입력받아 상기 채널분리단(600)으로 입력된 초기 입력신호와 동일하 크기를 갖도록 복원한다. The third reconstruction filter 720 receives the fourth band signal interpolated by the third up-sampler 710 and reconstructs the same as the initial input signal input to the channel separation stage 600.
제4 복원필터(721)는 상기 제4 업 샘플러(711)가 보간한 제3 대역신호를 입력받아 상기 채널분리단(600)으로 입력된 초기 입력신호와 동일한 크기를 갖도록 복원한다.The fourth reconstruction filter 721 receives the third band signal interpolated by the fourth up-sampler 711 and reconstructs the signal to have the same size as the initial input signal input to the channel separation stage 600.
제4 신호지연부(730)는 상기 제4 업 샘플러(711)가 보간한 제3 대역신호를 입력받아 기설정된 시간만큼 지연시킨다.The fourth signal delay unit 730 receives the third band signal interpolated by the fourth up sampler 711 and delays the signal by a predetermined time.
제2 신호합성부(740)는 상기 제3 복원필터(720)로부터 전달받은 복원된 제4 대역신호와, 상기 제4 신호지연부(730)로부터 전달받은 기설정된 시간만큼 지연된 제3 대역신호 및 상기 제4 복원필터(721)로부터 전달받은 복원된 제3 대역신호를 합성하여, 채널분리단(600)으로 입력된 초기 입력신호의 크기와 동일한 크기를 갖는 신호를 생성한다.The second signal synthesizing unit 740 may include a restored fourth band signal received from the third reconstruction filter 720, a third band signal delayed by a predetermined time received from the fourth signal delay unit 730, and The restored third band signal received from the fourth reconstruction filter 721 is synthesized to generate a signal having the same size as that of the initial input signal input to the channel separation stage 600.
한편, 이상에서 제시된 본 발명의 실시예는 컴퓨터로 읽을 수 있는 기록 매체에 컴퓨터가 읽을 수 있는 코드로 구현하는 것이 가능하다. 컴퓨터가 읽을 수 있는 기록 매체는 컴퓨터 시스템에 의하여 읽혀질 수 있는 데이터가 저장되는 모든 종류의 기록 장치를 포함한다.On the other hand, the embodiments of the present invention described above can be implemented in a computer-readable code on a computer-readable recording medium. The computer-readable recording medium includes all kinds of recording devices in which data that can be read by a computer system is stored.
컴퓨터가 읽을 수 있는 기록 매체의 예로는 ROM, RAM, CD-ROM, 자기 테이프, 플로피디스크, 광 데이터 저장장치 등이 있으며, 또한 캐리어 웨이브(예를 들어 인터넷을 통한 전송)의 형태로 구현하는 것을 포함한다. 또한, 컴퓨터가 읽을 수 있는 기록 매체는 네트워크로 연결된 컴퓨터 시스템에 분산되어, 분산 방식으로 컴퓨터가 읽을 수 있는 코드가 저장되고 실행될 수 있다. 그리고 본 발명을 구현하기 위한 기능적인(functional) 프로그램, 코드 및 코드 세그먼트들은 본 발명이 속하는 기술 분야의 프로그래머들에 의하여 용이하게 추론될 수 있다.Examples of computer-readable recording media include ROM, RAM, CD-ROM, magnetic tape, floppy disks, optical data storage devices, and the like, which may also be implemented in the form of carrier waves (for example, transmission over the Internet). Include. The computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion. And functional programs, codes and code segments for implementing the present invention can be easily inferred by programmers in the art to which the present invention belongs.
본 발명의 싱글 필터 뱅크 및 이의 설계방법은 입력 영상 신호를 복수 개의 주파수 대역으로 분할 시, 분할된 주파수 대역 중 인접하는 대역에 중첩 대역(aliasing band) 발생하는 것을 최소화하고, 선형 위상(linear phase)을 갖는 효과가 있다. The single filter bank and its design method of the present invention minimize the occurrence of aliasing bands in adjacent bands among the divided frequency bands when the input image signal is divided into a plurality of frequency bands, and a linear phase. It has the effect of having.
또한, 본 발명의 싱글 필터 뱅크 및 이의 설계방법은 입력 영상 신호를 복수 개의 연속적인 주파수 대역으로 분할할 때, 서로 인접하는 주파수 대역 간에 발생하는 중첩 대역(aliasing band)이 발생하지 않도록 함으로써, 상기 입력 영상 신호에 대한 완전한 재생이 가능하도록 하는 효과가 있다. In addition, the single filter bank and its design method according to the present invention divides the input video signal into a plurality of consecutive frequency bands so that an aliasing band occurring between adjacent frequency bands does not occur. There is an effect of enabling full reproduction of the video signal.
더불어, 본 발명의 싱글 필터 뱅크 및 이의 설계방법은 저역 통과 필터(Low pass filter)만을 사용함으로써, 그 구성이 간단해짐에 따라 계산량이 감소하고, 싱글 필터 뱅크를 용이하게 확장할 수 있는 효과가 있다. In addition, the single filter bank and its design method of the present invention uses only a low pass filter, so that the calculation amount is reduced as the configuration is simplified, and the single filter bank can be easily expanded. .
상기에서는 본 발명의 바람직한 실시 예에 대하여 설명하였지만, 본 발명은 이에 한정되는 것이 아니고 본 발명의 기술 사상 범위 내에서 여러 가지로 변형하여 실시하는 것이 가능하고 이 또한 첨부된 특허청구범위에 속하는 것은 당연하다.Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications and changes can be made within the scope of the technical idea of the present invention. Do.

Claims (12)

  1. 2N 차수를 갖는 저역 통과 필터(low pass filter)를 설정하여 외부로부터 입력된 입력신호로부터 제1 대역신호를 분리하여 획득하는 단계;Setting a low pass filter having a 2N order and separating and obtaining a first band signal from an input signal input from the outside;
    상기 저역 통과 필터에 기초하여 기설정된 딜레이값을 가진 고역 통과 필터(high pass filter)를 설정하는 단계;Setting a high pass filter having a predetermined delay value based on the low pass filter;
    상기 기설정된 딜레이값에 의해 딜레이된 초기 입력신호와 상기 제1 대역신호간의 차이를 연산하여 제2 대역신호를 획득하는 단계;Obtaining a second band signal by calculating a difference between the initial input signal delayed by the predetermined delay value and the first band signal;
    상기 제1 대역신호 및 제2 대역신호를 간축하는 단계;Shortening the first band signal and the second band signal;
    간축된 상기 제1 대역신호 및 제2 대역신호를 보간하는 단계;Interpolating the reduced first and second band signals;
    상기 제1 대역신호의 역신호를 획득하고, 기설정된 딜레이값에 의해 딜레이된 초기 입력신호와 상기 제1 대역신호의 역신호를 합성하여 제1 역신호를 생성하는 단계; 및Acquiring an inverse signal of the first band signal and synthesizing an initial input signal delayed by a predetermined delay value and an inverse signal of the first band signal to generate a first inverse signal; And
    상기 제2 대역신호의 역신호를 획득하고, 획득한 상기 제2 대역신호의 역신호와 상기 제1 역신호를 합성하여 상기 초기 입력신호에 대응하는 신호를 복원하는 단계;Acquiring an inverse signal of the second band signal, combining the obtained inverse signal of the second band signal with the first inverse signal, and restoring a signal corresponding to the initial input signal;
    를 포함하는 싱글 필터 뱅크의 설계 방법.Design method of a single filter bank comprising a.
  2. 제1항에 있어서,The method of claim 1,
    상기 2N 차수를 갖는 저역 통과 필터를 설정하는 단계는Setting the low pass filter having the 2N order
    하기의 수학식을 이용하여 저역 통과 필터를 설정하되,Set the low pass filter using the following equation,
    Figure PCTKR2013006962-appb-I000021
    Figure PCTKR2013006962-appb-I000021
    이때, 상기 hn은 2N 차수의 임펄스 응답이고, Q0(z)는 전달함수인 FIR 저주파 필터인 것을 특징으로 하는 싱글 필터 뱅크의 설계 방법. Where h n is an impulse response of 2N order and Q 0 (z) is a FIR low frequency filter which is a transfer function.
  3. 제2항에 있어서,The method of claim 2,
    상기 저역 통과 필터는 The low pass filter
    hn = h2N-n 일 때, 영 위상(zero-phase) 저역 통과 필터인 것을 특징으로 하는 싱글 필터 뱅크 설계 방법.A method of designing a single filter bank, characterized in that it is a zero-phase low pass filter when h n = h 2N-n .
  4. 제3항에 있어서, The method of claim 3,
    상기 저역 통과 필터는The low pass filter
    이때, h2k-1 = 0.5, h2n-1 = 0, n= 1,2,…, 2k-1 이며,At this time, h 2k-1 = 0.5, h 2n-1 = 0, n = 1,2,... , 2k-1
    Figure PCTKR2013006962-appb-I000022
    Figure PCTKR2013006962-appb-I000022
    중 적어도 하나인 것을 특징으로 하는 싱글 필터 뱅크 설계 방법.At least one of the single filter bank design method characterized in that.
  5. 제4항에 있어서,The method of claim 4, wherein
    상기 저역 통과 필터는The low pass filter
    대칭 완전 복원 싱글 필터 뱅크 또는 비대칭 완전 복원 싱글 필터 뱅크 중 적어도 하나를 포함하는 것을 특징으로 하는 싱글 필터 뱅크의 설계 방법.A method of designing a single filter bank comprising at least one of a symmetric fully recovered single filter bank or an asymmetric fully restored single filter bank.
  6. 제5항에 있어서,The method of claim 5,
    상기 저역 통과 필터가 대칭 완전 복원 싱글 필터 뱅크를 포함하는 경우, If the low pass filter comprises a symmetric fully recovered single filter bank,
    n-N=1 일 때,
    Figure PCTKR2013006962-appb-I000023
    이고,     when nN = 1,
    Figure PCTKR2013006962-appb-I000023
    ego,
    n-N=7 일 때,
    Figure PCTKR2013006962-appb-I000024
    인 것을 특징으로 하는 싱글 필터 뱅크의 설계 방법.    when nN = 7,
    Figure PCTKR2013006962-appb-I000024
    The design method of the single filter bank characterized by the above-mentioned.
  7. 제5항에 있어서,The method of claim 5,
    상기 저역 통과 필터가 비대칭 완전 복원 싱글 필터 뱅크를 포함하는 경우, 3 tap half-band 필터가 설정되며,If the low pass filter comprises an asymmetric fully recovered single filter bank, a 3 tap half-band filter is set,
    Figure PCTKR2013006962-appb-I000025
    Figure PCTKR2013006962-appb-I000025
    인 것을 특징으로 하는 싱글 필터 뱅크의 설계 방법. The design method of the single filter bank characterized by the above-mentioned.
  8. 제5항에 있어서,The method of claim 5,
    상기 저역 통과 필터가 비대칭 완전 복원 싱글 필터 뱅크를 포함하는 경우, 7 tap half-band 필터가 설정되며,If the low pass filter comprises an asymmetric fully recovered single filter bank, a 7 tap half-band filter is set,
    Figure PCTKR2013006962-appb-I000026
    Figure PCTKR2013006962-appb-I000026
    인 것을 특징으로 하는 싱글 필터 뱅크의 설계 방법.The design method of the single filter bank characterized by the above-mentioned.
  9. 제1항에 있어서,The method of claim 1,
    상기 고역 통과 필터를 설정하는 단계는The setting of the high pass filter
    상기 저역 통과 필터가 H0(Z)일 때, m-sample delay의 딜레이값을 가지고, When the low pass filter is H 0 (Z), it has a delay value of m-sample delay,
    상기 저역 통과 필터가 H0(Z)일 때, (m-N)-sample delay의 딜레이값을 갖도록 고역 통과 필터가 설정되는 것을 특징으로 하는 싱글 필터 뱅크의 설계 방법.And when the low pass filter is H 0 (Z), a high pass filter is set to have a delay value of (mN) -sample delay.
  10. 제1항 내지 제9항 중에 어느 한 항의 방법을 컴퓨터에서 실행시키기 위한 프로그램을 기록한 컴퓨터로 읽을 수 있는 기록매체.A computer-readable recording medium having recorded thereon a program for executing the method of any one of claims 1 to 9.
  11. 외부로부터 입력신호를 입력받아 기설정된 대역의 신호만을 필터링하여 제1 대역 신호를 획득하는 제1 통과필터, 상기 제1 통과필터를 통해 필터링된 제1 대역신호를 기설정된 크기로 간축(decimation)하는 제1 다운 샘플러, 외부로부터 입력신호를 입력받아 기설정된 시간만큼 지연시키는 제1 신호지연부, 상기 제1 통과필터를 통해 필터링된 제1 대역신호와, 상기 제1 신호지연부를 통해 기설정된 시간만큼 지연된 입력신호를 합성하여 제2 대역신호를 생성하는 제1 신호연산부, 상기 제2 대역신호를 기설정된 크기로 간축(decimation)하는 제2 다운 샘플러를 포함하는 채널분리단; 및A first pass filter that receives an input signal from an external source and filters only signals of a predetermined band to obtain a first band signal, and decrements the first band signal filtered through the first pass filter to a predetermined magnitude A first down sampler, a first signal delay unit that receives an input signal from an external source and delays it for a predetermined time, a first band signal filtered through the first pass filter, and a predetermined time through the first signal delay unit. A channel separation unit including a first signal calculator configured to synthesize a delayed input signal to generate a second band signal, and a second down sampler to decimate the second band signal to a predetermined size; And
    상기 채널분리단의 제1 다운 샘플러로부터 간축된 제1 대역신호를 입력받아 보간(interpolation)하는 제1 업 샘플러, 보간된 상기 제1 대역신호를 복원하는 제1 복원필터, 보간된 상기 제1 대역신호를 기설정된 시간만큼 지연시키는 제2 신호지연부, 상기 채널분리단의 제2 다운 샘플러로부터 간축된 제2 대역신호를 입력받아 보간(interpolation)하는 제2 업 샘플러, 보간된 상기 제2 대역신호를 복원하는 제2 복원필터, 상기 제1 복원필터를 통해 복원된 제1 대역신호와, 상기 제2 신호지연부를 통해 기설정된 시간만큼 지연된 제1 대역신호 및 상기 제2 복원필터를 통해 복원된 제2 대역신호를 합성하는 제1 신호합성부를 포함하는 채널합성단;A first up-sampler that receives and interpolates the reduced first band signal from the first down sampler of the channel separation stage, a first reconstruction filter to reconstruct the interpolated first band signal, and the interpolated first band signal A second signal delay unit delaying the signal by a predetermined time, a second upsampler interpolating the second band signal received from the second down sampler of the channel separation stage, and the interpolated second band signal A second reconstruction filter for reconstructing the first reconstruction filter, a first band signal reconstructed by the first reconstruction filter, a first band signal delayed by a predetermined time through the second signal delay unit, and a reconstruction by the second reconstruction filter A channel synthesizer comprising a first signal synthesizer for synthesizing a two-band signal;
    을 포함하는 싱글 필터 뱅크.Single filter bank comprising a.
  12. 외부로부터 입력신호를 입력받아 기설정된 시간만큼 지연시키는 제3 신호지연부, 외부로부터 입력신호를 입력받아 기설정된 대역의 신호만을 필터링하여 제3 대역신호를 획득하는 제2 통과필터, 상기 제3 신호지연부를 통해 기설정된 시간만큼 지연된 입력신호와, 상기 제2 통과필터를 통해 획득한 제3 대역신호를 합성하여 제4 대역신호를 생성하는 제2 신호연산부, 상기 제2 신호연산부를 통해 생성된 제4 대역신호를 간축하는 제3 다운 샘플러, 상기 제2 통과필터를 통해 생성된 제3 대역신호를 간축하는 제4 다운 샘플러를 포함하는 채널분리단; 및A third signal delay unit that receives an input signal from an external source and delays the signal by a predetermined time; a second pass filter that receives an input signal from an external source and filters only signals of a predetermined band to obtain a third band signal; A second signal calculator configured to generate a fourth band signal by combining an input signal delayed by a predetermined time through the delay unit with a third band signal acquired through the second pass filter, and a second signal calculator generated by the second signal calculator. A channel separation stage including a third down sampler for shortening a four-band signal and a fourth down sampler for shortening a third band signal generated by the second pass filter; And
    상기 채널분리단의 제3 다운 샘플러로부터 간축된 제4 대역신호를 입력받아 보간하는 제3 업 샘플러, 보간된 상기 제4 대역신호를 입력받아 복원하는 제3 복원필터, 상기 채널분리단의 제4 다운 샘플러로부터 간축된 제3 대역신호를 입력받아 보간하는 제4 업 샘플러, 보간된 상기 제3 대역신호를 기설정된 시간만큼 지연시키는 제4 신호지연부, 보간된 상기 제3 대역신호를 입력받아 복원하는 제4 복원필터, 상기 제3 복원필터를 통해 복원된 제4 대역신호와, 상기 제4 신호지연부를 통해 기설정된 시간만큼 지연된 제3 대역신호 및 상기 제4 복원필터를 통해 복원된 제4 대역신호를 상호 합성하는 제2 신호합성부를 포함하는 채널합성단;A third upsampler that receives the reduced fourth band signal from the third down sampler of the channel separation stage and interpolates, a third reconstruction filter that receives and restores the interpolated fourth band signal, and a fourth of the channel separation stage; A fourth upsampler that receives the reduced third band signal from the down sampler and interpolates a fourth signal delay unit that delays the interpolated third band signal by a predetermined time, and receives and restores the interpolated third band signal A fourth reconstruction filter, a fourth band signal reconstructed by the third reconstruction filter, a third band signal delayed by a predetermined time through the fourth signal delay unit, and a fourth band reconstructed by the fourth reconstruction filter A channel synthesizer comprising a second signal synthesizer for synthesizing the signals with each other;
    을 포함하는 싱글 필터 뱅크. Single filter bank comprising a.
PCT/KR2013/006962 2012-08-01 2013-08-01 Single filter bank and method for designing same WO2014021666A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2012-0084416 2012-08-01
KR1020120084416A KR101314642B1 (en) 2012-08-01 2012-08-01 Single filter bank and design method of single filter bank

Publications (1)

Publication Number Publication Date
WO2014021666A1 true WO2014021666A1 (en) 2014-02-06

Family

ID=49637678

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2013/006962 WO2014021666A1 (en) 2012-08-01 2013-08-01 Single filter bank and method for designing same

Country Status (2)

Country Link
KR (1) KR101314642B1 (en)
WO (1) WO2014021666A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016039594A1 (en) * 2014-09-12 2016-03-17 Samsung Electronics Co., Ltd. Filter bank-based channel state report and resource allocation method and apparatus for use in wireless communication system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06303104A (en) * 1993-04-15 1994-10-28 Ikegami Tsushinki Co Ltd Subband split filter and subband synthesis filter
JPH09284094A (en) * 1996-04-10 1997-10-31 United Microelectron Corp Digital filter bank device and its operating method
KR20120038615A (en) * 2010-10-14 2012-04-24 주식회사 이노와이어리스 Apparatus of digital re-sampler using fractional delay generator

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06303104A (en) * 1993-04-15 1994-10-28 Ikegami Tsushinki Co Ltd Subband split filter and subband synthesis filter
JPH09284094A (en) * 1996-04-10 1997-10-31 United Microelectron Corp Digital filter bank device and its operating method
KR20120038615A (en) * 2010-10-14 2012-04-24 주식회사 이노와이어리스 Apparatus of digital re-sampler using fractional delay generator

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016039594A1 (en) * 2014-09-12 2016-03-17 Samsung Electronics Co., Ltd. Filter bank-based channel state report and resource allocation method and apparatus for use in wireless communication system
KR20160031347A (en) * 2014-09-12 2016-03-22 삼성전자주식회사 Method and apparatus for reporting channel status information and allocation resource in a wireless communication system based on a filter bank
CN105430754A (en) * 2014-09-12 2016-03-23 三星电子株式会社 Filter bank-based channel state report, and resource allocation method and apparatus
US9673949B2 (en) 2014-09-12 2017-06-06 Samsung Electronics Co., Ltd. Filter bank-based channel state report and resource allocation method and apparatus for use in wireless communication system
CN105430754B (en) * 2014-09-12 2020-08-04 三星电子株式会社 Channel state reporting and resource allocation method and device
KR102213181B1 (en) 2014-09-12 2021-02-05 삼성전자 주식회사 Method and apparatus for reporting channel status information and allocation resource in a wireless communication system based on a filter bank

Also Published As

Publication number Publication date
KR101314642B1 (en) 2013-10-07

Similar Documents

Publication Publication Date Title
EP1639703B1 (en) Rational sample rate conversion
AU634237B2 (en) Digital transmission system using subband coding of a digital signal
JPS63306789A (en) Television transfer system with pyramid encoding circuit and pyramid decoding circuit
JP2653830B2 (en) Voice secret device
US5583887A (en) Transmission signal processing apparatus
JP7282761B2 (en) Low-latency decimator and interpolator filter
US5469517A (en) Motion compensation circuit
WO2014021666A1 (en) Single filter bank and method for designing same
JP4549535B2 (en) Digital processing device for frequency filtering with simplified calculation
JP2689739B2 (en) Secret device
JPH0732343B2 (en) Asynchronous sampling frequency conversion method
JPH05235701A (en) Method and device for processing digital filter bank by ring convolution
JPH1175273A (en) Method and device for summarizing signal from sampling value
Heinle et al. An enhanced method for measuring the performance of multirate systems
JPH05216496A (en) Band-division filter
US7346014B2 (en) System and method for echo cancellation
KR930006705B1 (en) Quadrature mirror filter of linear phase
CN109687883B (en) Channel comprehensive engineering implementation method and device
KR960043770A (en) Image Restoration System for Video Camera Using Single CD
JPH06169289A (en) Compressed data reproduction device
JP2945233B2 (en) Sub-band division filter bank and sub-band synthesis filter bank
KR101089724B1 (en) Method for designing qmf filters, analyzing and synthesizing channel using the filters
JPH09139653A (en) Band split synthesis filter
CN116193345A (en) Multi-channel speech processing device, hearing aid system and speech processing method
Rassam Cascade analysis synthesis channelizer structures for reduced computational workload

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13826166

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 13826166

Country of ref document: EP

Kind code of ref document: A1