WO2013180696A1 - Dispositif comprenant un substrat qui absorbe les contraintes - Google Patents

Dispositif comprenant un substrat qui absorbe les contraintes Download PDF

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Publication number
WO2013180696A1
WO2013180696A1 PCT/US2012/039926 US2012039926W WO2013180696A1 WO 2013180696 A1 WO2013180696 A1 WO 2013180696A1 US 2012039926 W US2012039926 W US 2012039926W WO 2013180696 A1 WO2013180696 A1 WO 2013180696A1
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WO
WIPO (PCT)
Prior art keywords
substrate
membrane
semiconductor
thickness
posts
Prior art date
Application number
PCT/US2012/039926
Other languages
English (en)
Inventor
Robert G. Walmsley
Jennifer Wu
Zhuqing Zhang
Sheldon A. BERNARD
Original Assignee
Hewlett-Packard Development Company, L.P.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Hewlett-Packard Development Company, L.P. filed Critical Hewlett-Packard Development Company, L.P.
Priority to PCT/US2012/039926 priority Critical patent/WO2013180696A1/fr
Publication of WO2013180696A1 publication Critical patent/WO2013180696A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0045—Packages or encapsulation for reducing stress inside of the package structure
    • B81B7/0048—Packages or encapsulation for reducing stress inside of the package structure between the MEMS die and the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/146—Mixed devices
    • H01L2924/1461—MEMS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides

Definitions

  • Micro-electromechanical systems include miniaturized
  • MEMS devices mechanical and electromechanical elements that are made using micro- fabrication techniques.
  • the physical dimensions of MEMS devices vary from well below one micron to several millimeters.
  • MEMS devices vary from relatively simple structures having no moving elements to extremely complex electromechanical systems having multiple moving elements under the control of integrated electronics.
  • Functional elements of MEMS devices include miniaturized structures, micro-electronics, and micro-sensors and micro- actuators that convert energy from one form to another, such as a measured mechanical signal into an electrical signal.
  • MEMS devices include pressure sensors, accelerometers, gyroscopes, microphones, digital mirror displays, and micro fluidic devices, and MEMS devices can be very sensitive to changes in critical dimensions of the devices.
  • MEMS accelerometers behave like a damped mass on a spring.
  • the mass is displaced to the point that the spring is able to accelerate the mass at the same rate as the casing. This displacement is measured to give the acceleration.
  • Piezoelectric, piezoresistive, and capacitive components can be used to convert the mechanical motion into an electrical signal.
  • Some MEMS accelerometers include a proof mass and electrodes that face each other across a small gap. On one side of the gap are rotor electrodes arrayed on the proof mass or rotor. On the other side of the gap are stator electrodes or fixed electrodes, facing the moving rotor electrodes across the gap. Under the influence of external accelerations, the proof mass deflects from its neutral position and the capacitance between the rotor electrodes and the stator or fixed electrodes can be measured to determine the acceleration.
  • Figure 1 A is a diagram illustrating one example of a device that reduces stress on a semiconductor attached to a substrate.
  • Figure 1 B is a diagram illustrating another example of a device that reduces stress on a semiconductor attached to a substrate.
  • Figure 2 is a diagram illustrating one example of a MEMS that is an accelerometer.
  • Figure 3 is a diagram illustrating one example of a substrate that includes four posts that protrude from a membrane of the substrate.
  • Figure 4 is a diagram illustrating one example of a substrate that includes a mesa that protrudes from a membrane of the substrate.
  • Figure 5 is a diagram illustrating one example of a substrate that includes a platform that protrudes from a membrane of the substrate.
  • Figure 6 is a diagram of a substrate that can be used to make each of the example substrates of Figures 3, 4, and 5.
  • Figure 7A is a cross-section diagram illustrating one example of a substrate that includes four posts.
  • Figure 7B is a cross-section diagram illustrating one example of a device including a semiconductor attached to each post of the four posts via an adhesive.
  • Figure 7C is a cross-section diagram illustrating one example of a device including a semiconductor attached to each post of the four posts via a die attach film.
  • Figure 8A is a cross-section diagram illustrating one example of a substrate including a mesa surrounded by a membrane.
  • Figure 8B is a cross-section diagram illustrating one example of a device including a semiconductor attached to the mesa surrounded by the membrane.
  • Figure 9A is a cross-section diagram illustrating one example of a substrate including a platform surrounded by a membrane.
  • Figure 9B is a cross-section diagram illustrating one example of a device including a semiconductor attached to the platform surrounded by the
  • Some MEMS accelerometers are made by bonding together two separate semiconductor wafers on which electrodes reside facing each other across a small gap.
  • rotor electrodes are arrayed on the moving structure referred to as the proof mass or rotor, where the proof mass is connected to the semiconductor die through a set of flexures defined by a semiconductor etching process, such as a Bosch deep silicon etch.
  • stator or fixed electrodes face the moving rotor electrodes.
  • the gap between the rotor electrodes and the stator electrodes is defined by wafer bonding, and the scale factor of the accelerometer is very sensitive to this stator-rotor gap.
  • the gap between the rotor and the stator electrodes is less than 2 micrometers (urn).
  • a MEMS is attached to a substrate. Stress is produced in the MEMS via temperature changes due to the difference in the coefficient of thermal expansion (CTE) of the semiconductor material of the MEMS, such as silicon's CTE of 3 parts per million per degree Celsius (ppm/°C), and the CTE of the substrate, such as an organic substrate's CTE of 18 ppm/°C or a ceramic substrate's CTE of 7-9 ppm/°C.
  • CTE coefficient of thermal expansion
  • the differential thermal mechanical stress can distort the MEMS so as to alter the critical stator-rotor gap, which affects the sensor's scale factor and/or displaces the proof mass in the sensing axis and affects the sensor's bias offset. Minimizing variations in these performance parameters is an important goal in packaging a MEMS accelerometer. In addition, the stresses can be large enough to damage the MEMS.
  • a changing scale factor with respect to temperature can be addressed via temperature calibration.
  • the scale factor can be measured at multiple temperatures after assembly and a calibration curve established. Then, the temperature can be sensed by methods, such as an on-chip thermal sense resistor (TSR), and the scale factor corrected via the calibration curve.
  • TSR thermal sense resistor
  • temperature calibration adds cost, and if the scale factor is not linear within the operating temperature of the device, calibration requires more than two temperature points, which could be cost-prohibitive.
  • hysteresis and stress relaxation in many adhesives and substrates can produce a time and history dependent stress, which limits the effectiveness of temperature calibration.
  • Ceramic substrates can be used instead of organic substrates, such as FR4, to minimize the thermal mechanical stress. However, even though the amount of change in scale factor and bias offset with temperature is smaller when using a ceramic substrate, it is not eliminated. Also, ceramic substrates are more expensive than organic substrates.
  • Figure 1 A is a diagram illustrating one example of a device 20 that reduces stress on a semiconductor 22 attached to a substrate 24.
  • semiconductor 22 is a MEMS device.
  • Semiconductor 22 is attached to substrate 24 via an adhesive 26.
  • semiconductor 22 is attached to substrate 24 via a die attach adhesive.
  • semiconductor 22 is attached to substrate 24 via a die attach film.
  • Substrate 24 includes at least one structure 28 and a membrane 30.
  • the at least one structure 28 protrudes from membrane 30.
  • Semiconductor 22 is supported by and attached to the at least one structure 28.
  • Membrane 30 is flexible, and stresses between semiconductor 22 and substrate 24 are absorbed by the at least one structure 28 and membrane 30.
  • substrate 24 has a lower modulus of elasticity than semiconductor 22.
  • substrate 24 is an organic substrate.
  • substrate 24 is FR4.
  • substrate 24 is a ceramic substrate.
  • the at least one structure 28 and membrane 30 are formed in substrate 24.
  • Membrane 30 is thinner than the at least one structure 28 and membrane 30 is thinner than substrate 24 at the perimeter 32 of membrane 30.
  • Substrate 24 has a first thickness T1 and membrane 30 has a second thickness T2 that is less than the first thickness T1.
  • the at least one structure 28 has a third thickness T3 that is less than the first thickness T1 and greater than the second thickness T2.
  • the sum of the second thickness T2 and the third thickness T3 is the same or slightly less than the first thickness T1.
  • substrate 24 is milled to provide membrane 30 and the at least one structure 28.
  • membrane 30 surrounds the at least one structure 28.
  • Membrane 30 is at one face 34 of substrate 24 and the at least one structure 28 protrudes from membrane 30 toward the other face 36 of substrate 24.
  • the one face 34 opposes the other face 36 of substrate 24.
  • membrane 30 can be between the one face 34 and the other face 36.
  • the at least one structure 28 includes a set of four posts, where each of the four posts protrudes from membrane 30 and is surrounded by membrane 30. Also, each of the four posts is attached to semiconductor 22. In one example, semiconductor 22 is rectangular and each of the four posts is attached to a corner of semiconductor 22. In one example, the at least one structure 28 includes at least three posts, where each of the at least three posts protrudes from membrane 30 and is surrounded by membrane 30. Also, each of the at least three posts is attached to semiconductor 22.
  • the at least one structure 28 is a mesa formed in substrate 24 and membrane 30 is a moat around the mesa.
  • Semiconductor 22 is attached to the mesa.
  • perimeter 32 around membrane 30 supports semiconductor 22 and reduces tilt of semiconductor 22 on substrate 24.
  • Figure 1 B is a diagram illustrating one example of a device 40 that includes a membrane 50 between one face 54 of substrate 44 and the other face 56 of substrate 44.
  • Device 40 reduces stress on semiconductor 42 attached to substrate 44.
  • semiconductor 42 is a MEMS device.
  • Semiconductor 42 is attached to substrate 44 via an adhesive 46. In one example, semiconductor 42 is attached to substrate 44 via a die attach adhesive. In one example, semiconductor 42 is attached to substrate 44 via a die attach film.
  • Substrate 44 includes at least one structure 48 and membrane 50.
  • the at least one structure 48 protrudes from membrane 50.
  • Semiconductor 42 is supported by and attached to the at least one structure 48.
  • Membrane 50 is flexible, and stresses between semiconductor 42 and substrate 44 are absorbed by the at least one structure 48 and membrane 50.
  • substrate 44 has a lower modulus of elasticity than semiconductor 42.
  • substrate 44 is an organic substrate.
  • substrate 44 is FR4.
  • substrate 44 is a ceramic substrate.
  • the at least one structure 48 and membrane 50 are formed in substrate 44.
  • Membrane 50 is thinner than the at least one structure 48 and membrane 30 is thinner than substrate 44 at the perimeter 52 of membrane 50.
  • Substrate 44 has a first thickness T1 and membrane 50 has a second thickness T2 that is less than the first thickness T1.
  • the at least one structure 48 has a third thickness T3 that is less than the first thickness T1 and greater than the second thickness T2.
  • Membrane 50 is indented or offset from the one face 54 a fourth thickness T4.
  • the sum of the second thickness T2 and the third thickness T3 and the fourth thickness T4 is the same or slightly less than the first thickness T1.
  • substrate 44 is milled to provide membrane 50 and the at least one structure 48.
  • membrane 50 surrounds the at least one structure 48.
  • Membrane 50 is between the one face 54 of substrate 44 and the other face 56 of substrate 44. Membrane 50 is indented or offset from the one face 54 a fourth thickness T4. The at least one structure 48 protrudes from
  • membrane 50 toward the other face 56 of substrate 44 The one face 54 opposes the other face 56 of substrate 44.
  • the at least one structure 48 includes a set of four posts, where each of the four posts protrudes from membrane 50 and is surrounded by membrane 50. Also, each of the four posts is attached to semiconductor 42. In one example, semiconductor 42 is rectangular and each of the four posts is attached to a corner of semiconductor 42.
  • the at least one structure 48 includes at least three posts, where each of the at least three posts protrudes from membrane 50 and is surrounded by membrane 50. Also, each of the at least three posts is attached to semiconductor 42.
  • the at least one structure 48 is a mesa formed in substrate 44 and membrane 50 is a moat around the mesa.
  • Semiconductor 42 is attached to the mesa.
  • perimeter 52 around membrane 50 supports semiconductor 42 and reduces tilt of semiconductor 42 on substrate 44.
  • FIG 2 is a diagram illustrating one example of a MEMS 100 that is an accelerometer.
  • MEMS 100 includes a stator die 102, a proof mass die 104, and a cap die 106.
  • semiconductor 22 shown in Figure 1A
  • semiconductor 42 shown in Figure 1B
  • MEMS 100 is MEMS 100.
  • Stator die 102 includes stator or fixed electrodes on stator die face 108, which faces the stator-rotor gap 110 and proof mass 112.
  • Stator die 102 is a semiconductor die, such as silicon, that is processed to provide the stator or fixed electrodes on stator die face 108.
  • Proof mass die 104 includes the proof mass or rotor 112 that includes rotor electrodes arrayed on proof mass face 114, which faces the stator-rotor gap 110 and the stator or fixed electrodes on stator die face 108 of stator die 102.
  • Proof mass die 104 is a semiconductor die, such as silicon, that is processed to provide the rotor electrodes on proof mass face 114.
  • Proof mass die 104 also includes flexures 116 attached to proof mass 112 and to perimeter portions 118 of proof mass die 104.
  • the flexures 116, which connect proof mass 112 to proof mass die 104, are defined by a semiconductor etching process, such as a Bosch deep silicon etch. In one example, flexures 116 are springs.
  • Proof mass die 104 is bonded to stator die 102 via bonding material 120, which defines the stator-rotor gap 110 between proof mass 112 and stator die 102.
  • the stator-rotor gap 110 is the gap between the rotor electrodes on proof mass 112 and the stator electrodes on stator die 102.
  • the scale factor of MEMS accelerometer 100 is sensitive to this stator-rotor gap 110.
  • the stator-rotor gap 110 is less than 2 urn.
  • stator die 102 is one of many stator die on a stator wafer and proof mass die 104 is one of many proof mass die on a proof mass wafer, and the proof mass wafer is bonded to the stator wafer in a wafer level bonding process.
  • Cap die 106 includes a cavity 122 and rim 124.
  • Cap die 106 is a semiconductor die, such as silicon, that is processed to provide cavity 122 and rim 124.
  • Cavity 122 is positioned over proof mass 112 and flexures 116.
  • Rim 124 is attached to perimeter portions 118 of proof mass die 104 via wafer bonding.
  • proof mass die 104 is one of many proof mass die on a proof mass wafer and cap die 06 is one of many cap die on a cap wafer that is fixedly attached to the proof mass wafer in a wafer level process.
  • proof mass 112 is displaced in relation to stator die 102 as MEMS 100 experiences acceleration.
  • Rotor electrodes on proof mass face 114 are displaced toward or away from the stator or fixed electrodes on stator die face 108.
  • Proof mass 112 is displaced to the point that flexures 116 are able to accelerate proof mass 112 at the same rate as stator die 102 and cap die 106.
  • the displacement of proof mass 12 is measured to give the acceleration.
  • Figure 3 is a diagram illustrating one example of a substrate 200 that includes four posts 202a-202d. Each of the four posts 202a-202d protrudes from membrane 204 of substrate 200. Membrane 204 surrounds each of the four posts 202a-202d, on all sides of each post.
  • substrate 24 (shown in Figure 1A) is substrate 200.
  • each of the four posts 202a-202d is 1 millimeter (mm) square. In other examples, substrate 200 includes less than four posts or more than four posts.
  • the four posts 202a-202d and membrane 204 are formed in substrate 200.
  • Membrane 204 is thinner than each of the four posts 202a-202d and membrane 204 is thinner than substrate 200 at the perimeter 206 of membrane 204.
  • Substrate 200 has a first thickness T1 that is thicker than a second thickness T2 of membrane 204 (which is similar to the second thickness T2 shown in Figure 1).
  • Each of the four posts 202a-202d has a third thickness T3 that is thicker than the second thickness T2 of membrane 204.
  • the third thickness T3 of each of the four posts 202a-202d is thinner or less than the first thickness T1 of substrate 200.
  • the sum of the second thickness T2 and the third thickness T3 is the same or slightly less than the first thickness T1.
  • the first thickness T1 of substrate 200 is about 1.6 mm.
  • the second thickness T2 of membrane 204 is about 0.3 mm.
  • the third thickness T3 of each of the four posts 202a-202d is about .6 mm minus 0.3 mm.
  • the sum of the second thickness T2 and the third thickness T3 is slightly less than the first thickness T1 of substrate 200, such as 25-50 micrometers (urn) less than first thickness T1 of substrate 200.
  • Membrane 204 is at one face 208 of substrate 200 and each of the four posts 202a-202d protrudes from membrane 204 toward the other face 210 of substrate 200. The one face 208 opposes the other face 210 of substrate 200.
  • substrate 200 is milled to provide membrane 204 and each of the four posts 202a-202d.
  • membrane 204 is between the one face 208 and the other face 210 and substrate 44 (shown in Figure 1 B) is substrate 200.
  • each of the four posts 202a-202d is attached to a semiconductor, such as semiconductor 22 or semiconductor 42.
  • the semiconductor is rectangular and each of the four posts 202a-202d is attached to an outside corner of the semiconductor.
  • the semiconductor is attached to each of the four posts 202a-202d via an adhesive.
  • the semiconductor is attached to each of the four posts 202a-202d via a die attach adhesive.
  • the semiconductor is attached to each of the four posts 202a-202d via a die attach film.
  • substrate 200 has a lower modulus of elasticity than the semiconductor.
  • substrate 200 is an organic substrate.
  • substrate 200 is FR4.
  • substrate 200 is a ceramic substrate.
  • Figure 4 is a diagram illustrating one example of a substrate 220 that includes a mesa 222 that protrudes from a membrane 224 of substrate 220.
  • Membrane 224 surrounds mesa 222 to form a moat all the way around mesa 222.
  • substrate 24 shown in Figure 1A
  • mesa 222 is circular.
  • mesa 222 is another shape, such as oblong or rectangular, and/or substrate 220 includes more than one mesa.
  • Mesa 222 and membrane 224 are formed in substrate 220.
  • Membrane 224 is thinner than mesa 222 and membrane 224 is thinner than substrate 220 at the perimeter 226 of membrane 224.
  • Substrate 220 has a first thickness T1 that is thicker than a second thickness T2 of membrane 224 (which is similar to the second thickness T2 shown in Figure 1).
  • Mesa 222 has a third thickness T3 that is thicker than the second thickness T2 of membrane 224.
  • the sum of the second thickness T2 and the third thickness T3 is slightly less than the first thickness T1 of substrate 220, such that mesa 222 is recessed for adhesive thickness.
  • the first thickness T1 of substrate 220 is about 1.6 mm.
  • the second thickness T2 of membrane 224 is about 0.3 mm.
  • the third thickness T3 of mesa 222 is about 1.6 mm minus 0.3 mm minus the thickness for an adhesive, such as 1.3 mm minus 25-50 urn.
  • the sum of the second thickness T2 and the third thickness T3 is substantially the same as the first thickness T1 of substrate 220.
  • Membrane 224 is at one face 228 of substrate 220 and mesa 222 protrudes from membrane 224 toward the other face 230 of substrate 220.
  • the one face 228 opposes the other face 230 of substrate 220.
  • substrate 220 is milled to provide membrane 224 and mesa 222.
  • membrane 220 is between the one face 228 and the other face 230 and substrate 44 (shown in Figure 1 B) is substrate 220.
  • mesa 222 is attached to a semiconductor, such as semiconductor 22 or semiconductor 42.
  • the semiconductor can be any suitable shape, such as rectangular.
  • Mesa 222 is attached to the central portion of the semiconductor and the outside corners or outside perimeter of the semiconductor are supported by substrate 220 at the perimeter 226 of membrane 224.
  • the semiconductor is attached to mesa 222 via an adhesive.
  • the semiconductor is attached to mesa 222 via a die attach adhesive.
  • the semiconductor is attached to mesa 222 via a die attach film.
  • the semiconductor is supported by mesa 222 and the perimeter 226 of substrate 220, such that the perimeter 226 of substrate 220 prevents or reduces tilting of the semiconductor in relation to substrate 220.
  • Membrane 224 is flexible, and stresses between the semiconductor and substrate 220 are absorbed by membrane 224, which flexes to absorb the stresses.
  • substrate 220 has a lower modulus of elasticity than the
  • substrate 220 is an organic substrate. In one example, substrate 220 is FR4. In another example, substrate 220 is a ceramic substrate.
  • FIG 5 is a diagram illustrating one example of a substrate 240 that includes a platform or mesa 242 that protrudes from a membrane 244 of substrate 240.
  • Membrane 244 surrounds platform 242 to form a moat all the way around platform 242.
  • substrate 24 shown in Figure 1A
  • Platform 242 is rectangular.
  • platform 242 is another shape, such as oblong or circular, and/or substrate 240 includes more than one platform.
  • Platform 242 and membrane 244 are formed in substrate 240.
  • Membrane 244 is thinner than platform 242 and membrane 244 is thinner than substrate 240 at the perimeter 246 of membrane 244.
  • Substrate 240 has a first thickness T1 that is thicker than a second thickness T2 of membrane 244 (which is similar to the second thickness T2 shown in Figure 1).
  • Platform 242 has a third thickness T3 that is thicker than the second thickness T2 of membrane 244.
  • the sum of the second thickness T2 and the third thickness T3 is the same as the first thickness T1 of substrate 240.
  • the first thickness T1 of substrate 240 is about 1.6 mm.
  • the second thickness T2 of membrane 244 is about 0.3 mm.
  • the third thickness T3 of platform 242 is about 1.6 mm minus 0.3 mm.
  • the sum of the second thickness T2 and the third thickness T3 is slightly less than the first thickness T1 of substrate 240, such as 25-50 micrometers (urn) less than first thickness T1 of substrate 240.
  • Membrane 244 is at one face 248 of substrate 240 and platform 242 rises or protrudes from membrane 244 toward the other face 250 of substrate 240.
  • the one face 248 opposes the other face 250 of substrate 240.
  • substrate 240 is milled to provide membrane 244 and platform 242.
  • membrane 240 is between the one face 248 and the other face 250 and substrate 44 (shown in Figure 1 B) is substrate 200.
  • platform 242 is attached to a semiconductor, such as semiconductor 22 or semiconductor 42.
  • the semiconductor is rectangular and platform 242 is attached to and supports substantially the entire semiconductor.
  • semiconductor is attached to platform 242 via an adhesive.
  • the semiconductor is attached to platform 242 via a die attach adhesive.
  • the semiconductor is attached to platform 242 via a die attach film.
  • the semiconductor is supported by platform 242 and the semiconductor does not touch the perimeter 246 of substrate 240.
  • Membrane 244 is flexible, and stresses between the semiconductor and substrate 240 are absorbed by membrane 244, which flexes to absorb the stresses.
  • substrate 240 has a lower modulus of elasticity than the semiconductor.
  • substrate 240 is an organic substrate.
  • substrate 240 is FR4.
  • substrate 240 is a ceramic substrate.
  • Figure 6 is a diagram of a substrate 300 that can be used to make each of the example substrates of: 200 of Figure 3; 220 of Figure 4; and 240 of Figure 5.
  • substrate 24 is made from substrate 300.
  • substrate 44 is made from substrate 300.
  • Substrate 300 includes a first face 302 and a second face 304 that opposes first face 302.
  • Substrate 300 has a first thickness T1 from the first face 302 to the second face 304.
  • first thickness T1 of substrate 300 is about 1.6 mm.
  • Substrate 300 is an organic substrate. In one example, substrate 300 is FR4. In another example, substrate 300 is a ceramic substrate.
  • Figures 7A, 7B, and 7C are diagrams illustrating a method of assembling a first device 308 and a second device 310 that each include a semiconductor 312 attached to four posts of a substrate 314.
  • substrate 314 is similar to substrate 200 of Figure 3.
  • semiconductor 312 is similar to MEMS 100 of Figure 2.
  • each of the devices 308 and 310 is similar to device 20 of Figure 1A.
  • each of the devices 308 and 310 is similar to device 40 of Figure 1 B.
  • Figure 7 A is a cross-section diagram illustrating one example of substrate 314, which is formed from substrate 300 of Figure 6.
  • Substrate 300 is formed to provide a membrane 316 and a set of four posts 318 in substrate 314.
  • substrate 300 is milled to provide substrate 314 including membrane 316 and the set of four posts 318.
  • Substrate 314 includes membrane 316 and the set of four posts 318, where two posts 318a and 318b of the set of four posts 3 8 are shown in cross- section.
  • Each post of the set of four posts 318, including posts 318a and 318b, is attached to and protrudes from membrane 316 of substrate 314.
  • Membrane 316 surrounds each post of the set of four posts 318 on all sides of each post. In one example, each post of the set of four posts 318 is 1 millimeter (mm) square.
  • Membrane 316 is thinner than each post of the set of four posts 318 and membrane 316 is thinner than substrate 314 at the perimeter 320 around membrane 316.
  • Substrate 314 has a first thickness T1 that is thicker than a second thickness T2 of membrane 316.
  • each post of the set of four posts 318 has a third thickness T3 that is thicker than the second thickness T2 of membrane 316.
  • the sum of the second thickness T2 and the third thickness T3 of each post of the set of four posts 318 is substantially the same as the first thickness T1 of substrate 314.
  • the first thickness T1 of substrate 314 is about 1.6 mm.
  • the second thickness T2 of membrane 316 is about 0.3 mm.
  • the third thickness T3 of each post of the set of four posts 318 is about 1.6 mm minus 0.3 mm. In other examples, the sum of the second thickness T2 and the third thickness T3 of each post of the set of four posts 318 is less than the first thickness T1 of substrate 314, such as 25-50 urn less than first thickness T1 of substrate 314.
  • Membrane 316 is at one face 322 of substrate 314 and each post of the set of four posts 318 protrudes or extends from membrane 316 toward the other face 324 of substrate 314.
  • the one face 322 opposes the other face 324 of substrate 314.
  • membrane 316 can be between the one face 322 and the other face 324.
  • Figure 7B is a cross-section diagram illustrating one example of first device 308, where semiconductor 312 is attached to each post of the set of four posts 318.
  • Semiconductor 312 is rectangular and each post of the set of four posts 318 is attached to an outside corner of semiconductor 312.
  • Semiconductor 312 is attached to each post of the set of four posts 318 via an adhesive 326. In one example, semiconductor 312 is attached to each post of the set of four posts 318 via a die attach adhesive. Semiconductor 312 is supported by each post of the set of four posts 318 and semiconductor 312 does not touch the perimeter 320 of substrate 314. Membrane 316 is flexible, and stresses between semiconductor 312 and substrate 314 are absorbed by each post of the set of four posts 318 and membrane 316, which flexes to absorb the stresses. In one example, substrate 314 has a lower modulus of elasticity than semiconductor 312. In one example, substrate 314 is FR4. In another example, substrate 314 is a ceramic substrate.
  • Figure 7C is a cross-section diagram illustrating one example of second device 310, where semiconductor 312 is attached to each post of the set of four posts 318.
  • Semiconductor 312 is rectangular and each post of the set of four posts 318 is attached to an outside corner of semiconductor 312.
  • Semiconductor 312 is attached to each post of the set of four posts 318 via a die attach film 328.
  • Semiconductor 312 is supported by each post of the set of four posts 318 and semiconductor 312 does not touch the perimeter 320 of substrate 314.
  • Membrane 316 is flexible, and stresses between semiconductor 312 and substrate 314 are absorbed by each post of the set of four posts 318 and membrane 316, which flexes to absorb the stresses.
  • substrate 314 has a lower modulus of elasticity than semiconductor 312.
  • substrate 314 is FR4.
  • substrate 314 is a ceramic substrate.
  • Figures 8A and 8B are diagrams illustrating a method of assembling a device 330 that includes a semiconductor 332 attached to a mesa of substrate 334.
  • substrate 334 is similar to substrate 220 of Figure 4.
  • semiconductor 332 is similar to MEMS 100 of Figure 2.
  • device 330 is similar to device 20 of Figure 1 A.
  • device 330 is similar to device 40 of Figure 1B.
  • Figure 8A is a cross-section diagram illustrating one example of substrate 334, which is formed from substrate 300 of Figure 6.
  • Substrate 300 is formed to provide a membrane 336 and a mesa 338 in substrate 334.
  • substrate 300 is milled to provide substrate 334 including membrane 336 and mesa 338.
  • Mesa 338 is attached to and protrudes from membrane 336 of substrate 334.
  • Membrane 336 surrounds mesa 338 on all sides to create a moat around mesa 338.
  • Membrane 336 is thinner than mesa 338 and membrane 336 is thinner than substrate 334 at the perimeter 340 of membrane 336.
  • Substrate 334 has a first thickness T1 that is thicker than a second thickness T2 of membrane 336.
  • mesa 338 has a third thickness T3 that is thicker than the second thickness T2 of membrane 336. The sum of the second thickness T2 and the third thickness T3 of mesa 338 is less than the first thickness T1 of substrate 334. This provides room for an adhesive or bonding agent between
  • the sum of the second thickness T2 and the third thickness T3 of mesa 338 is less than the first thickness T1 of substrate 334 by 25-50 um.
  • the first thickness T1 of substrate 334 is about 1.6 mm.
  • the second thickness T2 of membrane 336 is about 0.3 mm.
  • the third thickness T3 of mesa 338 is about 1.6 mm minus 0.3 mm minus 25-50 um.
  • the sum of the second thickness T2 and the third thickness T3 of mesa 338 is substantially the same as the first thickness T1 of substrate 334.
  • Membrane 336 is at one face 342 of substrate 334 and mesa 338 protrudes or extends from membrane 336 toward the other face 344 of substrate 334.
  • the one face 342 opposes the other face 344 of substrate 334.
  • membrane 336 can be between the one face 342 and the other face 344.
  • Figure 8B is a cross-section diagram illustrating one example of device 330, where semiconductor 332 is attached to mesa 338.
  • Semiconductor 332 is rectangular and mesa 338 is attached to a central portion of semiconductor 332.
  • Semiconductor 332 is attached to mesa 338 via an adhesive 346.
  • semiconductor 332 is attached to mesa 338 via a die attach adhesive.
  • semiconductor 332 is attached to mesa 338 via a die attach film.
  • Semiconductor 332 is supported by mesa 338 and the perimeter 340 of membrane 336 and substrate 334.
  • the perimeter 340 supports semiconductor 332 and prevents or reduces tilting of semiconductor 332 on substrate 334.
  • Membrane 336 is flexible, and stresses between semiconductor 332 and substrate 334 are absorbed by membrane 336, which flexes to absorb the stresses.
  • substrate 334 has a lower modulus of elasticity than semiconductor 332.
  • substrate 334 is FR4.
  • substrate 334 is a ceramic substrate.
  • Figures 9A and 9B are diagrams illustrating a method of assembling a device 350 that includes a semiconductor 352 attached to a mesa or platform of a substrate 354.
  • substrate 354 is similar to substrate 240 of Figure 5.
  • semiconductor 352 is similar to MEMS 100 of Figure 2.
  • device 350 is similar to device 20 of Figure 1A.
  • device 350 is similar to device 40 of Figure 1B.
  • Figure 9A is a cross-section diagram illustrating one example of substrate 354, which is formed from substrate 300 of Figure 6.
  • Substrate 300 is formed to provide a membrane 356 and a platform 358 in substrate 354.
  • substrate 300 is milled to provide substrate 354 including membrane 356 and platform 358.
  • Platform 358 is attached to and protrudes from membrane 356 of substrate 354.
  • Membrane 356 surrounds platform 358 on all sides to create a moat around platform 358.
  • Membrane 356 is thinner than platform 358 and membrane 356 is thinner than substrate 354 at the perimeter 360 of membrane 356 and substrate 354.
  • Substrate 354 has a first thickness T1 that is thicker than a second thickness T2 of membrane 356.
  • Platform 358 has a third thickness T3 that is thicker than the second thickness T2 of membrane 356.
  • the sum of the second thickness T2 and the third thickness T3 of platform 358 is the same as the first thickness T1 of substrate 354.
  • the first thickness T1 of substrate 354 is about 1.6 mm.
  • the second thickness T2 of membrane 356 is about 0.3 mm.
  • the third thickness T3 of platform 358 is about 1.6 mm minus 0.3 mm.
  • the sum of the second thickness T2 and the third thickness T3 of platform 358 is less than the first thickness T1 of substrate 354.
  • Membrane 356 is at one face 362 of substrate 354 and platform 358 protrudes or extends from membrane 356 toward the other face 364 of substrate 354. The one face 362 opposes the other face 364 of substrate 354. In another example, membrane 356 can be between the one face 362 and the other face 364.
  • Figure 9B is a cross-section diagram illustrating one example of device 350, where semiconductor 352 is attached to platform 358.
  • Semiconductor 352 is rectangular and platform 358 is attached to one side of semiconductor 352.
  • Semiconductor 352 is attached to platform 358 via an adhesive 366.
  • semiconductor 352 is attached to platform 358 via a die attach adhesive.
  • semiconductor 352 is attached to platform 358 via a die attach film.
  • Semiconductor 352 is supported by platform 358 and does not touch the perimeter 360 of membrane 356 and substrate 354.
  • Membrane 356 is flexible, and stresses between semiconductor 352 and substrate 354 are absorbed by membrane 356, which flexes to absorb the stresses.
  • substrate 354 has a lower modulus of elasticity than semiconductor 352.
  • substrate 354 is FR4.
  • substrate 354 is a ceramic substrate.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Micromachines (AREA)

Abstract

La présente invention concerne un dispositif comprenant un semi-conducteur et un substrat. Le substrat possède une membrane et au moins une structure qui soutient le semi-conducteur. La membrane entoure la ou les structures et est plus mince que la ou les structures pour absorber des contraintes entre le semi-conducteur et le substrat.
PCT/US2012/039926 2012-05-30 2012-05-30 Dispositif comprenant un substrat qui absorbe les contraintes WO2013180696A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITUB20154017A1 (it) * 2015-09-30 2017-03-30 St Microelectronics Srl Dispositivo incapsulato di materiale semiconduttore a ridotta sensibilita' nei confronti di stress termo-meccanici

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US20040012086A1 (en) * 2002-07-17 2004-01-22 International Business Machines Corporation Method and packaging structure for optimizing warpage of flip chip organic packages
US20090085161A1 (en) * 2007-02-27 2009-04-02 International Business Machines Corporation Electronic components on trenched substrates and method of forming same
US20100230808A1 (en) * 2006-08-17 2010-09-16 Nxp, B.V. Reducing stress between a substrate and a projecting electrode on the substrate
US20120025337A1 (en) * 2010-07-28 2012-02-02 Avago Technologies Wireless Ip (Singapore) Pte. Ltd Mems transducer device having stress mitigation structure and method of fabricating the same

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Publication number Priority date Publication date Assignee Title
US20040012086A1 (en) * 2002-07-17 2004-01-22 International Business Machines Corporation Method and packaging structure for optimizing warpage of flip chip organic packages
US20100230808A1 (en) * 2006-08-17 2010-09-16 Nxp, B.V. Reducing stress between a substrate and a projecting electrode on the substrate
US20090085161A1 (en) * 2007-02-27 2009-04-02 International Business Machines Corporation Electronic components on trenched substrates and method of forming same
US20120025337A1 (en) * 2010-07-28 2012-02-02 Avago Technologies Wireless Ip (Singapore) Pte. Ltd Mems transducer device having stress mitigation structure and method of fabricating the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITUB20154017A1 (it) * 2015-09-30 2017-03-30 St Microelectronics Srl Dispositivo incapsulato di materiale semiconduttore a ridotta sensibilita' nei confronti di stress termo-meccanici
EP3151271A1 (fr) * 2015-09-30 2017-04-05 STMicroelectronics S.r.l. Dispositif encapsulé de matériau semi-conducteur présentant une sensibilité réduite aux contraintes thermo-mécaniques
US10329141B2 (en) 2015-09-30 2019-06-25 Stmicroelectronics S.R.L. Encapsulated device of semiconductor material with reduced sensitivity to thermo-mechanical stresses

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