WO2013174411A1 - Architecture d'amplificateur de puissance à modulation de charge dynamique large bande à haut rendement - Google Patents

Architecture d'amplificateur de puissance à modulation de charge dynamique large bande à haut rendement Download PDF

Info

Publication number
WO2013174411A1
WO2013174411A1 PCT/EP2012/059354 EP2012059354W WO2013174411A1 WO 2013174411 A1 WO2013174411 A1 WO 2013174411A1 EP 2012059354 W EP2012059354 W EP 2012059354W WO 2013174411 A1 WO2013174411 A1 WO 2013174411A1
Authority
WO
WIPO (PCT)
Prior art keywords
power amplifier
amplifier circuit
varactive
power
range
Prior art date
Application number
PCT/EP2012/059354
Other languages
English (en)
Inventor
Christer Andersson
David Gustafsson
Original Assignee
Telefonaktiebolaget L M Ericsson (Publ)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget L M Ericsson (Publ) filed Critical Telefonaktiebolaget L M Ericsson (Publ)
Priority to PCT/EP2012/059354 priority Critical patent/WO2013174411A1/fr
Publication of WO2013174411A1 publication Critical patent/WO2013174411A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for

Definitions

  • the invention relates to a power amplifier circuit, configured for efficient wideband dynamic load modulation.
  • DLM dynamic load modulation
  • a reactive device or reactive element such as a varactor
  • a reactive device or reactive element is inherently not the ideal choice for such a task.
  • a compromising load matching network can still be designed empirically with good efficiency results.
  • empirical design methods can make it difficult to design for and analyze trade-offs in circuit elements versus bandwidth, output power and OPBO performance.
  • the resulting matching networks become impractically complex, for instance requiring multiple varactors.
  • large transistors and high peak output power levels for instance larger than 100 W, it is also difficult to realize appropriately low impedance matching networks.
  • a power amplifier circuit configured for efficient wideband dynamic load modulation, comprising a varactive element configured for modulating an output impedance of the power amplifier circuit operable in a predefined power level range, wherein the varactive element is further configured for being tuned in synchronization with the power level such that by adjusting the ratio of the reactance of the varactive element and a predetermined resistance for the output impedance of the power amplifier circuit a predefined power amplifier efficiency over a predefined frequency range is obtained.
  • the reactance of the varactive element is modulated and the predetermined resistance is fixed.
  • the ratio of the reactance of the varactive element and a predetermined resistance is preferably independent on the transistor technology that predicts the PA performance when modulating the load reactance. It is an idea of the invention to provide a varactor-based DLM solution employing a varactor tunable load network designed to present good or almost ideal transistor loading conditions in OPBO in order to maintain high efficiency operation. By dynamically tuning the varactor in synchronization with the input power level and/or the output power level of the power amplifier circuit, a high average PA efficiency is achievable. Linearization of high efficiency DLM PAs becomes possible also for higher peak power levels and at typical mobile communication frequencies between 0.8 GHz to 6 GHz.
  • the term "configured for being tuned in synchronization with the power level” means that a linearization process takes place which occurs empirically based on predetermined measurement results and/or simulation results such that at a certain power level range a desired power amplifier efficiency over a desired frequency range is obtained. This is preferably achieved by modulating the output impedance or load impedance, respectively.
  • a multi-band or wideband solution is provided which shows a high average efficiency at all of the supported frequencies.
  • the varactor driver unlike a dynamic DC supply only needs to supply limited power due to the reactive load implying that the driver efficiency shows limited or almost no effect on system efficiency.
  • a PA architecture is provided with a high average efficiency, i.e. with high efficiency in back-off operation, and which also reduces the economical and ecological system running costs.
  • bandwidths Depending on the varactor technology preferably up to one octave of bandwidth is obtainable with good back off performance although a more conservative estimation for a practical implementation utilizing existing varactor technology indicates that 35% of bandwidth or even more is achievable. Since a modulated load reactance is easily realized by series varactor the proposed PA circuit offers a minimum complexity, high efficiency and linear operation over a broad frequency range.
  • the varactive element is configured for adjusting the ratio of its reactance and a predetermined resistance for the output impedance such that the power amplifier circuit is operable at predefined values for at least one of the following parameters: biasing, frequency and current.
  • biasing frequency and current.
  • the varactive element is arranged in a parallel branch to an output capacitance of the power amplifier circuit and corresponds to a varactor in series with an inductor.
  • a load resistance R s can be also arranged in series in order to deliver any power level desired.
  • the inductor preferably comprises an inductive element, such as a coil or a high impedance transmission line.
  • the tuned frequency range of the varactive element is preferably chosen according to a factor which is determinable by at least one of the impedance of the inductor and the predetermined resistance.
  • a dynamic range in power level between 5 dB to 12 dB, more preferably between 8 dB to 10 dB, is obtained with a power amplifier efficiency between 30 % to 55 %, more preferably between 35 % to 45 %, with a peak output power of around 15 W and a center frequency in a range between 0.8 GHz and 6 GHz. According to the inventors such values have not been reported so far for wideband medium power PAs.
  • DLM is applicable at lower power levels in mobile handsets and /or in
  • the varactive element corresponds to a shunted varactor and is connectable to at least one of a quarter wave transformer and a ⁇ network in a matching branch of the power amplifier circuit, wherein the matching branch is arranged between an output capacitance of the power amplifier circuit and the output impedance. It is advantageous that with inserting a shunted varactor and connecting it to one of a ⁇ network or a quarter wave transformer one can easily change the value of the output capacitance of the PA circuit and also of the capacitance of the varactive element.
  • the term "changing" means increasing or decreasing dependent on the preferred embodiment of the invention.
  • a T network comprising an L-C-L configuration is connectable to the varactive element.
  • the impedance of the quarter wave transformer and/or of the ⁇ network correspond(s) to a characteristic impedance such that when the varactive element modulates the output impedance the total output capacitance of the power amplifier circuit and/or the reactance of the varactive element changes by a predetermined factor.
  • the total output capacitance is usually different from the output capacitance.
  • the total output capacitance is proportional to the sum of the output capacitance and the further capacitance.
  • the predetermined factor is preferably proportional to a ratio of the magnitude of the characteristic impedance of the quarter wave transformer and/or of the ⁇ network in the matching branch to the magnitude of the output impedance and comprises a range between 0.1 and 2, more preferably between 0.2 and 1.
  • the range between 0.1 and 2 is preferred since different technologies are considerable within this range when the output impedance varies by modulating the varactive element.
  • the ⁇ network comprises at least two capacitors and an inductor connectable between the at least two capacitors and wherein the ⁇ network is connectable between the output capacitance of the power amplifier circuit and the varactive element.
  • a dynamic range in power level between 5 dB to 12 dB is preferably obtained, more preferably between 8 dB to 10 dB, with a power amplifier efficiency between 60% to 78.5 %, more preferably larger than 70%, with a peak output power of around 100 W and a center frequency in the range between 0.8 GHz and 6 GHz. According to the inventors such values have not been reported so far for narrowband high power PAs.
  • the varactive element is further configured to operate as a filter, preferably as a bandpass filter or as a lowpass filter, such that higher harmonic waves in the power amplifier circuit are cut off. In this way only the fundamental wave is transmitted and the current is rectified.
  • the output current to the load resistance is preferably sinusoidal and the current in the transistor is preferably rectified.
  • the power amplifier circuit comprises a load network with a lowpass filter and/or a transformer.
  • the predetermined resistance preferably comprises a value determinable by the technology used, more preferably the predetermined resistance corresponds to a value of 50 ⁇ .
  • the ratio of the reactance of the varactive element and the predetermined resistance for the output impedance comprises a range between 0.5 and 10, more preferably between 1 and 6, most preferably between 2 and 5.
  • the proposed DLM architectures offer an attractive solution for high efficiency PA circuits in high PAR systems, even for microwave link frequencies.
  • the simultaneous combination of high efficiency in OPBO and/or large bandwidth is according to the inventors not reported so far for the proposed architectures, i.e. with this circuit architecture efficiencies above 70% down to 8 dB of OPBO over 36% bandwidth are obtainable.
  • the shunted varactor topology is preferably more narrow band but shows more degrees of freedom in circuit design and it is easier to bias the transistor drain externally, as the varactor is not acting like a DC block.
  • the output network comprises a low complexity using a variable element, such as a varactor, allowing for a simple and cost-effective implementation.
  • a variable element such as a varactor
  • the invention provides an insightful framework.
  • the ⁇ network solution offers an extra degree of circuit design freedom and, hence, gives the designer more flexibility in the choice of component values preferably with no or with limited effect on the final PA performance. This is advantageous in high power implementations when the transistor resistance R o t becomes small, for instance allowing for use of larger load resistance values that are easier to realize.
  • the ⁇ network solution also offers the opportunity for a very compact circuit realization. This is in particular useful for packaged and monolithic microwave integrated circuit implementations, MMIC implementations for short, where the final circuit size has to be determined.
  • a method for efficient wideband dynamic load modulation in a power amplifier circuit comprising the steps: a) modulating an output impedance of the power amplifier circuit operable in a predefined power level range, and b) tuning the reactance of a varactive element comprised by the power amplifier circuit in synchronization with the power level, thereby adjusting the ratio of the reactance of the varactive element and a predetermined resistance for the output impedance.
  • DLM is efficiently achieved over a broad frequency range in PA circuit designs.
  • a wireless communication node comprising a power amplifier circuit according to the first aspect of the invention.
  • Fig. 1 illustrates a class J PA schematic according to the prior art
  • Fig. 2 shows contours for the maximum efficiency and the corresponding output power relative to the maximum class B output power according to a first preferred embodiment of the invention
  • Fig. 3 shows a class J amplifier with a series tunable reactance in the form of an LC network according to the first preferred embodiment of the invention
  • Fig. 4 illustrates efficiency contours plotted as functions of Xs/R opt and the inverted ratio (Xcd S /R op t) "1 for a fixed Rs/R op t and shows cross sections of the contours according to the first preferred embodiment of the invention
  • Fig. 5 shows efficiency versus output power at 1 .75 GHz, 2.14 GHz and
  • Fig. 6 illustrates relative gain versus output power at 1 .75 GHz, 2.14 GHz and 2.53 GHz according to the first preferred embodiment of the invention
  • Fig. 7 shows the capacitive tuning factor versus output power at 1 .75
  • Fig. 8 shows the varactor unit cell voltage amplitude versus output power at 1 .75 GHz, 2.14 GHz and 2.53 GHz according to the first preferred embodiment of the invention
  • Fig. 9 shows a class J amplifier with a 90° transformer and a shunted varactor according to a second preferred embodiment of the invention.
  • Fig. 10 shows a class J amplifier with a ⁇ network transformer and a shunted varactor according to a third preferred embodiment of the invention
  • Fig. 1 1 shows the ratio of Z c /R op t and R p /R o t contours as functions of the technology ratio Xcd S R op t and the effective ratio X'cd S /Ro P t according to the third preferred embodiment of the invention
  • Fig. 13 shows efficiency versus output power at 2.2 GHz according to the third preferred embodiment of the invention.
  • Fig. 14 shows relative gain versus output power at 2.2 GHz according to the third preferred embodiment of the invention.
  • Fig. 15 shows the capacitive tuning factor versus output power at 2.2 GHz according to the third preferred embodiment of the invention
  • Fig. 16 shows the varactor unit cell voltage amplitude versus output power at 2.2 GHz according to the third preferred embodiment of the invention.
  • Fig. 17 illustrates the steps of a method for efficient wideband DLM according to a fourth preferred embodiment of the invention.
  • Fig. 1 shows a class J PA schematic at a designed center frequency u> 0 according to the prior art.
  • the power amplifier circuit 1 is illustrated with the output impedance Z(nu> 0 ) which is also given as formula in Fig. 1 indicated as reference numeral 3.
  • the transistor output characteristics is assumed to have no efficiency degrading voltage knee. Similar to a class B amplifier the transistor is biased at pinch-off, resulting in a half-rectified sinusoidal current given by where L a x is the transistor saturation current and ⁇ is a drive level factor.
  • the load matching branch is an ideal lowpass filter, i.e. high harmonics are open circuited, and the fundamental current has therefore no higher harmonic content and is thus represented by a sinusoidal wave
  • l F is given by where the hat indicates frequency domain and Z iF is the fundamental frequency load impedance presented to the current source and given by It is noted that Cd S corresponds to the effective output capacitance of the transistor under large signal operation and in some cases can also comprise the physical added part of the capacitance, i.e. any additional capacitance seen at the transistor output.
  • ⁇ are calculated as
  • the device output form is solved in time domain as
  • V 0 ff is chosen to give V 0 the desired DC voltage component V DC .
  • Fig. 2 shows contours for the maximum efficiency and the corresponding output power relative to the maximum class B output power according to a first preferred embodiment of the invention.
  • Contours for the maximum efficiency and the corresponding output power relative to the maximum class B output power i.e. contours of
  • Fig. 3 illustrates that with a fixed load resistance Rs and a variable reactance Xs comprising a varactor in series with an inductor a dynamic load modulated PA implementation is realizable.
  • the varactive element 2 is in series with an inductor L s and tunable so that an LC network is given which is arranged in series with the resistance Rs so that the class J amplifier setup is shown with a series tunable reactance in the form of an LC network.
  • the ratio Xcd S /R op t decreases, hence Fig. 2 (c) demonstrates the efficiency and OPBO performance at twice the frequency compared to Fig. 2 (b) for a certain device technology.
  • Rs/R op t 0.5 suggests that the load modulation also works over a wide bandwidth. This is validated in Fig.
  • FIG. 4 (a) shows the cross sections of the contours in Fig. 4(a) illustrating the efficiency versus OPBO for a few different inverted ratios (Xcd S /R op t) 1 ⁇
  • the load modulation in this particular embodiment offers more than 65 % efficiency for more than 6 dB OPBO for inverted ratios from 0.4 up to 0.8, i.e. an octave of bandwidth.
  • Figs. 5 to 8 illustrate the characteristics of a wideband medium PA circuit according to the first preferred embodiment of the invention.
  • a dynamic range of 8 dB is obtained over 36% bandwidth with a peak output power of 15 W.
  • the bandwidth and dynamic range are chosen so that the varactor tuning range and voltage amplitude are realizable by using two pairs of anti series connected SiC varactors in this first preferred embodiment.
  • an additional 1.4 pF of shunt capacitance is added at the output of the transistor. Without any added shunt capacitance the center frequency of this transistor technology would be chosen to 5.5 GHz in order to achieve identical bandwidth and OPBO performance.
  • FIG. 5 shows the resulting efficiencies versus output power for 1.75 GHz (indicated as “red” in Figs. 5 to 8), 2.14 GHz (indicated as “green” in Figs. 5 to 8) and 2.53 GHz (indicated as “blue” in Figs. 5 to 8), i.e. at the center and band edge frequencies.
  • the efficiency is maintained above 70% down to 8 dB of
  • Fig. 9 shows a class J amplifier with a 90° transformer and a shunted varactor according to a second preferred embodiment of the invention.
  • the transistor biasing is simplified such that it is easily integrated in a packaged solution or in an MMIC solution.
  • a shunted varactor 2 is used, wherein the shunted varactor comprises a quarter wave transformer where the choice of the characteristic impedance Zc adds a degree of circuit design freedom.
  • the transformation can offer more convenient values for the load resistance Rp.
  • An efficiency improvement is achievable by the choice of Zc. According to other preferred embodiments such an efficiency improvement is traded for more convenient R P load resistance values or varactor Cv capacitance values.
  • Fig. 10 shows the class J amplifier with a ⁇ network transformer and a shunted varactor according to a third preferred embodiment of the invention.
  • the quarter wave transformation line transformer according to the embodiment of Fig. 9 is replaced by a lumped ⁇ network according to this third preferred embodiment of the invention.
  • the capacitance is then shifted between the varactor 2 and the adjacent ⁇ network shunt capacitance affecting the required varactor tuning range in size. In this way, also the value of the transistor output capacitance 4 is decreased.
  • the impedance is shifted between Xc ds and the first shunt capacitance in the ⁇ network resulting in a new effective output capacitance X'cds and in a ratio X'cd S /Ro P t > Xcd S /R op t-
  • the output capacitance is reduced by a factor proportional to ⁇ ⁇ .
  • 0 ⁇ is a function of Z c while Z c can be freely chosen which means that is possible to obtain any desired value of X'c ds - Furthermore, this depends also on realizable component values and varactor tuning ranges. In addition the load network lowpass performance will be affected by the choice of Zc.
  • Fig. 1 1 illustrates which Zc and Rp are required to transform the transistor technology ratio Xcds Ro P t to the effective ratio X'cds/R op t- It is noted that Z c and R P are normalized to R op t.
  • Figs. 13 to 16 illustrate the characteristics of a narrowband high power PA circuit according to the third preferred embodiment of the invention.
  • a 100 W amplifier design is shown with a high efficiency for an OPBO of 9 dB at 2.2 GHz.
  • the values of a realistic varactor tuning range, of supported voltage amplitudes and of reasonable component values are chosen.
  • the characteristic impedance Zc/R o t is chosen to 1.767 the required R P load resistance is made equal to 50 ⁇ .
  • This impedance level is more convenient than the low Rs load resistance required in the series varactor realization according to the first preferred embodiment and simplifies the transistor drain biasing.
  • Fig. 13 shows that the efficiency can be maintained above 70% over a range of 9 dB OPBO.
  • Fig. 14 shows that a varactor tuning range of about 2.9 is required.
  • the resulting varactor voltage amplitude when using two pairs of anti- series connected varactors is shown in Fig. 16 and this shows that the results according to this third preferred embodiment are comparable to the results of the design according to the first preferred embodiment.
  • Fig. 17 shows schematically the steps of a method for efficient wideband dynamic load modulation in a PA circuit according to a fourth preferred embodiment of the invention. Fig.
  • the output impedance 3 of the PA circuit 1 is modulated 5, wherein the PA circuit 1 is operable in a predefined power level range and in a further step the reactance of a varactive element 2 which is comprised by the PA circuit 1 is tuned 6 in synchronization with the power level, thereby the ratio of the reactance of the varactive element 2 and the predetermined resistance for the output impedance 3 is adjusted.
  • the ratio of the reactance of the varactive element 2 and the predetermined resistance for the output impedance 3 is adjusted.
  • the power amplifier circuit is used in a wireless communication node comprising radio and/or microwave frequency transmitters where the signals feature amplitude modulation.
  • Such transmitters for wireless communication comprise at least one of a radio base station, a radio and a microwave frequency link, a handset, a software defined radio and a wireless local area network. It is noted that any type of system is usable and it is an idea of the invention to be applicable to any wireless communication system where high average energy efficiency and/or wideband operation is desirable or required.
  • other application fields comprise the use of the power amplifier circuit in at least one of a radar system for enabling communication, in a microwave oven for efficient cooking and in an electronic warfare system.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

La présente invention concerne un circuit amplificateur de puissance, conçu pour une modulation de charge dynamique large bande efficace, un procédé de modulation de charge dynamique large bande efficace dans un circuit amplificateur de puissance, ainsi qu'un nœud de communication sans fil. Le circuit amplificateur de puissance (1) comprend un élément varactor (2) conçu pour moduler une impédance (3) de sortie du circuit amplificateur de puissance (1) et actionnable dans une plage de niveaux de puissance prédéfinie. L'élément varactor (2) est également conçu pour être réglé en synchronisation avec le niveau de puissance, de sorte que le réglage du rapport entre la réactance de l'élément varactor (2) et une résistance prédéfinie pour l'impédance (3) de sortie du circuit amplificateur de puissance (1) permette d'obtenir une efficacité d'amplificateur de puissance prédéfinie sur une plage de fréquences prédéfinie. On obtient ainsi un circuit amplificateur de puissance à haut rendement, adapté pour une large gamme de fréquences, simple à fabriquer et fonctionnant de façon linéaire sur une large plage.
PCT/EP2012/059354 2012-05-21 2012-05-21 Architecture d'amplificateur de puissance à modulation de charge dynamique large bande à haut rendement WO2013174411A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/EP2012/059354 WO2013174411A1 (fr) 2012-05-21 2012-05-21 Architecture d'amplificateur de puissance à modulation de charge dynamique large bande à haut rendement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2012/059354 WO2013174411A1 (fr) 2012-05-21 2012-05-21 Architecture d'amplificateur de puissance à modulation de charge dynamique large bande à haut rendement

Publications (1)

Publication Number Publication Date
WO2013174411A1 true WO2013174411A1 (fr) 2013-11-28

Family

ID=46149440

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2012/059354 WO2013174411A1 (fr) 2012-05-21 2012-05-21 Architecture d'amplificateur de puissance à modulation de charge dynamique large bande à haut rendement

Country Status (1)

Country Link
WO (1) WO2013174411A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10277169B2 (en) 2015-05-27 2019-04-30 Kabushiki Kaisha Toshiba Amplifier
US10447209B2 (en) 2017-01-26 2019-10-15 Telefonaktiebolaget Lm Ericsson (Publ) Apparatus and method for improving efficiency of power amplifier

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110148518A1 (en) * 2006-11-01 2011-06-23 Telefonaktiebolaget Lm Ericsson (Publ) Dynamic range improvements of load modulated amplifiers

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110148518A1 (en) * 2006-11-01 2011-06-23 Telefonaktiebolaget Lm Ericsson (Publ) Dynamic range improvements of load modulated amplifiers

Non-Patent Citations (7)

* Cited by examiner, † Cited by third party
Title
FAGER C ET AL: "High efficiency transmitter using varactor based dynamic load modulation", RF FRONT-ENDS FOR SOFTWARE DEFINED AND COGNITIVE RADIO SOLUTIONS (IMWS), 2010 IEEE INTERNATIONAL MICROWAVE WORKSHOP SERIES ON, IEEE, PISCATAWAY, NJ, USA, 22 February 2010 (2010-02-22), pages 1 - 4, XP031654077, ISBN: 978-1-4244-5751-9 *
HOSSEIN MASHAD NEMATI ET AL: "Design of Highly Efficient Load Modulation Transmitter for Wideband Cellular Applications", IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, IEEE SERVICE CENTER, PISCATAWAY, NJ, US, vol. 58, no. 11, 1 November 2010 (2010-11-01), pages 2820 - 2828, XP011319501, ISSN: 0018-9480 *
JIA-SHIANG FU ET AL: "A tunable matching network for power amplifier efficiency enhancement and distortion reduction", MICROWAVE SYMPOSIUM DIGEST, 2008 IEEE MTT-S INTERNATIONAL, IEEE, PISCATAWAY, NJ, USA, 15 June 2008 (2008-06-15), pages 1151 - 1154, XP031441531, ISBN: 978-1-4244-1780-3, DOI: 10.1109/MWSYM.2008.4633261 *
MEHDI SARKESHI ET AL: "A novel Doherty amplifier for enhanced load modulation and higher bandwidth", MICROWAVE SYMPOSIUM DIGEST, 2008 IEEE MTT-S INTERNATIONAL, IEEE, PISCATAWAY, NJ, USA, 15 June 2008 (2008-06-15), pages 763 - 766, XP031441214, ISBN: 978-1-4244-1780-3 *
MOHAMED A M M ET AL: "Novel reconfigurable fundamental/harmonic matching network for enhancing the efficiency of power amplifiers", MICROWAVE CONFERENCE (EUMC), 2010 EUROPEAN, IEEE, PISCATAWAY, NJ, USA, 28 September 2010 (2010-09-28), pages 1122 - 1125, XP031786430, ISBN: 978-1-4244-7232-1 *
NEO W C E ET AL: "Improved hybrid sige HBT class-ab power amplifier efficiency using varactor-based tunable matching networks", BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 2005. PROCEEDINGS OF THE, IEEE, PISCATAWAY, NJ, USA, 9 October 2005 (2005-10-09), pages 108 - 111, XP010861844, ISBN: 978-0-7803-9309-7, DOI: 10.1109/BIPOL.2005.1555211 *
YI-CHUN LEE ET AL: "A 5.8-GHz power amplifier with an on-chip tunable output matching network", MICROWAVE CONFERENCE PROCEEDINGS (APMC), 2011 ASIA-PACIFIC, IEEE, 5 December 2011 (2011-12-05), pages 219 - 222, XP032152610, ISBN: 978-1-4577-2034-5 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10277169B2 (en) 2015-05-27 2019-04-30 Kabushiki Kaisha Toshiba Amplifier
US10447209B2 (en) 2017-01-26 2019-10-15 Telefonaktiebolaget Lm Ericsson (Publ) Apparatus and method for improving efficiency of power amplifier

Similar Documents

Publication Publication Date Title
US9948243B2 (en) Reconfigurable load modulation amplifier
EP2388912B1 (fr) Contrôle de puissance d'amplificateurs Chireix à déphasage reconfigurable et procédés
US9484865B2 (en) Reconfigurable load modulation amplifier
Wu et al. Design of a broadband and highly efficient 45W GaN power amplifier via simplified real frequency technique
Fu et al. Novel dual-band matching network for effective design of concurrent dual-band power amplifiers
US20170149391A1 (en) Variable Impedance Match and Variable Harmonic Terminations for Different Modes and Frequency Bands
CN109728783B (zh) 一种多赫蒂功率放大电路、功率放大器、终端及基站
JP2017534228A (ja) 動的電力ディバイダ回路および方法
CN110784185A (zh) 功率放大器、输出匹配电路和射频模块
US8174311B2 (en) Switching amplifier
EP3857711A1 (fr) Réseau d'adaptation d'impédance à large bande utilisant une adaptation large bande de type passe-bas, décalage de phase de réflexion de second harmonique et adaptation de conjugué complexe passe-haut en combinaison
EP3529893B1 (fr) Amplificateur de puissance à large bande et procédé de conception d'un réseau amplificateur de puissance à large bande
JP6470398B2 (ja) 電力増幅器
WO2013174411A1 (fr) Architecture d'amplificateur de puissance à modulation de charge dynamique large bande à haut rendement
CN103391048A (zh) 一种自适应线性化偏置电路结构
CN103503309B (zh) 基于宽带和可重配置Doherty的放大器
US7463092B2 (en) Amplifier with variable impedance transformation and method of amplification using the same
WO2009089478A1 (fr) Amplificateur de commutation à plage dynamique étendue
Turgul et al. A study on RF/microwave tunable inductor topologies
CN109067364B (zh) 一种宽频高效输出的Doherty功率放大器
Shim et al. A 1.85 GHz CMOS power amplifier with zero-voltage-switching contour-based outphasing control to improve back-off efficiency
RU2437206C1 (ru) Комбинированный усилитель, радиостанция и способ повышения кпд комбинированного усилителя
Sajedin et al. Energy efficient and wideband class-J Doherty power amplifier
US11949546B2 (en) Harmonic filters for polar modulators
US11750156B2 (en) Power amplifier

Legal Events

Date Code Title Description
DPE2 Request for preliminary examination filed before expiration of 19th month from priority date (pct application filed from 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12723447

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 12723447

Country of ref document: EP

Kind code of ref document: A1