WO2013173537A1 - Alternating adjustment of power levels for the data channel and control channel - Google Patents

Abstract

An apparatus and method for power control in a communications system is provided. The method includes performing power adjustment, by a user equipment, for one of a data channel or a control channel in a given slot. The method further includes calculating a desired output signal level and channel levels for the user equipment.

Description

ALTERNATING ADJUSTMENT OF POWER LEVELS FOR THE DATA CHANNEL AND CONTROL CHANNEL

CROSS-REFERENCE TO RELATED APPLICATIONS:

[0001] This application claims priority to U.S. Provisional Application Serial No. 61/647,709 filed on May 16, 2012. The contents of this earlier filed application are hereby incorporated by reference in their entirety.

BACKGROUND:

Field:

[0002] Embodiments of the invention relate to power control in cellular networks and/or wireless communication systems, such as Wideband Code Division Multiple Access (WCDMA), the Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access Network (UTRAN) and Long Term Evolution (LTE) Evolved UTRAN (E-UTRAN), Global System for Mobile Communications (GSM), or any other wireless communications system.

Description of the Related Art:

[0003] Generally, power control in wireless systems refers to the process of controlling the transmitted power so as to achieve the required communications performance without transmitting more power than needed to achieve that required performance. Therefore, many wireless standards include power control methods and signals to allow for efficient use of radio resources. Typically, such systems' transceivers are also specified to use separate I and Q branches, which are combined to form complex symbols. For example, according to the 3GPP WCDMA standard, in the UE, the transmission power adjustment is done for the combined signal, containing both data and control channels (both the I and Q branch). As is known, the I branch refers to the real part (or in-phase part) of a complex number or signal, and the Q branch refers to the imaginary part (or quadrature part) of a complex number or signal. United States Patent No. 7,502,406 is an example of a solution that uses simultaneous power adjustment of both the data and control channels.

SUMMARY:

[0004] One embodiment includes a method for power adjustment. The method may include performing power adjustment, by a user equipment in a communications system, for one of a data channel or a control channel in a given slot. The method may also include calculating a desired output signal level and channel levels for the user equipment.

[0005] Another embodiment is directed to an apparatus. The apparatus includes at least one processor and at least one memory comprising computer program code. The at least one memory and the computer program code are configured, with the at least one processor, to cause the apparatus at least to perform power adjustment for one of a data channel or a control channel in a given in a communications system, and calculate a desired output signal level and channel levels for the apparatus.

[0006] Another embodiment is directed to an apparatus including means for performing power adjustment, for example in a user equipment in a communications system, for one of a data channel or a control channel in a given slot. The apparatus may also include means for calculating a desired output signal level and channel levels for the user equipment.

[0007] Another embodiment is directed to a computer program, embodied on a computer readable medium, wherein the computer program is configured to control a processor to perform a process. The process includes performing power adjustment, for example in a user equipment in a communications system, for one of a data channel or a control channel in a given slot. The process may also include calculating a desired output signal level and channel levels for the user equipment.

BRIEF DESCRIPTION OF THE DRAWINGS:

[0008] For proper understanding of the invention, reference should be made to the accompanying drawings, wherein:

[0009] Fig. 1 illustrates a frame structure for a data channel and control channel;

[0010] Fig. 2 illustrates an example of a system;

[0011] Fig. 3 illustrates another example of a system;

[0012] Fig. 4 illustrates an example of a system according to one embodiment;

[0013] Fig. 5 illustrates an example of another system according to an embodiment;

[0014] Fig. 6 illustrates an example of an alternating power level adjustment method according to one embodiment;

[0015] Fig. 7 illustrates an example of an alternating power level adjustment method according to another embodiment;

[0016] Fig. 8 illustrates an apparatus according to one embodiment; and

[0017] Fig. 9 illustrates a flow diagram of a method according to one embodiment.

DETAILED DESCRIPTION:

[0018] It will be readily understood that the components of the invention, as generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of a system, a method, an apparatus, and a computer program product for alternating the adjustment of power levels for the data and control channels, as represented in the attached figures, is not intended to limit the scope of the invention, but is merely representative of selected embodiments of the invention.

[0019] If desired, the different functions discussed below may be performed in a different order and/or concurrently with each other. Furthermore, if desired, one or more of the described functions may be optional or may be combined. As such, the following description should be considered as merely illustrative of the principles, teachings and embodiments of this invention, and not in limitation thereof.

[0020] As discussed above, conventionally under current wireless standards, such as those of the 3rd Generation Partnership Project (3GPP), the UE performs the transmission power adjustment for the combined signal, containing both data and control channels (both the I and Q branch). Fig. 1 illustrates an example of a frame structure for uplink dedicated physical data channel (DPDCH)/dedicated physical control channel (DPCCH). In particular, Fig. 1 illustrates an example of how the DPDCH 100 and the DPCCH 1 10 are transmitted in parallel, i.e., in the same slot 1 15. In this regard, 3GPP TS 25.214 section 5.1.2.1 describes how the transmission power is adjusted: "Subsequently the uplink transmit power control procedure simultaneously controls the power of a DPCCH and its corresponding DPDCHs (if present)." Thus, according to prior art solutions, the power adjustment is done at the same time to both the data (DPDCH) and the control channel (DPCCH).

[0021] Embodiments of the invention propose not to adjust the transmission power for both data and control channel at the same time, but to alternate the adjustments. According to certain embodiments, in one given slot, either the data channel power or the control channel power would be adjusted according to the desired output power. Then, in the following slot, again either the data channel power or the control channel power would be adjusted according to the desired output power, and so forth. In certain embodiments, the desired output power value may be based on the power control loop and may include filtering, estimation/prediction or adjustment/compensation elements, based on an algebraic formula, table or a combination thereof.

[0022] Performing the power adjustment separately for the data channel and the control channel, for example in different or alternating slots, allows for less transmission power fluctuation and a finer granularity in resulting output signal power steps.

[0023] Therefore, according to a first embodiment, the power adjustment is not performed for both the data and control channels of Fig. 1 at the same time, but for one or the other of the channels. In one example, the power adjustment for the data channel and control channel, respectively, is performed in different arbitrary slots. In another example, the power adjustment for the data channel and control channel, respectively, is performed in alternating slots, for instance in strictly alternating slots. The desired output signal level and channel levels are then determined or calculated. According to this embodiment, the desired power and channel levels may be set by using, for example, existing "beta factor" level multipliers, or by using some new multipliers for the specific purpose.

[0024] Fig. 2 illustrates an example of spreading for uplink DPCCH/DPDCHs and depicts how the DPDCH and DPCCH (I and Q branches) are combined to form a complex symbol (I+jQ). Fig. 2 further illustrates the beta factor multipliers d, βα Conventionally, the beta factor multipliers βά, βο were only used for static or quasi-static adjustments. However, according to embodiments of the present invention, the beta factor multipliers pd, βο may be used for dynamic closed loop power control, as mentioned above. Fig. 3 illustrates an example of spreading for uplink dedicated channels and depicts how the combined complex symbol stream (I+jQ) is scrambled. In the example of Fig. 3, the combined complex symbol stream (I+jQ) is scrambled by multiplying it by with the complex sequence S(dpch,n).

[0025] According to a second embodiment, similar to the first embodiment discussed above, the power adjustment is not performed for both channels of Fig. 1 at the same time, but always performed for one channel or the other. For instance, the power adjustment for the data channel and control channel, respectively, is performed in different arbitrary slots. In another example, the power adjustment for the data channel and control channel, respectively, is performed in alternating slots. The desired output signal level and channel levels are then determined or calculated. Also according to this embodiment, the desired power and channel levels may be set by using, for example, the beta factor level multipliers discussed above, or by using some new multipliers for the specific purpose. In an embodiment, relative adjustment capability in the range of one or two steps of the final output level adjustment may be sufficient.

[0026] Further, in this embodiment, final adjustment to the desired output level may be performed by a second stage for the combined level. According to an embodiment, for the resulting output signal, only one of either the data or the control channel may change. Fig. 4 illustrates an example of how the I and Q branches are combined to form a complex symbol and illustrates a possible location for a final output level adjustment 400, according to one embodiment. [0027] Fig. 5 illustrates an example placement of additional data channel power level adjustment units 500 and control channel level adjustment units 510 (level multipliers), according to an embodiment of the invention. As illustrated in Fig. 5, in this example, the data channel power level adjustment units 500 and control channel level adjustment units 510 may be placed in the next stage after the beta factor multipliers d 550, βο 560. In one embodiment, the example system of Fig. 5 can also include a final output level adjustment unit 400.

[0028] For any of the embodiments, the adjustments of the data channel power or control channel power may be performed either strictly alternating (always first one, then the other) or with arbitrary selection of the channel to adjust. For example, Fig. 6 illustrates an example of an alternating power level adjustment method in which power of the data channel (DPDCH) and control channel (DPCCH) are controlled by strictly alternating between them. In the example of Fig. 6, in slot number 1 only the data channel power level is changed and the control channel power level is not changed. Then, in slot 2 the power change is alternated such that only the control channel power level is changed and the data channel power level is not, and so on.

[0029] Fig. 7 illustrates one example of alternating power level adjustment in which power of the data channel (DPDCH) and control channel (DPCCH) are controlled by allowing an arbitrary selection of which one of the channels to adjust in a given slot. It should be noted that, while the method of Fig. 7 is denoted as an arbitrary selection, only one or the other of the data or control channels can be adjusted in a given slot. In the example illustrated in Fig. 7, only the data channel power level is changed in slots 1 through 3. Then, only the control channel power level is changed in slot 4, and so on. It is noted that Fig. 7 only illustrates one possible example of an arbitrary selection method, but there are myriad possibilities as long as only one or the other of the data and control channels are selected for power level adjustment in a given slot.

[0030] For calculating, generating or storing the power level adjustments there are multiple options available according to embodiments of the invention. For example, the calculating, generating or storing the power level adjustments may be based on tabulated values, may contain an algorithmic generator, or a mixed approach. In some embodiments, the adjustments may depend on whether an "up" or "down" command was received in the previous downlink slot, on the history of received commands in earlier slots, on the signaled power control mode and step size, and/or on the radio conditions. According to an embodiment, an estimation or prediction algorithm/mechanism can be used.

[0031] Fig. 8 illustrates an apparatus 10 configured for power control according to an embodiment. In one embodiment, apparatus 10 may be a mobile device such as user equipment (UE). It should be noted that Fig. 8 does not necessarily illustrate all components of apparatus 10. Only those components necessary for understanding embodiments of the invention are illustrated, but one of ordinary skill in the art would understand that apparatus 10 may include additional components that are not illustrated.

[0032] Apparatus 10 includes a processor 22 for processing information and executing instructions or operations. Processor 22 may be any type of general or specific purpose processor. While a single processor 22 is shown in Fig. 8, multiple processors may be utilized according to other embodiments. In fact, processor 22 may include one or more of general- purpose computers, special purpose computers, microprocessors, digital signal processors ("DSPs"), field-programmable gate arrays ("FPGAs"), application-specific integrated circuits ("ASICs"), and processors based on a multi-core processor architecture, as examples. [0033] Apparatus 10 further includes a memory 14, coupled to processor 22, for storing information and instructions that may be executed by processor 22. Memory 14 may be one or more memories and of any type suitable to the local application environment, and may be implemented using any suitable volatile or nonvolatile data storage technology such as a semiconductor-based memory device, a magnetic memory device and system, an optical memory device and system, fixed memory, and removable memory. For example, memory 14 can be comprised of any combination of random access memory ("RAM"), read only memory ("ROM"), static storage such as a magnetic or optical disk, or any other type of non-transitory machine or computer readable media. The instructions stored in memory 14 may include program instructions or computer program code that, when executed by processor 22, enable the apparatus 10 to perform tasks as described herein.

[0034] Apparatus 10 may also include one or more antennas (not shown) for transmitting and receiving signals and/or data to and from apparatus 10. Apparatus 10 may further include a transceiver 28 that modulates information on to a carrier waveform for transmission by the antenna(s) and demodulates information received via the antenna(s) for further processing by other elements of apparatus 10. In other embodiments, transceiver 28 may be capable of transmitting and receiving signals or data directly.

[0035] Processor 22 may perform functions associated with the operation of apparatus 10 including, without limitation, precoding of antenna gain/phase parameters, encoding and decoding of individual bits forming a communication message, formatting of information, and overall control of the apparatus 10, including processes related to management of communication resources. [0036] In an embodiment, memory 14 stores software modules that provide functionality when executed by processor 22. The modules may include an operating system 15 that provides operating system functionality for apparatus 10. The memory may also store one or more functional modules 18, such as an application or program, to provide additional functionality for apparatus 10. The components of apparatus 10 may be implemented in hardware, or as any suitable combination of hardware and software.

[0037] In one embodiment, apparatus 10 may be the UE mentioned above. Apparatus 10 may be controlled by memory 14 and processor 22 to perform power control for transceiver 28 according to embodiments of the invention. According to an embodiment, apparatus 10 may be controlled by memory 14 and processor 22 to perform power adjustment for one of the data channel or the control channel in a given slot, and to calculate a desired output signal level and channel levels for the apparatus 10.

[0038] In one embodiment, the power adjustment for the data channel or the control channel may be performed in different arbitrary slots. In other embodiments, the power adjustment for the data channel or the control channel may be performed in alternating slots.

[0039] According to an embodiment, apparatus 10 may be further controlled by memory 14 and processor 22 to calculate relative adjustments to the desired output signal level and the channel levels using beta factor level multipliers and/or using specific-purpose multipliers. Further, in some embodiments, the relative adjustments may be calculated by adjusting in a range of one or two steps of the final output level.

[0040] In one embodiment, apparatus 10 may be further controlled by memory 14 and processor 22 to perform final adjustments to the desired output signal level in a second stage for the combined level. [0041] According to certain embodiments, apparatus 10 may be further controlled by memory 14 and processor 22 to calculate the desired output signal level and the channel levels for the apparatus 10 by calculating based on at least one of tabulated values or an algorithmic generator.

[0042] Additionally, in some embodiments, apparatus 10 may be controlled by memory 14 and processor 22 to calculate the desired output signal level and the channel levels for the apparatus by calculating based on whether an up or down command was received in a previous downlink slot, based on a history of received commands in earlier slots, based on a signaled power control mode and step size, or based on radio conditions. In an embodiment, apparatus 10 may be controlled by memory 14 and processor 22 to calculate the desired output signal level and the channel levels for the apparatus by calculating using an estimation or prediction mechanism.

[0043] Fig. 9 illustrates a flow diagram of method for performing power control in a communications system, according to one embodiment. The method includes, at 900, performing power adjustment, for example by a UE, for one of a data channel or a control channel in a given slot. The power adjustment may be performed for one of the data channel or the control channel in different arbitrary slots or in alternating slots. The method may then include, at 910, calculating a desired output signal level and channel levels for the user equipment. The method may further include, at 920, calculating relative adjustments to the desired output signal level and the channel levels using beta factor level multipliers and/or specific-purpose multipliers. The method can also include, at 930, performing final adjustments to the desired output signal level by a second stage for the combined level.

[0044] In some embodiments, the functionality of any of the methods described herein, such as the method of Fig. 9, may be implemented by software and/or computer program code stored in memory or other computer readable or tangible media, and executed by a processor. In other embodiments, the functionality may be performed by hardware, for example through the use of an application specific integrated circuit (ASIC), a programmable gate array (PGA), a field programmable gate array (FPGA), or any other combination of hardware and software.

[0045] Embodiments of the invention provide an advantage of allowing the setting of the output power with a finer granularity than previously and, therefore, reducing radio interference.

[0046] One embodiment includes a method for power control in a communications system. The method includes performing power adjustment, for example by a user equipment, for one of a data channel or a control channel in a given slot. The method further includes calculating a desired output signal level and channel levels for the user equipment.

[0047] Another embodiment is directed to an apparatus. The apparatus includes at least one processor and at least one memory including computer program code. The at least one memory and the computer program code are configured, with the at least one processor, to cause the apparatus at least to perform power adjustment for one of a data channel or a control channel in a given slot, and calculate a desired output signal level and channel levels for the apparatus.

[0048] Another embodiment is directed to a computer program embodied on a computer readable medium. The compute program is configured to control a processor to perform a process. The process includes performing power adjustment, for example by a user equipment, for one of a data channel or a control channel in a given slot. The process further includes calculating a desired output signal level and channel levels for the user equipment. [0049] The described features, advantages, and characteristics of the invention may be combined in any suitable manner in one or more embodiments. One skilled in the relevant art will recognize that the invention may be practiced without one or more of the specific features or advantages of a particular embodiment. In other instances, additional features and advantages may be recognized in certain embodiments that may not be present in all embodiments of the invention.

[0050] One having ordinary skill in the art will readily understand that the invention as discussed above may be practiced with steps in a different order, and/or with hardware elements in configurations which are different than those which are disclosed. Therefore, although the invention has been described based upon these preferred embodiments, it would be apparent to those of skill in the art that certain modifications, variations, and alternative constructions would be apparent, while remaining within the spirit and scope of the invention. In order to determine the metes and bounds of the invention, therefore, reference should be made to the appended claims.

Claims

We Claim:

1. A method, comprising:

performing power adjustment, by a user equipment in a communications system, for one of a data channel or a control channel in a given slot; and

calculating a desired output signal level and channel levels for the user equipment.

2. The method according to claim 1, wherein the calculating comprises setting the desired output signal level and channel levels using beta factor level multipliers.

3. The method according to claim 1, wherein the calculating comprises setting the desired output signal level and channel levels using specific purpose multipliers.

4. The method according to claim 1, wherein the performing comprises performing the power adjustment for one of a data channel or a control channel in different arbitrary slots.

5. The method according to claim 1, wherein the performing comprises performing the power adjustment for one of a data channel or a control channel in alternating slots.

6. The method according to any of claims 1-5, further comprising finally adjusting the desired output signal level by a second stage for a combined signal comprising both the data channel and the control channel.

7. An apparatus, comprising: at least one processor; and

at least one memory comprising computer program code,

the at least one memory and the computer program code configured, with the at least one processor, to cause the apparatus at least to

perform power adjustment for one of a data channel or a control channel in a given in a communications system; and

calculate a desired output signal level and channel levels for the apparatus.

8. The apparatus according to claim 7, wherein the at least one memory and the computer program code are further configured, with the at least one processor, to cause the apparatus at least to calculate a desired output signal level and channel levels by setting the desired output signal level and channel levels using beta factor level multipliers.

9. The apparatus according to claim 7, wherein the at least one memory and the computer program code are further configured, with the at least one processor, to cause the apparatus at least to calculate a desired output signal level and channel levels by setting the desired output signal level and channel levels using specific purpose multipliers.

10. The apparatus according to claim 7, wherein the at least one memory and the computer program code are further configured, with the at least one processor, to cause the apparatus at least to perform the power adjustment for one of the data channel or the control channel in different arbitrary slots.

1 1. The apparatus according to claim 7, wherein the at least one memory and the computer program code are further configured, with the at least one processor, to cause the apparatus at least to perform the power adjustment for one of the data channel or the control channel in alternating slots.

12. The apparatus according to any of claims 7-1 1, wherein the at least one memory and the computer program code are further configured, with the at least one processor, to cause the apparatus at least to finally adjust the desired output signal level by a second stage for a combined signal comprising both the data channel and the control channel.

13. The apparatus according to any of claims 7-12, wherein the apparatus comprises a user equipment.

14. A computer program, embodied on a computer readable medium, the computer program configured to control a processor to perform a process, comprising:

performing power adjustment, by a user equipment in a communications system, for one of a data channel or a control channel in a given slot; and

calculating a desired output signal level and channel levels for the user equipment.