WO2013029564A1

WO2013029564A1 - Three-dimensional recorded memory

Info

Publication number: WO2013029564A1
Application number: PCT/CN2012/080895
Authority: WO
Inventors: 张国飙
Original assignee: Zhang Guobiao
Priority date: 2011-09-01
Filing date: 2012-09-02
Publication date: 2013-03-07
Also published as: CN103875059B; CN103875059A

Abstract

A three-dimensional recorded memory. Same is an improved three-dimensional mask-programmable read-only memory and employs three means to reduce data capturing costs: 1) use of a shared data mask (18A) to reduce mask costs apportioned to each mass-volume publication; 2) use of an embossing method to imprint data, where a data template used in the embossing method is at a great discount compared to the data mask (18A); and 3) employment of an offset imprint method to reduce the quantity of the data mask (18A). Also provided in the present invention is a three-dimensional recordable memory.

Description

三维印录存储器 3D imprint memory

技术领域Technical field

本发明涉及集成电路存储器领域，更确切地说，涉及掩膜编程只读存储器（ mask-ROM ）。 This invention relates to the field of integrated circuit memory and, more particularly, to a mask programming read only memory (mask-ROM).

背景技术Background technique

光碟-包括 DVD 碟和蓝光碟（ BD ）-是海量出版的主要媒介。海量出版中的'海量'具有双重意义，它指对海量出版物的海量发行。这里，每个海量出版物含有海量数据，其数据量为 GB 量级，其内容可以是电影、电子游戏、数字地图、音乐库、图书库或软件等。例如说，一部 VCD 格式电影的数据量为 ~0.5GB ，一部 DVD 格式电影的数据量为 ~4GB ，而一部 BD 格式电影的数据量则为 ~20GB 。另一方面，海量发行是指发行量过万，甚至达到百万量级。 Discs - including DVDs and Blu-ray Discs (BD) - are the main medium for mass publishing. The 'massive' in mass publication has a double meaning, and it refers to the massive release of massive publications. Here, each mass publication contains massive data, and the amount of data is GB. Magnitude, its content can be movies, video games, digital maps, music libraries, library or software. For example, the amount of data in a VCD format movie is ~0.5GB, and the amount of data in a DVD format movie is ~4GB, and the amount of data in a BD format movie is ~20GB. On the other hand, massive issuance means that the circulation is over 10,000 or even millions.

光碟对于移动用户来说尺寸过大。由于半导体存储器尺寸更小，因此它更适合针对移动用户的海量出版。三维掩膜编程只读存储器（ 3D-MPROM ）就是这么一种半导体存储器。美国专利 5,835,396 、 6,624,485 、 6,794,253 、 6,903,427 和 7,821,080 披露了 3D-MPROM 的多个特征。图 1A 和图 1B 表示一种 3D-MPROM 。图 1A 是其沿图 1B 中 AA' 线的截面图。该 3D-MPROM 是一种单片集成电路，它含有一半导体衬底 0 及一堆叠在衬底上的三维堆 16 。该三维堆 16 含有 M （ M ≥ 2 ）个相互堆叠的存储层（如 16A 、 16B ）。存储层（如 16A 、 16B ）通过接触通道孔（如 1av 、 1 ' av ）与衬底 0 耦合。在衬底 0 中的衬底电路 0X 含有三维堆 16 的周边电路。 The disc is too large for mobile users. Because semiconductor memory is smaller in size, it is more suitable for mass publishing for mobile users. 3D mask programming read-only memory (3D-MPROM) ) is such a semiconductor memory. US Patents 5,835,396, 6,624,485, 6,794,253, 6,903,427 and 7,821,080 Several features of the 3D-MPROM are disclosed. Figures 1A and 1B show a 3D-MPROM. Fig. 1A is a cross-sectional view taken along line AA' of Fig. 1B. The The 3D-MPROM is a monolithic integrated circuit comprising a semiconductor substrate 0 and a three-dimensional stack 16 stacked on a substrate. The three-dimensional stack 16 contains M ( M ≥ 2 ) A stack of storage layers (such as 16A, 16B). The memory layers (eg, 16A, 16B) are coupled to substrate 0 through contact via holes (eg, 1av, 1 ' av ). On the substrate The substrate circuit 0X in 0 contains the peripheral circuit of the three-dimensional stack 16.

每个存储层（如 16A ）含有多条顶地址线（如 2a-2d ）、底地址线（如 1a ）和存储元（如 5aa-5ad ）。地址线的宽度为 f 。每个存储元（如 5aa ）存储 n （ n ≥ 1 ）位数据。每个存储元还含有一个二极管 3d 。二极管泛指任何具有如下特性的两端口器件：当其所受电压的大小小于读电压，或者其所受电压的方向与读电压不同时，其电阻大于在读电压下的电阻。每个存储层（如 16A ）至少含有一层数据录入膜（如 6A ）。数据录入膜中的图形为数据图形，它代表其所存储的数据。在图 1A 中，数据录入膜 6A 、 6B 均为隔离介质膜 3b ，它阻挡顶地址线和底地址线之间的电流流动，并通过数据开口（如 6aa ）的存在与否来区别存储元（如 5aa ）的不同状态。在该图中，数据开口 6aa 的尺寸与地址线的宽度 f 相同。在本发明的其它实施例中，数据开口 6aa 的尺寸在很多情况下大于地址线的宽度 f （参见美国专利 6,903,427 ），这可以帮助降低数据录入的成本（参见图 5 、图 10A 和图 10B ）。在本申请中， xMxn 3D-MPROM 是指一个含有 M （ M ≥ 2 ）个存储层，且每个存储元存储 n （ n ≥ 1 ）位的 3D-MPROM 。 Each storage layer (such as 16A) contains multiple top address lines (such as 2a-2d), bottom address lines (such as 1a), and storage elements (such as 5aa-5ad). The width of the address line is f . Each memory element (such as 5aa) stores n ( n ≥ 1) bits of data. Each memory cell also contains a diode 3d . A diode generally refers to any two-port device that has a resistance that is greater than the resistance at the read voltage when the magnitude of the voltage it receives is less than the read voltage, or the direction of the voltage it receives is different from the read voltage. Each storage layer (such as 16A ) Contain at least one layer of data entry film (eg 6A). The graphics in the data entry film are data graphics that represent the data it stores. In Fig. 1A, the

data entry films

6A, 6B are all isolation dielectric films 3b. It blocks the current flow between the top address line and the bottom address line, and distinguishes the different states of the memory elements (such as 5aa) by the presence or absence of data openings (such as 6aa). In the figure, the data opening 6aa The size is the same as the width f of the address line. In other embodiments of the invention, the size of the data opening 6aa is in many cases greater than the width of the address line f (see U.S. Patent 6,903,427 This can help reduce the cost of data entry (see Figure 5, Figure 10A, and Figure 10B). In the present application, xMxn 3D-MPROM means one containing M ( M ≥ 2 a storage layer, and each storage element stores a 3D-MPROM of n (n ≥ 1) bits.

图 1B 是存储层 16A 的顶视图。该 3D-MPROM 是一种交叉点（ cross-point ）阵列存储器，它含有多条顶地址线（如 2a-2d ）、底地址线（如 1a-1d ）和存储元（如 5aa-5dd ），并通过数据开口（如通道孔）的存在与否来区别存储元的不同状态。如在存储元 5aa 处有一数据开口，它代表' 1 '；在存储元 5ab 处无数据开口，它代表' 0 '。本图仅画出了数据开口附近的隔离介质膜 3b （由交叉图纹表示）。为了显示地址线以及它们与数据开口之间的关系，其它地方的隔离介质膜 3b 没有被画出。该图也没有画出存储元中的二极管等部件。 Figure 1B is a top view of the storage layer 16A. The 3D-MPROM is a cross-point (cross-point) Array memory, which contains multiple top address lines (such as 2a-2d), bottom address lines (such as 1a-1d), and memory elements (such as 5aa-5dd) ) and distinguish the different states of the memory cells by the presence or absence of data openings (such as channel holes). For example, there is a data opening at the storage element 5aa, which represents '1'; there is no data opening at the storage element 5ab, which represents ' 0 '. This figure only shows the isolation dielectric film 3b (indicated by the cross pattern) near the data opening. In order to display the address lines and their relationship with the data openings, the isolation dielectric film 3b elsewhere Not drawn. The figure also does not show components such as diodes in the memory cell.

为了进一步提高存储密度， 3D-MPROM 可以采用 n （ n>1 ）位元，即每个存储元存储 n 位数据。美国专利申请 12/785,621 披露了一种采用多位元的 3D-MPROM 。图 1C 是一含有 2 位元的 3D-MPROM 的截面图。其存储元（如 5aa ）存储两个数码位：第 1 和第 2 数码位。该图只显示了一个存储层 16C ，它含有两个数据录入膜 6C 、 6D 。其中，数据录入膜 6C 根据第 1 数码位的值决定一存储元是否有额外掺杂 3i ，数据录入膜 6D 根据第 2 数码位的值决定一存储元是否有电阻膜 3r 。在本申请中，第 j 个数码位表示一个 n 位元（存储 n 个数码位的存储元， n ≥ j ）中存储的第 j 位。 In order to further increase the storage density, 3D-MPROM can adopt n ( n>1 ) bits, that is, each storage element stores n Bit data. A multi-bit 3D-MPROM is disclosed in U.S. Patent Application Serial No. 12/785,621. Figure 1C is a 2-bit 3D-MPROM Sectional view. Its memory elements (such as 5aa) store two digital bits: the 1st and 2nd digits. The figure shows only one storage layer 16C, which contains two data entry films 6C, 6D . The data entry film 6C determines whether a memory cell has an additional doping 3i according to the value of the first digital bit, and the data recording film 6D determines whether a memory cell has a resistive film according to the value of the second digital bit. . In the present application, the jth digital bit represents the jth bit stored in an n-bit (storage element storing n digital bits, n ≥ j ).

技术问题technical problem

在现有技术中，数据录入膜中的图形是通过图形转换从数据掩膜版得来的。图形转换也称为印录（ print ），即通过'印'的方式来录入数据。本发明将承载内容数据的掩膜版称为数据掩膜版。当集成电路的特征尺寸小于光刻机的光学波长时，掩膜版需要采用分辨率增强技术（ resolution enhancement techniques ，即 RET ），如光学接近修正（ optical proximity correction ，即 OPC ）和相位移掩膜版（ phase-shift mask ）等。这些技术的引入导致在制造 100 纳米以下掩膜版时需要写入的数据量极大地增加，同时也使其制造工艺日趋复杂。 In the prior art, the graphics in the data entry film are obtained from the data mask by pattern conversion. Graphic conversion is also called printing (print ), that is, by 'printing' to enter data. The present invention refers to a mask that carries content data as a data mask. When the feature size of the integrated circuit is smaller than the optical wavelength of the lithography machine, the mask needs to adopt resolution enhancement technology ( Resolution enhancement techniques ( RET ), such as optical proximity correction Correction, ie OPC) and phase-shift mask. The introduction of these technologies led to the manufacture of 100 The amount of data that needs to be written when the mask is less than nanometer is greatly increased, and the manufacturing process is also increasingly complicated.

尤其糟糕的是，数据掩膜版上的数据图形不同于存储器的其它掩膜版图形，如地址线图形、存储柱（ storage pillar ）图形、存储孔（ storage hole ）图形等。地址线图形、存储柱图形和存储孔图形具有很强的微米尺度周期性，即在微米大小的区域内，图形是以一定周期重复的。微米之所以很重要是因为它代表曝光光线的衍射范围。上述图形比较适宜采用 OPC 和 phase-shift mask 等 RET 技术。另一方面，数据掩膜版中的数据图形完全没有微米尺度周期性，即在微米大小的区域内，数据图形完全不重复。数据图形不适合 OPC 、 phase-shift mask 等 RET 技术，这使数据掩膜版的制造非常复杂。上述这些因素导致在 90nm 之后，数据掩膜版成本急剧上升。 Particularly bad is that the data pattern on the data mask is different from other mask patterns in the memory, such as address line graphics, storage columns ( Storage pillar ) ) Graphics, etc. The address line pattern, the memory column pattern, and the memory hole pattern have a strong micron-scale periodicity, that is, in a micron-sized area, the pattern is repeated in a certain period. Micron is important because it represents the diffraction range of the exposure light. The above graphics are more suitable OPC and phase-shift mask, etc. RET Technology. On the other hand, the data pattern in the data mask has no micro-scale periodicity at all, that is, in the micron-sized area, the data pattern is not repeated at all. Data graphics are not suitable for OPC, phase-shift The RET technology, such as mask, makes the fabrication of data masks very complicated. These factors have led to a sharp rise in data mask costs after 90 nm.

一般说来，每个数据录入膜都需要一块数据掩膜版。这样，一个 xMxn 3D-MPROM 需要 M×n 块数据掩膜版。例如，对于一个 x8x2 3D-MPROM 来说，它需要 16 （ =8×2 ）块数据掩膜版。这么多的数据掩膜版使高昂的数据掩膜版成本更加让人难以接受：在 90nm 结点这些数据掩膜版的成本约为 80 万美元，在 22nm 结点其成本则涨到 4 百万美元。 In general, a data mask is required for each data entry film. Thus, an xMxn 3D-MPROM requires M×n Block data mask. For example, for an x8x2 3D-MPROM, it needs 16 (=8×2 ) Block data mask. So many data masks make the cost of high data masks even more unacceptable: the cost of these data masks at the 90nm node is about $800,000 at 22nm. The cost of the node rose to $4 million.

在以往技术中，一套数据掩膜版仅为一个海量出版物专用，它是专用型数据掩膜版。如图 2 所示，专用型数据掩膜版 8A 仅含有海量出版物 MC₀ 的掩膜图形。注意到，一块数据掩膜版 8A 上可以含有多个 MC₀ 掩膜图形的拷贝（这里是 16 个拷贝）。对于专用型数据掩膜版来说，掩膜版的高昂成本落在单个海量出版物身上。相应地，存储该海量出版物 MC₀ 的 3D-MPROM 之成本也变得高昂。大多数本专业人士普遍认为：在 90nm 之后，高昂的数据掩膜版成本将极大地限制 3D-MPROM 的广泛应用。In the prior art, a data mask was only used for a large number of publications, and it was a dedicated data mask. As shown in Figure 2, the dedicated data mask 8A contains only mask patterns for the mass publication MC ₀ . Note that a data mask version 8A can contain multiple copies of the MC ₀ mask pattern (here 16 copies). For proprietary data masks, the high cost of masks falls on a single mass publication. Accordingly, the cost of storing the 3D-MPROM of the mass publication MC ₀ also becomes high. Most professionals believe that the high data mask cost after 90nm will greatly limit the wide application of 3D-MPROM.

技术解决方案Technical solution

本发明提出一种三维印录存储器（ three-dimensional printed memory ，简称为 3D-P ）。将其取名为'印录存储器'是为了突出这种以'印'来录入数据的方法，即印录法。在本发明中，'印录'是'掩膜编程'的另一种说法。 The invention provides a three-dimensional printed memory (three-dimensional printed memory) , referred to as 3D-P). The name is called 'printing memory' in order to highlight the method of entering data by 'printing', that is, the printing method. In the present invention, 'printing' is another term for 'mask programming'.

3D-P 是一种改进的 3D-MPROM 并采用了三种手段来降低数据录入成本： 1 ）使用共享型数据掩膜版； 2 ）采用压印法（ imprint-lithography ，也称为纳米压印法，即 nano-imprint lithography ，简称为 NIL ）来印录数据； 3 ）使用偏置印录（offset-printing）来减少数据掩膜版的数目。本发明中，除非有特别说明（如当上下文是在与数据模版进行比较时），数据掩膜版泛指任何印录工艺采用的、数据图形的承载装置，包括数据模版。 3D-P is an improved 3D-MPROM and uses three methods to reduce data entry costs: 1 Use a shared data mask; 2) use imprint-lithography (also known as nanoimprint lithography) , referred to as NIL for printing data; 3 Use offset-printing to reduce the number of data masks. In the present invention, unless otherwise specified (such as when the context is compared with a data template), the data mask refers to any data bearing device used in the printing process, including data templates.

为了降低数据录入成本，本发明中的 3D-P 采用共享型数据掩膜版来录入数据。一个共享型数据掩膜版上含有多个不同海量出版物的掩膜图形，故高昂的掩膜版成本可以被多个海量出版物分摊。分摊到每个海量出版物上的数据掩膜版成本是单位 GB 掩膜版成本 C_GB （即单位 GB 数据所占的数据掩膜版面积对应的掩膜版之成本）和该海量出版物的数据量（以 GB 为单位）之积。在半导体技术的缩尺过程中，由于掩膜版数据量（一块掩膜版上承载的所有数据量）的增加要快于掩膜版成本的增加， C_GB 实际上是下降的。例如说，从 90nm 到 22nm ， C_GB 从 ~$5.4k/GB 降到 ~$1.7k/GB （ k=1,000 ）。相应地， 3D-P 成本中来自数据掩膜版的部分随着技术进步将逐渐降低。在 45nm 之后， 3D-P 的成本可以低到替换光碟的地步。在本发明中，每个海量出版物所含的数据量为 GB 量级，最好不小于 0.5GB 。In order to reduce the data entry cost, the 3D-P in the present invention uses a shared data mask to record data. A shared data mask contains mask patterns for a number of different mass publications, so the cost of high masks can be shared by multiple mass publications. The data mask cost allocated to each mass publication is the unit GB mask cost C _GB (that is, the cost of the mask version corresponding to the data mask area occupied by GB data) and the mass publication The product of the amount of data (in GB). In the scale of semiconductor technology, _CGB actually drops due to the increase in the amount of mask data (the amount of data carried on one mask) is faster than the increase in mask cost. He said example, from 90nm to 22nm, C _GB reduced from ~ $ 5.4k / GB ~ $ 1.7k / GB (k = 1,000). Accordingly, the portion of the 3D-P cost from the data mask will gradually decrease as technology advances. After 45nm, the cost of 3D-P can be as low as the replacement of the disc. In the present invention, the amount of data contained in each of the mass publications is of the order of GB, preferably not less than 0.5 GB.

为了进一步降低数据录入成本，本发明还提出一种压印存储器（ imprinted memory ），尤其是三维压印存储器（ three-dimensional imprinted memory ，简称为 3D-iP ）。它采用压印法来录入数据：压印法通过在模版（ template ）上施加压力，使压印胶（ imprint resist ）产生机械变形从而实现图形转换。采用压印法来录入数据的主要优势是其数据模版远比光刻法中的数据掩膜版便宜。这里，数据模版是用来将数据图形转换到数据录入膜的模版。模板也被称为母版（ master ）、印戳（ stamp ）、模具（ mold ）等。在压印法中，由于数据录入膜中的图形是数据模版上图形的 1 ： 1 拷贝，它没有光刻法的光学失真问题，因此数据模版不需要 OPC ，其制造过程中所需写入的数据量远远小于数据掩膜版。此外，压印法也不用担心衍射效应，其数据模版不需要使用相位移技术，从而避免采用复杂的掩膜版工艺。更重要的是，压印法使印录具有纳米尺度（如 1 纳米到 100 纳米）、且不具有微米尺度周期性的数据图形成为可能。总的说来，由于制造数据模版比数据掩膜版容易，因此数据模版成本更低，故压印存储器具有较低的数据录入成本。 In order to further reduce the data entry cost, the present invention also proposes an imprinted memory (imprinted memory). ), especially three-dimensional imprinted memory (3D-iP for short) ). It uses imprinting to record data: imprinting by applying pressure on the template to make the imprint resist Produce mechanical deformation to achieve graphics conversion. The main advantage of using imprinting to enter data is that its data template is much cheaper than the data mask in photolithography. Here, the data template is a template for converting data graphics to a data entry film. Templates are also known as masters ( Master ), stamp, mold, etc. In imprinting, since the graphics in the data entry film are 1 : 1 on the data template Copy, it does not have optical distortion problems in lithography, so data templates do not require OPC The amount of data that needs to be written during manufacturing is much smaller than the data mask. In addition, the imprint method does not have to worry about the diffraction effect, and the data template does not require the use of phase shifting technology, thereby avoiding the use of complex mask processes. More importantly, the imprint method makes the imprinted nanoscale (such as 1 nanometer to 100 Nano-) and data graphs that do not have microscale periodicity are possible. In general, because manufacturing data templates are easier than data masks, data templates are less expensive, so imprinted memories have lower data entry costs.

为了减少数据掩膜版的数目，本发明还提出一种三维偏置印录存储器（ three-dimensional offset-printed memory ，简称为 3D-oP ）。 3D-oP 通过偏置印录来录入数据。为了实现偏置印录，对应于不同存储层 / 数码位的掩膜图形被合并到一多区域数据掩膜版上。在不同的印录步骤中，晶圆相对于该多区域数据掩膜版的偏置量不同。因此，来自同一数据掩膜版的掩膜图形被印录到不同存储层 / 数码位的数据录入膜中。在同一 3D-oP 批次中，所有 3D-oP 芯片均由同一套数据掩膜版来印录。虽然芯片之间可能有不同的数码阵列序列，但是所有芯片均具有同样的数码阵列集合。本发明中，数码阵列由如下方式定义：每层数据录入膜含有多个位置，每个位置对应于一个存储元，每个位置处的数据图形代表一个数码值，这些数码值构成的阵列形成数码阵列。相应地，数码阵列序列是指一个 3D-oP 芯片中所有数码阵列（包括所有数据录入膜，即所有存储层和所有数码位）按照一定顺序（如按照离衬底的远近）形成的序列；数码阵列集合是指该 3D-oP 芯片中所有数码阵列的集合。根据定义，集合只与其所含元素有关，与顺序无关。 In order to reduce the number of data masks, the present invention also proposes a three-dimensional offset printing memory (three-dimensional Offset-printed memory (3D-oP for short). 3D-oP enters data by offset printing. In order to achieve offset printing, corresponding to different storage layers / The mask pattern of the digital bits is merged into a multi-region data mask. The offset of the wafer relative to the multi-region data mask is different in different printing steps. Therefore, mask patterns from the same data mask are printed to different storage layers. / Digital data is entered into the film. In the same 3D-oP batch, all 3D-oP The chips are printed by the same data mask. Although there may be different digital array sequences between chips, all chips have the same set of digital arrays. In the present invention, the digital array is defined as follows: each layer of data entry film contains a plurality of locations, each location corresponding to a memory element, and the data pattern at each location represents a digital value, and the array of these digital values forms a digital Array. Accordingly, the digital array sequence refers to one All digital arrays in the 3D-oP chip (including all data entry films, ie all memory layers and all digital bits) in a sequence (eg according to the distance from the substrate); digital array set refers to the 3D-oP A collection of all digital arrays in the chip. By definition, a collection is only relevant to the elements it contains, regardless of the order.

为了能在 3D-P 中写录定制数据，本发明还提出一种三维可写印录存储器（ three-dimensional writable printed memory ，简称为 3D-wP ）。它含有印录存储阵列和写录存储阵列。印录存储阵列存储内容数据。内容数据是出版物 ( 包括电影、电子游戏、地图、音乐库、图书库、软件等) 的数据，它通过印录法录入。印录法是一种并行数据录入方法，它主要包括光刻法和压印法等。写录存储阵列存储定制数据。定制数据包括如芯片序列号、密钥等定制信息。定制数据通过写录法录入。写录法是一种串行数据录入方法，它主要包括直接写入光刻法，如电子束光刻、激光束光刻或聚焦粒子束光刻等技术。在同一批次 3D-wP 中，所有存储器存储相同的内容数据，但可以存储不同的定制数据。为了保证产能，定制数据的总数据量应少于内容数据的总数据量的 1% 。 In order to be able to write customized data in 3D-P, the present invention also proposes a three-dimensional writable print memory ( Three-dimensional writable printed memory (3D-wP for short). It contains a printed storage array and a write storage array. The print storage array stores content data. Content data is publications (including movies, video games, maps, music libraries, library, software, etc.) The data is entered by the imprint method. The printing method is a parallel data entry method, which mainly includes photolithography and imprinting. Write storage array storage Custom data. Custom data includes custom information such as chip serial number, key, and so on. Custom data is entered by writing. The write method is a serial data entry method, which mainly includes direct writing photolithography, such as electron beam lithography, laser beam lithography or focused particle beam lithography. In the same batch In 3D-wP, all memories store the same content data, but can store different custom data. To ensure capacity, the total amount of data for custom data should be less than 1% of the total amount of data for the content data.

有益效果Beneficial effect

从上述方案可以看出，本发明具有以下有益效果： As can be seen from the above scheme, the present invention has the following beneficial effects:

实现低成本的海量出版； Achieve low-cost mass publishing;

降低数据录入成本； Reduce data entry costs;

降低数据掩膜版成本； Reduce the cost of data masks;

在印录存储器中写录定制数据。 Write custom data in the print memory.

附图说明DRAWINGS

图 1A 是一种 3D-MPROM 的截面图；图 1B 是该 3D-MPROM 的顶视图；图 1C 是另一种 3D-MPROM 的截面图。 Figure 1A is a cross-sectional view of a 3D-MPROM; Figure 1B is a top view of the 3D-MPROM; Figure 1C It is a cross-sectional view of another 3D-MPROM.

图 2 表示一块以往技术采用的专用型数据掩膜版。 Figure 2 shows a dedicated data mask used in the prior art.

图 3 表示一块本发明提出的共享型数据掩膜版。 Figure 3 shows a shared data mask proposed by the present invention.

图 4 表示 3D-P 晶圆上的一个印录场区。 Figure 4 shows a printed field on a 3D-P wafer.

图 5 是一块 F 节点数据掩膜版的顶视图。Figure 5 is a top view of an F- node data mask.

图 6 比较在几代半导体技术中的掩膜版成本和单位 GB 掩膜版成本（ C_GB ）。Figure 6 compares mask cost and unit GB mask cost (C _GB ) in several generations of semiconductor technology.

图 7 比较在几代半导体技术中、在不同发行量（ V ）下， 3D-P 的成本构成。 Figure 7 compares the cost structure of 3D-P over several generations of semiconductor technology at different throughputs (V).

图 8 表示在几代半导体技术中、 3D-P 的成本达到光碟替换阈值成本（ C_th ）时， 3D-P 的最低发行量（ V_th ）。8 shows generations of semiconductor technology, the cost of 3D-P reaches the disc replacement threshold cost (C _th), a minimum circulation of 3D-P (V _th).

图 9A -图 9C 表示一种实现压印法的各个步骤。 Figures 9A-9C show various steps for implementing the imprint method.

图 10A 和图 10B 是两种数据模版的顶视图。 Figures 10A and 10B are top views of two data templates.

图 11A 和图 11B 表示一种偏置印录法中使用的两个印录步骤。 Figures 11A and 11B show two printing steps used in the offset printing method.

图 12A 是一个多区域数据掩膜版的简单例子；图 12B 和图 12C 多区域数据掩膜版中两个数据掩膜区域分别代表的数码阵列 m(1) 、 m(2) 。 Figure 12A is a simple example of a multi-region data mask; Figure 12B and Figure 12C The two data mask areas in the multi-area data mask represent the digital arrays m(1), m(2), respectively.

图 13A 和图 13B 是同一 x2x1 3D-oP 批次中两个 3D-oP 芯片 18a 、 18b 的截面图。 Figure 13A and Figure 13B show two 3D-oP chips 18a in the same x2x1 3D-oP batch, Sectional view of 18b.

图 14A 和图 14B 是同一 x1x2 3D-oP 批次中两个 3D-oP 芯片 18c 、 18d 的截面图。 Figure 14A and Figure 14B show two 3D-oP chips 18c in the same x1x2 3D-oP batch, Sectional view of 18d.

图 15 表示一种 3D-oP 的电路框图。 Figure 15 shows a circuit block diagram of a 3D-oP.

图 16A 表示一种 x2x1 3D-oP 的电路框图；图 16B 表示一种 x1x2 3D-oP 的电路框图。 Figure 16A shows a circuit block diagram of x2x1 3D-oP; Figure 16B shows an x1x2 3D-oP Circuit block diagram.

图 17 是一种 x2x2 3D-oP 的截面图。 Figure 17 is a cross-sectional view of an x2x2 3D-oP.

图 18 表示一种 x2x2 3D-oP 所采用的多区域数据掩膜版，以及一个曝光场区内的所有芯片。 Figure 18 shows an x2x2 3D-oP The multi-area data mask used, as well as all the chips in an exposure field.

图 19 列出在 x2x2 3D-oP 的每个印录步骤后，每个芯片上每个数据录入膜中的数码阵列。 Figure 19 lists the x2x2 3D-oP After each printing step, each data on each chip is entered into the digital array in the film.

图 20 表示一种 x2x2 3D-oP 的电路框图。 Figure 20 shows a circuit block diagram of an x2x2 3D-oP.

图 21 是一种 x3x3x1 3D²-oP 封装的截面图。Figure 21 is a cross-sectional view of an x3x3x1 3D ² -oP package.

图 22 表示一种 3D²-oP 封装的电路框图。Figure 22 shows a block diagram of a 3D ^2- oP package.

图 23 表示一种 3D²-oP 封装所采用的多区域数据掩膜版，以及一个曝光场区内的所有芯片。Figure 23 shows a multi-region data mask used in a 3D ^2- oP package with all the chips in an exposure field.

图 24 列出在 3D²-oP 封装的每个印录步骤后，每个芯片上每个数据录入膜中的数码阵列。Figure 24 shows the digital array in each data entry film on each chip after each printing step in the 3D ^2- oP package.

图 25 列出一个 3D²-oP 批次中的三种 3D²-oP 封装。Figure 25 lists three 3D ² -oP packages in a 3D ² -oP batch.

图 26A 和图 26B 是同一 3D-wP 批次中两个芯片的截面图。 Figure 26A and Figure 26B are cross-sectional views of two chips in the same 3D-wP batch.

图 27A -图 27D 表示实现图 2A- 图 2B 中实施例的数据录入步骤。 Figures 27A-27D illustrate the data entry steps for implementing the embodiment of Figures 2A-2B.

图 28 是另一种 3D-wP 芯片的截面图。 Figure 28 is a cross-sectional view of another 3D-wP chip.

图 29 表示实现图 4 中实施例的数据录入步骤。 Figure 29 shows the data entry step for implementing the embodiment of Figure 4.

图 30 是一个具有良好数据安全性 3D-wP 的框图。 Figure 30 is a block diagram of a 3D-wP with good data security.

注意到，这些附图仅是概要图，它们不按比例绘图。为了显眼和方便起见，图中的部分尺寸和结构可能做了放大或缩小。在不同实施例中，相同的符号一般表示对应或类似的结构。 It is noted that the drawings are only schematic and are not drawn to scale. In order to be conspicuous and convenient, some of the dimensions and structures in the figures may be enlarged or reduced. In the different embodiments, the same symbols generally indicate corresponding or similar structures.

本发明的实施方式Embodiments of the invention

为了降低数据录入成本，本本发明提出一种三维印录存储器（ 3D-P ）。它是一种改进的 3D-MPROM 并采用了三种手段来降低数据录入成本： 1 ）使用共享型数据掩膜版； 2 ）采用压印法来印录数据； 3 ）使用偏置印录来减少数据掩膜版的数目。将其取名为'印录存储器'是为了突出这种以'印'来录入数据的方法，即印录法。在本发明中，'印录'是'掩膜编程'的另一种说法。 In order to reduce the data entry cost, the present invention proposes a three-dimensional imprinting memory (3D-P). It is an improvement 3D-MPROM uses three methods to reduce data entry costs: 1) use shared data mask; 2) use imprint method to print data; 3 Use offset printing to reduce the number of data masks. The name is called 'printing memory' in order to highlight the method of entering data by 'printing', that is, the printing method. In the present invention, 'printing' is another term for 'mask programming'.

本说明书在大部分情况下以 3D-MPROM （即存储元分布在三维空间中的 mask-ROM ）为例阐述具体实施例。本发明的精神可以很容易地推广到常规 mask-ROM （即存储元分布在二维平面上的 mask-ROM ）中。 Mask-ROM 的数据录入的主要方式为印录法。印录法包括光刻法和压印法等。相应地，除非有特别说明（如当上下文是在与模版进行比较时），掩膜编程中的'掩膜版'泛指任何印录工艺采用的、数据图形的承载装置，它可以是光刻法采用的掩膜版，也可以是压印法采用的模版（ template ，也被称为 master 、 stamp 或 mold ）。 In most cases, this manual uses 3D-MPROM (that is, a mask-ROM in which memory cells are distributed in three-dimensional space). The specific embodiments are explained by way of example. The spirit of the present invention can be readily extended to conventional mask-ROMs (i.e., mask-ROMs in which memory elements are distributed on a two-dimensional plane). Mask-ROM The main method of data entry is the printing method. The printing method includes photolithography and imprinting. Correspondingly, unless otherwise specified (such as when the context is compared with the template), the 'mask version' in mask programming refers to any data-bearing device used in the printing process, which can be photolithography. The mask used in the method can also be the template used in the imprint method ( Template , also known as master , stamp , or mold ).

共享型数据掩膜版 Shared data mask

3D-P 是一种改进的 3D-MPROM ，它使用共享型数据掩膜版来录入数据。图 3 表示一种共享型数据掩膜版 18A 上的掩膜图形。与图 2 中的专用型数据掩膜版 8A 不同，共享型数据掩膜版 18A 含有 16 个不同海量出版物（ MC₁-MC₁₆ ）的掩膜图形。在本实施例中，所有这些海量出版物 MC₁-MC₁₆ 均不重复。很明显，数据掩膜版 18A 的成本可以分摊到这 16 个海量出版物中。具体说来，海量出版物的数据掩膜版成本是单位 GB 掩膜版成本（ C_GB ，即单位 GB 数据所占的数据掩膜版面积对应的掩膜版之成本）和该海量出版物的数据量（以 GB 为单位）之积。对于熟悉本专业的人士来说，虽然图 3 中的数据掩膜版 18A 仅承载了 16 个海量出版物，随着技术的进步，一块数据掩膜版可以承载更多海量出版物。例如说，一块 45nm 的数据掩膜版可以承载～ 37GB 数据，或～ 70 部电影。3D-P is an improved 3D-MPROM that uses a shared data mask to record data. Figure 3 shows a mask pattern on a shared data mask 18A. Unlike the dedicated data mask 8A in Figure 2, the shared data mask 18A contains mask patterns for 16 different mass publications (MC ₁ -MC ₁₆ ). In the present embodiment, all of these mass publications MC ₁ -MC _{16 are} not repeated. Obviously, the cost of data mask 18A can be shared among the 16 massive publications. Specifically, the data mask cost of a large number of publications is the cost per unit GB mask (C _GB , which is the cost of the mask version corresponding to the data mask area of the unit GB data) and the mass publication. The product of the amount of data (in GB). For those familiar with the profession, although the data mask 18A in Figure 3 only carries 16 mass publications, as the technology advances, a data mask can carry more massive publications. For example, a 45nm data mask can carry ~37GB of data, or ~70 movies.

图 4 表示 3D-P 晶圆 0W 上的一个印录场区（ printing field ） 28 。印录场区 28 是指在步进重复印录（ step-and-repeat printing ）工艺流程中，一块掩膜版在一次印录后在晶圆上形成的图形区域。对于光刻法来说，印录场区是其曝光场区（ exposure field ）。注意到，晶圆 0W 含有多个重复的印录场区 28 。由于图 4 中的印录场区 28 由图 3 中的数据掩膜版 18A 印录形成，它存储 16 个不同海量出版物 MC₁-MC₁₆ 的数据。在本实施例中，这 16 个海量出版物 MC₁-MC₁₆ 均不重复。Figure 4 shows a printing field 28 on the 3D of the 3D-P wafer. The print field 28 refers to a graphic area formed on a wafer after a single print in a step-and-repeat printing process. For photolithography, the print field is its exposure field. It is noted that wafer 0W contains a plurality of repeating print field regions 28. Since the printed record field region 28 is formed in Figure 4 by the data recorded in the mask plate 18A in FIG. 3, which stores publication data 16 different mass of MC ₁ -MC _16. In this embodiment, the 16 mass publications MC ₁ -MC _{16 are} not repeated.

在将 3D-P 晶圆 0W 切割后，每个芯片可以仅存储单个海量出版物，或多个海量出版物。在图 4 中，每个印录场区 28 被切割为 4 个芯片 D1-D4 ，每个芯片存储多个不同海量出版物的数据：芯片 D1 存储 MC₁ 、 MC₂ 、 MC₅ 、 MC₆ 的数据，芯片 D2 存储 MC₃ 、 MC₄ 、 MC₇ 、 MC₈ 的数据，芯片 D3 存储 MC₉ 、 MC₁₀ 、 MC₁₃ 、 MC₁₄ 的数据，芯片 D4 存储 MC₁₁ 、 MC₁₂ 、 MC₁₅ 、 MC₁₆ 的数据。在本实施例中，处于相同印录场区中的不同芯片存储不重复的海量出版物数据。After cutting 3W of 3D-P wafers, each chip can store only a single mass publication, or multiple mass publications. In Figure 4, each of the print field areas 28 is cut into four chips D1-D4, each of which stores data for a plurality of different mass publications: chip D1 stores MC ₁ , MC ₂ , MC ₅ , MC ₆ Data, chip D2 stores data of MC ₃ , MC ₄ , MC ₇ , MC ₈ , chip D3 stores data of MC ₉ , MC ₁₀ , MC ₁₃ , MC ₁₄ , and chip D4 stores MC ₁₁ , MC ₁₂ , MC ₁₅ , MC ₁₆ The data. In this embodiment, different chips in the same footprint area store non-repeating mass publication data.

图 5 表示一块 F 节点数据掩膜版 18A ，它用来把数据印入图 1A 中的数据录入膜 6A 。该数据掩膜版 18A 含有一个掩膜元阵列' aa ' - ' bd '。每个掩膜元处图形的明或暗决定对应的存储元处数据开口的存在与否。在该实施例中，在掩膜元' aa '、' ad '、' bb '和' bc '处的明图形形成掩膜版开口 8aa 、 8ad 、 8bx 。在本申请中，数据掩膜版的尺寸 F 由它在晶圆上面形成的图形之尺寸来表示，而非它在数据掩膜版上的尺寸来表示。对于熟悉本专业的人士来说，由于光刻机对掩膜图形的缩小作用，掩膜版上的尺寸可以是晶圆上图形尺寸的数倍（如 4 倍）。Figure 5 shows an F- node data mask 18A which is used to print data into the data entry film 6A of Figure 1A. The data mask 18A contains a mask element array 'aa' - 'bd'. The brightness or darkness of the pattern at each mask element determines the presence or absence of a data opening at the corresponding memory element. In this embodiment, the mask patterns at the mask elements 'aa', 'ad', 'bb', and 'bc' form mask openings 8aa, 8ad, 8bx. In the present application, the size F of the data mask is represented by the size of the pattern it forms on the wafer, rather than its size on the data mask. For those skilled in the art, due to the reduction of the mask pattern by the lithography machine, the size on the reticle can be several times (for example, 4 times) the size of the pattern on the wafer.

在数据掩膜版 18A 上，其数据开口（如 8aa ）的最小特征尺寸 F 可以比 3D-P 的最小特征尺寸 f （如地址线的半周期）大，最好是 f 的两倍（参见美国专利 6,903,427 ）。相应地，数据掩膜版 18A 也被称为 xf （ x>1, 最好 ~2 ）掩膜版。事实上，对于几乎所有种类的 3D-P （包括采用隔离介质膜、电阻膜、额外掺杂膜等作为数据录入膜的 3D-P ）来说，其数据录入膜中的图形都可以通过 xf 掩膜版来印录。采用 xf 掩膜版可以极大地降低数据掩膜版的成本。比如，对于一个 45nm 的 3D-P 来说， 45nm 数据掩膜版之成本为 ~$140k ；而 90nm 数据掩膜版之成本仅为 ~$50k 。On data mask 18A, the minimum feature size F of its data opening (eg, 8aa) can be greater than the minimum feature size f of 3D-P (such as the half-cycle of the address line), preferably twice the value of f (see US Patent 6,903,427). Accordingly, data mask 18A is also referred to as a xf (x>1, preferably ~2) mask. In fact, for almost all kinds of 3D-P (including 3D-P using an isolation dielectric film, a resistive film, an additional doped film, etc. as a data entry film), the data in the data entry film can pass x f A mask is printed. Using the xf mask can greatly reduce the cost of the data mask. For example, for a 45nm 3D-P, the 45nm data mask costs ~$140k; the 90nm data mask costs only ~$50k.

图 6 比较了在几代半导体技术中的掩膜版成本和单位 GB 掩膜版成本（ C_GB ）。该图的横轴同时显示了数据掩膜版的最小特征尺寸 F （ =2f ）和 3D-P 的最小特征尺寸 f 。当 F 从 90nm 减小到 22nm 时，数据掩膜版的成本从 ~$50k 涨到 ~$260k 。另一方面，掩膜版数据量也由 ~9GB 涨到 ~155GB 。总的说来， C_GB 从 ~$6.7k/GB 降低到 ~$1.7k/GB 。注意到，由于 90nm 掩膜版处于量产阶段，其 C_GB 较低。Figure 6 compares mask cost and unit GB mask cost (C _GB ) in several generations of semiconductor technology. Simultaneously, the horizontal axis shows the data mask minimum feature size F (= 2 f) 3D-P and the minimum feature size f. When F is reduced from 90nm to 22nm, the cost of the data mask increases from ~$50k to ~$260k. On the other hand, the amount of mask data has also increased from ~9GB to ~155GB. In general, C _{GB has} been reduced from ~$6.7k/GB to ~$1.7k/GB. Note that since the 90nm mask is in mass production, its C _{GB is} lower.

作为一个例子，当 2f 掩膜版被用来电影数据时每部 DVD 格式电影（ ~4GB ）的掩膜版成本介于 ~$27k 和 ~$7k 之间；每部 BD 格式电影（ ~20GB ）的掩膜版成本介于 ~$135k 和 ~$34k 之间。这些数字比一般人想象的电影掩膜版成本低很多，它们比电影的制作成本相比很小，基本可以忽略。 As an example, when a 2f mask is used for movie data, the cost of a mask for each DVD format movie (~4GB) is between Between ~$27k and ~$7k; the cost of masks for each BD format movie (~20GB) is between ~$135k and ~$34k Between. These figures are much less expensive than the film masks that most people think of. They are small compared to the cost of film production and can be ignored.

图 7 比较在几代半导体技术中、在不同发行量（ V ）下， 3D-P 的成本构成。在不考虑版权费的情况下， 3D-P 成本包括存储器成本和数据录入成本。每个 f 节点有两根竖条，每个 f 节点有两根竖条，一根对应于发行量为 200k 的情形，另一根对应于发行量为 100k 的情形。每根竖条的底部代表单位 GB 的存储器成本（ C_存储），顶部代表单位 GB 的数据录入成本（ C_录入），其总高度代表单位 GB 的 3D-P 成本（ C_3D ）。该图中的各个数据根据如下公式计算：Figure 7 compares the cost structure of 3D-P over several generations of semiconductor technology at different throughputs (V). 3D-P costs include memory costs and data entry costs, regardless of royalties. Each f- node has two vertical bars, each f-node has two vertical bars, one corresponding to the case of a circulation of 200k and the other corresponding to a case of a circulation of 100k. The bottom of each bar represents the memory cost per unit GB (C _storage ), the top represents the data entry cost per unit GB (C _entry ), and the total height represents the 3D-P cost per unit GB (C _3D ). The individual data in the figure is calculated according to the following formula:

C_3D = C_存储 +C_录入，C _3D = C _storage + C _entry ,

其中， among them,

C_存储 = C_晶圆 /D_晶圆；C _storage = C _wafer / D _wafer ;

C_录入 = F_印录 × C_mask/V 。C _entry = F _print × C _mask /V.

这里， C_晶圆为晶圆成本， D_晶圆为一个晶圆上的所有有效数据量； F_印录代表印录成本因子，即印录成本（包括掩膜版、光刻胶等耗品以及各种印录资产的折旧）和掩膜版成本的比； V 为发行量，即所有使用该数据掩膜版来录入数据的芯片产量。Here, the C _wafer is the wafer cost, and the D _wafer is the total amount of data on one wafer; the F _printing represents the printing cost factor, that is, the printing cost (including mask, photoresist, etc.) The ratio of the depreciation of various printed assets to the cost of the mask; V is the circulation, that is, the yield of all chips that use the data mask to enter data.

从图 7 可以看出，随着 f 的减小， 3D-P 的成本逐渐降低。这与流行的想法不同。当 f 小于 45nm 时， 3D-P 的成本可以低于 $0.25/GB 。例如说，当发行量为 200k 时， 32nm 3D-P 的成本为 ~$0.25/GB ；当发行量为 100k 时， 22nm 3D-P 的成本为 ~$0.17/GB 。为了能替代光碟， 3D-P 的成本需要低于光碟替换阈值成本 C_th 。一般认为， C_th~$0.25/GB 。这要求 3D-P 的最小特征尺寸 f 小于 45nm 。As can be seen from Figure 7, as f decreases, the cost of 3D-P gradually decreases. This is different from popular ideas. When f is less than 45nm, the cost of 3D-P can be less than $0.25/GB. For example, when the circulation is 200k, the cost of 32nm 3D-P is ~$0.25/GB; when the circulation is 100k, the cost of 22nm 3D-P is ~$0.17/GB. In order to replace the disc, the cost of 3D-P needs to be lower than the disc replacement threshold cost C _th . It is generally believed that C _th ~$0.25/GB. This requires that the minimum feature size f of 3D-P be less than 45 nm.

图 8 表示在几代半导体技术中、 3D-P 的成本达到光碟替换阈值成本（ C_th ）时， 3D-P 的最低发行量（ V_th ）。 V_th 是一个重要参数，它决定不同 f 节点 3D-P 的市场定位。从该图可以看出，对于 32nm 3D-P 来说， V_th~200k ，它仅适合于大批量出版。对于 22nm 、 16nm 和 11nm 3D-P 来说， V_th 分别为 42k 、 31k 和 15k 。它们可以用于中批量出版。8 shows generations of semiconductor technology, the cost of 3D-P reaches the disc replacement threshold cost (C _th), a minimum circulation of 3D-P (V _th). V _th is an important parameter that determines the market positioning of different f- node 3D-P. As can be seen from the figure, for 32nm 3D-P, V _th ~200k, it is only suitable for mass production. For 22nm, 16nm and 11nm 3D-P, _Vth is 42k, 31k and 15k, respectively. They can be used for medium-volume publishing.

注意到，中等数据量或小数据量的出版物可以和海量出版物混合在同一 3D-P 中发行。总体说来， 3D-P 中存储的内容可以是运动图像（如电影、电视节目、视频资料、电子游戏等）、静止图像（如照片、数字地图等）、音频资料（如音乐、电子书等）、文字资料（如电子图书）、软件（如操作***）以及它们的资料库（如电影库、游戏库、照片库、地图库、音乐库、图书库和软件库等）。 It is noted that publications of medium or small amount of data can be distributed in the same 3D-P as a large number of publications. Overall, 3D-P The content stored in the file may be moving images (such as movies, television programs, video materials, video games, etc.), still images (such as photos, digital maps, etc.), audio materials (such as music, e-books, etc.), text materials (such as electronic Books), software (such as operating systems) and their databases (such as movie libraries, game libraries, photo libraries, map libraries, music libraries, library libraries, software libraries, etc.).

压印存储器 Imprint memory

为了降低数据录入成本，本发明还提出一种压印存储器（ imprinted memory ），尤其是三维压印存储器（ 3D-iP ）。就其最终的物理结构来说，压印存储器与 mask-ROM 完全相同，它们均利用其数据录入膜中的数据图形来存储数据。压印存储器与 mask-ROM 的不同之处是它们采用不同的数据录入法： mask-ROM 采用光刻法（photo-lithography），压印存储器采用压印法（imprint-lithography，也被称为nano-imprint lithography，简称为NIL）。但是，压印法采用的数据模版远比光刻法采用的数据掩膜版便宜。 In order to reduce the data entry cost, the present invention also proposes an imprinted memory (imprinted memory). ), especially 3D imprint memory (3D-iP). Imprint memory and mask-ROM for its final physical structure They are identical, they all use the data graphics in their data entry film to store data. The difference between imprinted memory and mask-ROM is that they use different data entry methods: mask-ROM Photo-lithography, imprint-lithography (also known as nano-imprint) Lithography, referred to as NIL). However, the data template used in the imprint method is much cheaper than the data mask used in photolithography.

压印法通过在模版（ template ）上施加压力，使压印胶（ imprint resist ）产生机械变形从而实现图形转换（参见 Chou 等著《 Imprint-lithography with 25-nanometer resolution 》， Science 杂志， 272 卷， 5258 号， 85-87 页）。压印法的例子包括热塑料压印法（ thermoplastic nano-imprint lithography ）、光照压印法（ photo nano-imprint lithography ）、电化学压印法（ electro-chemical nano-imprint lithography ）和激光帮助压印法（ laser-assisted direct imprint-lithography ）。压印法可以在整个晶圆上一次压印（ full-wafer imprint ），或者采用步进重复压印（ step-and-repeat imprint ）。 Embossing method by applying pressure on a template to make an imprint resist Produce mechanical deformation to achieve graphics conversion (see Chou et al. "Imprint-lithography with 25-nanometer resolution 》, Science Journal, 272, 5258, pp. 85-87). Examples of embossing methods include thermoplastic embossing (pigma) Nano-imprint lithography ), photo nano-imprint lithography, electrochemical imprinting Electro-chemical nano-imprint lithography ) and laser-assisted direct Imprint-lithography ). Imprinting can be performed on a full-wafer imprint on the entire wafer, or by step-and-repeat imprinting ( Step-and-repeat imprint ).

图 9A -图 9C 表示一种实现压印法的各个步骤。这些图是沿图 1 中 AA' 线的截面图。该些步骤被用来为图 1 中的存储器录入数据。该压印法是一热塑料压印法。其具体步骤如下。首先在一底膜（如地址线） 89 上形成一数据录入膜 87 ，然后在其上形成一压印胶（如一热塑料高分子材料， thermoplastic polymer ） 85 （图 9A ）。将一模版 81 （也被称为母版、印戳、模具等）和压印胶 85 接触并施加压力。之后，对压印胶 85 加温使其温度超过压印胶的玻璃化温度，这时模版 81 上的图形被压入到软化的压印胶 85 中。冷却后，模版 81 与晶圆分离（图 9B ）。最后，通过一个刻蚀步骤将压印胶 85 中的图形转换到数据录入膜 87 中（图 9C ）。 Figures 9A-9C show various steps for implementing the imprint method. These figures are along the AA' in Figure 1. A cross-sectional view of the line. These steps are used to enter data for the memory in Figure 1. The imprint method is a hot plastic stamping method. The specific steps are as follows. First, a data entry film is formed on a base film (e.g., address line) 89. Then, an embossing adhesive (such as a thermoplastic polymer material) is formed thereon (Fig. 9A). Will be a template 81 (Also known as master, stamp, mold, etc.) and embossing adhesive 85 contact and apply pressure. Thereafter, the embossing paste 85 is heated to a temperature exceeding the glass transition temperature of the embossing adhesive, and the stencil 81 The upper pattern is pressed into the softened embossing paste 85. After cooling, the stencil 81 is separated from the wafer (Fig. 9B). Finally, the pattern in the embossing paste 85 is converted to the data entry film by an etching step. Medium (Figure 9C).

模版 81 具有一个预先设置的拓扑图形。图 9A 中的模版 81 是用来压印图 1A 中存储层 16A 的数据录入膜 6A 。该模版 81 含有多个凸起 83 。这些凸起 83 从模版 81 的一个表面上突出，其尺寸在 1 纳米到 100 纳米之间。模版 81 中凸起 83 的存在与否决定了与之相对应的存储元之状态。比如说，在与存储元 5aa 对应的模版位置具有一凸起 83 ，则存储元 5aa 含有数据开口 6aa ，并处于' 1 '状态。另一方面，在与存储元 5ba 对应的模版位置没有凸起，则存储元 5ba 不含数据开口，并处于' 0 '状态。注意到，在压印步骤结束后，压印胶 85 中的图形与模版 81 中的图形刚好相反。 The template 81 has a preset topology graphic. The template 81 in Figure 9A is used to imprint the memory layer in Figure 1A. 16A data entry film 6A. The stencil 81 has a plurality of projections 83. These projections 83 protrude from one surface of the stencil 81 and are between 1 nm and 100 nm in size. stencil The presence or absence of the protrusion 83 in 81 determines the state of the corresponding memory cell. For example, if there is a bump 83 at the template position corresponding to the storage element 5aa, the storage element 5aa contains the data opening. 6aa and in the '1' state. On the other hand, if there is no bump at the position of the template corresponding to the storage element 5ba, the storage element 5ba does not contain the data opening and is at '0'. 'Status. It is noted that the pattern in the embossing paste 85 is exactly the opposite of the pattern in the stencil 81 after the embossing step is completed.

图 10A 和图 10B 表示两种数据模版 81 ，它们均可以用来形成图 1A 中的数据图形。图 10A 中的数据模版 81 应用了数据掩膜版中 xf （ x>1 ，最好 ~2 ）掩膜版（参见美国专利 6,903,427 ）的精神，即模版 81 的最小特征尺寸 F 可以比地址线的半周期（或宽度） f 大，最好是 f 的两倍。而且，相邻的突起（如位置 5bb 、 5bc 、 5cc ）还可以合并在一起。相应地，数据模版 81 也被称为 xf 模版。例如说，一个 90nm 的数据模版可以为一个 45nm 的压印存储器录入数据。这可以进一步降低数据模版的成本。在该实施例中，凸起 83 具有矩形形状。 Figures 10A and 10B show two data templates 81 which can all be used to form the data pattern of Figure 1A. Figure The data template in 10A 81 applies the spirit of the xf ( x>1 , preferably ~2 ) mask in the data mask (see US Patent 6,903,427), ie the template 81 The minimum feature size F can be greater than the half-cycle (or width) f of the address line, preferably twice the value of f. Moreover, adjacent protrusions (such as positions 5bb, 5bc, 5cc) ) can also be merged together. Accordingly, the data template 81 is also referred to as an xf template. For example, a 90nm data template can be a 45nm The imprinted memory enters data. This can further reduce the cost of the data template. In this embodiment, the projections 83 have a rectangular shape.

图 10B 表示另一种数据模版 81 。其凸起 83 （如位置 5aa 处）具有圆柱形形状。该圆柱形的最小特征尺寸 F 也可以比地址线的半周期（或宽度） f 大。除此之外，凸起 83 还可以具有圆锥形形状和金字塔形形状等。圆柱形的凸起 83 尤其适合用电子束直接写的方法来形成。很明显，数据模版 81 也可以应用共享型数据掩膜版的精神，为一共享型数据模版，即一个数据模版 81 承载多个不同海量出版物的数据。 Figure 10B shows another data template 81. Its raised 83 (such as position 5aa Where) has a cylindrical shape. The cylindrical minimum feature size F can also be larger than the half cycle (or width) f of the address line. In addition to this, the protrusion 83 It may also have a conical shape, a pyramid shape, or the like. The cylindrical projections 83 are particularly suitable for forming by direct writing by electron beam. Obviously, the data template 81 It is also possible to apply the spirit of a shared data mask to a shared data template, ie a data template 81 carrying data from a number of different mass publications.

压印法的主要优势是其数据模版非常廉价。由于印录法没有光刻法的光学失真问题，其数据录入膜中的图形是数据模版上图形的 1 ： 1 拷贝，因此其数据模版上每个凸起都可以具有相同的形状，不需要根据它周围凸起的分布情况而进行光学修正。对于压印存储器中的每个数据位，数据模版只需要一位数据来定义凸起的存在与否。与之比较，对于 mask-ROM 中的一个数据位，数据掩膜版需要多位数据来定义数据开口的形状。对于同样的存储器数据量，制造数据模版所需写入的数据量远远小于数据掩膜版。此外，压印法也不用担心衍射效应，不需要使用相位移技术，从而避免采用复杂的掩膜版工艺。更重要的是，数据模版使印录具有纳米尺度（如 1 纳米到 100 纳米）、且不具有微米尺度内周期性的数据图形成为可能。总的说来，由于制造数据模版比数据掩膜版容易，数据模版成本更低，故压印存储器可以具有较低的数据录入成本。 The main advantage of imprinting is that its data templates are very cheap. Since the printing method has no optical distortion problem of photolithography, the pattern in the data entry film is the pattern on the data template 1 : 1 Copy, so each protrusion on the data template can have the same shape, without the need for optical correction based on the distribution of the protrusions around it. For each data bit in the imprint memory, the data template requires only one bit of data to define the presence or absence of a bump. Compared with it, for Mask-ROM In one of the data bits, the data mask requires multiple bits of data to define the shape of the data opening. For the same amount of memory data, the amount of data written to make a data template is much smaller than the data mask. In addition, the imprint method does not have to worry about the diffraction effect, and does not require the use of phase shifting techniques, thereby avoiding the use of complex mask processes. More importantly, the data template enables the imprint to have a nanoscale (eg 1 nanometer to 100 Nano), and does not have periodic data patterns in the micrometer scale becomes possible. In general, because manufacturing data templates are easier than data masks and data templates are less expensive, imprinted memories can have lower data entry costs.

三维偏置印录存储器 Three-dimensional offset printing memory

为了减少数据掩膜版的数目，本发明提出一种三维偏置印录存储器（ 3D-oP ）。它通过偏置印录法（offset-printing）来录入数据。偏置印录法是印录法中的一种。图 11A 和图 11B 表示一种偏置印录法中使用的两个印录步骤。它采用一块多区域数据掩膜版 8 。在该实施例中，多区域数据掩膜版 8 含有两个不同存储层 16A 、 16B 的掩膜图形。它们分别位于数据掩膜版区域 8a 、 8b 中。 In order to reduce the number of data masks, the present invention proposes a three-dimensional offset printing memory (3D-oP) ). It enters data by offset-printing. The offset printing method is one of the printing methods. Figure 11A and Figure 11B Represents two printing steps used in offset printing. It uses a multi-region data mask 8 . In this embodiment, the multi-region data mask 8 contains two

different memory layers

16A, 16B. Mask graphic. They are located in the

data mask areas

8a, 8b, respectively.

偏置印录法包括如下两个印录步骤。在第 1 印录步骤（见图 11A ，如印录第一存储层 16A 的光刻步骤 A ）时，芯片 18a 的原点 O_18a 与数据掩膜区域 8a 的原点 O_M 对齐。在曝光步骤 E_1a 时，数据掩膜区域 8a 被印录到芯片 18a 中存储层 16A 的数据录入膜 6A 中；在曝光步骤 E_1b 时，数据掩膜区域 8b 被印录到芯片 18b 中存储层 16A 的数据录入膜 6A 中。The offset printing method includes the following two printing steps. In the first printing step (see Fig. 11A, if the photolithography step A of the first memory layer 16A is printed), the origin O _{18a of the} chip 18a is aligned with the origin O _{M of the} data mask region 8a. At the exposure step E _1a , the data mask area 8a is printed into the data entry film 6A of the memory layer 16A in the chip 18a; at the exposure step _E1b , the data mask area 8b is printed to the memory layer of the chip 18b. The data of 16A is entered in the film 6A.

在第 2 印录步骤（见图 11B ，如印录第二存储层 16B 的光刻步骤 B ）时，晶圆 9 相对于它在第 1 印录步骤时的对准位置偏置了距离 S_y 。此处用 d_y 表示芯片 18a 和芯片 18b 之间的距离。如果 S_y=d_y ，则芯片 18b 的原点 O_18b 与原点 O_M 对齐。在曝光步骤 E_2a 时，数据掩膜区域 8a 被印录到芯片 18b 中存储层 16B 的数据录入膜 6B 中。At the second printing step (see Fig. 11B, if the photolithography step B of the second memory layer 16B is printed), the wafer 9 is offset by a distance S _y with respect to its alignment position at the first printing step. . Here, d _{y is used to} indicate the distance between the chip 18a and the chip 18b. If S _y =d _y , the origin O _{18b of} the chip 18b is aligned with the origin O _M . At the time of exposure step E _2a , the data mask area 8a is printed in the data entry film 6B of the memory layer 16B in the chip 18b.

在对下一个曝光场区（ exposure field ） E_2b 曝光时，只要步进距离 D_y 是 d_y 的两倍，即 D_y=2d_y ，则数据掩膜区域 8b 将被印录到芯片 18a 中存储层 16B 之数据录入膜 6B 中。最后，当完成上述两个光刻步骤 A 、 B 之后，在芯片 18a 中，数据掩膜区域 8a 、 8b 被分别印录到存储层 16A 、 16B 之数据录入膜 6A 、 6B 中；芯片 18b 中，它们被分别印录到存储层 16B 、 16A 之数据录入膜 6B 、 6A 中。When exposing the next exposure field E _2b , as long as the step distance D _y is twice d _y , that is, D _y = 2d _y , the data mask area 8b will be printed on the chip 18a. The data of the storage layer 16B is recorded in the film 6B. Finally, after the above two photolithography steps A, B are completed, in the chip 18a, the

data mask regions

8a, 8b are respectively printed into the

data entry films

6A, 6B of the memory layers 16A, 16B; in the chip 18b, They are printed in the

data entry films

6B, 6A of the memory layers 16B, 16A, respectively.

图 12A 是一个多区域数据掩膜版 8 的简单例子。每个数据掩膜区域 8a 、 8b 含有一个掩膜元阵列' aa ' - ' bd '。在数据掩膜区域 8a 中，在掩膜元' ac '、' bb '、' ba '处的明图形形成掩膜开口 8ac 、 8bx 。在数据掩膜区域 8b 中，在掩膜元' aa '、' ad '、' bb '处的明图形形成掩膜开口 8'aa 、 8'ad 、 8'bb 。如果采用如下定义：暗掩膜图形代表' 0 '，明掩膜图形代表' 1 '，则数据掩膜区域 8a 中每个掩膜元所代表的数码值值构成一个数码阵列 m(1) （图 12B ），数据掩膜区域 8b 中每个掩膜元所代表的数码值构成另一个数码阵列 m(2) （图 12C ）。 Figure 12A is a simple example of a multi-region data mask 8. Each data mask

area

8a, 8b Contains a mask element array 'aa ' - ' bd '. In the data mask region 8a, the mask pattern at the mask elements 'ac', 'bb', 'ba' forms a mask opening 8ac, 8bx. In the data mask area 8b, the mask patterns at the mask elements 'aa', 'ad', 'bb' form mask openings 8'aa, 8'ad, 8'bb. If the following definition is used: the dark mask pattern represents '0' and the bright mask pattern represents '1', then the digital value represented by each mask element in the data mask area 8a constitutes a digital array m(1) ( Figure 12B), the digital value represented by each mask element in the data mask area 8b constitutes another digital array m(2) (Fig. 12C).

图 13A 和图 13B 表示同一 x2x1 3D-oP 批次中的两个 3D-oP 芯片 18a 、 18b 。在一个 3D-oP 批次中，所有芯片都由同样一套掩膜版制造，它们均含有相同的三维框架。这里，三维框架包括三维堆中的所有地址线，但是不含数据录入膜。在这个实施例中，芯片 18a 和 18b 中的数据均由同一数据掩膜版 8 印录。图 8A 表示芯片 18a 的 x2x1 三维堆 16a 。存储层 16A 的数据录入膜 6A 由数据掩膜区域 8a 印录；存储层 16B 的数据录入膜 6B 由数据掩膜区域 8b 印录。在 3D-oP 芯片 18a 中，存储层 16A 中所有存储元存储的数码值构成数码阵列 p_18a[1] ，存储层 16B 中所有存储元存储的数码值构成数码阵列 p_18a[2] 。如果采用如下定义：无数据开口代表' 0 '，有数据开口代表' 1 '，则数码阵列 p_18a[1] 和图 12B 中的数码阵列 m(1) 相同，即 p_18a[1]= m(1) ；数码阵列 p_18a[2] 和图 12C 中的数码阵列 m(2) 相同，即 p_18a[2]= m(2) 。另一方面，图 8B 表示芯片 18b 的 x2x1 三维堆 16b 。在芯片 18b 中，存储层 16A 的数据录入膜 6A 由数据掩膜区域 8b 印录；存储层 16B 的数据录入膜 6B 由数据掩膜区域 8a 印录。因此，对于芯片 18b 来说， p_18b[1]= m(2) ； p_18b[2]= m(1) 。Figures 13A and 13B show two 3D-

oP chips

18a, 18b in the same x2x1 3D-oP batch. In a 3D-oP batch, all chips are made from the same set of masks, all of which contain the same 3D frame. Here, the three-dimensional framework includes all of the address lines in the three-dimensional stack, but does not contain a data entry film. In this embodiment, the data in

chips

18a and 18b are both printed by the same data mask 8. Figure 8A shows an x2x1 three-dimensional stack 16a of chip 18a. The data entry film 6A of the memory layer 16A is printed by the data mask area 8a; the data entry film 6B of the memory layer 16B is printed by the data mask area 8b. In the 3D-oP chip 18a, the digital values stored by all the memory cells in the memory layer 16A constitute the digital array p _18a [1], and the digital values stored in all the memory cells in the memory layer 16B constitute the digital array p _18a [2]. If the following definition is used: no data opening represents '0' and a data opening represents '1', the digital array p _18a [1] is identical to the digital array m(1) in Figure 12B, ie p _18a [1]= m (1); The digital array p _18a [2] is identical to the digital array m(2) in Figure 12C, ie p _18a [2] = m(2) . On the other hand, Fig. 8B shows the x2x1 three-dimensional stack 16b of the chip 18b. In the chip 18b, the data entry film 6A of the memory layer 16A is printed by the data mask area 8b; the data entry film 6B of the memory layer 16B is printed by the data mask area 8a. Therefore, for chip 18b, p _18b [1] = m(2) ; p _18b [2] = m(1) .

在该 3D-oP 批次中，每个 3D-oP 芯片的所有数码阵列（包括所有数据录入膜，包括所有存储层和所有数码位）按照一定顺序（按照离衬底的远近，从近到远）排列形成一数码阵列序列 S 。该数码阵列的集合被称为数码阵列集合 {S} 。根据其定义，集合只和其中的元素有关，与元素的排列顺序无关。对于图 13A 和图 13B 的芯片 18a 和 18b 来说，其数码阵列序列可以表达为： In this 3D-oP batch, each 3D-oP All digital arrays of the chip (including all data entry films, including all memory layers and all digital bits) are arranged in a certain order (in terms of distance from the substrate, from near to far) to form a digital array sequence. . The collection of digital arrays is called the digital array collection {S}. According to its definition, a collection is only related to its elements, regardless of the order in which the elements are arranged. For chip 18a and Figure 13A and Figure 13B For 18b, its digital array sequence can be expressed as:

S_18a = (p_18a[1], p_18a[2]) = (m(1), m(2)) ；S _18a = (p _18a [1], p _18a [2]) = (m(1), m(2));

S_18b = (p_18b[1], p_18b[2]) = (m(2), m(1)) ；S _18b = (p _18b [1], p _18b [2]) = (m(2), m(1));

其中， {S_18a} = {S_18b} ，但 S_18a ≠ S_18b 。Where {S _18a } = {S _18b } , but S _18a ≠ S _18b .

可以看出，芯片 18a 和芯片 18b 具有相同的数据阵列集合，但是不同的数据阵列序列。为读出同一数据，需要访问芯片 18a 和 18b 不同的存储层。 It can be seen that the chip 18a and the chip 18b Have the same set of data arrays, but different sequences of data arrays. In order to read the same data, it is necessary to access different storage layers of

chips

18a and 18b.

偏置印录还可以应用到采用 n 位元的 3D-MPROM 中。类似地，对应于不同数码位的掩膜图形被合并到一多区域数据掩膜版中。在不同的印录步骤中，晶圆相对于该多区域数据掩膜版的偏置量不同。因此，来自同一数据掩膜版的数据图形被印录到不同数码位的数据录入膜中。图 14A 和图 14B 表示同一 x1x2 3D-oP 批次中的两个 3D-oP 芯片 18c 、 18d 。 Offset printing can also be applied to 3D-MPROM with n bits Medium. Similarly, mask patterns corresponding to different digital bits are merged into a multi-region data mask. The offset of the wafer relative to the multi-region data mask is different in different printing steps. Therefore, data patterns from the same data mask are printed into the data entry film of different digital bits. Figure 14A and Figure 14B Represents two 3D-

oP chips

18c, 18d in the same x1x2 3D-oP batch.

图 14A 表示芯片 18c 的 x1x2 三维堆 16c 。存储层 16C 上的每个存储元（如 5aa ）存储两个数码位：第 1 和第 2 数码位。第 1 数码位由第一数据录入膜 6C 存储，它是一层额外掺杂膜 3i ；第 2 数码位由第二数据录入膜 6D 存储，它是一层电阻膜 3r 。第 1 数码位的数据录入膜 6C 由数据掩膜区 8a 印录而来，第 2 数码位的数据录入膜 6D 由数据掩膜区 8b 印录而来。在 3D-oP 芯片 18c 的第一存储层 16C 中，其第 1 数码位所存储的数码值构成数码阵列 p_18c[1,1] ，其第 2 数码位所存储的数码值构成数码阵列 p_18a[1,2] 。这里， p_18c[i,j] 是指芯片 18c 中第 i 个存储层的第 j 个数码位所存储的数码阵列。如果采用如下定义：有额外掺杂代表' 0 '，无额外掺杂代表' 1 '；有电阻膜代表' 0 '，无电阻膜代表' 1 '，则数码阵列 p_18c[1,1] 与图 12B 中的数码阵列 m(1) 相反，即 p_18c[1,1] = - m(1) ；数码阵列 p_18c[1,2] 与图 12C 中的数码阵列 m(2) 相同，即 p_18c[1,2] = m(2) 。这里，符号' - '表示相反，即' 0 '和' 1 '互换。由于数码阵列中的二进制值可以随着二进制值的定义而改变，因此数码阵列的正负没有太多意义。在本申请中，只要两个数码阵列中所有二进制值均相同或相反，则认为这两个数码阵列等同。另一方面，图 14B 表示芯片 18d 的 x1x2 三维堆 16d 。在芯片 18d 的第一存储层 16C 中，其第 1 数码位的数据录入膜 6C 由数据掩膜区 8b 印录，第 2 数码位的数据录入膜 6D 由数据掩膜区 8a 印录。因此，对于芯片 18d 来说， p_18d[1,1] = - m(2) ； p_18d[1,2] = -m(1) 。Figure 14A shows an x1x2 three-dimensional stack 16c of chip 18c. Each memory element (such as 5aa) on storage layer 16C stores two digital bits: the 1st and 2nd digits. The first digital bit is stored by the first data entry film 6C, which is an additional doped film 3i; the second digital bit is stored by the second data entry film 6D, which is a resistive film 3r. The data entry film 6C of the first digital bit is printed by the data mask area 8a, and the data entry film 6D of the second digital bit is printed by the data mask area 8b. In the first memory layer 16C of the 3D-oP chip 18c, the digital value stored in the first digital bit constitutes the digital array p _18c [1, 1], and the digital value stored in the second digital bit constitutes the digital array p _18a [1,2]. Here, p _18c [i, j] refers to a digital array in which the j-th digital bit of the i-th storage layer in the chip 18c is stored. If the following definition is used: there is an additional doping for '0', no additional doping for '1'; a resistive film for '0', and a resistive film for '1', then the digital array p _18c [1,1] The digital array m(1) in Fig. 12B is reversed, that is, p _18c [1,1] = - m(1); the digital array p _18c [1, 2] is the same as the digital array m(2) in Fig. 12C, that is, p _18c [1,2] = m(2) . Here, the symbol ' - ' indicates the opposite, that is, ' 0 ' and ' 1 ' are interchanged. Since the binary values in a digital array can change with the definition of a binary value, the positive and negative of the digital array does not make much sense. In the present application, the two digital arrays are considered equivalent as long as all binary values in the two digital arrays are the same or opposite. On the other hand, Fig. 14B shows the x1x2 three-dimensional stack 16d of the chip 18d. In the first memory layer 16C of the chip 18d, the data entry film 6C of the first digital bit is printed by the data mask area 8b, and the data entry film 6D of the second digital bit is printed by the data mask area 8a. Therefore, for chip 18d, p _18d [1,1] = - m(2) ; p _18d [1,2] = -m(1) .

因此，对于图 14A 和图 14B 的芯片 18c 和 18d 来说，其数码阵列序列可以表达为： Therefore, for

chips

18c and 18d of Figures 14A and 14B In other words, its digital array sequence can be expressed as:

S_18c = (p_18c[1,1], p_18c[1,2]) = (-m(1), m(2)) ；S _18c = (p _18c [1,1], p _18c [1,2]) = (-m(1), m(2)) ;

S_18d = (p_18d[1,1], p_18d[1,2]) = (-m(2), m(1)) ；S _18d = (p _18d [1,1], p _18d [1,2]) = (-m(2), m(1)) ;

其中， {S_18c} = {S_18d} ，但是 S_18c ≠ S_18d 。Where {S _18c } = {S _18d } , but S _18c ≠ S _18d .

可以看出，芯片 18c 和芯片 18d 具有相同的数据阵列集合，但是不同的数据阵列序列。对于同一输入地址来说，输出中输出位的顺序需要交换。 It can be seen that the chip 18c and the chip 18d Have the same set of data arrays, but different sequences of data arrays. For the same input address, the order of the output bits in the output needs to be swapped.

图 15 表示一种 3D-oP 的电路框图。它含有一 xMxn 三维堆 16 和一可设置输入 / 输出电路 24 。三维堆 16 含有 M × n 个数码阵列。其中，在第 i 存储层中第 j 个数码位的数码阵列由 p[i,j] （ 0≤i≤M ， 0≤j≤n ）表示。可设置输入 / 输出电路 24 还含有一序列存储器 22 。该存储器 22 存储与该 3D-oP 芯片中数码阵列序列相关的信息。一个与数码阵列序列相关的信息是芯片序列号。芯片序列号直接和芯片在晶圆上的位置相关，它可以用来提取芯片的数码阵列序列信息。序列存储器 22 最好是一嵌入式非易失性存储器。例如说，它可以是直接写入存储器、激光编程熔丝和 / 或电编程存储器。对于直接写入存储器存储器来说，与数码阵列序列相关的信息在生产过程中写入；对于激光编程熔丝来说，与数码阵列序列相关的信息在生产过程之中或之后写入；对于电编程存储器来说，与数码阵列序列相关的信息在生产过程后写入。 Figure 15 shows a circuit block diagram of a 3D-oP. It contains an xMxn 3D heap 16 and a settable input / Output circuit 24 . The three-dimensional stack 16 contains M × n digital arrays. Wherein, the digital array of the jth digital digit in the i-th storage layer is p[i,j] (0≤i≤M, 0 ≤ j ≤ n ) indicates. The settable input/output circuit 24 also includes a sequence of memories 22 . The memory 22 is stored with the 3D-oP Information about the sequence of digital arrays in the chip. One piece of information related to the sequence of digital arrays is the chip serial number. The chip serial number is directly related to the position of the chip on the wafer, which can be used to extract the digital array sequence information of the chip. Sequence memory 22 is preferably an embedded non-volatile memory. For example, it can be directly written to memory, laser programming fuses and / Or electrically programming memory. For direct write to the memory memory, information related to the sequence of the digital array is written during production; for laser programming fuses, information related to the sequence of the digital array is written during or after the production process; For programming memory, information related to a sequence of digital arrays is written after the production process.

根据与数码阵列序列相关的信息，可设置输入 / 输出电路 24 可以改变外部输入 / 输出 28 中的输入，也可以改变内部输入 / 输出 26 的输出，从而使外部输入 / 输出 28 与数码阵列序列无关。换句话说，在同一批次的所有 3D-oP 中，虽然它们可能有不同数码阵列序列，但是对于用户来说，它们具有相同外部输入 / 输出 28 。图 16A- 图 16B 披露了 3D-oP 电路的更多细节。 The input/output circuit 24 can be set to change the external input/output according to information related to the digital array sequence. The input in the middle can also change the output of the internal input/output 26 so that the external input/output 28 is independent of the digital array sequence. In other words, all 3D-oP in the same batch Although they may have different digital array sequences, they have the same external input/output 28 for the user. Figure 16A- Figure 16B discloses 3D-oP More details of the circuit.

图 16A 表示一种图 13A 和图 13B 中 x2x1 3D-oP 18 的电路框图。该图显示了其输入地址解码器 20I 。三维堆 16 中的存储层 16A 、 16B 分别存储了数码阵列 p[1] 、 p[2] 。这里，由于每个存储元只存储一个数码位，数码阵列的表示式简化成了 p[i] （ 0≤i≤M ）。输入地址解码器 20I 对内部输入地址 26 进行解码。例如，如果内部输入地址 26 的最高位为' 0 '，则数码阵列 p[1] 被访问；反之，数码阵列 p[2] 被访问。可设置输入 / 输出电路 24 可以根据与数码阵列序列相关的信息，改变外部输入地址 28 。对于芯片 18a 来说，内部输入地址 26 和外部输入地址 28 相同；对于芯片 18b 来说，内部输入地址 26 和外部输入地址 28 的最高位正好相反。 Figure 16A shows an x2x1 3D-oP 18 in Figure 13A and Figure 13B. Circuit block diagram. The figure shows its input address decoder 20I. The memory layers 16A and 16B in the three-dimensional stack 16 store the digital arrays p[1] and p[2], respectively. . Here, since each memory cell stores only one digital bit, the representation of the digital array is simplified to p[i] ( 0 ≤ i ≤ M ). Input Address Decoder 20I for Internal Input Address 26 Decode. For example, if the highest bit of the internal input address 26 is '0', the digital array p[1] is accessed; otherwise, the digital array p[2] is accessed. Input/output circuits can be set up 24 The external input address can be changed according to the information associated with the digital array sequence. For chip 18a, internal input address 26 is the same as external input address 28; for chip 18b For example, the internal input address 26 and the highest bit of the external input address 28 are just the opposite.

图 16B 表示一种图 14A 和图 14B 中 x1x2 3D-oP 18 的电路框图。该图显示了输出缓冲区 20O 。三维堆 6 存储与第 1 和第 2 数码位对应的数码阵列 p[1,1] 和 p[1,2] 。输出缓冲区 20O 含有多个输出组 21 、 21'… 。每个输出组输出存储在同一存储元中的所有数码位。例如说，输出组 21 含有数码位 21a 、 21b 。其中，输出数码位 21a 输出存储在一个存储元中的第 1 数码位，输出数码位 21b 输出存储在同一存储元的第 2 数码位。可设置输入 / 输出电路 24 可以根据与数码阵列序列相关的信息，改变输出缓冲区 20O 中每个输出组 21 的输出数码位顺序。对于芯片 18c 来说，外部输出 28 和内部输出 26 相同；对于芯片 18d 来说，每个输出组（如 21 ）中的输出数码位顺序正好相反。 Figure 16B shows an x1x2 3D-oP 18 in Figures 14A and 14B. Circuit block diagram. The figure shows the output buffer 20O. The 3D stack 6 stores the digital arrays p[1,1] and p[1,2] corresponding to the 1st and 2nd digits. Output buffer 20O Contains multiple output groups 21, 21'... Each output group outputs all digits stored in the same bank. For example, output group 21 contains

digital bits

21a, 21b. Where the output digital position 21a outputs the first digit stored in a bank, and the output digit 21b outputs the second digit stored in the same bank. Input/output circuits can be set up 24 The output digital bit order of each output group 21 in the output buffer 20O can be changed based on information related to the digital array sequence. For chip 18c, external output 28 and internal output 26 The same; for chip 18d, the output digits in each output group (such as 21) are in the reverse order.

偏置印录到不同存储层的方法（图 13A 和图 13B ）可以与偏置印录到不同数码位的方法（图 14A 和图 14B ）结合起来。具体说来，不同存储层和不同数码位的掩膜图形合并到一多区域数据掩膜版上。在不同的印录步骤中，晶圆相对于该多区域数据掩膜版的偏置量不同。因此，来自同一数据掩膜版的数据图形被印录到不同存储层和不同数码位的数据录入膜中。图 17 披露了这样一个例子。该 x2x2 3D-oP 18e 含有两个存储层 16A 、 16B ，且每个存储元存储两个数码位：第 1 和第 2 数码位。该实施例含有 4 个数据录入膜，它们分别存储如下数码阵列：存储层 16A 中的第 1 数码位存储 p[1,1] ；存储层 16A 中的第 2 数码位存储 p[1,2] ；存储层 16B 中的第 1 数码位存储 p[2,1] ；存储层 16B 中的第 2 数码位存储 p[2,2] 。 The method of offsetting the printing to different storage layers (Fig. 13A and Fig. 13B) can be used to offset the printing to different digital digits (Fig. 14A and Figure 14B )Combined. Specifically, mask patterns of different memory layers and different digital bits are combined onto a multi-region data mask. The offset of the wafer relative to the multi-region data mask is different in different printing steps. Therefore, from the same data mask Data graphics are printed into data entry films of different memory layers and different digital bits. Figure 17 discloses an example of this. The x2x2 3D-oP 18e contains two

storage layers

16A, 16B And each memory element stores two digital bits: the 1st and 2nd digits. This embodiment contains four data entry films which respectively store the following digital array: the first digital bit storage in the storage layer 16A p[1,1] ; the second digit in the storage layer 16A stores p[1,2]; the first digit in the storage layer 16B stores p[2,1]; the second in the storage layer 16B The digital bit stores p[2,2].

图 18 中左边的图表示该 x2x2 3D-oP 18 所采用的多区域数据掩膜版 8 。它含有 4 个数据掩膜区域，其数码阵列分别是 m(1)-m(4) 。该多区域数据掩膜版 8 的原点是 O_M 。图 18 中右边的图形表示在一个 3D-oP 晶圆 9 上一个曝光场区 E 内的所有芯片 D[1]-D[4] 。这些芯片各自的原点是 O₁-O₄ 。由于芯片 D[1]-D[4] 由一数据掩膜版 8 偏置印出，它们属于同一 3D-oP 批次。The left-hand diagram in Figure 18 shows the multi-region data mask 8 used by the x2x2 3D-oP 18. It contains 4 data mask areas, the digital array of which is m(1)-m(4). The origin of the multi-region data mask 8 is O _M . The graph on the right in Figure 18 shows all of the chips D[1]-D[4] in an exposure field E on a 3D-oP wafer 9. The origin of each of these chips is O ₁ -O ₄ . Since the chips D[1]-D[4] are offset by a data mask 8, they belong to the same 3D-oP batch.

图 19 列出在 x2x2 3D-oP 18 的每个印录步骤后，每个芯片上每个数据录入膜存储的数码阵列。该表的第 3 列列出了在每个印录步骤时， O_M 所对准的芯片原点。本实施例的 4 个数据录入膜需要 4 次印录步骤。在第 1 印录步骤（形成 p[1,1] ）时， O_M 对准芯片 D[1] 的原点 O₁ ，芯片 D[1]-D[4] 的数码阵列 p[1,1] 分别为 m(1)-m(4) 。在第 2 印录步骤（形成 p[1,2] ）时， O_M 对准芯片 D[2] 的原点 O₂ 。只要 y 方向上的步进距离 D_y 是芯片 D[1] 和 D[2] 距离 d_y 的 2 倍，即 D_y=2d_y ，则芯片 D[1]-D[4] 的数码阵列 p[1,2] 分别为 m(2), m(1), m(4), m(3) 。在第 3 印录步骤（形成 p[2,1] ）时， O_M 对准芯片 D[3] 的原点 O₃ 。只要 x 方向上的步进距离 D_x 是芯片 D[3] 和 D[1] 距离 d_x 的 2 倍，即 D_x=2d_x ，则芯片 D[1]-D[4] 的数码阵列 p[2,1] 分别为 m(3), m(4), m(1), m(2) 。在第 4 印录步骤（形成 p[2,2] ）时， O_M 对准芯片 D[4] 的原点 O₄ 。只要 D_y=2d_y 以及 D_x=2d_x ，则芯片 D[1]-D[4] 的数码阵列 p[2,2] 分别为 m(4), m(3), m(2), m(1) 。Figure 19 shows the digital array stored on each data entry film on each chip after each print step of the x2x2 3D-oP 18. Column 3 of the table lists the chip origins at which O _M is aligned at each printing step. The four data entry films of this embodiment require four printing steps. In the first printing step (forming p[1,1]), O _{M is} aligned with the origin O ₁ of chip D[1], and the digital array p[1,1] of chip D[1]-D[4] They are m(1)-m(4) respectively. At the second printing step (forming p[1, 2]), O _{M is} aligned with the origin O _{2 of the} chip D[2]. As long as the step distance D _y in the y direction is twice the distance d _y of the chip D[1] and D[2], ie D _y =2d _y , the digital array p of the chip D[1]-D[4] [1,2] are m(2), m(1), m(4), m(3), respectively. At the third printing step (forming p[2, 1]), O _{M is} aligned with the origin O _{3 of the} chip D[3]. As long as the stepping distance D _x is the x-direction chip D [3], and D [1] 2 _x times the distance D, i.e., D _{_x} = 2d _x, the chip D [1] -D [4] The digital array p [2,1] are m(3), m(4), m(1), m(2), respectively. At the 4th printing step (forming p[2, 2]), O _{M is} aligned with the origin O _{4 of the} chip D[4]. As long as D _y = 2d _y and D _x = 2d _x , the digital array p[2, 2] of the chip D[1]-D[4] is m(4), m(3), m(2), respectively. m(1).

总之，对于图 18 中芯片 D[1]-D[4] ，其数码阵列序列可以表达为： In summary, for the chip D[1]-D[4] in Figure 18, the digital array sequence can be expressed as:

S_D[1] = (p_D[1][1,1], p_D[1][1,2], p_D[1][2,1], p_D[1][2,2]) = (m(1), m(2), m(3), m(4)) ；S _D[1] = (p _D[1] [1,1], p _D[1] [1,2], p _D[1] [2,1], p _D[1] [2,2] ) = (m(1), m(2), m(3), m(4));

S_D[2] = (p_D[2][1,1], p_D[2][1,2], p_D[2][2,1], p_D[2][2,2]) = (m(2), m(1), m(4), m(3)) ；S _D[2] = (p _D[2] [1,1], p _D[2] [1,2], p _D[2] [2,1], p _D[2] [2,2] ) = (m(2), m(1), m(4), m(3));

S_D[3] = (p_D[3][1,1], p_D[3][1,2], p_D[3][2,1], p_D[3][2,2]) = (m(3), m(4), m(1), m(2)) ；S _D[3] = (p _D[3] [1,1], p _D[3] [1,2], p _D[3] [2,1], p _D[3] [2,2] ) = (m(3), m(4), m(1), m(2));

S_D[4] = (p_D[4][1,1], p_D[4][1,2], p_D[4][2,1], p_D[4][2,2]) = (m(4), m(3), m(2), m(1)) ；S _D[4] = (p _D[4] [1,1], p _D[4] [1,2], p _D[4] [2,1], p _D[4] [2,2] ) = (m(4), m(3), m(2), m(1));

从这些表达式可以看出， 3D-oP 芯片 D[1]-D[4] 均具有相同的数码阵列集合，但是可以具有不同数码阵列序列。As can be seen from these expressions, the 3D-oP chip D[1]-D[4] All have the same set of digital arrays, but can have different digital array sequences.

图 20 表示 x2x2 3D-oP 18 的电路框图。该图显示了输入地址解码器 20I 和输出缓冲区 20O 。它们与图 16A 和图 16B 中的输入地址解码器 20I 和输出缓冲区 20O 具有相同功能。三维堆 16 存储 4 个数码阵列 p[1,1]-p[2,2] 。可设置输入 / 输出电路 24 根据与数码阵列序列相关的信息，可以改变外部输入地址 28 ，也可以改变内部输出 26 ：对于芯片 D[1] 来说，没有任何改变；对于芯片 D[2] 来说，输出缓冲区 20O 中每个输出组（如 21 ）的输出数码位顺序被交换；对于芯片 D[3] 来说，内部输入地址 26 和外部输入地址 28 的最高位正好相反；对于芯片 D[4] 来说，内部输入地址 26 和外部输入地址 28 的最高位正好相反，而且输出缓冲区 20O 中每个输出组（如 21 ）的输出数码位顺序被交换。 Figure 20 shows the circuit block diagram of the x2x2 3D-oP 18. The figure shows the input address decoder 20I And output buffer 20O. They have the same function as the input address decoder 20I and the output buffer 20O in Figs. 16A and 16B. 3D heap 16 storage 4 digital arrays p[1,1]-p[2,2] . The input/output circuit can be set. 24 According to the information related to the sequence of the digital array, the external input address 28 can be changed, or the internal output can be changed. 26: For the chip For D[1], there is no change; for chip D[2], the output digital bit order of each output group (such as 21) in output buffer 20O is exchanged; for chip D[3] For example, the internal input address 26 is the opposite of the highest bit of the external input address 28; for chip D[4], the internal input address 26 and the external input address 28 The highest bit is reversed, and the output digits of each output group (such as 21) in the output buffer 20O are sequentially swapped.

偏置印录技术不仅可以用于单个芯片的数据录入膜中，也可以用于多个芯片的数据录入膜中。相应地，本发明提出一种基于 3D-oP 的三维存储封装（ 3D-oP-based three-dimensional package ，简称为 3D²-oP ）。 3D²-oP 封装一般以存储卡的形式发行。类似地，多个芯片中多个存储层 / 数码位的掩膜图形被合并到一块多区域数据掩膜版中。在不同的印录步骤中，晶圆相对于该多区域数据掩膜版的偏置量不同。因此，来自同一数据掩膜版的数据图形被印录到 3D²-oP 封装中不同芯片的不同存储层 / 数码位中。The offset printing technology can be used not only in the data entry film of a single chip, but also in the data entry film of a plurality of chips. Accordingly, the present invention proposes a three-dimensional memory based on the 3D-oP package (3D-oP-based three- dimensional package, referred to as 3D ² -oP). 3D ^2- oP packages are typically distributed as a memory card. Similarly, mask patterns of multiple memory layers/digital bits in multiple chips are combined into a multi-region data mask. In different printing steps, the offset of the wafer relative to the multi-region data mask is different. Therefore, data patterns from the same data mask are printed into different memory layers/digital bits of different chips in the 3D ^2- oP package.

图 21 表示一种 x3x3x1 3D²-oP 封装 38 。这里， xKxMxn 3D²-oP 封装表示一个含有 K 个相互堆叠 xMxn 3D-oP 芯片的存储封装。具体说来，本实施例含有三个 3D-oP 芯片 C₁-C₃ 。它们垂直地堆叠在封装衬底（如 interposer ） 30 上并形成 3D-oP 堆 36 。引线 32 将芯片 C₁-C₃ 与封装衬底 30 耦合。为了提高其数据安全性，最好在 3D²-oP 封装 38 中填充模塑料 34 。Figure 21 shows an x3x3x1 3D ² -oP package 38 . Here, the xKxMxn 3D ² -oP package represents a memory package containing K stacked xMxn 3D-oP chips. Specifically, this embodiment contains three 3D-oP chips C ₁ - C ₃ . They are stacked vertically on a package substrate (e.g., interposer) 30 and form a 3D-oP stack 36. The lead 32 is C ₁ -C ₃ chip and the package substrate 30 is coupled. In order to improve its data security, it is preferable to fill the molding compound 34 in the 3D ² -oP package 38.

图 22 是该 3D²-oP 封装 38 的电路框图。其 3D-oP 堆 36 含有 9 个数码阵列，其中每个芯片 C₁-C₃ 含有 3 个数码阵列 p[1]-p[3] 。它还含有一个可设置输入 / 输出电路 24 ，其功能与图 20 中的类似。可设置输入 / 输出电路 24 可以位于 3D-oP 芯片中和 / 或控制芯片中。Figure 22 is a circuit block diagram of the 3D ^2- oP package 38. 3D-oP stack 36 which contains an array of digital 9, wherein each of the chips C ₁ -C ₃ contains three digital array p [1] -p [3] . It also contains a configurable input/output circuit 24 that functions similarly to that of Figure 20. The settable input/output circuitry 24 can be located in the 3D-oP chip and/or in the control chip.

图 23 中左边的图是 3D²-oP 封装 38 所采用的多区域数据掩膜版 8 。它含有 9 个数据掩膜区域，并分别代表数码阵列 m(1)-m(9) 。该多区域数据掩膜版 8 的原点是 O_M 。图 23 中右边的图是一 3D-oP 晶圆 9 中一曝光场区 E 内的所有芯片 D[1]-D[9] 。其中，芯片 D[1]-D[3] 的原点分别为 O₁-O₃ 。The left-hand side of Figure 23 shows the multi-region data mask used in the 3D ^2- oP package 38. It contains 9 data mask areas and represents the digital array m(1)-m(9), respectively. The origin of the multi-region data mask 8 is O _M . The picture on the right in Figure 23 is all the chips D[1]-D[9] in an exposure field E in a 3D-oP wafer 9. Wherein, the origins of the chips D[1]-D[3] are respectively O ₁ -O ₃ .

图 24 列出在 3D²-oP 封装 38 的每个印录步骤后，每个芯片上每个数据录入膜中的数码阵列。该表的第 3 列列出了在每个印录步骤时， O_M 所对准的芯片原点。本实施例的 3 个数据录入膜需要 3 次印录步骤。在第 1 印录步骤（形成 p[1] ）时， O_M 对准芯片 D[1] 的原点 O₁ ，芯片 D[1]-D[9] 的数码阵列 p[1] 分别为 m(1)-m(9) 。在第 2 印录步骤（形成 p[2] ）时， O_M 对准芯片 D[2] 的原点 O₂ 。只要 D_y=3d_y1=3d_y2 ，则芯片 D[1]-D[9] 的数码阵列 p[2] 分别为 m(3), m(1), m(2), m(6), m(4), m(5), m(9), m(7), m(8) 。在第 3 印录步骤（形成 p[3] ）时， O_M 对准芯片 D[3] 的原点 O₃ 。只要 D_y=3d_y1=3d_y2 ，则芯片 D[1]-D[9] 的数码阵列 p[3] 分别为 m(2), m(3), m(1), m(5), m(6), m(4), m(8), m(9), m(7) 。Figure 24 shows the digital array in each data entry film on each chip after each printing step of the 3D ^2- oP package 38. Column 3 of the table lists the chip origins at which O _M is aligned at each printing step. The three data entry films of this embodiment require three printing steps. In the first printing step (forming p[1]), O _{M is} aligned with the origin O ₁ of the chip D[1], and the digital array p[1] of the chip D[1]-D[9] is m ( 1)-m(9). At the second printing step (forming p[2]), O _{M is} aligned with the origin O _{2 of the} chip D[2]. As long as D _y =3d _y1 =3d _y2 , the digital array p[2] of the chip D[1]-D[9] is m(3), m(1), m(2), m(6), respectively. m(4), m(5), m(9), m(7), m(8). At the third printing step (forming p[3]), O _{M is} aligned with the origin O _{3 of the} chip D[3]. As long as D _y = 3d _y1 = 3d _y2 , the digital array p[3] of the chip D[1]-D[9] is m(2), m(3), m(1), m(5), respectively. m(6), m(4), m(8), m(9), m(7).

图 25 列出一个 3D²-oP 批次中的三种 3D²-oP 封装 M[1]-M[3] 。这三种 3D²-oP 封装 M[1]-M[3] 分别由图 23 中的 9 个芯片构成： 3D²-oP 封装 M[1] 含有芯片 D[1], D[4], D[7] ; 3D²-oP 封装 M[2] 含有芯片 D[2], D[5], D[8] ; 3D²-oP 封装 M[3] 含有芯片 D[3], D[6], D[9] 。因为这些 3D²-oP 封装 M[1]-M[3] 由同一数据掩膜版 8 偏置印录形成，它们属于同一 3D²-oP 批次。Figure 25 lists three 3D ² -oP packages M[1]-M[3] in a 3D ^2- oP batch. The three 3D ^2- oP packages M[1]-M[3] are composed of the nine chips in Figure 23: 3D ² -oP package M[1] contains chips D[1], D[4], D [7] ; 3D ² -oP package M[2] contains chips D[2], D[5], D[8] ; 3D ² -oP package M[3] contains chips D[3], D[6] , D[9]. Because these 3D ² -oP packages M[1]-M[3] are formed by the same data mask 8 offset printing, they belong to the same 3D ² -oP batch.

总之，对于图 20 中的 3D²-oP 封装 M[1]-M[3] ，其数码阵列序列可以表达为：In summary, for the 3D ² -oP package M[1]-M[3] in Figure 20, the digital array sequence can be expressed as:

S_M[1] = (S_D[1], S_D[4], S_D[7]) = (m(1), m(3), m(2); m(4), m(6), m(5); m(7), m(9), m(8)) ；S _M[1] = (S _D[1] , S _D[4] , S _D[7] ) = (m(1), m(3), m(2); m(4), m(6 ), m(5); m(7), m(9), m(8));

S_M[2] = (S_D[2], S_D[5], S_D[8]) = (m(2), m(1), m(3); m(5), m(4), m(6); m(8), m(7), m(9)) ；S _M[2] = (S _D[2] , S _D[5] , S _D[8] ) = (m(2), m(1), m(3); m(5), m(4 ), m(6); m(8), m(7), m(9));

S_M[3] = (S_D[3], S_D[6], S_D[9]) = (m(3), m(1), m(1); m(6), m(5), m(4); m(9), m(8), m(7)) ；S _M[3] = (S _D[3] , S _D[6] , S _D[9] ) = (m(3), m(1), m(1); m(6), m(5 ), m(4); m(9), m(8), m(7));

其中 {S_M[1]} = {S_M[2]} = {S_M[3]} ，但是 S_M[1] ≠ S_M[2] ≠ S_M[3] 。Where {S _M[1] } = {S _M[2] } = {S _M[3] } , but S _M[1] ≠ S _M[2] ≠ S _M[3] .

从这些表达式可以看出， 3D²-oP 封装 M[1]-M[3] 均具有相同的数码阵列集合，但是它们可以具有不同数码阵列序列。As can be seen from these expressions, the 3D ² -oP packages M[1]-M[3] all have the same set of digital arrays, but they can have different digital array sequences.

三维可写印录存储器 3D writable print memory

为了能在 3D-P 中写录定制数据，本发明还提出一种三维可写印录存储器（ 3D-wP ）。它含有印录存储阵列和写录存储阵列。印录存储阵列存储内容数据。内容数据是出版物 ( 包括电影、电子游戏、地图、音乐库、图书库、软件等 ) 的数据，它通过印录法录入。印录法是一种并行数据录入方法，它主要包括光刻法和压印法等。写录存储阵列存储定制数据。定制数据包括芯片序列号、密钥等定制信息。定制数据通过写录法录入。写录法是一种串行数据录入方法，它主要包括直接写入光刻法，如电子束光刻、激光束光刻或聚焦粒子束光刻等技术。在同一批次 3D-wP 中，所有存储器存储相同的内容数据，但可以存储不同的定制数据。 In order to be able to write custom data in 3D-P, the present invention also proposes a three-dimensional writable imprint memory (3D-wP). It contains a printed storage array and a write storage array. The print storage array stores content data. Content data is a publication (including movies, video games, maps, music libraries, library, software, etc.) The data is entered by the imprint method. The printing method is a parallel data entry method, which mainly includes photolithography and imprinting. Write storage array storage Custom data. Custom data includes custom information such as chip serial number and key. Custom data is entered by writing. The write method is a serial data entry method, which mainly includes direct writing photolithography, such as electron beam lithography, laser beam lithography or focused particle beam lithography. In the same batch In 3D-wP, all memories store the same content data, but can store different custom data.

图 26A 和图 26B 表示同一 3D-wP 批次中的两个芯片 18f 、 18g 。在一个 3D-wP 批次中，所有芯片都由同一套掩膜版制造。在该实施例中，芯片 18f 、 18g 存储同样的内容数据，但是存储不同的定制数据。每个 3D-wP 芯片（如 18f ）含有一半导体衬底 0 和一堆叠在衬底 0 上的三维堆（如 16f ）。衬底 0 上的晶体管及其互连线构成衬底层 0K 。三维堆 16f 含有两个存储层 16A 、 16B ，其存储元一般基于二极管 3d 。 Figure 26A and Figure 26B show two

chips

18f, 18g in the same 3D-wP batch. in a In the 3D-wP batch, all chips are made from the same mask. In this embodiment,

chips

18f, 18g store the same content data, but store different custom data. Every 3D-wP The chip (e.g., 18f) contains a semiconductor substrate 0 and a three-dimensional stack (e.g., 16f) stacked on the substrate 0. The transistor on the substrate 0 and its interconnect lines constitute the substrate layer 0K. Three-dimensional heap 16f There are two

storage layers

16A, 16B whose storage elements are generally based on diode 3d.

存储层 16A 含有一个印录存储阵列 11A （包括存储元 5ac-5af ）和一个写录存储阵列 13A （包括存储元 5aa 、 5ab ），存储层 16B 仅含有一个印录存储阵列 11B 。其中，印录存储阵列 11A 、 11B 存储内容数据。内容数据是出版物 ( 包括电影、电子游戏、地图、音乐库、图书库、软件等) 的数据，它通过印录法来录入。印录法是一种并行数据录入方法，它主要包括光刻法和压印法等。 Storage layer 16A contains a printed storage array 11A (including storage elements 5ac-5af) and a write storage array 13A (including storage elements 5aa, 5ab), storage layer 16B contains only one print storage array 11B. Wherein, the

print storage array

11A, 11B stores content data . Content data is data for publications (including movies, video games, maps, music libraries, library, software, etc.) that are entered by imprinting. The printing method is a parallel data entry method, which is mainly It should include photolithography and imprinting.

另一方面，写录存储阵列 13A 存储定制数据。定制数据包括芯片序列号、密钥等定制信息。定制数据通过写录法来录入。写录法是一种串行数据录入方法，它主要包括直接写入光刻法，如电子束光刻、激光束光刻或聚焦粒子束光刻等技术。直接写入光刻法不需要数据掩膜版。 On the other hand, the write storage array 13A stores custom data. Custom data includes custom information such as chip serial number and key. Custom data Enter by means of writing. The write method is a serial data entry method, which mainly includes direct writing photolithography, such as electron beam lithography, laser beam lithography or focused particle beam lithography. Direct write lithography does not require a data mask.

对于图 26A 中的芯片 18f ，其存储层 16A 中数据录入膜 6A 存储的数码阵列 P_18f[1] 包括印录数码阵列 p_18f[1] 和写录数码阵列 w_18f[1] ，即 P_18f[1]= p_18f[1]+ w_18f[1] 。其中，印录数码阵列 p_18f[1] 存储在印录存储阵列 11A 中，而写录数码阵列 w_18f[1] 存储在写录存储阵列 13A 中。For the chip 18f in Fig. 26A, the digital array P _18f [1] stored in the data recording film 6A in the memory layer 16A includes the print digital array p _18f [1] and the write digital array w _18f [1] , that is, P _18f [1]= p _18f [1]+ w _18f [1] . Among them, the printed digital array p _18f [1] is stored in the print storage array 11A, and the write digital array w _18f [1] is stored in the write storage array 13A.

另一方面，由于存储层 16B 不含写录存储阵列，其数据录入膜 6B 存储的数码阵列 P_18f[2] 仅为印录数码阵列 p_18f[2] ，即 P_18f[2]= p_18f[2] 。总而言之，芯片 18f 的印录数码阵列序列可以表达为： S_18f = (p_18f[1], p_18f[2]) 。On the other hand, since the storage layer 16B does not contain the write storage array, the digital array P _18f [2] stored in the data entry film 6B is only the printed digital array p _18f [2], that is, P _18f [2] = p _18f [2] . In summary, the printed digital array sequence of chip 18f can be expressed as: S _18f = (p _18f [1], p _18f [2]) .

类似地，对于图 26B 中的芯片 18g ，其存储层 16A 中数据录入膜 6A 存储的数码阵列 P_18g[1] 包括印录数码阵列 p_18g[1] 和写录数码阵列 w_18g[1] ，即 P_18g[1]= p_18g[1]+ w_18g[1] 。其存储层 16B 中数据录入膜 6B 存储的数码阵列 P_18g[2] 为印录数码阵列 p_18g[2] ，即 P_18g[2]= p_18g[2] 。其印录数码阵列序列为： S_18g = (p_18g[1], p_18g[2]) 。Similarly, for the chip 18g in Fig. 26B, the digital array P _18g [1] stored in the data recording film 6A in the memory layer 16A includes the printed digital array p _18g [1] and the write digital array w _18g [1] , That is, P _18g [1] = p _18g [1] + w _18g [1] . The digital array P _18g [2] stored in the data recording film 6B in the storage layer 16B is the printed digital array p _18g [2], that is, P _18g [2] = p _18g [2]. The sequence of the printed digital array is: S _18g = (p _18g [1], p _18g [2]).

在同一 3D-wP 批次中，由于所有的芯片 18f 、 18g 都由同一套掩膜版制造，故它们存储相同的内容数据，并均含有相同的印录数码阵列集合，即 {S_18f}={S_18g} 。在数据录入过程中，如果采用常规印录法，芯片 18f 、 18g 的印录数码阵列序列 S_18f 、 S_18g 应该相同。如果采用偏置印录法，芯片 18f 、 18g 的印录数码阵列序列 S_18f 、 S_18g 可以不同。In the same 3D-wP batch, since all

chips

18f and 18g are manufactured by the same mask, they store the same content data and all contain the same set of printed digital arrays, ie {S _18f }= {S _18g } . In the data entry process, if the conventional printing method is used, the printed digital array sequences S _18f and S _{18g of the} chips 18f and _18g should be the same. If the offset printing method is employed, the printed digital array sequences S _18f , S _{18g of the} chips 18f and _18g may be different.

另一方面，在同一 3D-wP 批次中，芯片 18f 、 18g 可以存储不同的定制数据。它们的写录存储阵列 13A 可以存储不同的写录数码阵列 w_18f[1] 、 w_18g[1] 。例如说，在芯片 18f 的写录存储阵列 13A 中，存储元 5aa 存储' 1 '，存储元 5ab 存储' 0 '（图 26A ）；而在芯片 18g 的写录存储阵列 13A 中，存储元 5aa 存储' 0 '，存储元 5ab 存储' 1 '（图 26B ）。虽然写录存储阵列 13A 中存储的数据不同，由于写录定制数据不需要掩膜版，芯片 18f 、 18g 仍然属于同一 3D-wP 批次。On the other hand, in the same 3D-wP batch,

chips

18f, 18g can store different custom data. Their write storage array 13A can store different write digital arrays w _18f [1] , w _18g [1] . For example, in the write storage array 13A of the chip 18f, the storage element 5aa stores '1', the storage element 5ab stores '0' (Fig. 26A), and in the write storage array 13A of the chip 18g, the storage element 5aa is stored. ' 0 ', the storage element 5ab stores ' 1 ' (Fig. 26B). Although the data stored in the write storage array 13A is different, since the mask data is not required for writing the customized data, the

chips

18f and 18g still belong to the same 3D-wP batch.

虽然写录法可以用来录入定制数据，其写录效率很低。即使采用多电子束直接写入技术，其写录效率也就是约每小时一个晶圆（参见 Kampherbeek 所著，' High throughput maskless lithography' ），这比印录法慢 100 倍。为了保持产能，定制数据的总数据量应受到限制，至少应该使写录所花的时间不长于印录所花的时间，即定制数据的总数据量应少于内容数据总数据量的 1% 。 Although the writing method can be used to enter custom data, its writing efficiency is very low. Even with multi-beam direct write technology, the writing efficiency is about one wafer per hour (see Kampherbeek, ' High throughput maskless lithography' ), which is slower than the print method 100 Times. In order to maintain capacity, the total amount of data for custom data should be limited. At least the time spent on writing should be no longer than the time spent on printing. That is, the total amount of data for custom data should be less than 1% of the total amount of data. .

图 27A -图 27D 表示在图 26A 和图 26B 的实施例中录入内容数据和定制数据的步骤。它包括两个数据录入步骤：印录步骤和写录步骤。在形成隔离介质膜 3b 后，在晶圆表面形成一层光刻胶 3p 。印录步骤通过光刻法或压印法将内容数据录入到光刻胶 3p 中（图 27A ）。例如说，光刻法通过一数据掩膜版将在存储元 5ad 、 5af 处的光刻胶曝光。然后，写录步骤通过直接写入光刻法将定制数据再录入到光刻胶 3p 中（图 27B ）。直接写入光刻法不需要数据掩膜版，它使用一可控束（如电子束、激光束或聚焦粒子束）一位一位地（如存储元 5ab ）将光刻胶 3p 曝光。在完成上述两个数据录入步骤后，对光刻胶 3p 进行显影（图 27C ）。这时，在存储元 5af 、 5ad 、 5ab 处的光刻胶被清理掉。然后，一个刻蚀步骤将暴露的隔离介质膜 3b 除去（图 27D ）。经过这些步骤后，内容数据和定制数据被录入到存储层 16A 的数据录入膜 6A 中。 Figure 27A - Figure 27D are shown in Figure 26A and Figure 26B The steps of entering content data and custom data in the embodiment. It consists of two data entry steps: the print step and the write step. After forming the isolation dielectric film 3b, a photoresist 3p is formed on the surface of the wafer. . The printing step records the content data into the photoresist 3p by photolithography or imprinting (Fig. 27A). For example, photolithography will pass through a data mask in memory cells 5ad, 5af The photoresist is exposed. Then, the writing step re-records the custom data into the photoresist 3p by direct write lithography (Fig. 27B). ). Direct write lithography does not require a data mask, which uses a controllable beam (such as an electron beam, a laser beam, or a focused particle beam) to place the photoresist 3p one bit (eg, memory cell 5ab). Exposure. After the above two data entry steps are completed, the photoresist 3p is developed (Fig. 27C). At this time, in the storage elements 5af, 5ad, 5ab The photoresist at the place is cleaned up. Then, an etching step removes the exposed isolation dielectric film 3b (Fig. 27D). After these steps, the content data and the customized data are entered into the data entry film of the storage layer 16A. In 6A.

图 28 表示另一种 3D-wP 芯片 18h 。在该实施例中，存储层 16A 、 16B 均仅含有印录存储阵列 11A 、 11B 。写录存储阵列 13 形成在衬底层 0K 中。其存储元 0c1 、 0c2 基于晶体管。衬底层 0K 含有至少一个数据录入膜 0V1 ：其通道孔 0v1 的存在表示' 1 '，不存在则表示' 0 '。通过在数据录入膜 0V1 中写录数据，存储元 0c1 、 0c2 可以存储定制数据。注意到，通道孔 0v1 的最小特征尺寸 P 可以远大于存储层 16A 中数据开口 6ca 的最小特征尺寸 p 。这样，即使印录存储阵列采用较先进的存储器技术（如 p=44nm ），写录存储阵列仍可以采用较落后的技术（如 P=2um ）。该方法的优点是可以采用一种较为低廉的写录技术-如激光束光刻技术-来直接写数据。 Figure 28 shows another 3D-wP chip 18h. In this embodiment, the storage layers 16A, 16B All contain only the

print storage arrays

11A, 11B. The write memory array 13 is formed in the substrate layer 0K. Its memory elements 0c1 and 0c2 are based on transistors. Substrate layer 0K Contains at least one data entry film 0V1: the presence of channel hole 0v1 indicates '1', and if it does not, it indicates '0'. By writing data in the data entry film 0V1, the memory element 0c1, 0c2 can store custom data. Note that the minimum feature size P of the channel hole 0v1 can be much larger than the minimum feature size of the data opening 6ca in the storage layer 16A p . In this way, even if the printed memory array uses more advanced memory technologies (such as p=44nm), the write storage array can still use the backward technology (such as P=2um). ). The advantage of this method is that a relatively inexpensive writing technique, such as laser beam lithography, can be used to directly write data.

图 29 表示实现图 28 中实施例的数据录入步骤。它包括写录步骤 61 、 63 和印录步骤 65 、 67 。首先，将定制数据写录至衬底层 0K 的数据录入膜 0V1 中（步骤 61 ）。该步骤不需要数据掩膜版，它使用一可控束（如电子束、激光束或聚焦粒子束）将数据一位一位地写入。在形成写录存储阵列 13 （步骤 63 ）后，将内容数据印录至存储层 16A 的数据录入膜 6A 中（步骤 65 ）。该印录步骤使用了一块数据掩膜版，并形成印录存储阵列 11A （步骤 67 ）。 Figure 29 shows the data entry step for implementing the embodiment of Figure 28. It includes the writing steps 61, 63 and the printing step 65 67. First, the custom data is written to the data entry film 0V1 of the substrate layer 0K (step 61). ). This step does not require a data mask, which uses a controllable beam (such as an electron beam, a laser beam, or a focused particle beam) to write the data bit by bit. In forming the write storage array 13 (step 63 After that, the content data is printed to the data entry film 6A of the storage layer 16A (step 65). This printing step uses a data mask and forms the print storage array 11A (step 67 ).

图 30 表示一个具有良好数据安全性 3D-wP 18C 。它含有一印录存储阵列 11 、一写录存储阵列 13 和一加密逻辑 17 。它们最好集成在一个 3D-wP 芯片中。印录存储阵列 11 存储内容数据，写录存储阵列 13 存储该 3D-wP 芯片 18C 的密钥。为了增强数据的安全性，不同芯片的密钥最好不同。虽然同一 3D-wP 批次中所有芯片都存储相同内容，由于每个芯片的输出都由不同密钥加密，故不同 3D-wP 的输出数据皆不同。为了防范反向设计，至少部分写录存储阵列 13 位于 3D-wP 芯片的最高存储层 16B 之下，如在较低的存储层 16A 中，或在衬底层 0K 中。除了密钥外，写录存储阵列 13 还可以存储芯片序列号或与印录数码阵列序列相关的信息。 Figure 30 shows a 3D-wP 18C with good data security. It contains a printed memory array 11 , a write storage array 13 and a encryption logic 17 . They are best integrated in a 3D-wP chip. Print Storage Array 11 Store Content Data, Write Storage Array 13 Store the 3D-wP The key to the chip 18C. In order to enhance the security of data, the keys of different chips are preferably different. Although the same 3D-wP All chips in the batch store the same content. Since the output of each chip is encrypted by a different key, the output data of different 3D-wP are different. In order to prevent reverse design, at least part of the write storage array 13 is located The highest storage layer of the 3D-wP chip is below 16B, as in the lower memory layer 16A, or in the substrate layer 0K. Write storage array in addition to the key 13 It is also possible to store the chip serial number or information related to the printed digital array sequence.

工业实用性Industrial applicability

最后，在这里对适合海量出版的半导体存储器做一综述。三维只读存储器（ 3D-ROM ）是海量出版的理想媒介。长期以来，三维电编程只读存储器（ 3D-EPROM ，也被称为三维写录存储器）被认为优于 3D-P 。 3D-EPROM 采用'写'来录入数据。由于'写'是一种串行的数据录入方式， 3D-EPROM 的写速度很慢。例如说， Sandisk 公司开发的三维一次编程存储器（ 3-D OTP ）的写速度只有 1.5MB/s 。它需要很长时间来录入一部电影： ~0.5 小时录入一部 DVD 格式的电影（ ~4GB ），或 ~3 小时录入一部 BD 格式的电影（ ~20GB ）；如果要录入 1TB 的资料，则需要一周时间！如此长的录入时间会导致高昂的录入成本，从而使 3D-EPROM 不适合海量出版。这点在以往被大多数人忽视。 Finally, an overview of semiconductor memories suitable for mass publishing is presented here. 3D read only memory (3D-ROM) ) is the ideal medium for mass publishing. Three-dimensional electrical programming read-only memory (3D-EPROM, also known as three-dimensional write memory) has long been considered superior to 3D-P. 3D-EPROM Use 'write' to enter data. Since 'write' is a serial data entry method, 3D-EPROM write speed is very slow. For example, three-dimensional one-time programming memory developed by Sandisk (3-D OTP has a write speed of only 1.5MB/s. It takes a long time to enter a movie: ~0.5 hours to enter a DVD format movie (~4GB), or ~3 hours to enter a movie Movies in BD format (~20GB); if you want to enter 1TB of data, it takes a week! Such long entry times can result in high entry costs, resulting in 3D-EPROM Not suitable for mass publishing. This has been ignored by most people in the past.

另一方面， 3D-P 通过'印'来录入数据。'印'是一种并行的数据录入方式。它包括光刻法和压印法。这些技术均为大规模工业化的印录技术，并能在很短时间内将大量数据录入到大量芯片中。例如说，在 22nm 时，单次曝光可以录入 ~155GB 数据。作为一个总结，与传统的纸质媒介（如图书、报纸、杂志）和塑料媒介（如光碟）相似，半导体存储器应选择'印'而非'写'来实现海量出版。 On the other hand, 3D-P Enter data by 'print'. 'Print' is a parallel data entry method. It includes photolithography and imprinting. These technologies are large-scale industrial printing technologies, and can record large amounts of data into a large number of chips in a short time. For example, in At 22nm, a single exposure can be entered in ~155GB Data. As a summary, similar to traditional paper media (picture books, newspapers, magazines) and plastic media (such as CDs), semiconductor memory should choose 'print' rather than 'write' to achieve mass publishing.

应该了解，在不远离本发明的精神和范围的前提下，可以对本发明的形式和细节进行改动，这并不妨碍它们应用本发明的精神。本发明的实施例主要针对光刻法，它均可以应用到压印法。因此，除了根据附加的权利要求书的精神，本发明不应受到任何限制。 It is to be understood that the form and details of the invention may be modified without departing from the spirit and scope of the invention. Embodiments of the present invention are primarily directed to photolithography, which can be applied to imprint methods. Therefore, the invention should not be limited in any way by the spirit of the appended claims.

Claims

一种制造三维印录存储器的方法，其特征在于包括如下步骤： A method of manufacturing a three-dimensional printing memory, comprising the steps of:

1 ）在一半导体衬底上形成一衬底电路；1) forming a substrate circuit on a semiconductor substrate;

2 ）在该衬底电路上方形成一层底地址线；2) forming a bottom address line above the substrate circuit;

3 ）在该底地址线上形成一层数据录入膜，并通过印录法将数据图形从一数据掩膜版转换到该数据录入膜中；3 Forming a layer of data entry film on the bottom address line, and converting the data pattern from a data mask to the data entry film by printing;

4 ）在该数据录入膜上形成一层顶地址线；4) forming a top address line on the data entry film;

5 ）重复步骤 2 ）- 4 ）形成另一存储层；5) repeating steps 2) - 4) forming another storage layer;

其中，该数据图形代表存储于该存储器中数据，所述地址线的最小半周期小于 45nm ，所述数据掩膜版的最小特征尺寸大于所述地址线的最小半周期，所述数据掩膜版承载多个不同的海量出版物。Wherein the data pattern represents data stored in the memory, and the minimum half period of the address line is less than 45 nm The minimum feature size of the data mask is greater than a minimum half period of the address line, and the data mask carries a plurality of different mass publications.
一种制造掩膜编程只读存储器（ mask-ROM ）的方法，其特征在于包括如下步骤：A method of manufacturing a mask programming read-only memory (mask-ROM), comprising the steps of:

1 ）形成一层数据录入膜；1) forming a layer of data entry film;

2 ）通过印录法将数据图形从一数据掩膜版转换到该数据录入膜中；2) converting the data pattern from a data mask to the data entry film by printing;

3 ）形成多条与该数据录入膜耦合的地址线；3) forming a plurality of address lines coupled to the data entry film;

其中，该数据图形代表存储于该存储器中数据，所述地址线的最小半周期小于 45nm ，所述数据掩膜版的最小特征尺寸大于所述地址线的最小半周期，所述数据掩膜版承载多个不同的海量出版物。Wherein the data pattern represents data stored in the memory, and the minimum half period of the address line is less than 45 nm The minimum feature size of the data mask is greater than a minimum half period of the address line, and the data mask carries a plurality of different mass publications.
根据权利要求 1 和 2 所述的存储器制造方法，其特征还在于：所述数据掩膜版中的所有海量出版物均不重复。According to claims 1 and 2 The memory manufacturing method is further characterized in that all the mass publications in the data mask are not repeated.
根据权利要求 1 和 2 所述的存储器制造方法，其特征还在于：所述印录法包括光刻法和压印法。The memory manufacturing method according to claims 1 and 2, characterized in that said printing method comprises photolithography and imprinting.
一种三维印录存储器，其特征在于包括：A three-dimensional imprinting memory, comprising:

一半导体衬底；a semiconductor substrate;

多个堆叠在该衬底上并与之耦合的存储层，所述多个存储层相互堆叠，每个存储层含有至少一层数据录入膜，该数据录入膜中的图形代表存储的数据，所述存储层的最小特征尺寸小于 45nm ；a plurality of storage layers stacked on and coupled to the substrate, the plurality of storage layers being stacked on each other, each storage layer containing at least one layer of data entry film, the graphics in the data entry film representing stored data, The minimum feature size of the storage layer is less than 45nm ;

该存储器存储多个不同海量出版物的数据。This memory stores data for a number of different mass publications.
一种制造压印存储器的方法，其特征在于包括如下步骤：A method of manufacturing an imprint memory, comprising the steps of:

1 ）形成一数据录入膜；1) forming a data entry film;

2 ）通过压印法将数据图形从一数据模版转换到该数据录入膜中；2) converting the data pattern from a data template to the data entry film by imprinting;

3 ）形成多条与该数据录入膜耦合的地址线；3) forming a plurality of address lines coupled to the data entry film;

其中，该数据图形代表存储于该存储器中的数据，且该数据图形具有纳米尺度，且不具有微米尺度周期性。Wherein, the data graphic represents data stored in the memory, and the data pattern has a nanometer scale and does not have microscale periodicity.
根据权利要求6所述的存储器制造方法，其特征还在于：该数据图形的尺寸在 1 纳米到 100 纳米之间。The memory manufacturing method according to claim 6, wherein the data pattern has a size of from 1 nm to 100 Between the nanometers.
根据权利要求6所述的存储器制造方法，其特征还在于：所述压印存储器是三维印录存储器。 The memory manufacturing method according to claim 6, wherein the imprint memory is a three-dimensional imprint memory.
根据权利要求6 所述的存储器制造方法，其特征还在于：所述压印存储器是一交叉点阵列存储器。The memory manufacturing method according to claim 6, wherein the imprint memory is a cross point array memory.
根据权利要求6 所述的存储器制造方法，其特征还在于：所述压印法是纳米压印法。The memory manufacturing method according to claim 6, wherein the imprint method is a nanoimprint method.
根据权利要求6所述的存储器制造方法，其特征还在于：所述数据模板含有多个凸起。 A memory manufacturing method according to claim 6, wherein said data template contains a plurality of protrusions.
一种三维偏置印录存储器，其特征在于包括：A three-dimensional offset printing memory, comprising:

一半导体衬底；a semiconductor substrate;

多个堆叠在该衬底上并与之耦合的存储层，所述多个存储层相互堆叠，每个存储层含有至少一层数据录入膜，该数据录入膜中的图形代表一数码阵列；a plurality of storage layers stacked on and coupled to the substrate, the plurality of storage layers being stacked on each other, each storage layer comprising at least one layer of data entry film, the graphic in the data entry film representing a digital array;

一可设置输入 / 输出，该可设置输入 / 输出根据该存储器中数码阵列序列来设置该存储器的输入 / 输出。An input/output can be set, and the settable input/output sets the input of the memory according to the sequence of the digital array in the memory / Output.
根据权利要求12 所述的存储器，其特征还在于包括：一存储手段，该存储手段存储与所述数码阵列序列相关的信息。According to claim 12 The memory is further characterized by: a storage means for storing information related to the sequence of the digital array.
一种三维偏置印录存储器，其特征在于包括：A three-dimensional offset printing memory, comprising:

一半导体衬底；a semiconductor substrate;

多个堆叠在该衬底上并与之耦合的存储层，所述多个存储层相互堆叠，每个存储层含有至少一层数据录入膜，该数据录入膜中的图形代表一数码阵列；a plurality of storage layers stacked on and coupled to the substrate, the plurality of storage layers being stacked on each other, each storage layer comprising at least one layer of data entry film, the graphic in the data entry film representing a digital array;

在同一批次所述三维偏置印录存储器中，所有存储器均含有同样的数码阵列集合；在至少两个存储器中，数码阵列序列不同。In the same batch of the three-dimensional offset print memory, all memories contain the same set of digital arrays; in at least two memories, the digital array sequence is different.
根据权利要求 14 所述的存储器，其特征还在于：The memory of claim 14 further characterized by:

所述批次中含有第一和第二存储器，该第一和第二存储器均含有第一和第二存储层，所述第二存储层位于所述第一存储层之上；其中，The first and second memories are included in the batch, the first and second memories each include a first and a second storage layer, and the second storage layer is located above the first storage layer;

所述第一存储器中的所述第一存储层存储第一数码阵列，所述第一存储器中的所述第二存储层存储第二数码阵列；The first storage layer in the first memory stores a first digital array, and the second storage layer in the first memory stores a second digital array;

所述第二存储器中的所述第一存储层存储第二数据图形，所述第二存储器中的所述第二存储层存储第一数据图形。The first storage layer in the second memory stores a second data pattern, and the second storage layer in the second memory stores a first data pattern.
根据权利要求 14 所述的存储器，其特征还在于：The memory of claim 14 further characterized by:

所述批次中含有第一和第二存储器，所述第一和第二存储器均含有一存储层，该存储层含有第一和第二数据录入膜，所述第一数据录入膜位于所述第二数据录入膜之上；其中，The batch contains first and second memories, each of the first and second memories including a storage layer containing first and second data entry films, the first data entry film being located The second data is recorded on the film; wherein

所述第一存储器中的所述第一数据录入膜存储第一数码阵列，所述第一存储器中的所述第二数据录入膜存储第二数码阵列；The first data entry film in the first memory stores a first digital array, and the second data entry film in the first memory stores a second digital array;

所述第二存储器中的所述第一数据录入膜存储第二数码阵列，所述第二存储器中的所述第二数据录入膜存储第一数码阵列。The first data entry film in the second memory stores a second digital array, and the second data entry film in the second memory stores a first digital array.
根据权利要求 14 所述的存储器是一个三维存储封装的一部分，该三维存储封装的特征还在于包括：多个相互堆叠的三维偏置印录存储器。According to claim 14 The memory is part of a three-dimensional memory package, and the three-dimensional memory package is further characterized by: a plurality of three-dimensional offset printing memories stacked on each other.
一种制造三维偏置印录存储器的方法，其特征在于包括如下步骤：A method of manufacturing a three-dimensional offset printing memory, comprising the steps of:

1 ）在一半导体衬底上形成一衬底电路；1) forming a substrate circuit on a semiconductor substrate;

2 ）在该衬底电路上方形成一存储层，该存储层含有至少第一数据录入膜，在该第一数据录入膜中形成数据图形时，该衬底与一数据图形承载装置的第一位置对准；2 Forming a memory layer above the substrate circuit, the memory layer comprising at least a first data entry film, the first position of the substrate and a data graphics carrier when the data pattern is formed in the first data entry film quasi;

3 ）在第一数据录入膜上方形成第二数据录入膜，在该第二数据录入膜中形成数据图形时，该衬底与所述数据图形承载装置的第二位置对准。3 Forming a second data entry film over the first data entry film, the substrate being aligned with the second position of the data pattern carrier when the data pattern is formed in the second data entry film.
根据权利要求 18 所述的存储器制造方法，其特征还在于：该存储器所需数据图形承载装置的数目小于该存储器中数据录入膜的数目。According to claim 18 The memory manufacturing method is further characterized in that the number of data graphics carrying devices required for the memory is smaller than the number of data recording films in the memory.
根据权利要求 18 所述的存储器制造方法，其特征还在于：所述数据图形承载装置是数据掩膜版或数据模版。According to claim 18 The memory manufacturing method is further characterized in that the data graphics carrying device is a data mask or a data template.
一种三维可写印录存储器，其特征在于包括：A three-dimensional writable print memory, characterized by comprising:

一半导体衬底；a semiconductor substrate;

多个堆叠在该衬底上并与之耦合的存储层，所述多个存储层相互堆叠，所述存储层含有多个印录存储阵列，所述印录存储阵列中的图形代表内容数据；a plurality of memory layers stacked on and coupled to the substrate, the plurality of memory layers being stacked on each other, the memory layer comprising a plurality of printed memory arrays, the graphics in the printed memory array representing content data;

一写录存储阵列，所述写录存储阵列中的图形代表定制数据；Writing a storage array, the graphics in the write storage array representing customized data;

所述定制数据的总数据量小于所述内容数据的总数据量的 1% 。The total amount of data of the customized data is less than 1% of the total amount of data of the content data.
根据权利要求 21 所述的存储器，其特征还在于：在同一批次所述 3D-wP 中，所有存储器存储相同的内容数据，且至少有两个存储器存储不同的定制数据。The memory of claim 21 further characterized by: said 3D-wP in the same batch All of the memories store the same content data, and at least two memories store different custom data.
根据权利要求 21 所述的存储器，其特征还在于：所述写录存储阵列位于所述存储层中最高存储层之下。 A memory according to claim 21, wherein said write storage array is located below said highest storage layer of said storage layer .
根据权利要求 21 所述的存储器，其特征还在于：所述写录存储阵列中数据录入膜的最小特征尺寸大于所述印录存储阵列中数据录入膜的最小特征尺寸。According to claim 21 The memory is further characterized in that a minimum feature size of the data entry film in the write storage array is larger than a minimum feature size of the data entry film in the record storage array.
一种制造三维可写印录存储器的方法，其特征在于包括如下步骤：A method of manufacturing a three-dimensional writable print memory, comprising the steps of:

1 ）在一半导体衬底上形成晶体管；1) forming a transistor on a semiconductor substrate;

2 ）通过直接写入光刻法录入定制数据；2) Entering customized data by direct writing lithography;

3 ）通过印录法在多个相互堆叠的存储层中录入内容数据，所述多个存储层堆叠在该衬底上并与之耦合；3) recording content data in a plurality of mutually stacked storage layers by a printing method, the plurality of storage layers being stacked on and coupled to the substrate;

其中，所述定制数据的总数据量小于所述内容数据的总数据量的 1% 。The total data amount of the customized data is less than 1% of the total data amount of the content data.
根据权利要求 25 所述的存储器制造方法，其特征还在于：所述直接写入光刻法包括电子束光刻、激光束光刻或聚焦粒子束光刻。According to claim 25 The memory manufacturing method is further characterized in that the direct write photolithography comprises electron beam lithography, laser beam lithography or focused particle beam lithography.
根据权利要求 25 所述的存储器制造方法，其特征还在于：所述印录法包括光刻法和压印法。A memory manufacturing method according to claim 25, wherein said printing method comprises photolithography and imprinting.