WO2012176839A1 - Method for manufacturing rear face electrode type solar battery - Google Patents
Method for manufacturing rear face electrode type solar battery Download PDFInfo
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- WO2012176839A1 WO2012176839A1 PCT/JP2012/065864 JP2012065864W WO2012176839A1 WO 2012176839 A1 WO2012176839 A1 WO 2012176839A1 JP 2012065864 W JP2012065864 W JP 2012065864W WO 2012176839 A1 WO2012176839 A1 WO 2012176839A1
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- passivation film
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- 238000000034 method Methods 0.000 title claims description 40
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- 229910052814 silicon oxide Inorganic materials 0.000 claims description 29
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 9
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present invention relates to a method for manufacturing a back electrode type solar cell, and more particularly to a method for forming a passivation film on a semiconductor region of a back electrode type solar cell.
- the conductivity type of a silicon substrate is, for example, a surface of a single-crystal or polycrystalline silicon substrate located on a light incident side (hereinafter referred to as “light-receiving surface of a silicon substrate”).
- a pn junction is formed by diffusing impurities having different conductivity types, and electrodes are respectively provided on the light receiving surface of the silicon substrate and a surface located on the opposite side of the light receiving surface (hereinafter referred to as “the back surface of the silicon substrate”).
- the back surface of the silicon substrate The ones that are formed and manufactured are the mainstream.
- FIG. 8 is a cross-sectional view schematically showing an example of the configuration of the back junction solar cell 200 disclosed in Patent Document 1.
- An antireflection film 209 is formed on the light receiving surface of the n-type silicon substrate 201.
- An n + layer 205 and a p + layer 206 are formed on the back surface of the silicon substrate 201.
- a first passivation film 203 is formed on the p + layer 206, and a second passivation film 204 different from the first passivation film 203 is formed on the n + layer 205.
- a p electrode 208 is connected to the p + layer 206, and an n electrode 207 is connected to the n + layer 205.
- FIG. 9 is a cross-sectional view showing an example of the manufacturing method of the back junction solar cell of FIG. 8 disclosed in Patent Document 1 in the order of steps. With reference to FIG. 9, a method of manufacturing the back junction solar cell shown in FIG. 8 will be described.
- an n-type silicon substrate 401 is prepared.
- a texture mask 413 made of a silicon oxide film or the like is formed on the back surface of the silicon substrate 401, and a texture structure 410 is formed on the light receiving surface of the silicon substrate 401 by etching.
- a first diffusion mask 411 made of a silicon oxide film or the like is formed on the entire light receiving surface and back surface of the silicon substrate 401.
- a first etching paste is printed in a desired pattern on the first diffusion mask 411 formed on the back surface of the silicon substrate 401 by, for example, a screen printing method.
- the silicon substrate 401 on which the first etching paste is printed is subjected to heat treatment.
- the silicon substrate 401 is immersed in water, and ultrasonic cleaning is performed by applying ultrasonic waves.
- the first etching paste is removed, and a window 414 is formed on the back surface of the silicon substrate 401.
- vapor phase diffusion of boron which is a p-type impurity as the first conductivity type impurity, is performed on the silicon substrate 401.
- the p + layer 406 as the first conductivity type impurity diffusion layer is formed in the window 414.
- the first diffusion mask 411 formed on the silicon substrate 401 and the BSG (boron silicate glass) film formed on the silicon substrate 401 by diffusion of boron are all removed using a hydrogen fluoride aqueous solution or the like.
- a second diffusion mask 412 made of a silicon oxide film or the like is formed on the entire light receiving surface and back surface of the silicon substrate 401.
- a second etching paste is printed in a desired pattern on the second diffusion mask 412 formed on the back surface of the silicon substrate 401.
- the second etching paste may have the same composition as the first etching paste, or may have a different composition.
- the silicon substrate 401 on which the second etching paste is printed is subjected to heat treatment. As a result, only the portion of the second diffusion mask 412 formed on the back surface of the silicon substrate 401 on which the second etching paste is printed is removed by etching. Thereafter, the window 415 is formed on the back surface of the silicon substrate 401 by performing the process in the step shown in FIG.
- vapor phase diffusion of phosphorus which is an n-type impurity as the second conductivity type impurity, is performed on the silicon substrate 401.
- an n + layer 405 as a second conductivity type impurity diffusion layer is formed in the window 415.
- the second diffusion mask 412 formed on the silicon substrate 401 and the PSG (phosphorus silicate glass) film formed on the silicon substrate 401 by diffusion of phosphorus are all removed using a hydrogen fluoride aqueous solution or the like.
- the silicon substrate 401 is thermally oxidized.
- a first passivation film 403 made of a silicon oxide film is formed on the entire back surface of the silicon substrate 401.
- the silicon oxide film 403a is also formed on the entire light receiving surface of the silicon substrate 401.
- portions of the first passivation film 403 other than the portion formed on the p + layer 406 are removed by etching.
- the etching paste used at this time may be the first etching paste or the second etching paste. As a result, the first passivation film 403 remains only on the p + layer 406.
- a second passivation film 404 is formed on the back surface of the silicon substrate 401 from which the first passivation film 403 has been removed.
- a silicon nitride film as the second passivation film 404 is formed on the back surface of the silicon substrate 401 and the n + layer 405 by forming a film made of silicon nitride by plasma CVD.
- This second passivation film 404 is also formed on the first passivation film 403.
- the silicon oxide film 403a formed on the light receiving surface of the silicon substrate 401 is completely removed using a hydrogen fluoride aqueous solution or the like, and then a silicon nitride film is formed on the light receiving surface.
- An antireflection film 409 made of or the like is formed.
- a contact hole 416 and a contact hole 417 are formed.
- a part of each of the n + layer 405 and the p + layer 406 is exposed from the second passivation film 404 and the like.
- the contact hole 416 and the contact hole 417 are formed by the following method.
- the silicon substrate 401 is heated. Thereby, the second passivation film 404 on which the etching paste is printed is removed.
- the etching paste is removed by performing ultrasonic cleaning after the heat treatment.
- a silver paste is printed in each of the contact hole 416 and the contact hole 417, and then fired.
- an n electrode 407 is formed on the n + layer 405, and a p electrode 408 is formed on the p + layer 406. In this manner, the back junction solar cell shown in FIG. 8 is manufactured.
- an n + layer and a p + layer are formed on the back surface of the silicon substrate. Therefore, it is necessary to perform a diffusion mask formation process, a patterning process, an impurity diffusion process, a diffusion mask removal process, and the like for the n + layer formation and the p + layer formation, respectively. Further, after the formation of the n + layer and the formation of the p + layer is completed, different passivation films are formed on the n + layer and the p + layer, respectively.
- the present invention has been made in view of this point, and the object of the present invention is to form different passivation films on the n + region and the p + region, respectively, even if the number of steps is reduced. It is providing the manufacturing method of a back electrode type solar cell.
- the first back electrode type solar cell manufacturing method of the present invention includes a step of forming a first back surface passivation film containing a first conductivity type dopant on a part of a back surface of a silicon substrate, and a back surface of the silicon substrate. A step of forming a film containing a second conductivity type dopant on the upper surface and the first back surface side passivation film; and a heat treatment of the silicon substrate, whereby the first conductivity type dopant is transferred from the first back surface side passivation film to silicon.
- a semiconductor region of the first conductivity type is formed by being diffused in a part of the substrate, and the dopant of the first conductivity type is diffused from the silicon substrate from a film in which the second conductivity type dopant contains the second conductivity type dopant.
- the second back electrode type solar cell manufacturing method of the present invention includes a step of forming a first conductivity type semiconductor region on a part of a back surface of a silicon substrate, and a first conductivity type semiconductor region,
- the second conductive layer is formed on at least a part of the back surface of the silicon substrate different from the first conductive type semiconductor region by using a step of forming a back surface side passivation film and a solution containing a second conductive type dopant. Forming a semiconductor region of the mold, and forming a second back-side passivation film on the back surface of the silicon substrate and the first back-side passivation film.
- the first conductivity type semiconductor region may be n-type, and the second conductivity type semiconductor region may be p-type.
- the second back side passivation film is preferably an aluminum oxide film.
- the first back surface passivation film may be a silicon oxide film.
- different passivation films can be formed on the n + region and the p + region, respectively, even if the number of steps is reduced.
- first conductivity type and the “second conductivity type” in the claims are “n-type” and “p-type”, respectively.
- first conductivity type and second conductivity type in the claims are “p-type” and “n-type”, respectively.
- FIG. 1 and 2 are diagrams showing a configuration of a back electrode type solar cell 1 according to a first embodiment of the present invention.
- FIG. 1 is a plan view schematically showing the configuration of a back electrode solar cell 1 according to the present embodiment.
- the back electrode solar cell 1 according to the present embodiment is viewed from the back side of the silicon substrate. It is a top view.
- the strip-shaped n-type electrodes 2 and the strip-shaped p-type electrodes 3 are alternately arranged.
- FIG. 2 is a cross-sectional view taken along line II-II ′ shown in FIG.
- An uneven shape 5 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 4.
- a light-receiving surface side passivation film 6 is formed on the light-receiving surface of the n-type silicon substrate 4, and an antireflection film 7 is formed on the light-receiving surface side passivation film 6.
- the light-receiving surface side passivation film 6 is preferably, for example, a silicon oxide film or a silicon nitride film.
- the thickness of the light-receiving surface side passivation film 6 is preferably 10 nm or less, for example.
- the antireflection film 7 preferably has a refractive index lower than that of the light receiving surface side passivation film 6, and is preferably a silicon nitride film having a nitrogen content higher than that of the light receiving surface side passivation film 6, for example.
- the thickness of the antireflection film 7 is preferably, for example, 50 nm or less and 100 nm or less.
- n + regions 9 that are n-type semiconductor regions and p + regions 10 that are p-type semiconductor regions are alternately formed adjacent to each other.
- a first backside passivation film 11 is formed on the n + region 9, and a second backside passivation film 12 is formed on the p + region 10 and the first backside passivation film 11. Yes.
- the first back side passivation film 11 is preferably, for example, a silicon oxide film.
- the thickness of the first back side passivation film 11 is preferably not less than 50 nm and not more than 100 nm, for example.
- the second back side passivation film 12 is preferably, for example, an aluminum oxide film.
- the thickness of the second back surface side passivation film 12 is preferably not less than 5 nm and not more than 50 nm, for example.
- the n-type electrode 2 is connected to the n + region 9, and the p-type electrode 3 is connected to the p + region 10.
- the total area of the p + region 10 having a conductivity type different from that of the n-type silicon substrate 4 on the back surface of the n-type silicon substrate 4 is the same as that of the n-type silicon substrate 4. It is preferable to make it larger than the total area of the n + region 9 having a mold.
- Adjacent n + regions 9 may be separated in a direction perpendicular to the length direction of the n + region 9. At this time, a p + region 10 is formed between the n + regions 9. Further, when the p + region 10 are separated in a direction perpendicular to the length direction of the p + region 10, n + region 9 between p + region 10 is formed.
- the back electrode type solar cell 1 since the conductivity type of the electrode located in the most periphery is the same in the back surface side of the n-type silicon substrate 4, it is possible to make the back electrode type solar cell 1 into a rotationally symmetric structure. . Therefore, when producing a solar cell module by arranging a plurality of back electrode type solar cells 1, for example, the back electrode type solar cell 1 can be arranged upside down in FIG. 1.
- FIG. 3 is a cross-sectional view showing the method of manufacturing the back electrode type solar cell 1 according to this embodiment in the order of steps.
- a texture mask 21 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 4 by, for example, a CVD (Chemical Vapor Deposition) method or a sputtering method.
- CVD Chemical Vapor Deposition
- an uneven shape 5 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 4 by etching.
- This etching is preferably performed using, for example, a mixed solution obtained by adding isopropyl alcohol to an alkaline aqueous solution such as sodium hydroxide or potassium hydroxide to 70 ° C. or higher and 80 ° C. or lower.
- the texture mask 21 formed on the back surface of the n-type silicon substrate 4 is removed. Thereafter, a first back surface passivation film forming film containing a first conductivity type dopant is formed on the entire back surface of the n-type silicon substrate 4 by, for example, a CVD method, and on the first back surface passivation film forming film, A film for forming a diffusion prevention film is formed by, for example, a CVD method.
- the first conductivity type dopant is an n-type dopant such as phosphorus.
- the first back-side passivation film forming film is preferably a silicon oxide film, for example, and the thickness of the first back-side passivation film forming film is preferably, for example, from 50 nm to 100 nm.
- the diffusion preventing film forming film is preferably, for example, a silicon oxide film or a silicon nitride film.
- the thickness of the diffusion preventing film forming film is preferably, for example, 200 nm or more and 500 nm or less. This prevents the second conductivity type dopant from penetrating the diffusion prevention film 34 (see FIG. 3D) in the thickness direction during the heat treatment in FIG.
- the portion of the n-type silicon substrate 4 located under the diffusion prevention film 34 (in other words, the n-type silicon substrate 4 It is possible to prevent diffusion toward the region in which the n + region 9 is formed.
- the first back surface passivation film forming film and the diffusion preventing film forming film are formed only on the region where the n + region 9 is formed.
- the first backside passivation film formation film and the diffusion prevention film formation film are patterned so that the film remains. This patterning is preferably performed by applying an etching paste by a screen printing method or the like and then heating. By this patterning, the first back-side passivation film 11 and the diffusion prevention film 34 are sequentially formed on the region where the n + region 9 is formed. Thereafter, the n-type silicon substrate 4 is subjected to ultrasonic cleaning and then acid-treated to remove the etching paste used for patterning.
- the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
- the n-type silicon substrate 4 is exposed from the first back-side passivation film 11 and the diffusion prevention film 34 on the back surface (specifically, on the back surface of the n-type silicon substrate 4).
- a film 31 containing a second conductivity type dopant is formed by, for example, the CVD method, and a diffusion control film 32 is formed on the film 31 containing the second conductivity type dopant, for example. It is formed by the CVD method.
- the second conductivity type dopant is a p-type dopant such as boron.
- the n-type silicon substrate 4 is heat-treated.
- the second conductivity type dopant diffuses from the film 31 containing the second conductivity type dopant to the portion located below the film 31 containing the second conductivity type dopant on the back side of the n-type silicon substrate 4.
- the p + region 10 is formed.
- the first conductivity type dopant diffuses from the first back surface side passivation film 11 to a portion of the back surface side of the n-type silicon substrate 4 located below the first back surface side passivation film 11, and thus the n + region 9. Is formed.
- the n + region 9 and the p + region 10 can be formed simultaneously.
- the n + region 9 and the p + region 10 are formed so as to be adjacent to each other.
- the diffusion preventing film 34 is provided between the first back surface side passivation film 11 and the film 31 containing the second conductivity type dopant, the second conductivity type dopant remains in the second conductivity even after the heat treatment. It is possible to prevent diffusion from the film 31 containing the conductive dopant toward the portion of the n-type silicon substrate 4 located below the diffusion prevention film 34. Further, since the diffusion control film 32 is provided on the film 31 containing the second conductivity type dopant, it is possible to prevent the second conductivity type dopant from being out-diffused even if the heat treatment is performed. .
- the diffusion control film 32, the film 31 containing the second conductivity type dopant and the diffusion prevention film 34 formed on the back surface of the n-type silicon substrate 4 are removed by etching. .
- a film 31 containing a second conductivity type dopant and a diffusion control film 32 are formed on the p + region 10, and a film 31 containing the second conductivity type dopant and a diffusion are formed on the n + region 9.
- the first back surface side passivation film 11 and the diffusion preventing film 34 are formed. Therefore, if etching is performed until the film 31 containing the second conductivity type dopant and the diffusion control film 32 are removed, only the first back-side passivation film 11 remains.
- a second back surface passivation film 12 different from the first back surface passivation film 11 is formed on the back surface of the n-type silicon substrate 4 by, for example, sputtering or CVD. . Since the first back surface side passivation film 11 is formed on the n + region 9, the second back surface side passivation film 12 is formed on the p + region 10 and on the first back surface side passivation film 11. Thereafter, a light-receiving surface side passivation film 6 and an antireflection film 7 are sequentially formed on the light-receiving surface of the n-type silicon substrate 4 by, for example, a CVD method.
- the second back side passivation film 12 is preferably, for example, an aluminum oxide film.
- Both the light-receiving surface side passivation film 6 and the antireflection film 7 are preferably silicon nitride films, and the nitrogen content is preferably higher in the antireflection film 7 than in the light-receiving surface side passivation film 6, and the refractive index is reflected.
- the prevention film 7 is preferably lower than the light-receiving surface side passivation film 6.
- the light-receiving surface side passivation film 6 may be a silicon oxide film.
- the light receiving surface side of the n-type silicon substrate 4 is shown above.
- the first back-side passivation film 11 and the second back-side passivation film 12 are patterned.
- the second back-side passivation film 12 is patterned. Thereby, a part of the n + region 9 is exposed from the first back surface side passivation film 11 and the second back surface side passivation film 12, and a part of the p + region 10 is exposed from the second back surface side passivation film 12.
- This patterning is preferably performed, for example, by applying an etching paste by screen printing or the like and then heating. Thereafter, the n-type silicon substrate 4 is subjected to ultrasonic cleaning and then acid-treated to remove the etching paste used for patterning.
- the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
- the back electrode type solar cell 1 can be manufactured without providing a step of diffusing the second conductivity type dopant separately from the step of diffusing the first conductivity type dopant.
- the mask used to form the n + region 9 and the mask used to form the p + region 10 can be removed simultaneously. Therefore, the number of manufacturing steps of the back electrode type solar cell 1 can be reduced.
- the method for manufacturing the back electrode type solar cell 1 according to the present embodiment the first back side passivation film 11 is formed on the n + region 9, and the second back side passivation is formed on the p + region 10. A film 12 is formed.
- the back electrode type solar cell 1 can be manufactured without requiring many facilities, the productivity of the back electrode type solar cell 1 is improved.
- the n + region 9 is formed using the first back surface side passivation film 11. Therefore, the first back-side passivation film 11 can be formed on the n + region 9 without causing a positional shift.
- the second back surface side passivation film 12 is formed on the entire back surface of the n-type silicon substrate 4, it is formed not only on the first back surface side passivation film 11 but also on the p + region 10. Therefore, the second back-side passivation film 12 can be formed on the p + region 10 without causing a positional shift.
- the aluminum oxide film has a negative fixed charge. Therefore, if the second back surface passivation film 12 is made of an aluminum oxide film, the back electrode solar cell 1 having high passivation properties on the p + region 10 can be manufactured.
- FIG. 4 is a cross-sectional view showing the method of manufacturing the back electrode type solar cell 71 according to the second embodiment of the present invention in the order of steps.
- the first back side passivation film does not contain the first conductivity type dopant.
- the manufacturing method of the back surface electrode type solar cell 71 according to the present embodiment is different from the manufacturing method of the back surface electrode type solar cell 1 according to the first embodiment in the method of forming the n + region 9.
- the manufacturing method of the back electrode type solar cell 71 according to this embodiment will be described in the order of steps.
- a texture mask 21 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 4 as in the step shown in FIG. 3A in the first embodiment.
- a texture mask 21 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 4 as in the step shown in FIG. 3A in the first embodiment.
- it is formed by a CVD method or a sputtering method.
- the uneven shape 5 which is a textured structure is etched on the light receiving surface of the n-type silicon substrate 4 by etching. Form.
- the texture mask 21 formed on the back surface of the n-type silicon substrate 4 is removed.
- a diffusion mask 22 made of, for example, silicon oxide is formed on the light receiving surface of the n-type silicon substrate 4.
- a diffusion mask 23 is formed on a region different from the region where n + region 9 is formed on the back surface of n-type silicon substrate 4.
- the diffusion mask 23 is formed, for example, by applying a masking paste containing a solvent, a thickener, and a silicon oxide precursor by inkjet or screen printing and then performing a heat treatment.
- a gas containing a dopant of the first conductivity type is diffused in a gas phase. Accordingly, the first conductivity type dopant is diffused into the portion of the back surface of the n-type silicon substrate 4 exposed from the diffusion mask 23. Thereby, n + region 9 is formed.
- the first conductivity type dopant is phosphorus
- POCl 3 can be used as the gas containing the first conductivity type dopant.
- n-type silicon is used in a gas atmosphere containing the first conductivity type dopant at a temperature of 800 ° C. to 900 ° C. for 10 minutes to 60 minutes.
- the substrate 4 is exposed.
- an n + region 9 having a dopant concentration of the first conductivity type of 10 20 cm ⁇ 3 or more is formed.
- the diffusion masks 22 and 23 formed on the n-type silicon substrate 4 and the glass layer formed by diffusing phosphorus in the diffusion masks 22 and 23 are combined with hydrogen fluoride. Remove by acid treatment. Thereafter, thermal oxidation with oxygen or water vapor is performed. Thereby, a silicon oxide film 24 is formed on the light receiving surface of the n-type silicon substrate 4, and a first back-side passivation film forming film 11 ⁇ / b> A is formed on the back surface of the n-type silicon substrate 4. At this time, as shown in FIG.
- the thickness of the first back surface passivation film forming film 11 ⁇ / b > A formed on the n + region 9 was formed on a region different from the n + region 9. It becomes thicker than the thickness of the first backside passivation film forming film 11A.
- the growth rate of the film by thermal oxidation is determined by the type of impurity diffused in the silicon substrate and the concentration of the impurity. In particular, when the n-type impurity concentration in the silicon substrate is high, the growth rate of the film by thermal oxidation increases.
- n-type impurity concentration it n + region 9 is higher than a region different from the n + region 9.
- the first is more of the thickness of the back side passivation film forming film 11A, a first for the back side passivation film formed formed on the area different from the n + region 9 formed on the n + region 9 It becomes thicker than the thickness of the film 11A.
- the first back surface passivation film forming film 11A is formed by combining silicon and oxygen during thermal oxidation.
- the n-type silicon substrate 4 the surface of the n + region 9 is recessed n-type silicon substrate 4 side than the surface of a region different from the n + region 9.
- the first back side passivation film 11 (see FIG. 4 (e)) as a diffusion mask for the n + region 9 during the formation of the p + region 10 is formed on the n + region 9 first
- the difference between the thickness of the first back surface passivation film forming film 11A and the thickness of the first back surface passivation film forming film 11A formed on a region different from the n + region 9 is preferably 60 nm or more.
- 11A is removed by etching.
- the back surface of the n-type silicon substrate 4, the thickness of the first back side passivation film forming film 11A formed on the n + region 9, first back surface formed on a region different from the n + region 9 It is thicker than the thickness of the side passivation film forming film 11A.
- the first backside passivation film forming film 11A is etched until the first backside passivation film forming film 11A formed on a region different from the n + region 9 is removed, the first backside passivation is performed.
- the film forming film 11A remains only on the n + region 9. Thereby, the 1st back surface side passivation film 11 is formed.
- a diffusion mask 25 made of silicon oxide or the like is formed on the light receiving surface of the n-type silicon substrate 4.
- the polymer obtained by reacting the organic polymer with a compound containing a dopant of the second conductivity type is exposed to a portion of the back surface of the n-type silicon substrate 4 exposed from the first back surface passivation film 11 with an alcohol solvent.
- the solution obtained by dissolving in is applied. When the solution is dry, heat treatment is performed. As a result, the second conductivity type dopant diffuses into the portion of the back surface of the n-type silicon substrate 4 exposed from the first back surface passivation film 11. Therefore, p + region 10 is formed.
- the second conductivity type dopant is boron
- a boron compound can be used as the compound containing the second conductivity type dopant.
- heating the n-type silicon substrate 4 at 900 ° C. or more and 1000 ° C. or less for 10 minutes or more and 60 minutes or less can be mentioned.
- the p + region 10 having the second conductivity type dopant concentration of 10 20 cm ⁇ 3 or more is formed.
- the first back surface side passivation film 11 also functions as a film (diffusion mask) for preventing the second conductivity type dopant from diffusing into the n + region 9.
- FIG. 4F the light receiving surface side of the n-type silicon substrate 4 is shown above.
- the diffusion mask 25 and the glass layer formed by diffusing boron in the diffusion mask 25 are removed by hydrofluoric acid treatment.
- a second back surface passivation film 12 different from the first back surface passivation film 11 is formed on the back surface of the n-type silicon substrate 4 by, for example, a sputtering method or a CVD method. Since the first back surface side passivation film 11 is formed on the n + region 9, the second back surface side passivation film 12 is formed on the p + region 10 and on the first back surface side passivation film 11.
- a light-receiving surface side passivation film 6 and an antireflection film 7 are sequentially formed on the light-receiving surface of the n-type silicon substrate 4 by, for example, a CVD method.
- the second back side passivation film 12 is preferably, for example, an aluminum oxide film.
- Both the light-receiving surface side passivation film 6 and the antireflection film 7 are preferably silicon nitride films, and the nitrogen content is preferably higher in the antireflection film 7 than in the light-receiving surface side passivation film 6, and the refractive index is reflected.
- the prevention film 7 is preferably lower than the light-receiving surface side passivation film 6.
- the light-receiving surface side passivation film 6 may be a silicon oxide film.
- the n-type electrode 2 on the n + region 9 in the same manner as the step shown in FIG. Patterning is performed on the back side passivation film 11 and the second back side passivation film 12. Further, in order to form the p-type electrode 3 on the p + region 10, the second back surface passivation film 12 is patterned.
- the patterning method the composition of the etching paste, and the method for removing the etching paste, the same method as the step shown in FIG. 3G in the first embodiment can be used.
- the first back-side passivation film 11 and the second back-side passivation in the n + region 9 are used.
- a silver paste is applied onto the portion exposed from the film 12 and the portion exposed from the second back-side passivation film 12 in the p + region 10 by, for example, a screen printing method and then dried. Thereafter, it is fired.
- the n-type electrode 2 is formed on the n + region 9 and the p-type electrode 3 is formed on the p + region 10. In this way, the back electrode type solar cell 71 is manufactured.
- the diffusion mask for forming the p + region 10 is the first back surface passivation film 11. Therefore, the back electrode type solar cell 71 can be manufactured without providing the step of forming the first back side passivation film 11 separately from the step of forming the diffusion mask for forming the p + region 10.
- the p + region 10 is formed by applying a solution containing a second conductivity type dopant. Therefore, back electrode type solar cell 71 can be manufactured without forming and removing a diffusion mask for forming p + region 10. Therefore, the number of manufacturing steps of the back electrode type solar cell 71 can be reduced.
- the first back surface passivation film 11 is formed on the n + region 9, and the second back surface passivation is formed on the p + region 10.
- a film 12 is formed.
- the back electrode type solar cell 71 can be manufactured without requiring many facilities, the productivity of the back electrode type solar cell 71 is improved.
- the first back side passivation film 11 is formed on the n + region 9 by thermally oxidizing the n-type silicon substrate 4, the first back side passivation film is formed on the n + region 9 without causing positional displacement. 11 can be formed.
- the second back surface side passivation film 12 is formed on the entire back surface of the n-type silicon substrate 4, it is formed not only on the first back surface side passivation film 11 but also on the p + region 10. Therefore, the second back-side passivation film 12 can be formed on the p + region 10 without causing a positional shift.
- the aluminum oxide film has a negative fixed charge. Therefore, if the second back surface side passivation film 12 is made of an aluminum oxide film, the back electrode type solar cell 71 having high passivation properties on the p + region 10 can be manufactured.
- the n + region 9 may be formed after the p + region 10 is formed.
- the p + region 10 can be formed using a gas containing boron or the like, and the n + region 9 can be formed using a solution containing phosphorus or the like.
- FIG. 5 to 6 are diagrams showing the configuration of a back electrode type solar cell 81 according to the third embodiment of the present invention.
- FIG. 5 is a plan view schematically showing the configuration of the back electrode type solar cell 81 according to this embodiment.
- the back electrode type solar cell 81 according to this embodiment is seen from the back side of the silicon substrate. It is a top view.
- the strip-shaped n-type electrodes 102 and the strip-shaped p-type electrodes 103 are alternately arranged.
- FIG. 6 is a cross-sectional view taken along line VI-VI ′ shown in FIG.
- An uneven shape 105 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 104.
- a light-receiving surface side passivation film 106 is formed on the light-receiving surface of the n-type silicon substrate 104, and an antireflection film 107 is formed on the light-receiving surface side passivation film 106.
- the light-receiving surface side passivation film 106 is preferably, for example, a silicon oxide film or a silicon nitride film.
- the thickness of the light-receiving surface side passivation film 106 is preferably 10 nm or less, for example.
- the antireflection film 107 preferably has a lower refractive index than the light-receiving surface side passivation film 106, and is preferably a silicon nitride film having a higher nitrogen content than the light-receiving surface side passivation film 106, for example.
- the thickness of the antireflection film 107 is preferably, for example, 50 nm or less and 100 nm or less.
- n + regions 109 that are n-type semiconductor regions and p + regions 110 that are p-type semiconductor regions are formed alternately adjacent to each other.
- a first back-side passivation film 111 is formed on the p + region 110, and a second back-side passivation film 112 is formed on the n + region 109 and the first back-side passivation film 111.
- the first back side passivation film 111 is preferably, for example, a silicon oxide film.
- the thickness of the first back-side passivation film 111 is preferably, for example, not less than 50 nm and not more than 100 nm.
- the second back side passivation film 112 is preferably a silicon nitride film, for example.
- the thickness of the second back surface side passivation film 112 is preferably not less than 5 nm and not more than 50 nm, for example.
- the n-type electrode 102 is connected to the n + region 109, and the p-type electrode 103 is connected to the p + region 110.
- the total area of the p + region 110 having a conductivity type different from that of the n-type silicon substrate 104 on the back surface of the n-type silicon substrate 104 is set to the same conductivity type as that of the n-type silicon substrate 104. It is preferable to make it larger than the total area of the n + regions 109.
- Adjacent n + regions 109 may be separated in a direction perpendicular to the length direction of the n + region 109. At this time, a p + region 110 is formed between the n + regions 109. Further, when the p + region 110 are separated in a direction perpendicular to the length direction of the p + region 110, n + region 109 between p + region 110 is formed.
- the back electrode type solar cell 81 can have a rotationally symmetric structure. . Therefore, when producing a solar cell module by arranging a plurality of back electrode solar cells 81, for example, the back electrode solar cells 81 can be arranged upside down in FIG.
- FIG. 7 is a cross-sectional view showing the method of manufacturing the back electrode type solar cell 81 according to this embodiment in the order of steps.
- a texture mask 121 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 104 by, for example, CVD or sputtering.
- an uneven shape 105 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 104 by etching.
- This etching is preferably performed using, for example, a mixed solution obtained by adding isopropyl alcohol to an alkaline aqueous solution such as sodium hydroxide or potassium hydroxide to 70 ° C. or higher and 80 ° C. or lower.
- the back side of the n-type silicon substrate 104 is described above.
- the texture mask 121 formed on the back surface of the n-type silicon substrate 104 is removed.
- a first back-side passivation film forming film containing a first conductivity type dopant is formed on the entire back surface of the n-type silicon substrate 104 by, for example, a CVD method, and the first back-side passivation film forming film is formed on the first back-side passivation film forming film.
- a film for forming a diffusion prevention film is formed by, for example, a CVD method.
- the first conductivity type dopant is a p-type dopant such as boron.
- the first back-side passivation film forming film is preferably a silicon oxide film, for example, and the thickness of the first back-side passivation film forming film is preferably, for example, from 50 nm to 100 nm.
- the diffusion preventing film forming film is preferably, for example, a silicon oxide film or a silicon nitride film.
- the thickness of the diffusion preventing film forming film is preferably, for example, 200 nm or more and 500 nm or less. Accordingly, the second conductivity type dopant can be prevented from penetrating through the diffusion prevention film 132 (see FIG.
- the second conductivity type dopant can be prevented. From the film 133 containing the second conductivity type dopant (see FIG. 7D), a portion of the n-type silicon substrate 104 located under the diffusion barrier film 132 (in other words, of the n-type silicon substrate 104 Diffusion toward the region where the p + region 110 is formed) can be prevented.
- the first back side passivation film formation film and the diffusion prevention film formation film are formed only on the region where the n + region 109 is formed.
- the first backside passivation film formation film and the diffusion prevention film formation film are patterned so that the film is removed. This patterning is preferably performed by applying an etching paste by a screen printing method or the like and then heating. By this patterning, the first back-side passivation film 111 and the diffusion preventing film 132 are formed, and the region where the n + region 109 is formed is exposed from the first back-side passivation film 111 and the diffusion preventing film 132.
- the n-type silicon substrate 104 is subjected to ultrasonic cleaning and then acid-treated to remove the etching paste used for patterning.
- the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
- the n-type silicon substrate 104 is exposed from the first back-side passivation film 111 and the diffusion prevention film 132 on the back surface (specifically, on the back surface of the n-type silicon substrate 104).
- a film 133 containing a second conductivity type dopant is formed by, for example, the CVD method, and a diffusion control film 134 is formed on the film 133 containing the second conductivity type dopant, for example. It is formed by the CVD method.
- the second conductivity type dopant is an n-type dopant such as phosphorus.
- the film 133 containing the second conductivity type dopant is preferably, for example, a silicon oxide film, and the thickness of the film 133 containing the second conductivity type dopant is preferably, for example, not less than 50 nm and not more than 100 nm.
- the diffusion control film 134 is preferably a silicon oxide film or a silicon nitride film, for example.
- the thickness of the diffusion control film 134 is preferably, for example, not less than 200 nm and not more than 500 nm.
- the n-type silicon substrate 104 is heat-treated.
- the first conductivity type dopant diffuses from the first back surface side passivation film 111 to the portion of the back surface side of the n-type silicon substrate 104 located below the first back surface side passivation film 111, and thus the p + region. 110 is formed.
- the second conductivity type dopant diffuses from the film 133 containing the second conductivity type dopant to a portion located below the film 133 containing the second conductivity type dopant on the back side of the n-type silicon substrate 104, Therefore, n + region 109 is formed.
- the n + region 109 and the p + region 110 can be formed simultaneously.
- the n + region 109 and the p + region 110 are formed adjacent to each other.
- the dopant concentration of the second conductivity type is formed 10 20 cm -3 or more n + region 109
- the dopant concentration of the first conductivity type is 10 20 cm -3 or more p + region 110 is formed.
- the diffusion prevention film 132 is provided between the first back surface side passivation film 111 and the film 133 containing the second conductivity type dopant, the second conductivity type dopant remains the second even if the heat treatment is performed. It is possible to prevent diffusion from the film 133 containing the conductive dopant toward the portion of the n-type silicon substrate 104 located under the diffusion prevention film 132. Further, since the diffusion control film 134 is provided on the film 133 containing the second conductivity type dopant, it is possible to prevent the second conductivity type dopant from being out-diffused.
- the diffusion control film 134, the film 133 containing the second conductivity type dopant, and the diffusion prevention film 132 formed on the back surface of the n-type silicon substrate 104 are removed by etching.
- a film 133 containing a second conductivity type dopant and a diffusion control film 134 are formed on the n + region 109, and a film 133 containing a second conductivity type dopant and a diffusion layer are formed on the p + region 110.
- a first back-side passivation film 111 and a diffusion prevention film 132 are formed. Therefore, if etching is performed until the film 133 containing the second conductivity type dopant and the diffusion control film 134 are removed, only the first back-side passivation film 111 remains.
- a second back surface passivation film 112 different from the first back surface passivation film 111 is formed on the back surface of the n-type silicon substrate 104 by, for example, sputtering or CVD. . Since the first back surface side passivation film 111 is formed on the p + region 110, the second back surface side passivation film 112 is formed on the n + region 109 and the first back surface side passivation film 111. Thereafter, a light-receiving surface side passivation film 106 and an antireflection film 107 are formed on the light-receiving surface of the n-type silicon substrate 104 by, for example, a CVD method.
- the second back side passivation film 112 is preferably a silicon nitride film, for example.
- Both the light receiving surface side passivation film 106 and the antireflection film 107 are preferably silicon nitride films, and the nitrogen content is preferably higher in the antireflection film 107 than in the light receiving surface side passivation film 106, and the refractive index is reflected.
- the prevention film 107 is preferably lower than the light-receiving surface side passivation film 106.
- the light-receiving surface side passivation film 106 may be a silicon oxide film.
- the light receiving surface side of the n-type silicon substrate 104 is shown above.
- the second back surface side passivation film 112 is patterned.
- the first back surface side passivation film 111 and the second back surface side passivation film 112 are patterned. This patterning is preferably performed, for example, by applying an etching paste by screen printing or the like and then heating. Thereafter, the n-type silicon substrate 104 is subjected to ultrasonic cleaning and acid treatment to remove the etching paste used for patterning.
- the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
- the n + region 109 is exposed on the portion exposed from the second back surface side passivation film 112 and the first back surface side passivation film 111 and the second surface in the p + region 110.
- a silver paste is applied onto the portion exposed from the back-side passivation film 112 by, for example, a screen printing method and then dried. Thereafter, it is fired.
- the n-type electrode 102 is formed on the n + region 109
- the p-type electrode 103 is formed on the p + region 110. In this way, the back electrode type solar cell 81 is manufactured.
- the first back surface passivation film 111 is formed of a film containing the first conductivity type dopant necessary for forming the p + region 110. It is said. Therefore, the back electrode type solar cell 81 can be manufactured without providing a separate step of forming the first back side passivation film 111. Further, in the method of manufacturing the back electrode type solar cell 81 according to this embodiment, in the step shown in FIG. 7D, the p + region 110 is formed by diffusing the first conductivity type dopant and the second conductivity type. N + region 109 is formed by diffusing the dopant.
- the back electrode type solar cell 81 can be manufactured without providing a step of diffusing the second conductivity type dopant separately from the step of diffusing the first conductivity type dopant.
- the mask used to form the n + region 109 and the mask used to form the p + region 110 can be removed at the same time. Therefore, the number of manufacturing steps of the back electrode type solar cell 81 can be reduced.
- the second back surface passivation film 112 is formed on the n + region 109 and the first back surface passivation is formed on the p + region 110.
- a film 111 is formed.
- the n + region 109 and the p + region 110 are different.
- a passivation film can be formed.
- the back electrode type solar cell 81 can be manufactured without requiring many facilities, the productivity of the back electrode type solar cell 81 is improved.
- the p + region 110 is formed using the first back surface side passivation film 111. Therefore, the first back-side passivation film 111 can be formed on the p + region 110 without causing a positional shift.
- the second back surface side passivation film 112 is formed on the entire back surface of the n-type silicon substrate 104, it is formed not only on the first back surface side passivation film 111 but also on the n + region 109. Therefore, the second back-side passivation film 112 can be formed on the n + region 109 without causing a positional shift.
- the silicon nitride film has a positive fixed charge. Therefore, if the second back surface side passivation film 112 is formed of a silicon nitride film, the back electrode type solar cell 81 having high passivation properties on the n + region 109 can be manufactured.
- the back electrode type solar cell provided with the n-type silicon substrate has been described, but a p-type silicon substrate may be used as the substrate.
- a p-type silicon substrate is used as the substrate, in order to obtain a higher short-circuit current, the total area of n + regions having a conductivity type different from that of the substrate on the back surface of the substrate is the same as that of the substrate. It is preferable to make it larger than the total area of the p + region.
- the concept of the back electrode type solar cell of the present invention includes an MWT (Metal Wrap Through) type solar cell (in this solar cell, a part of the electrode is disposed in a through hole provided in a semiconductor substrate), etc. Is also included.
- MWT Metal Wrap Through
Abstract
Disclosed is a method of manufacturing a rear face electrode type solar battery (1), including: a step for forming a first rear face side passivation film (11) including first conductivity type dopant; a step of forming a film (31) containing second conductivity type dopant; a step in which, by heat treatment of a silicon substrate (4), a first conductivity type semiconductor region (9) is formed by first conductivity type dopant being dispersed from the first rear face side passivation film (11) in part of the silicon substrate (4), and a second conductivity type semiconductor region (10) is formed by second conductivity type dopant being dispersed from the film (31) containing second conductivity type dopant in at least part of a region of the silicon substrate (4) that is different from the region in which the first conductivity type dopant is dispersed; a step of removing the film (31) containing the second conductivity type dopant; and a step of forming a second rear face side passivation film (12). In this way, the p+ region (10) can be formed by dispersing the second conductivity type dopant without needing to separately provide a first rear face side passivation film, and at the same time as the formation of the n+ region (9) by dispersion of the first conductivity type dopant.
Description
本発明は、裏面電極型太陽電池の製造方法、特に、裏面電極型太陽電池の半導体領域上のパッシベーション膜の形成方法に関する。
The present invention relates to a method for manufacturing a back electrode type solar cell, and more particularly to a method for forming a passivation film on a semiconductor region of a back electrode type solar cell.
近年、エネルギ資源の枯渇という問題および大気中のＣＯ2の増加のような地球環境問題などから、クリーンなエネルギの開発が望まれている。特に太陽電池を用いた太陽光発電が新しいエネルギ源として開発且つ実用化され、発展の道を歩んでいる。
In recent years, development of clean energy has been desired due to problems such as exhaustion of energy resources and global environmental problems such as an increase in atmospheric CO 2 . In particular, solar power generation using solar cells has been developed and put into practical use as a new energy source, and is on the path of development.
太陽電池としては、従来から、たとえば単結晶または多結晶のシリコン基板のうち光が入射される側に位置する面（以下、「シリコン基板の受光面」という）に、シリコン基板の導電型とは異なる導電型を有する不純物を拡散することによってｐｎ接合を形成し、シリコン基板の受光面と当該受光面の反対側に位置する面（以下、「シリコン基板の裏面」という。）とにそれぞれ電極を形成して製造されたものが主流となっている。
Conventionally, as a solar cell, the conductivity type of a silicon substrate is, for example, a surface of a single-crystal or polycrystalline silicon substrate located on a light incident side (hereinafter referred to as “light-receiving surface of a silicon substrate”). A pn junction is formed by diffusing impurities having different conductivity types, and electrodes are respectively provided on the light receiving surface of the silicon substrate and a surface located on the opposite side of the light receiving surface (hereinafter referred to as “the back surface of the silicon substrate”). The ones that are formed and manufactured are the mainstream.
また、シリコン基板の受光面には電極を形成せず、シリコン基板の裏面にｐｎ接合を形成した、いわゆる裏面電極型太陽電池が開発されている。裏面電極型太陽電池では、電極が受光面に設けられていないことから電極によるシャドウロスがなく、よって、シリコン基板の受光面および裏面にそれぞれ電極を有する上記の太陽電池と比べて高い出力を得ることが期待できる。裏面電極型太陽電池は、このような特性を活かしてソーラカーまたは集光用太陽電池などの用途に使用されている。特許文献１（特開２００８－１０７４６号公報）には、裏面のみに電極が形成された裏面接合型太陽電池の一例が示されている。
Also, a so-called back electrode type solar cell has been developed in which no electrode is formed on the light receiving surface of the silicon substrate, and a pn junction is formed on the back surface of the silicon substrate. In the back electrode type solar cell, since the electrode is not provided on the light receiving surface, there is no shadow loss due to the electrode, and thus a higher output is obtained compared to the above solar cell having electrodes on the light receiving surface and the back surface of the silicon substrate. I can expect that. Back electrode type solar cells are used in applications such as solar cars or concentrating solar cells by utilizing such characteristics. Patent Document 1 (Japanese Patent Laid-Open No. 2008-10746) shows an example of a back junction solar cell in which an electrode is formed only on the back surface.
図８は、特許文献１に開示されている裏面接合型太陽電池２００の構成の一例を模式的に示す断面図である。ｎ型のシリコン基板２０１の受光面には、反射防止膜２０９が形成されている。シリコン基板２０１の裏面には、ｎ+層２０５とｐ+層２０６とが形成されている。ｐ+層２０６上には第１パッシベーション膜２０３が形成されており、ｎ+層２０５上には第１パッシベーション膜２０３とは異なる第２パッシベーション膜２０４が形成されている。ｐ+層２０６にはｐ電極２０８が接続されており、ｎ+層２０５にはｎ電極２０７が接続されている。
FIG. 8 is a cross-sectional view schematically showing an example of the configuration of the back junction solar cell 200 disclosed in Patent Document 1. As shown in FIG. An antireflection film 209 is formed on the light receiving surface of the n-type silicon substrate 201. An n + layer 205 and a p + layer 206 are formed on the back surface of the silicon substrate 201. A first passivation film 203 is formed on the p + layer 206, and a second passivation film 204 different from the first passivation film 203 is formed on the n + layer 205. A p electrode 208 is connected to the p + layer 206, and an n electrode 207 is connected to the n + layer 205.
図９は、特許文献１に開示されている図８の裏面接合型太陽電池の製造方法の一例を工程順に示す断面図である。図９を参照しながら、図８に示す裏面接合型太陽電池の製造方法を説明する。
FIG. 9 is a cross-sectional view showing an example of the manufacturing method of the back junction solar cell of FIG. 8 disclosed in Patent Document 1 in the order of steps. With reference to FIG. 9, a method of manufacturing the back junction solar cell shown in FIG. 8 will be described.
まず、図９（ａ）に示すように、ｎ型のシリコン基板４０１を用意する。その後、図９（ｂ）に示すように、シリコン基板４０１の裏面に酸化珪素膜などからなるテクスチャマスク４１３を形成し、シリコン基板４０１の受光面にエッチングによりテクスチャ構造４１０を形成する。
First, as shown in FIG. 9A, an n-type silicon substrate 401 is prepared. 9B, a texture mask 413 made of a silicon oxide film or the like is formed on the back surface of the silicon substrate 401, and a texture structure 410 is formed on the light receiving surface of the silicon substrate 401 by etching.
次に、図９（ｃ）に示すように、まず、シリコン基板４０１の受光面および裏面の全面に、酸化珪素膜などからなる第１拡散マスク４１１を形成する。次に、シリコン基板４０１の裏面に形成された第１拡散マスク４１１上に、第１エッチングペーストをたとえばスクリーン印刷法などによって所望のパターンに印刷する。続いて、第１エッチングペーストが印刷されたシリコン基板４０１を加熱処理する。これにより、シリコン基板４０１の裏面に形成された第１拡散マスク４１１のうち第１エッチングペーストが印刷された部分のみがエッチングにより除去される。その後、シリコン基板４０１を水中に浸し、超音波を印加して超音波洗浄などを行なう。これにより、第１エッチングペーストが除去され、シリコン基板４０１の裏面に窓４１４が形成される。
Next, as shown in FIG. 9C, first, a first diffusion mask 411 made of a silicon oxide film or the like is formed on the entire light receiving surface and back surface of the silicon substrate 401. Next, a first etching paste is printed in a desired pattern on the first diffusion mask 411 formed on the back surface of the silicon substrate 401 by, for example, a screen printing method. Subsequently, the silicon substrate 401 on which the first etching paste is printed is subjected to heat treatment. As a result, only the portion of the first diffusion mask 411 formed on the back surface of the silicon substrate 401 on which the first etching paste is printed is removed by etching. Thereafter, the silicon substrate 401 is immersed in water, and ultrasonic cleaning is performed by applying ultrasonic waves. As a result, the first etching paste is removed, and a window 414 is formed on the back surface of the silicon substrate 401.
次に、図９（ｄ）に示すように、シリコン基板４０１に第１導電型不純物としてのｐ型不純物であるボロンなどを気相拡散させる。これにより、窓４１４に第１導電型不純物拡散層としてのｐ+層４０６が形成される。その後、シリコン基板４０１に形成された第１拡散マスク４１１とボロンが拡散してシリコン基板４０１に形成されたＢＳＧ（ボロンシリケートガラス）膜とをフッ化水素水溶液などを用いてすべて除去する。
Next, as shown in FIG. 9D, vapor phase diffusion of boron, which is a p-type impurity as the first conductivity type impurity, is performed on the silicon substrate 401. As a result, the p + layer 406 as the first conductivity type impurity diffusion layer is formed in the window 414. Thereafter, the first diffusion mask 411 formed on the silicon substrate 401 and the BSG (boron silicate glass) film formed on the silicon substrate 401 by diffusion of boron are all removed using a hydrogen fluoride aqueous solution or the like.
次に、図９（ｅ）に示すように、まず、シリコン基板４０１の受光面および裏面の全面に、酸化珪素膜などからなる第２拡散マスク４１２を形成する。次に、シリコン基板４０１の裏面に形成された第２拡散マスク４１２上に、第２エッチングペーストを所望のパターンに印刷する。第２エッチングペーストは上記の第１エッチングペーストと同一組成からなっても良いし、異なる組成からなっても良い。続いて、第２エッチングペーストが印刷されたシリコン基板４０１を加熱処理する。これにより、シリコン基板４０１の裏面に形成された第２拡散マスク４１２のうち第２エッチングペーストが印刷された部分のみがエッチングにより除去される。その後、図９（ｃ）に示す工程での処理を行なうことにより、シリコン基板４０１の裏面に窓４１５が形成される。
Next, as shown in FIG. 9E, first, a second diffusion mask 412 made of a silicon oxide film or the like is formed on the entire light receiving surface and back surface of the silicon substrate 401. Next, a second etching paste is printed in a desired pattern on the second diffusion mask 412 formed on the back surface of the silicon substrate 401. The second etching paste may have the same composition as the first etching paste, or may have a different composition. Subsequently, the silicon substrate 401 on which the second etching paste is printed is subjected to heat treatment. As a result, only the portion of the second diffusion mask 412 formed on the back surface of the silicon substrate 401 on which the second etching paste is printed is removed by etching. Thereafter, the window 415 is formed on the back surface of the silicon substrate 401 by performing the process in the step shown in FIG.
次に、図９（ｆ）に示すように、シリコン基板４０１に第２導電型不純物としてのｎ型不純物であるリンなどを気相拡散させる。これにより、窓４１５に第２導電型不純物拡散層としてのｎ+層４０５が形成される。その後、シリコン基板４０１に形成された第２拡散マスク４１２とリンが拡散してシリコン基板４０１に形成されたＰＳＧ（リンシリケートガラス）膜とをフッ化水素水溶液などを用いてすべて除去する。
Next, as shown in FIG. 9F, vapor phase diffusion of phosphorus, which is an n-type impurity as the second conductivity type impurity, is performed on the silicon substrate 401. As a result, an n + layer 405 as a second conductivity type impurity diffusion layer is formed in the window 415. Thereafter, the second diffusion mask 412 formed on the silicon substrate 401 and the PSG (phosphorus silicate glass) film formed on the silicon substrate 401 by diffusion of phosphorus are all removed using a hydrogen fluoride aqueous solution or the like.
次に、図９（ｇ）に示すように、シリコン基板４０１に対して熱酸化を行なう。これにより、シリコン基板４０１の裏面の全面に酸化珪素膜からなる第１パッシベーション膜４０３が形成される。なお、このとき同時にシリコン基板４０１の受光面の全面にも酸化珪素膜４０３ａが形成されることとなる。
Next, as shown in FIG. 9G, the silicon substrate 401 is thermally oxidized. As a result, a first passivation film 403 made of a silicon oxide film is formed on the entire back surface of the silicon substrate 401. At the same time, the silicon oxide film 403a is also formed on the entire light receiving surface of the silicon substrate 401.
次に、図９（ｈ）に示すように、第１パッシベーション膜４０３のうちｐ+層４０６上に形成された部分以外の部分をエッチングにより除去する。このとき用いるエッチングペーストは、上記の第１のエッチングペーストまたは上記の第２のエッチングペーストであっても良い。これにより、第１パッシベーション膜４０３はｐ+層４０６上にのみ残存する。
Next, as shown in FIG. 9H, portions of the first passivation film 403 other than the portion formed on the p + layer 406 are removed by etching. The etching paste used at this time may be the first etching paste or the second etching paste. As a result, the first passivation film 403 remains only on the p + layer 406.
次に、図９（ｉ）に示すように、第１パッシベーション膜４０３が除去されたシリコン基板４０１の裏面に第２パッシベーション膜４０４を形成する。具体的には、プラズマＣＶＤ法により窒化珪素からなる膜を形成することにより、シリコン基板４０１の裏面上およびｎ+層４０５上に第２パッシベーション膜４０４としての窒化珪素膜が形成される。この第２パッシベーション膜４０４は第１パッシベーション膜４０３上にも形成される。
Next, as shown in FIG. 9I, a second passivation film 404 is formed on the back surface of the silicon substrate 401 from which the first passivation film 403 has been removed. Specifically, a silicon nitride film as the second passivation film 404 is formed on the back surface of the silicon substrate 401 and the n + layer 405 by forming a film made of silicon nitride by plasma CVD. This second passivation film 404 is also formed on the first passivation film 403.
次に、図９（ｊ）に示すように、シリコン基板４０１の受光面に形成された酸化珪素膜４０３ａをフッ化水素水溶液などを用いてすべて除去してから、当該受光面上に窒化珪素膜などからなる反射防止膜４０９を形成する。また、第１パッシベーション膜４０３および第２パッシベーション膜４０４のそれぞれの一部を除去することにより、コンタクトホール４１６およびコンタクトホール４１７が形成される。これにより、ｎ+層４０５およびｐ+層４０６のそれぞれの一部が第２パッシベーション膜４０４などから露出する。なお、コンタクトホール４１６およびコンタクトホール４１７は以下の方法で形成される。第２パッシベーション膜４０４上にエッチングペーストを印刷してから、シリコン基板４０１を加熱処理する。これにより、エッチングペーストが印刷された第２パッシベーション膜４０４が除去される。加熱処理後に超音波洗浄を行なうなどによって、エッチングペーストを除去する。
Next, as shown in FIG. 9J, the silicon oxide film 403a formed on the light receiving surface of the silicon substrate 401 is completely removed using a hydrogen fluoride aqueous solution or the like, and then a silicon nitride film is formed on the light receiving surface. An antireflection film 409 made of or the like is formed. Further, by removing a part of each of the first passivation film 403 and the second passivation film 404, a contact hole 416 and a contact hole 417 are formed. As a result, a part of each of the n + layer 405 and the p + layer 406 is exposed from the second passivation film 404 and the like. Note that the contact hole 416 and the contact hole 417 are formed by the following method. After the etching paste is printed on the second passivation film 404, the silicon substrate 401 is heated. Thereby, the second passivation film 404 on which the etching paste is printed is removed. The etching paste is removed by performing ultrasonic cleaning after the heat treatment.
次に、図９（ｋ）に示すように、コンタクトホール４１６およびコンタクトホール４１７のそれぞれに銀ペーストを印刷した後、焼成する。これにより、ｎ+層４０５上にｎ電極４０７が形成され、ｐ+層４０６上にｐ電極４０８が形成される。このようにして図８に示す裏面接合型太陽電池が製造される。
Next, as shown in FIG. 9K, a silver paste is printed in each of the contact hole 416 and the contact hole 417, and then fired. As a result, an n electrode 407 is formed on the n + layer 405, and a p electrode 408 is formed on the p + layer 406. In this manner, the back junction solar cell shown in FIG. 8 is manufactured.
特許文献１に開示されている図９の裏面接合型太陽電池の製造方法では、シリコン基板の裏面にｎ+層とｐ+層とを形成する。そのため、ｎ+層の形成とｐ+層の形成とに対して、それぞれ、拡散マスクの形成工程、パターニング工程、不純物拡散工程、および拡散マスクの除去の工程などを行なう必要がある。また、ｎ+層の形成とｐ+層の形成とが終了してから、ｎ+層上とｐ+層上とにそれぞれ異なるパッシベーション膜を形成する。そのため、第１パッシベーション膜の形成工程、パターニング工程、第１パッシベーション膜をｐ+層上のみに残す工程、および、第２パッシベーション膜の形成工程などを行なう必要がある。以上より、図９の裏面接合型太陽電池の製造方法では、工程数が多くなる。
In the method for manufacturing the back junction solar cell of FIG. 9 disclosed in Patent Document 1, an n + layer and a p + layer are formed on the back surface of the silicon substrate. Therefore, it is necessary to perform a diffusion mask formation process, a patterning process, an impurity diffusion process, a diffusion mask removal process, and the like for the n + layer formation and the p + layer formation, respectively. Further, after the formation of the n + layer and the formation of the p + layer is completed, different passivation films are formed on the n + layer and the p + layer, respectively. Therefore, it is necessary to perform a first passivation film forming process, a patterning process, a process in which the first passivation film is left only on the p + layer, a second passivation film forming process, and the like. As described above, the number of steps increases in the method for manufacturing the back junction solar cell in FIG.
本発明は、かかる点に鑑みてなされたものであり、その目的とするところは、工程数を減らしてもｎ+領域上とｐ+領域上とにそれぞれ異なるパッシベーション膜を形成することが可能な裏面電極型太陽電池の製造方法を提供することにある。
The present invention has been made in view of this point, and the object of the present invention is to form different passivation films on the n + region and the p + region, respectively, even if the number of steps is reduced. It is providing the manufacturing method of a back electrode type solar cell.
本発明の第１の裏面電極型太陽電池の製造方法は、シリコン基板の裏面上の一部に、第１導電型のドーパントを含む第１裏面側パッシベーション膜を形成する工程と、シリコン基板の裏面上と第１裏面側パッシベーション膜上とに、第２導電型のドーパントを含む膜を形成する工程と、シリコン基板を熱処理することにより、第１導電型のドーパントが第１裏面側パッシベーション膜からシリコン基板の一部に拡散されて第１導電型の半導体領域が形成され、第２導電型のドーパントが第２導電型のドーパントを含む膜からシリコン基板のうち第１導電型のドーパントが拡散される領域とは異なる領域の少なくとも一部に拡散されて第２導電型の半導体領域が形成される工程と、第２導電型のドーパントを含む膜を除去する工程と、シリコン基板の裏面上と第１裏面側パッシベーション膜上とに、第２裏面側パッシベーション膜を形成する工程とを備える。
The first back electrode type solar cell manufacturing method of the present invention includes a step of forming a first back surface passivation film containing a first conductivity type dopant on a part of a back surface of a silicon substrate, and a back surface of the silicon substrate. A step of forming a film containing a second conductivity type dopant on the upper surface and the first back surface side passivation film; and a heat treatment of the silicon substrate, whereby the first conductivity type dopant is transferred from the first back surface side passivation film to silicon. A semiconductor region of the first conductivity type is formed by being diffused in a part of the substrate, and the dopant of the first conductivity type is diffused from the silicon substrate from a film in which the second conductivity type dopant contains the second conductivity type dopant. A step of diffusing in at least a part of a region different from the region to form a second conductivity type semiconductor region, a step of removing a film containing the second conductivity type dopant, and silicon On the on the back surface of the substrate and on the first back side passivation layer, and forming a second back side passivation film.
本発明の第２の裏面電極型太陽電池の製造方法は、シリコン基板の裏面上の一部に、第１導電型の半導体領域を形成する工程と、第１導電型の半導体領域上に、第１裏面側パッシベーション膜を形成する工程と、第２導電型のドーパントを含む溶液を用いて、シリコン基板の裏面のうち第１導電型の半導体領域とは異なる領域の少なくとも一部に、第２導電型の半導体領域を形成する工程と、シリコン基板の裏面上と第１裏面側パッシベーション膜上とに、第２裏面側パッシベーション膜を形成する工程とを備える。
The second back electrode type solar cell manufacturing method of the present invention includes a step of forming a first conductivity type semiconductor region on a part of a back surface of a silicon substrate, and a first conductivity type semiconductor region, The second conductive layer is formed on at least a part of the back surface of the silicon substrate different from the first conductive type semiconductor region by using a step of forming a back surface side passivation film and a solution containing a second conductive type dopant. Forming a semiconductor region of the mold, and forming a second back-side passivation film on the back surface of the silicon substrate and the first back-side passivation film.
ここで、本発明の裏面電極型太陽電池の製造方法では、第１導電型の半導体領域はｎ型であり、第２導電型の半導体領域はｐ型であってもよい。このとき、第２裏面側パッシベーション膜は、酸化アルミニウム膜であることが好ましい。
Here, in the method for manufacturing a back electrode type solar cell of the present invention, the first conductivity type semiconductor region may be n-type, and the second conductivity type semiconductor region may be p-type. At this time, the second back side passivation film is preferably an aluminum oxide film.
また、本発明の裏面電極型太陽電池の製造方法では、第１裏面側パッシベーション膜は、酸化シリコン膜であってもよい。
Further, in the method for manufacturing a back electrode type solar cell of the present invention, the first back surface passivation film may be a silicon oxide film.
本発明に係る裏面電極型太陽電池の製造方法によれば、工程数を減らしてもｎ+領域上とｐ+領域上とにそれぞれ異なるパッシベーション膜を形成することができる。
According to the method for manufacturing a back electrode type solar cell according to the present invention, different passivation films can be formed on the n + region and the p + region, respectively, even if the number of steps is reduced.
以下、本発明の裏面電極型太陽電池の製造方法について図面を用いて説明する。なお、本発明の図面において、同一の参照符号は、同一部分または相当部分を表すものである。また、長さ、幅、厚さ、深さなどの寸法関係は図面の明瞭化と簡略化のために適宜変更されており、実際の寸法関係を表すものではない。
Hereinafter, the manufacturing method of the back electrode type solar cell of the present invention will be described with reference to the drawings. In the drawings of the present invention, the same reference numerals represent the same or corresponding parts. In addition, dimensional relationships such as length, width, thickness, and depth are changed as appropriate for clarity and simplification of the drawings, and do not represent actual dimensional relationships.
下記第１～第２の実施形態では、請求の範囲における「第１導電型」および「第２導電型」がそれぞれ「ｎ型」および「ｐ型」である。一方、下記第３の実施形態では、請求の範囲における「第１導電型」および「第２導電型」がそれぞれ「ｐ型」および「ｎ型」である。
In the following first and second embodiments, the “first conductivity type” and the “second conductivity type” in the claims are “n-type” and “p-type”, respectively. On the other hand, in the following third embodiment, “first conductivity type” and “second conductivity type” in the claims are “p-type” and “n-type”, respectively.
＜第１の実施形態＞
図１～図２は、本発明の第１の実施形態に係る裏面電極型太陽電池１の構成を示す図である。図１は、本実施形態に係る裏面電極型太陽電池１の構成を模式的に示す平面図であり、具体的には本実施形態に係る裏面電極型太陽電池１をシリコン基板の裏面側からみた平面図である。本実施形態に係る裏面電極型太陽電池１のシリコン基板の裏面では、帯状のｎ型用電極２と帯状のｐ型用電極３とが交互に配置されている。 <First Embodiment>
1 and 2 are diagrams showing a configuration of a back electrode typesolar cell 1 according to a first embodiment of the present invention. FIG. 1 is a plan view schematically showing the configuration of a back electrode solar cell 1 according to the present embodiment. Specifically, the back electrode solar cell 1 according to the present embodiment is viewed from the back side of the silicon substrate. It is a top view. On the back surface of the silicon substrate of the back electrode type solar cell 1 according to the present embodiment, the strip-shaped n-type electrodes 2 and the strip-shaped p-type electrodes 3 are alternately arranged.
図１～図２は、本発明の第１の実施形態に係る裏面電極型太陽電池１の構成を示す図である。図１は、本実施形態に係る裏面電極型太陽電池１の構成を模式的に示す平面図であり、具体的には本実施形態に係る裏面電極型太陽電池１をシリコン基板の裏面側からみた平面図である。本実施形態に係る裏面電極型太陽電池１のシリコン基板の裏面では、帯状のｎ型用電極２と帯状のｐ型用電極３とが交互に配置されている。 <First Embodiment>
1 and 2 are diagrams showing a configuration of a back electrode type
図２は、図１に示すＩＩ－ＩＩ’線における断面図である。ｎ型シリコン基板４の受光面にはテクスチャ構造である凹凸形状５が形成されている。ｎ型シリコン基板４の受光面上には受光面側パッシベーション膜６が形成されており、受光面側パッシベーション膜６上には反射防止膜７が形成されている。受光面側パッシベーション膜６は、たとえば酸化シリコン膜または窒化シリコン膜であることが好ましい。受光面側パッシベーション膜６の厚さは、たとえば１０ｎｍ以下であることが好ましい。反射防止膜７は、受光面側パッシベーション膜６よりも屈折率が低いことが好ましく、たとえば受光面側パッシベーション膜６よりも窒素含有率が高い窒化シリコン膜であることが好ましい。反射防止膜７の厚さは、たとえば５０ｎｍ以下１００ｎｍ以下であることが好ましい。
FIG. 2 is a cross-sectional view taken along line II-II ′ shown in FIG. An uneven shape 5 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 4. A light-receiving surface side passivation film 6 is formed on the light-receiving surface of the n-type silicon substrate 4, and an antireflection film 7 is formed on the light-receiving surface side passivation film 6. The light-receiving surface side passivation film 6 is preferably, for example, a silicon oxide film or a silicon nitride film. The thickness of the light-receiving surface side passivation film 6 is preferably 10 nm or less, for example. The antireflection film 7 preferably has a refractive index lower than that of the light receiving surface side passivation film 6, and is preferably a silicon nitride film having a nitrogen content higher than that of the light receiving surface side passivation film 6, for example. The thickness of the antireflection film 7 is preferably, for example, 50 nm or less and 100 nm or less.
ｎ型シリコン基板４の裏面側には、ｎ型半導体領域であるｎ+領域９とｐ型半導体領域であるｐ+領域１０とが交互に隣接して形成されている。ｎ+領域９上には、第１裏面側パッシベーション膜１１が形成されており、ｐ+領域１０上と第１裏面側パッシベーション膜１１上とには、第２裏面側パッシベーション膜１２が形成されている。第１裏面側パッシベーション膜１１は、たとえば酸化シリコン膜であることが好ましい。第１裏面側パッシベーション膜１１の厚さは、たとえば５０ｎｍ以上１００ｎｍ以下であることが好ましい。第２裏面側パッシベーション膜１２は、たとえば酸化アルミニウム膜であることが好ましい。第２裏面側パッシベーション膜１２の厚さは、たとえば５ｎｍ以上５０ｎｍ以下であることが好ましい。ｎ型用電極２はｎ+領域９に接続されており、ｐ型用電極３はｐ+領域１０に接続されている。
On the back surface side of the n-type silicon substrate 4, n + regions 9 that are n-type semiconductor regions and p + regions 10 that are p-type semiconductor regions are alternately formed adjacent to each other. A first backside passivation film 11 is formed on the n + region 9, and a second backside passivation film 12 is formed on the p + region 10 and the first backside passivation film 11. Yes. The first back side passivation film 11 is preferably, for example, a silicon oxide film. The thickness of the first back side passivation film 11 is preferably not less than 50 nm and not more than 100 nm, for example. The second back side passivation film 12 is preferably, for example, an aluminum oxide film. The thickness of the second back surface side passivation film 12 is preferably not less than 5 nm and not more than 50 nm, for example. The n-type electrode 2 is connected to the n + region 9, and the p-type electrode 3 is connected to the p + region 10.
より高い短絡電流を得るためには、ｎ型シリコン基板４の裏面において、ｎ型シリコン基板４とは異なる導電型を有するｐ+領域１０の合計面積を、ｎ型シリコン基板４とは同一の導電型を有するｎ+領域９の合計面積よりも大きくすることが好ましい。
In order to obtain a higher short-circuit current, the total area of the p + region 10 having a conductivity type different from that of the n-type silicon substrate 4 on the back surface of the n-type silicon substrate 4 is the same as that of the n-type silicon substrate 4. It is preferable to make it larger than the total area of the n + region 9 having a mold.
隣り合うｎ+領域９は、当該ｎ+領域９の長さ方向に対して垂直方向に分離していてもよい。その際、ｎ+領域９間にはｐ+領域１０が形成されている。また、ｐ+領域１０が当該ｐ+領域１０の長さ方向に対して垂直方向に分離している場合には、ｐ+領域１０間にｎ+領域９が形成されている。
Adjacent n + regions 9 may be separated in a direction perpendicular to the length direction of the n + region 9. At this time, a p + region 10 is formed between the n + regions 9. Further, when the p + region 10 are separated in a direction perpendicular to the length direction of the p + region 10, n + region 9 between p + region 10 is formed.
なお、図１に示すように、ｎ型シリコン基板４の裏面側では最も周縁に位置する電極の導電型が同じであるため、裏面電極型太陽電池１を回転対称構造とすることが可能である。よって、裏面電極型太陽電池１を複数並べて太陽電池モジュールを作製するときには、たとえば裏面電極型太陽電池１を図１における上下逆にして配置することができる。
In addition, as shown in FIG. 1, since the conductivity type of the electrode located in the most periphery is the same in the back surface side of the n-type silicon substrate 4, it is possible to make the back electrode type solar cell 1 into a rotationally symmetric structure. . Therefore, when producing a solar cell module by arranging a plurality of back electrode type solar cells 1, for example, the back electrode type solar cell 1 can be arranged upside down in FIG. 1.
以下に、本実施形態に係る裏面電極型太陽電池１の製造方法を示す。図３は、本実施形態に係る裏面電極型太陽電池１の製造方法を工程順に示す断面図である。
Hereinafter, a method for manufacturing the back electrode type solar cell 1 according to this embodiment will be described. FIG. 3 is a cross-sectional view showing the method of manufacturing the back electrode type solar cell 1 according to this embodiment in the order of steps.
まず、図３（ａ）に示すように、ｎ型シリコン基板４の裏面上に、たとえば窒化シリコン膜からなるテクスチャマスク２１をたとえばＣＶＤ（Ｃｈｅｍｉｃａｌ Ｖａｐｏｒ Ｄｅｐｏｓｉｔｉｏｎ）法またはスパッタ法で形成する。
First, as shown in FIG. 3A, a texture mask 21 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 4 by, for example, a CVD (Chemical Vapor Deposition) method or a sputtering method.
次に、図３（ｂ）に示すように、ｎ型シリコン基板４の受光面にテクスチャ構造である凹凸形状５をエッチングにより形成する。このエッチングは、たとえば水酸化ナトリウムまたは水酸化カリウムなどのアルカリ水溶液にイソプロピルアルコールを添加して得られた混合溶液を７０℃以上８０℃以下に加熱したものを用いて行なわれることが好ましい。
Next, as shown in FIG. 3 (b), an uneven shape 5 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 4 by etching. This etching is preferably performed using, for example, a mixed solution obtained by adding isopropyl alcohol to an alkaline aqueous solution such as sodium hydroxide or potassium hydroxide to 70 ° C. or higher and 80 ° C. or lower.
次に、図３（ｃ）を用いて次の工程を説明する。図３（ｃ）では、ｎ型シリコン基板４の裏面側を上に記している。まず、ｎ型シリコン基板４の裏面上に形成されたテクスチャマスク２１を除去する。その後、ｎ型シリコン基板４の裏面全面上に、第１導電型のドーパントを含む第１裏面側パッシベーション膜形成用膜をたとえばＣＶＤ法により形成し、第１裏面側パッシベーション膜形成用膜上に、拡散防止膜形成用膜をたとえばＣＶＤ法により形成する。
Next, the next process will be described with reference to FIG. In FIG.3 (c), the back side of the n-type silicon substrate 4 is described above. First, the texture mask 21 formed on the back surface of the n-type silicon substrate 4 is removed. Thereafter, a first back surface passivation film forming film containing a first conductivity type dopant is formed on the entire back surface of the n-type silicon substrate 4 by, for example, a CVD method, and on the first back surface passivation film forming film, A film for forming a diffusion prevention film is formed by, for example, a CVD method.
ここで、第１導電型のドーパントは、本実施形態では、リンなどのｎ型ドーパントである。第１裏面側パッシベーション膜形成用膜は、たとえば酸化シリコン膜であることが好ましく、第１裏面側パッシベーション膜形成用膜の厚さは、たとえば５０ｎｍ以上１００ｎｍ以下であることが好ましい。拡散防止膜形成用膜は、たとえば酸化シリコン膜または窒化シリコン膜などであることが好ましい。拡散防止膜形成用膜の厚さは、たとえば２００ｎｍ以上５００ｎｍ以下であることが好ましい。これにより、図３（ｄ）における熱処理時に、第２導電型のドーパントが拡散防止膜３４（図３（ｄ）参照）を厚さ方向に貫通することを防止できるので、第２導電型のドーパントが第２導電型のドーパントを含む膜３１（図３（ｄ）参照）からｎ型シリコン基板４のうち拡散防止膜３４の下に位置する部分（別の言い方をすると、ｎ型シリコン基板４のうちｎ+領域９が形成される領域）へ向かって拡散することを防止できる。
Here, in the present embodiment, the first conductivity type dopant is an n-type dopant such as phosphorus. The first back-side passivation film forming film is preferably a silicon oxide film, for example, and the thickness of the first back-side passivation film forming film is preferably, for example, from 50 nm to 100 nm. The diffusion preventing film forming film is preferably, for example, a silicon oxide film or a silicon nitride film. The thickness of the diffusion preventing film forming film is preferably, for example, 200 nm or more and 500 nm or less. This prevents the second conductivity type dopant from penetrating the diffusion prevention film 34 (see FIG. 3D) in the thickness direction during the heat treatment in FIG. From the film 31 containing the second conductivity type dopant (see FIG. 3D), the portion of the n-type silicon substrate 4 located under the diffusion prevention film 34 (in other words, the n-type silicon substrate 4 It is possible to prevent diffusion toward the region in which the n + region 9 is formed.
次に、ｎ型シリコン基板４の裏面側にｎ+領域９を形成するために、ｎ+領域９が形成される領域の上においてのみ第１裏面側パッシベーション膜形成用膜および拡散防止膜形成用膜が残存するように第１裏面側パッシベーション膜形成用膜および拡散防止膜形成用膜をパターニングする。このパターニングは、エッチングペーストをスクリーン印刷法などで塗布してから加熱することにより行なわれることが好ましい。このパターニングにより、ｎ+領域９が形成される領域の上には、第１裏面側パッシベーション膜１１および拡散防止膜３４が順に形成される。その後、ｎ型シリコン基板４を超音波洗浄してから酸処理することにより、パターニングで使用したエッチングペーストを除去する。ここで、エッチングペーストとしては、たとえば、エッチング成分としてリン酸、フッ化水素、フッ化アンモニウムおよびフッ化水素アンモニウムからなる群より選択された少なくとも１種を含むことが好ましく、水、有機溶媒および増粘剤をさらに含むことが好ましい。
Next, in order to form the n + region 9 on the back surface side of the n-type silicon substrate 4, the first back surface passivation film forming film and the diffusion preventing film forming film are formed only on the region where the n + region 9 is formed. The first backside passivation film formation film and the diffusion prevention film formation film are patterned so that the film remains. This patterning is preferably performed by applying an etching paste by a screen printing method or the like and then heating. By this patterning, the first back-side passivation film 11 and the diffusion prevention film 34 are sequentially formed on the region where the n + region 9 is formed. Thereafter, the n-type silicon substrate 4 is subjected to ultrasonic cleaning and then acid-treated to remove the etching paste used for patterning. Here, the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
次に、図３（ｄ）に示すように、ｎ型シリコン基板４の裏面上（具体的にはｎ型シリコン基板４の裏面上のうち第１裏面側パッシベーション膜１１および拡散防止膜３４から露出する部分）と拡散防止膜３４上とに、第２導電型のドーパントを含む膜３１をたとえばＣＶＤ法により形成し、第２導電型のドーパントを含む膜３１の上に、拡散制御膜３２をたとえばＣＶＤ法により形成する。第２導電型のドーパントは、本実施形態では、ボロンなどのｐ型ドーパントである。第２導電型のドーパントを含む膜３１は、たとえば酸化シリコン膜であることが好ましく、第２導電型のドーパントを含む膜３１の厚さは、たとえば５０ｎｍ以上１００ｎｍ以下であることが好ましい。拡散制御膜３２は、たとえば酸化シリコン膜または窒化シリコン膜などであることが好ましい。拡散制御膜３２の厚さは、たとえば２００ｎｍ以上５００ｎｍ以下であることが好ましい。これにより、下記熱処理時には、第２導電型のドーパントが拡散制御膜３２を厚さ方向に貫通することを防止できるので、第２導電型のドーパントがアウトディフュージョンすることを防止することができる。
Next, as shown in FIG. 3D, the n-type silicon substrate 4 is exposed from the first back-side passivation film 11 and the diffusion prevention film 34 on the back surface (specifically, on the back surface of the n-type silicon substrate 4). A film 31 containing a second conductivity type dopant is formed by, for example, the CVD method, and a diffusion control film 32 is formed on the film 31 containing the second conductivity type dopant, for example. It is formed by the CVD method. In the present embodiment, the second conductivity type dopant is a p-type dopant such as boron. The film 31 containing the second conductivity type dopant is preferably a silicon oxide film, for example, and the thickness of the film 31 containing the second conductivity type dopant is preferably, for example, 50 nm or more and 100 nm or less. The diffusion control film 32 is preferably, for example, a silicon oxide film or a silicon nitride film. The thickness of the diffusion control film 32 is preferably not less than 200 nm and not more than 500 nm, for example. Thereby, since the second conductivity type dopant can be prevented from penetrating the diffusion control film 32 in the thickness direction at the time of the following heat treatment, it is possible to prevent the second conductivity type dopant from being out-diffusioned.
次に、ｎ型シリコン基板４を熱処理する。これにより、第２導電型のドーパントが第２導電型のドーパントを含む膜３１からｎ型シリコン基板４の裏面側のうち第２導電型のドーパントを含む膜３１の下に位置する部分に拡散し、よって、ｐ+領域１０が形成される。また、第１導電型のドーパントが第１裏面側パッシベーション膜１１からｎ型シリコン基板４の裏面側のうち第１裏面側パッシベーション膜１１の下に位置する部分に拡散し、よって、ｎ+領域９が形成される。このように、本実施形態では、ｎ+領域９とｐ+領域１０とを同時に形成することができる。また、ｎ+領域９とｐ+領域１０とは、互いに隣接するように形成される。
Next, the n-type silicon substrate 4 is heat-treated. As a result, the second conductivity type dopant diffuses from the film 31 containing the second conductivity type dopant to the portion located below the film 31 containing the second conductivity type dopant on the back side of the n-type silicon substrate 4. Thus, the p + region 10 is formed. Further, the first conductivity type dopant diffuses from the first back surface side passivation film 11 to a portion of the back surface side of the n-type silicon substrate 4 located below the first back surface side passivation film 11, and thus the n + region 9. Is formed. Thus, in the present embodiment, the n + region 9 and the p + region 10 can be formed simultaneously. The n + region 9 and the p + region 10 are formed so as to be adjacent to each other.
ｎ型シリコン基板４の熱処理条件の一例としては、０．５時間以上２時間以下、ｎ型シリコン基板４を８００℃以上１０００℃以下で加熱するということが挙げられる。これにより、第１導電型のドーパント濃度が１０20ｃｍ-3以上のｎ+領域９が形成され、第２導電型のドーパント濃度が１０20ｃｍ-3以上のｐ+領域１０が形成される。
An example of the heat treatment conditions for the n-type silicon substrate 4 is that the n-type silicon substrate 4 is heated at 800 ° C. or more and 1000 ° C. or less for 0.5 hours or more and 2 hours or less. Thus, the dopant concentration of the first conductivity type is 10 20 cm -3 or more n + region 9 is formed, the dopant concentration of the second conductivity type is 10 20 cm -3 or more p + region 10 is formed.
なお、第１裏面側パッシベーション膜１１と第２導電型のドーパントを含む膜３１との間に拡散防止膜３４が設けられているので、上記熱処理を行なっても第２導電型のドーパントが第２導電型のドーパントを含む膜３１からｎ型シリコン基板４のうち拡散防止膜３４の下に位置する部分へ向かって拡散することを防止することができる。また、第２導電型のドーパントを含む膜３１の上には拡散制御膜３２が設けられているので、上記熱処理を行なっても第２導電型のドーパントがアウトディフュージョンすることを防止することができる。
Since the diffusion preventing film 34 is provided between the first back surface side passivation film 11 and the film 31 containing the second conductivity type dopant, the second conductivity type dopant remains in the second conductivity even after the heat treatment. It is possible to prevent diffusion from the film 31 containing the conductive dopant toward the portion of the n-type silicon substrate 4 located below the diffusion prevention film 34. Further, since the diffusion control film 32 is provided on the film 31 containing the second conductivity type dopant, it is possible to prevent the second conductivity type dopant from being out-diffused even if the heat treatment is performed. .
次に、図３（ｅ）に示すように、ｎ型シリコン基板４の裏面上に形成された拡散制御膜３２、第２導電型のドーパントを含む膜３１および拡散防止膜３４をエッチングにより除去する。ｐ+領域１０上には、第２導電型のドーパントを含む膜３１と拡散制御膜３２とが形成されており、ｎ+領域９上には、第２導電型のドーパントを含む膜３１および拡散制御膜３２に加えて第１裏面側パッシベーション膜１１と拡散防止膜３４とが形成されている。そのため、第２導電型のドーパントを含む膜３１および拡散制御膜３２が除去されるまでエッチングを行なうと、第１裏面側パッシベーション膜１１だけが残る。
Next, as shown in FIG. 3E, the diffusion control film 32, the film 31 containing the second conductivity type dopant and the diffusion prevention film 34 formed on the back surface of the n-type silicon substrate 4 are removed by etching. . A film 31 containing a second conductivity type dopant and a diffusion control film 32 are formed on the p + region 10, and a film 31 containing the second conductivity type dopant and a diffusion are formed on the n + region 9. In addition to the control film 32, the first back surface side passivation film 11 and the diffusion preventing film 34 are formed. Therefore, if etching is performed until the film 31 containing the second conductivity type dopant and the diffusion control film 32 are removed, only the first back-side passivation film 11 remains.
次に、図３（ｆ）に示すように、ｎ型シリコン基板４の裏面上に、第１裏面側パッシベーション膜１１とは異なる第２裏面側パッシベーション膜１２をたとえばスパッタ法またはＣＶＤ法により形成する。ｎ+領域９上には第１裏面側パッシベーション膜１１が形成されているため、第２裏面側パッシベーション膜１２はｐ+領域１０上と第１裏面側パッシベーション膜１１上とに形成される。その後、ｎ型シリコン基板４の受光面上に受光面側パッシベーション膜６と反射防止膜７とをたとえばＣＶＤ法により順に形成する。第２裏面側パッシベーション膜１２は、たとえば酸化アルミニウム膜であることが好ましい。受光面側パッシベーション膜６および反射防止膜７は共に窒化シリコン膜であることが好ましく、窒素含有率は反射防止膜７の方が受光面側パッシベーション膜６よりも高いことが好ましく、屈折率は反射防止膜７の方が受光面側パッシベーション膜６よりも低いことが好ましい。受光面側パッシベーション膜６は、酸化シリコン膜であっても良い。
Next, as shown in FIG. 3F, a second back surface passivation film 12 different from the first back surface passivation film 11 is formed on the back surface of the n-type silicon substrate 4 by, for example, sputtering or CVD. . Since the first back surface side passivation film 11 is formed on the n + region 9, the second back surface side passivation film 12 is formed on the p + region 10 and on the first back surface side passivation film 11. Thereafter, a light-receiving surface side passivation film 6 and an antireflection film 7 are sequentially formed on the light-receiving surface of the n-type silicon substrate 4 by, for example, a CVD method. The second back side passivation film 12 is preferably, for example, an aluminum oxide film. Both the light-receiving surface side passivation film 6 and the antireflection film 7 are preferably silicon nitride films, and the nitrogen content is preferably higher in the antireflection film 7 than in the light-receiving surface side passivation film 6, and the refractive index is reflected. The prevention film 7 is preferably lower than the light-receiving surface side passivation film 6. The light-receiving surface side passivation film 6 may be a silicon oxide film.
次に、図３（ｇ）を用いて次の工程を説明する。図３（ｇ）では、ｎ型シリコン基板４の受光面側を上に記している。ｎ+領域９上にｎ型用電極２を形成するために、第１裏面側パッシベーション膜１１および第２裏面側パッシベーション膜１２に対してパターニングを行なう。ｐ+領域１０上にｐ型用電極３を形成するために、第２裏面側パッシベーション膜１２に対してパターニングを行う。これにより、ｎ+領域９の一部が第１裏面側パッシベーション膜１１および第２裏面側パッシベーション膜１２から露出され、ｐ+領域１０の一部が第２裏面側パッシベーション膜１２から露出される。このパターニングは、たとえばエッチングペーストをスクリーン印刷法などで塗布してから加熱することにより行なわれることが好ましい。その後、ｎ型シリコン基板４を超音波洗浄してから酸処理することにより、パターニングで使用したエッチングペーストを除去する。ここで、エッチングペーストとしては、たとえば、エッチング成分としてリン酸、フッ化水素、フッ化アンモニウムおよびフッ化水素アンモニウムからなる群より選択された少なくとも１種を含むことが好ましく、水、有機溶媒および増粘剤をさらに含むことが好ましい。
Next, the next step will be described with reference to FIG. In FIG. 3G, the light receiving surface side of the n-type silicon substrate 4 is shown above. In order to form the n-type electrode 2 on the n + region 9, the first back-side passivation film 11 and the second back-side passivation film 12 are patterned. In order to form the p-type electrode 3 on the p + region 10, the second back-side passivation film 12 is patterned. Thereby, a part of the n + region 9 is exposed from the first back surface side passivation film 11 and the second back surface side passivation film 12, and a part of the p + region 10 is exposed from the second back surface side passivation film 12. This patterning is preferably performed, for example, by applying an etching paste by screen printing or the like and then heating. Thereafter, the n-type silicon substrate 4 is subjected to ultrasonic cleaning and then acid-treated to remove the etching paste used for patterning. Here, the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
次に、図３（ｈ）に示すように、ｎ+領域９のうち第１裏面側パッシベーション膜１１および第２裏面側パッシベーション膜１２から露出する部分の上と、ｐ+領域１０のうち第２裏面側パッシベーション膜１２から露出する部分の上とに、銀ペーストをたとえばスクリーン印刷法により塗布してから乾燥させる。その後、焼成する。これにより、ｎ+領域９上にはｎ型用電極２が形成され、ｐ+領域１０上にはｐ型用電極３が形成される。このようにして裏面電極型太陽電池１が製造される。
Next, as shown in FIG. 3 (h), on the portion exposed from the first back surface side passivation film 11 and the second back surface side passivation film 12 in the n + region 9 and in the second region of the p + region 10. A silver paste is applied onto the portion exposed from the back surface side passivation film 12 by, for example, a screen printing method and then dried. Thereafter, it is fired. As a result, the n-type electrode 2 is formed on the n + region 9 and the p-type electrode 3 is formed on the p + region 10. In this way, the back electrode type solar cell 1 is manufactured.
以上説明したように、本実施形態に係る裏面電極型太陽電池１の製造方法では、ｎ+領域９を形成するために必要な第１導電型のドーパントを含む膜を第１裏面側パッシベーション膜１１としている。よって、第１裏面側パッシベーション膜１１を形成する工程を別途設けることなく裏面電極型太陽電池１を製造することができる。また、本実施形態に係る裏面電極型太陽電池１の製造方法では、図３（ｄ）に示す工程において、第１導電型のドーパントを拡散させてｎ+領域９を形成するとともに第２導電型のドーパントを拡散させてｐ+領域１０を形成する。よって、第１導電型のドーパントを拡散させる工程とは別に第２導電型のドーパントを拡散させる工程を設けることなく、裏面電極型太陽電池１を製造することができる。それだけでなく、ｎ+領域９を形成するために用いたマスクとｐ+領域１０を形成するために用いたマスクとを同時に除去することができる。したがって、裏面電極型太陽電池１の製造工程数を減らすことができる。一方、本実施形態に係る裏面電極型太陽電池１の製造方法では、ｎ+領域９上には第１裏面側パッシベーション膜１１が形成されており、ｐ+領域１０上には第２裏面側パッシベーション膜１２が形成されている。以上のことから、本実施形態に係る裏面電極型太陽電池１の製造方法では、裏面電極型太陽電池１の製造工程数を減らしてもｎ+領域９上とｐ+領域１０上とにそれぞれ異なるパッシベーション膜を形成することができる。
As described above, in the method for manufacturing the back electrode type solar cell 1 according to the present embodiment, the film containing the first conductivity type dopant necessary for forming the n + region 9 is used as the first back surface passivation film 11. It is said. Therefore, the back electrode type solar cell 1 can be manufactured without providing a separate step of forming the first back side passivation film 11. Moreover, in the manufacturing method of the back electrode type solar cell 1 according to the present embodiment, in the step shown in FIG. 3D, the n + region 9 is formed by diffusing the first conductivity type dopant and the second conductivity type. The p + region 10 is formed by diffusing the dopant. Therefore, the back electrode type solar cell 1 can be manufactured without providing a step of diffusing the second conductivity type dopant separately from the step of diffusing the first conductivity type dopant. In addition, the mask used to form the n + region 9 and the mask used to form the p + region 10 can be removed simultaneously. Therefore, the number of manufacturing steps of the back electrode type solar cell 1 can be reduced. On the other hand, in the method for manufacturing the back electrode type solar cell 1 according to the present embodiment, the first back side passivation film 11 is formed on the n + region 9, and the second back side passivation is formed on the p + region 10. A film 12 is formed. From the above, in the manufacturing method of the back electrode type solar cell 1 according to the present embodiment, even if the number of manufacturing steps of the back electrode type solar cell 1 is reduced, it differs between the n + region 9 and the p + region 10. A passivation film can be formed.
また、多くの設備を必要とすることなく裏面電極型太陽電池１を製造することができるので、裏面電極型太陽電池１の生産性が向上する。
Moreover, since the back electrode type solar cell 1 can be manufactured without requiring many facilities, the productivity of the back electrode type solar cell 1 is improved.
さらに、第１裏面側パッシベーション膜１１を用いてｎ+領域９を形成する。よって、位置ずれを招くことなくｎ+領域９上に第１裏面側パッシベーション膜１１を形成することができる。また、第２裏面側パッシベーション膜１２は、ｎ型シリコン基板４の裏面全面上に形成されるため、第１裏面側パッシベーション膜１１上だけでなくｐ+領域１０上にも形成される。よって、位置ずれを招くことなくｐ+領域１０上に第２裏面側パッシベーション膜１２を形成することができる。
Further, the n + region 9 is formed using the first back surface side passivation film 11. Therefore, the first back-side passivation film 11 can be formed on the n + region 9 without causing a positional shift. In addition, since the second back surface side passivation film 12 is formed on the entire back surface of the n-type silicon substrate 4, it is formed not only on the first back surface side passivation film 11 but also on the p + region 10. Therefore, the second back-side passivation film 12 can be formed on the p + region 10 without causing a positional shift.
その上、酸化アルミニウム膜は負の固定電荷を有する。そのため、第２裏面側パッシベーション膜１２を酸化アルミニウム膜で構成すれば、ｐ+領域１０上において高いパッシベーション性を有する裏面電極型太陽電池１を製造することができる。
In addition, the aluminum oxide film has a negative fixed charge. Therefore, if the second back surface passivation film 12 is made of an aluminum oxide film, the back electrode solar cell 1 having high passivation properties on the p + region 10 can be manufactured.
＜第２の実施形態＞
図４は、本発明の第２の実施形態に係る裏面電極型太陽電池７１の製造方法を工程順に示す断面図である。本実施形態に係る裏面電極型太陽電池７１では、第１裏面側パッシベーション膜膜は第１導電型のドーパントを含有していない。また、本実施形態に係る裏面電極型太陽電池７１の製造方法は、上記第１の実施形態に係る裏面電極型太陽電池１の製造方法とは、ｎ+領域９の形成方法を異にする。以下、本実施形態に係る裏面電極型太陽電池７１の製造方法を工程順に示す。 <Second Embodiment>
FIG. 4 is a cross-sectional view showing the method of manufacturing the back electrode typesolar cell 71 according to the second embodiment of the present invention in the order of steps. In the back electrode type solar cell 71 according to this embodiment, the first back side passivation film does not contain the first conductivity type dopant. Moreover, the manufacturing method of the back surface electrode type solar cell 71 according to the present embodiment is different from the manufacturing method of the back surface electrode type solar cell 1 according to the first embodiment in the method of forming the n + region 9. Hereinafter, the manufacturing method of the back electrode type solar cell 71 according to this embodiment will be described in the order of steps.
図４は、本発明の第２の実施形態に係る裏面電極型太陽電池７１の製造方法を工程順に示す断面図である。本実施形態に係る裏面電極型太陽電池７１では、第１裏面側パッシベーション膜膜は第１導電型のドーパントを含有していない。また、本実施形態に係る裏面電極型太陽電池７１の製造方法は、上記第１の実施形態に係る裏面電極型太陽電池１の製造方法とは、ｎ+領域９の形成方法を異にする。以下、本実施形態に係る裏面電極型太陽電池７１の製造方法を工程順に示す。 <Second Embodiment>
FIG. 4 is a cross-sectional view showing the method of manufacturing the back electrode type
まず、図４（ａ）に示すように、上記第１の実施形態における図３（ａ）に示す工程と同じく、ｎ型シリコン基板４の裏面上に、たとえば窒化シリコン膜からなるテクスチャマスク２１をたとえばＣＶＤ法またはスパッタ法で形成する。
First, as shown in FIG. 4A, a texture mask 21 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 4 as in the step shown in FIG. 3A in the first embodiment. For example, it is formed by a CVD method or a sputtering method.
次に、図４（ｂ）に示すように、上記第１の実施形態における図３（ａ）に示す工程と同じく、ｎ型シリコン基板４の受光面にテクスチャ構造である凹凸形状５をエッチングにより形成する。
Next, as shown in FIG. 4B, as in the step shown in FIG. 3A in the first embodiment, the uneven shape 5 which is a textured structure is etched on the light receiving surface of the n-type silicon substrate 4 by etching. Form.
次に、図４（ｃ）を用いて次の工程を説明する。図４（ｃ）では、ｎ型シリコン基板４の裏面側を上に記している。まず、ｎ型シリコン基板４の裏面上に形成されたテクスチャマスク２１を除去する。次に、ｎ型シリコン基板４の受光面上にたとえば酸化シリコンからなる拡散マスク２２を形成する。その後、ｎ型シリコン基板４の裏面においてｎ+領域９が形成される領域とは異なる領域の上に、拡散マスク２３を形成する。拡散マスク２３は、たとえば、溶剤、増粘剤および酸化シリコン前駆体を含むマスキングペーストをインクジェットまたはスクリーン印刷などで塗布してから熱処理することにより形成される。その後、第１導電型のドーパントを含むガスを気相拡散させる。これにより、ｎ型シリコン基板４の裏面のうち拡散マスク２３から露出した部分には、第１導電型のドーパントが拡散する。これにより、ｎ+領域９が形成される。
Next, the next step will be described with reference to FIG. In FIG.4 (c), the back side of the n-type silicon substrate 4 is described above. First, the texture mask 21 formed on the back surface of the n-type silicon substrate 4 is removed. Next, a diffusion mask 22 made of, for example, silicon oxide is formed on the light receiving surface of the n-type silicon substrate 4. Thereafter, a diffusion mask 23 is formed on a region different from the region where n + region 9 is formed on the back surface of n-type silicon substrate 4. The diffusion mask 23 is formed, for example, by applying a masking paste containing a solvent, a thickener, and a silicon oxide precursor by inkjet or screen printing and then performing a heat treatment. Thereafter, a gas containing a dopant of the first conductivity type is diffused in a gas phase. Accordingly, the first conductivity type dopant is diffused into the portion of the back surface of the n-type silicon substrate 4 exposed from the diffusion mask 23. Thereby, n + region 9 is formed.
第１導電型のドーパントがリンである場合には、第１導電型のドーパントを含むガスとしてはたとえばＰＯＣｌ3を用いることができる。第１導電型のドーパントを気相拡散させる条件の一例としては、８００℃以上９００℃以下の温度下で、１０分以上６０分以下、第１導電型のドーパントを含むガス雰囲気下にｎ型シリコン基板４を曝すということが挙げられる。これにより、第１導電型のドーパント濃度が１０20ｃｍ-3以上のｎ+領域９が形成される。
When the first conductivity type dopant is phosphorus, for example, POCl 3 can be used as the gas containing the first conductivity type dopant. As an example of the conditions for vapor-phase diffusion of the first conductivity type dopant, n-type silicon is used in a gas atmosphere containing the first conductivity type dopant at a temperature of 800 ° C. to 900 ° C. for 10 minutes to 60 minutes. For example, the substrate 4 is exposed. As a result, an n + region 9 having a dopant concentration of the first conductivity type of 10 20 cm −3 or more is formed.
次に、図４（ｄ）に示すように、ｎ型シリコン基板４上に形成された拡散マスク２２，２３と拡散マスク２２，２３にリンが拡散して形成されたガラス層とをフッ化水素酸処理により除去する。その後、酸素または水蒸気による熱酸化を行う。これにより、ｎ型シリコン基板４の受光面上には、酸化シリコン膜２４が形成され、ｎ型シリコン基板４の裏面上には、第１裏面側パッシベーション膜形成用膜１１Ａが形成される。このとき、図４（ｄ）に示すように、ｎ+領域９上に形成された第１裏面側パッシベーション膜形成用膜１１Ａの厚さはｎ+領域９とは異なる領域の上に形成された第１裏面側パッシベーション膜形成用膜１１Ａの厚さよりも厚くなる。
Next, as shown in FIG. 4D, the diffusion masks 22 and 23 formed on the n-type silicon substrate 4 and the glass layer formed by diffusing phosphorus in the diffusion masks 22 and 23 are combined with hydrogen fluoride. Remove by acid treatment. Thereafter, thermal oxidation with oxygen or water vapor is performed. Thereby, a silicon oxide film 24 is formed on the light receiving surface of the n-type silicon substrate 4, and a first back-side passivation film forming film 11 </ b> A is formed on the back surface of the n-type silicon substrate 4. At this time, as shown in FIG. 4D, the thickness of the first back surface passivation film forming film 11 </ b > A formed on the n + region 9 was formed on a region different from the n + region 9. It becomes thicker than the thickness of the first backside passivation film forming film 11A.
熱酸化により形成された第１裏面側パッシベーション膜形成用膜１１Ａの厚さがｎ+領域９上とｎ+領域９とは異なる領域の上とで異なる理由は次に示すとおりである。熱酸化による膜の成長速度は、シリコン基板に拡散している不純物の種類とその不純物の濃度とによって決まる。特にシリコン基板におけるｎ型不純物濃度が高い場合には、熱酸化による膜の成長速度は速くなる。ここで、ｎ型不純物濃度は、ｎ+領域９の方がｎ+領域９とは異なる領域よりも高い。よって、ｎ+領域９上に形成された第１裏面側パッシベーション膜形成用膜１１Ａの厚さの方が、ｎ+領域９とは異なる領域の上に形成された第１裏面側パッシベーション膜形成用膜１１Ａの厚さよりも厚くなる。
Why the thickness of the first back side passivation film forming film 11A formed by thermal oxidation is different between on the area different from the n + region 9 and on the n + region 9 is as shown below. The growth rate of the film by thermal oxidation is determined by the type of impurity diffused in the silicon substrate and the concentration of the impurity. In particular, when the n-type impurity concentration in the silicon substrate is high, the growth rate of the film by thermal oxidation increases. Here, n-type impurity concentration, it n + region 9 is higher than a region different from the n + region 9. Thus, the first is more of the thickness of the back side passivation film forming film 11A, a first for the back side passivation film formed formed on the area different from the n + region 9 formed on the n + region 9 It becomes thicker than the thickness of the film 11A.
また、第１裏面側パッシベーション膜形成用膜１１Ａは、熱酸化時にシリコンと酸素とが結びつくことにより形成される。よって、ｎ型シリコン基板４では、ｎ+領域９の表面は、ｎ+領域９とは異なる領域の表面よりもｎ型シリコン基板４側に凹む。
The first back surface passivation film forming film 11A is formed by combining silicon and oxygen during thermal oxidation. Thus, the n-type silicon substrate 4, the surface of the n + region 9 is recessed n-type silicon substrate 4 side than the surface of a region different from the n + region 9.
なお、第１裏面側パッシベーション膜１１（図４（ｅ）参照）をｐ+領域１０の形成時におけるｎ+領域９の拡散マスクとして使用する場合には、ｎ+領域９上に形成された第１裏面側パッシベーション膜形成用膜１１Ａの厚さとｎ+領域９とは異なる領域の上に形成された第１裏面側パッシベーション膜形成用膜１１Ａの厚さとの差が６０ｎｍ以上であることが好ましい。
Incidentally, in the case of using the first back side passivation film 11 (see FIG. 4 (e)) as a diffusion mask for the n + region 9 during the formation of the p + region 10 is formed on the n + region 9 first The difference between the thickness of the first back surface passivation film forming film 11A and the thickness of the first back surface passivation film forming film 11A formed on a region different from the n + region 9 is preferably 60 nm or more.
次に、図４（ｅ）に示すように、酸化シリコン膜２４とｎ型シリコン基板４の裏面のうちｎ+領域９とは異なる領域の上に形成された第１裏面側パッシベーション膜形成用膜１１Ａとをエッチングにより除去する。ｎ型シリコン基板４の裏面では、ｎ+領域９上に形成された第１裏面側パッシベーション膜形成用膜１１Ａの厚さは、ｎ+領域９とは異なる領域の上に形成された第１裏面側パッシベーション膜形成用膜１１Ａの厚さよりも厚い。そのため、ｎ+領域９とは異なる領域の上に形成された第１裏面側パッシベーション膜形成用膜１１Ａが除去されるまで第１裏面側パッシベーション膜形成用膜１１Ａをエッチングすると、第１裏面側パッシベーション膜形成用膜１１Ａはｎ+領域９上だけに残る。これにより、第１裏面側パッシベーション膜１１が形成される。
Next, as shown in FIG. 4E, a first back surface passivation film forming film formed on a region different from the n + region 9 on the back surface of the silicon oxide film 24 and the n-type silicon substrate 4. 11A is removed by etching. The back surface of the n-type silicon substrate 4, the thickness of the first back side passivation film forming film 11A formed on the n + region 9, first back surface formed on a region different from the n + region 9 It is thicker than the thickness of the side passivation film forming film 11A. Therefore, if the first backside passivation film forming film 11A is etched until the first backside passivation film forming film 11A formed on a region different from the n + region 9 is removed, the first backside passivation is performed. The film forming film 11A remains only on the n + region 9. Thereby, the 1st back surface side passivation film 11 is formed.
次に、ｎ型シリコン基板４の受光面上に酸化シリコンなどからなる拡散マスク２５を形成する。その後、ｎ型シリコン基板４の裏面のうち第１裏面側パッシベーション膜１１から露出した部分に、有機性高分子に第２導電型のドーパントを含む化合物を反応させて得られたポリマーをアルコール系溶媒に溶解させて得られた溶液を塗布する。その溶液が乾燥したら熱処理を行なう。これにより、ｎ型シリコン基板４の裏面のうち第１裏面側パッシベーション膜１１から露出した部分に第２導電型のドーパントが拡散する。よって、ｐ+領域１０が形成される。
Next, a diffusion mask 25 made of silicon oxide or the like is formed on the light receiving surface of the n-type silicon substrate 4. Thereafter, the polymer obtained by reacting the organic polymer with a compound containing a dopant of the second conductivity type is exposed to a portion of the back surface of the n-type silicon substrate 4 exposed from the first back surface passivation film 11 with an alcohol solvent. The solution obtained by dissolving in is applied. When the solution is dry, heat treatment is performed. As a result, the second conductivity type dopant diffuses into the portion of the back surface of the n-type silicon substrate 4 exposed from the first back surface passivation film 11. Therefore, p + region 10 is formed.
第２導電型のドーパントがボロンである場合には、第２導電型のドーパントを含む化合物としてはたとえばホウ素化合物を用いることができる。また、ｎ型シリコン基板４の熱処理条件の一例としては、１０分以上６０分以下、ｎ型シリコン基板４を９００℃以上１０００℃以下で加熱するということが挙げられる。これにより、第２導電型のドーパント濃度が１０20ｃｍ-3以上のｐ+領域１０が形成される。
When the second conductivity type dopant is boron, for example, a boron compound can be used as the compound containing the second conductivity type dopant. In addition, as an example of the heat treatment condition of the n-type silicon substrate 4, heating the n-type silicon substrate 4 at 900 ° C. or more and 1000 ° C. or less for 10 minutes or more and 60 minutes or less can be mentioned. As a result, the p + region 10 having the second conductivity type dopant concentration of 10 20 cm −3 or more is formed.
このように、本実施形態では、第１裏面側パッシベーション膜１１がｎ+領域９上に形成された状態で第２導電型のドーパントを含む溶液を塗布することによりｐ+領域１０が形成される。よって、ｎ+領域９とｐ+領域１０とは互いに隣接するように形成される。
As described above, in this embodiment, the p + region 10 is formed by applying the solution containing the dopant of the second conductivity type in a state where the first back surface side passivation film 11 is formed on the n + region 9. . Therefore, n + region 9 and p + region 10 are formed adjacent to each other.
なお、第１裏面側パッシベーション膜１１がｎ+領域９上に形成された状態で第２導電型のドーパントを含む溶液を塗布するので、第２導電型のドーパントがｎ+領域９へ拡散することを防止することができる。つまり、第１裏面側パッシベーション膜１１は、第２導電型のドーパントがｎ+領域９へ拡散することを防止するための膜（拡散マスク）としても機能する。
In addition, since the solution containing the second conductivity type dopant is applied in a state where the first back surface side passivation film 11 is formed on the n + region 9, the second conductivity type dopant diffuses into the n + region 9. Can be prevented. That is, the first back surface side passivation film 11 also functions as a film (diffusion mask) for preventing the second conductivity type dopant from diffusing into the n + region 9.
次に、図４（ｆ）を用いて次の工程を説明する。図４（ｆ）では、ｎ型シリコン基板４の受光面側を上に記している。図４（ｆ）に示すように、拡散マスク２５と、拡散マスク２５にボロンが拡散して形成されたガラス層とを、フッ化水素酸処理により除去する。その後、ｎ型シリコン基板４の裏面上に、第１裏面側パッシベーション膜１１とは異なる第２裏面側パッシベーション膜１２をたとえばスパッタ法またはＣＶＤ法により形成する。ｎ+領域９上には第１裏面側パッシベーション膜１１が形成されているため、第２裏面側パッシベーション膜１２はｐ+領域１０上と第１裏面側パッシベーション膜１１上とに形成される。その後、ｎ型シリコン基板４の受光面上に受光面側パッシベーション膜６と反射防止膜７とをたとえばＣＶＤ法により順に形成する。第２裏面側パッシベーション膜１２は、たとえば酸化アルミニウム膜であることが好ましい。受光面側パッシベーション膜６および反射防止膜７は共に窒化シリコン膜であることが好ましく、窒素含有率は反射防止膜７の方が受光面側パッシベーション膜６よりも高いことが好ましく、屈折率は反射防止膜７の方が受光面側パッシベーション膜６よりも低いことが好ましい。受光面側パッシベーション膜６は、酸化シリコン膜であっても良い。
Next, the next step will be described with reference to FIG. In FIG. 4F, the light receiving surface side of the n-type silicon substrate 4 is shown above. As shown in FIG. 4F, the diffusion mask 25 and the glass layer formed by diffusing boron in the diffusion mask 25 are removed by hydrofluoric acid treatment. Thereafter, a second back surface passivation film 12 different from the first back surface passivation film 11 is formed on the back surface of the n-type silicon substrate 4 by, for example, a sputtering method or a CVD method. Since the first back surface side passivation film 11 is formed on the n + region 9, the second back surface side passivation film 12 is formed on the p + region 10 and on the first back surface side passivation film 11. Thereafter, a light-receiving surface side passivation film 6 and an antireflection film 7 are sequentially formed on the light-receiving surface of the n-type silicon substrate 4 by, for example, a CVD method. The second back side passivation film 12 is preferably, for example, an aluminum oxide film. Both the light-receiving surface side passivation film 6 and the antireflection film 7 are preferably silicon nitride films, and the nitrogen content is preferably higher in the antireflection film 7 than in the light-receiving surface side passivation film 6, and the refractive index is reflected. The prevention film 7 is preferably lower than the light-receiving surface side passivation film 6. The light-receiving surface side passivation film 6 may be a silicon oxide film.
次に、図４（ｇ）に示すように、上記第１の実施形態における図３（ｇ）に示す工程と同じく、ｎ+領域９上にｎ型用電極２を形成するために、第１裏面側パッシベーション膜１１および第２裏面側パッシベーション膜１２に対してパターニングを行なう。また、ｐ+領域１０上にｐ型用電極３を形成するために、第２裏面側パッシベーション膜１２に対してパターニングを行う。パターニングの方法、エッチングペーストの組成、および、エッチングペーストの除去方法としては、上記第１の実施形態における図３（ｇ）に示す工程と同一の方法を用いることができる。
Next, as shown in FIG. 4G, in order to form the n-type electrode 2 on the n + region 9 in the same manner as the step shown in FIG. Patterning is performed on the back side passivation film 11 and the second back side passivation film 12. Further, in order to form the p-type electrode 3 on the p + region 10, the second back surface passivation film 12 is patterned. As the patterning method, the composition of the etching paste, and the method for removing the etching paste, the same method as the step shown in FIG. 3G in the first embodiment can be used.
次に、図４（ｈ）に示すように、上記第１の実施形態における図３（ｈ）に示す工程と同じく、ｎ+領域９のうち第１裏面側パッシベーション膜１１および第２裏面側パッシベーション膜１２から露出する部分の上と、ｐ+領域１０のうち第２裏面側パッシベーション膜１２から露出する部分の上とに、銀ペーストをたとえばスクリーン印刷法により塗布してから乾燥させる。その後、焼成する。これにより、ｎ+領域９上にはｎ型用電極２が形成され、ｐ+領域１０上にはｐ型用電極３が形成される。このようにして裏面電極型太陽電池７１が製造される。
Next, as shown in FIG. 4 (h), as in the step shown in FIG. 3 (h) in the first embodiment, the first back-side passivation film 11 and the second back-side passivation in the n + region 9 are used. A silver paste is applied onto the portion exposed from the film 12 and the portion exposed from the second back-side passivation film 12 in the p + region 10 by, for example, a screen printing method and then dried. Thereafter, it is fired. As a result, the n-type electrode 2 is formed on the n + region 9 and the p-type electrode 3 is formed on the p + region 10. In this way, the back electrode type solar cell 71 is manufactured.
以上説明したように、本実施形態に係る裏面電極型太陽電池７１の製造方法では、ｐ+領域１０を形成するための拡散マスクを第１裏面側パッシベーション膜１１としている。よって、ｐ+領域１０を形成するための拡散マスクを形成する工程とは別に第１裏面側パッシベーション膜１１を形成する工程を設けることなく、裏面電極型太陽電池７１を製造することができる。また、本実施形態に係る裏面電極型太陽電池７１の製造方法では、第２導電型のドーパントを含む溶液を塗布することによりｐ+領域１０が形成される。よって、ｐ+領域１０を形成するための拡散マスクの形成およびその除去を行なうことなく、裏面電極型太陽電池７１を製造することができる。したがって、裏面電極型太陽電池７１の製造工程数を減らすことができる。一方、本実施形態に係る裏面電極型太陽電池７１の製造方法では、ｎ+領域９上には第１裏面側パッシベーション膜１１が形成されており、ｐ+領域１０上には第２裏面側パッシベーション膜１２が形成されている。以上のことから、本実施形態に係る裏面電極型太陽電池７１の製造方法においても、裏面電極型太陽電池７１の製造工程数を減らしてもｎ+領域９上とｐ+領域１０上とにそれぞれ異なるパッシベーション膜を形成することができる。
As described above, in the manufacturing method of the back electrode type solar cell 71 according to the present embodiment, the diffusion mask for forming the p + region 10 is the first back surface passivation film 11. Therefore, the back electrode type solar cell 71 can be manufactured without providing the step of forming the first back side passivation film 11 separately from the step of forming the diffusion mask for forming the p + region 10. Moreover, in the manufacturing method of the back electrode type solar cell 71 according to the present embodiment, the p + region 10 is formed by applying a solution containing a second conductivity type dopant. Therefore, back electrode type solar cell 71 can be manufactured without forming and removing a diffusion mask for forming p + region 10. Therefore, the number of manufacturing steps of the back electrode type solar cell 71 can be reduced. On the other hand, in the manufacturing method of the back electrode type solar cell 71 according to the present embodiment, the first back surface passivation film 11 is formed on the n + region 9, and the second back surface passivation is formed on the p + region 10. A film 12 is formed. From the above, in the manufacturing method of the back electrode type solar cell 71 according to the present embodiment, even if the number of manufacturing steps of the back electrode type solar cell 71 is reduced, the n + region 9 and the p + region 10 are respectively provided. Different passivation films can be formed.
また、多くの設備を必要とすることなく裏面電極型太陽電池７１を製造することができるので、裏面電極型太陽電池７１の生産性が向上する。
Moreover, since the back electrode type solar cell 71 can be manufactured without requiring many facilities, the productivity of the back electrode type solar cell 71 is improved.
さらに、ｎ型シリコン基板４を熱酸化させることにより第１裏面側パッシベーション膜１１がｎ+領域９上に形成されるため、位置ずれを招くことなくｎ+領域９上に第１裏面側パッシベーション膜１１を形成することができる。また、第２裏面側パッシベーション膜１２は、ｎ型シリコン基板４の裏面全面上に形成されるため、第１裏面側パッシベーション膜１１上だけでなくｐ+領域１０上にも形成される。よって、位置ずれを招くことなくｐ+領域１０上に第２裏面側パッシベーション膜１２を形成することができる。
Further, since the first back side passivation film 11 is formed on the n + region 9 by thermally oxidizing the n-type silicon substrate 4, the first back side passivation film is formed on the n + region 9 without causing positional displacement. 11 can be formed. In addition, since the second back surface side passivation film 12 is formed on the entire back surface of the n-type silicon substrate 4, it is formed not only on the first back surface side passivation film 11 but also on the p + region 10. Therefore, the second back-side passivation film 12 can be formed on the p + region 10 without causing a positional shift.
その上、酸化アルミニウム膜は負の固定電荷を有する。そのため、第２裏面側パッシベーション膜１２を酸化アルミニウム膜で構成すれば、ｐ+領域１０上において高いパッシベーション性を有する裏面電極型太陽電池７１を製造することができる。
In addition, the aluminum oxide film has a negative fixed charge. Therefore, if the second back surface side passivation film 12 is made of an aluminum oxide film, the back electrode type solar cell 71 having high passivation properties on the p + region 10 can be manufactured.
なお、本実施形態では、ｐ+領域１０を形成してからｎ+領域９を形成しても良い。この場合、ボロンなどを含むガスを用いてｐ+領域１０を形成することができ、リンなどを含む溶液を用いてｎ+領域９を形成することができる。
In the present embodiment, the n + region 9 may be formed after the p + region 10 is formed. In this case, the p + region 10 can be formed using a gas containing boron or the like, and the n + region 9 can be formed using a solution containing phosphorus or the like.
＜第３の実施形態＞
図５～図６は、本発明の第３の実施形態に係る裏面電極型太陽電池８１の構成を示す図である。図５は、本実施形態に係る裏面電極型太陽電池８１の構成を模式的に示す平面図であり、具体的には本実施形態に係る裏面電極型太陽電池８１をシリコン基板の裏面側からみた平面図である。本実施形態に係る裏面電極型太陽電池８１のシリコン基板の裏面では、帯状のｎ型用電極１０２と帯状のｐ型用電極１０３とが交互に配置されている。 <Third Embodiment>
5 to 6 are diagrams showing the configuration of a back electrode typesolar cell 81 according to the third embodiment of the present invention. FIG. 5 is a plan view schematically showing the configuration of the back electrode type solar cell 81 according to this embodiment. Specifically, the back electrode type solar cell 81 according to this embodiment is seen from the back side of the silicon substrate. It is a top view. On the back surface of the silicon substrate of the back electrode type solar cell 81 according to the present embodiment, the strip-shaped n-type electrodes 102 and the strip-shaped p-type electrodes 103 are alternately arranged.
図５～図６は、本発明の第３の実施形態に係る裏面電極型太陽電池８１の構成を示す図である。図５は、本実施形態に係る裏面電極型太陽電池８１の構成を模式的に示す平面図であり、具体的には本実施形態に係る裏面電極型太陽電池８１をシリコン基板の裏面側からみた平面図である。本実施形態に係る裏面電極型太陽電池８１のシリコン基板の裏面では、帯状のｎ型用電極１０２と帯状のｐ型用電極１０３とが交互に配置されている。 <Third Embodiment>
5 to 6 are diagrams showing the configuration of a back electrode type
図６は、図５に示すＶＩ－ＶＩ’線における断面図である。ｎ型シリコン基板１０４の受光面にはテクスチャ構造である凹凸形状１０５が形成されている。ｎ型シリコン基板１０４の受光面上には受光面側パッシベーション膜１０６が形成されており、受光面側パッシベーション膜１０６上には反射防止膜１０７が形成されている。受光面側パッシベーション膜１０６は、たとえば酸化シリコン膜または窒化シリコン膜であることが好ましい。受光面側パッシベーション膜１０６の厚さは、たとえば１０ｎｍ以下であることが好ましい。反射防止膜１０７は、受光面側パッシベーション膜１０６よりも屈折率が低いことが好ましく、たとえば受光面側パッシベーション膜１０６よりも窒素含有率が高い窒化シリコン膜であることが好ましい。反射防止膜１０７の厚さは、たとえば５０ｎｍ以下１００ｎｍ以下であることが好ましい。
FIG. 6 is a cross-sectional view taken along line VI-VI ′ shown in FIG. An uneven shape 105 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 104. A light-receiving surface side passivation film 106 is formed on the light-receiving surface of the n-type silicon substrate 104, and an antireflection film 107 is formed on the light-receiving surface side passivation film 106. The light-receiving surface side passivation film 106 is preferably, for example, a silicon oxide film or a silicon nitride film. The thickness of the light-receiving surface side passivation film 106 is preferably 10 nm or less, for example. The antireflection film 107 preferably has a lower refractive index than the light-receiving surface side passivation film 106, and is preferably a silicon nitride film having a higher nitrogen content than the light-receiving surface side passivation film 106, for example. The thickness of the antireflection film 107 is preferably, for example, 50 nm or less and 100 nm or less.
ｎ型シリコン基板１０４の裏面側には、ｎ型半導体領域であるｎ+領域１０９とｐ型半導体領域であるｐ+領域１１０とが交互に隣接して形成されている。ｐ+領域１１０上には、第１裏面側パッシベーション膜１１１が形成されており、ｎ+領域１０９上と第１裏面側パッシベーション膜１１１上とには、第２裏面側パッシベーション膜１１２が形成されている。第１裏面側パッシベーション膜１１１は、たとえば酸化シリコン膜であることが好ましい。第１裏面側パッシベーション膜１１１の厚さは、たとえば５０ｎｍ以上１００ｎｍ以下であることが好ましい。第２裏面側パッシベーション膜１１２は、たとえば窒化シリコン膜であることが好ましい。第２裏面側パッシベーション膜１１２の厚さは、たとえば５ｎｍ以上５０ｎｍ以下であることが好ましい。ｎ型用電極１０２はｎ+領域１０９に接続されており、ｐ型用電極１０３はｐ+領域１１０に接続されている。
On the back side of the n-type silicon substrate 104, n + regions 109 that are n-type semiconductor regions and p + regions 110 that are p-type semiconductor regions are formed alternately adjacent to each other. A first back-side passivation film 111 is formed on the p + region 110, and a second back-side passivation film 112 is formed on the n + region 109 and the first back-side passivation film 111. Yes. The first back side passivation film 111 is preferably, for example, a silicon oxide film. The thickness of the first back-side passivation film 111 is preferably, for example, not less than 50 nm and not more than 100 nm. The second back side passivation film 112 is preferably a silicon nitride film, for example. The thickness of the second back surface side passivation film 112 is preferably not less than 5 nm and not more than 50 nm, for example. The n-type electrode 102 is connected to the n + region 109, and the p-type electrode 103 is connected to the p + region 110.
より高い短絡電流を得るために、ｎ型シリコン基板１０４の裏面において、ｎ型シリコン基板１０４とは異なる導電型を有するｐ+領域１１０の合計面積を、ｎ型シリコン基板１０４とは同じ導電型を有するｎ+領域１０９の合計面積よりも大きくすることが好ましい。
In order to obtain a higher short-circuit current, the total area of the p + region 110 having a conductivity type different from that of the n-type silicon substrate 104 on the back surface of the n-type silicon substrate 104 is set to the same conductivity type as that of the n-type silicon substrate 104. It is preferable to make it larger than the total area of the n + regions 109.
隣り合うｎ+領域１０９は、当該ｎ+領域１０９の長さ方向に対して垂直方向に分離していてもよい。その際、ｎ+領域１０９間にはｐ+領域１１０が形成されている。また、ｐ+領域１１０が当該ｐ+領域１１０の長さ方向に対して垂直方向に分離している場合には、ｐ+領域１１０間にｎ+領域１０９が形成されている。
Adjacent n + regions 109 may be separated in a direction perpendicular to the length direction of the n + region 109. At this time, a p + region 110 is formed between the n + regions 109. Further, when the p + region 110 are separated in a direction perpendicular to the length direction of the p + region 110, n + region 109 between p + region 110 is formed.
なお、図５に示すように、ｎ型シリコン基板１０４の裏面側では最も周縁に位置する電極の導電型が同じであるため、裏面電極型太陽電池８１を回転対称構造とすることが可能である。よって、裏面電極型太陽電池８１を複数並べて太陽電池モジュールを作製するときには、たとえば裏面電極型太陽電池８１を図５における上下逆にして配置することができる。
As shown in FIG. 5, since the conductivity type of the electrode located at the outermost edge is the same on the back surface side of the n-type silicon substrate 104, the back electrode type solar cell 81 can have a rotationally symmetric structure. . Therefore, when producing a solar cell module by arranging a plurality of back electrode solar cells 81, for example, the back electrode solar cells 81 can be arranged upside down in FIG.
以下に、本実施形態に係る裏面電極型太陽電池８１の製造方法を示す。図７は、本実施形態に係る裏面電極型太陽電池８１の製造方法を工程順に示す断面図である。
Below, the manufacturing method of the back surface electrode type solar cell 81 which concerns on this embodiment is shown. FIG. 7 is a cross-sectional view showing the method of manufacturing the back electrode type solar cell 81 according to this embodiment in the order of steps.
まず、図７（ａ）に示すように、ｎ型シリコン基板１０４の裏面上に、たとえば窒化シリコン膜からなるテクスチャマスク１２１をたとえばＣＶＤ法またはスパッタ法で形成する。
First, as shown in FIG. 7A, a texture mask 121 made of, for example, a silicon nitride film is formed on the back surface of the n-type silicon substrate 104 by, for example, CVD or sputtering.
次に、図７（ｂ）に示すように、ｎ型シリコン基板１０４の受光面にテクスチャ構造である凹凸形状１０５をエッチングにより形成する。このエッチングは、たとえば水酸化ナトリウムまたは水酸化カリウムなどのアルカリ水溶液にイソプロピルアルコールを添加して得られた混合溶液を７０℃以上８０℃以下に加熱したものを用いて行なわれることが好ましい。
Next, as shown in FIG. 7B, an uneven shape 105 having a texture structure is formed on the light receiving surface of the n-type silicon substrate 104 by etching. This etching is preferably performed using, for example, a mixed solution obtained by adding isopropyl alcohol to an alkaline aqueous solution such as sodium hydroxide or potassium hydroxide to 70 ° C. or higher and 80 ° C. or lower.
次に、図７（ｃ）を用いて次の工程を説明する。図７（ｃ）では、ｎ型シリコン基板１０４の裏面側を上に記している。まず、ｎ型シリコン基板１０４の裏面上に形成されたテクスチャマスク１２１を除去する。その後、ｎ型シリコン基板１０４の裏面全面上に、第１導電型のドーパントを含む第１裏面側パッシベーション膜形成用膜をたとえばＣＶＤ法により形成し、第１裏面側パッシベーション膜形成用膜の上に、拡散防止膜形成用膜をたとえばＣＶＤ法により形成する。
Next, the next process will be described with reference to FIG. In FIG.7 (c), the back side of the n-type silicon substrate 104 is described above. First, the texture mask 121 formed on the back surface of the n-type silicon substrate 104 is removed. Thereafter, a first back-side passivation film forming film containing a first conductivity type dopant is formed on the entire back surface of the n-type silicon substrate 104 by, for example, a CVD method, and the first back-side passivation film forming film is formed on the first back-side passivation film forming film. A film for forming a diffusion prevention film is formed by, for example, a CVD method.
ここで、第１導電型のドーパントは、本実施形態では、ボロンなどのｐ型ドーパントである。第１裏面側パッシベーション膜形成用膜は、たとえば酸化シリコン膜であることが好ましく、第１裏面側パッシベーション膜形成用膜の厚さは、たとえば５０ｎｍ以上１００ｎｍ以下であることが好ましい。拡散防止膜形成用膜は、たとえば酸化シリコン膜または窒化シリコン膜などであることが好ましい。拡散防止膜形成用膜の厚さは、たとえば２００ｎｍ以上５００ｎｍ以下であることが好ましい。これにより、図７（ｄ）における熱処理時に、第２導電型のドーパントが拡散防止膜１３２（図７（ｄ）参照）を厚さ方向に貫通することを防止できるので、第２導電型のドーパントが第２導電型のドーパントを含む膜１３３（図７（ｄ）参照）からｎ型シリコン基板１０４のうち拡散防止膜１３２の下に位置する部分（別の言い方をするとｎ型シリコン基板１０４のうちｐ+領域１１０が形成される領域）へ向かって拡散することを防止できる。
Here, in the present embodiment, the first conductivity type dopant is a p-type dopant such as boron. The first back-side passivation film forming film is preferably a silicon oxide film, for example, and the thickness of the first back-side passivation film forming film is preferably, for example, from 50 nm to 100 nm. The diffusion preventing film forming film is preferably, for example, a silicon oxide film or a silicon nitride film. The thickness of the diffusion preventing film forming film is preferably, for example, 200 nm or more and 500 nm or less. Accordingly, the second conductivity type dopant can be prevented from penetrating through the diffusion prevention film 132 (see FIG. 7D) in the thickness direction during the heat treatment in FIG. 7D. Therefore, the second conductivity type dopant can be prevented. From the film 133 containing the second conductivity type dopant (see FIG. 7D), a portion of the n-type silicon substrate 104 located under the diffusion barrier film 132 (in other words, of the n-type silicon substrate 104 Diffusion toward the region where the p + region 110 is formed) can be prevented.
次に、ｎ型シリコン基板１０４の裏面側にｎ+領域１０９を形成するために、ｎ+領域１０９が形成される領域の上においてのみ第１裏面側パッシベーション膜形成用膜および拡散防止膜形成用膜が除去されるように第１裏面側パッシベーション膜形成用膜および拡散防止膜形成用膜をパターニングする。このパターニングは、エッチングペーストをスクリーン印刷法などで塗布してから加熱することにより行なわれることが好ましい。このパターニングにより、第１裏面側パッシベーション膜１１１および拡散防止膜１３２が形成され、ｎ+領域１０９が形成される領域が第１裏面側パッシベーション膜１１１および拡散防止膜１３２から露出する。その後、ｎ型シリコン基板１０４を超音波洗浄してから酸処理することにより、パターニングで使用したエッチングペーストを除去する。ここで、エッチングペーストとしては、たとえば、エッチング成分としてリン酸、フッ化水素、フッ化アンモニウムおよびフッ化水素アンモニウムからなる群より選択された少なくとも１種を含むことが好ましく、水、有機溶媒および増粘剤をさらに含むことが好ましい。
Next, in order to form the n + region 109 on the back side of the n-type silicon substrate 104, the first back side passivation film formation film and the diffusion prevention film formation film are formed only on the region where the n + region 109 is formed. The first backside passivation film formation film and the diffusion prevention film formation film are patterned so that the film is removed. This patterning is preferably performed by applying an etching paste by a screen printing method or the like and then heating. By this patterning, the first back-side passivation film 111 and the diffusion preventing film 132 are formed, and the region where the n + region 109 is formed is exposed from the first back-side passivation film 111 and the diffusion preventing film 132. Thereafter, the n-type silicon substrate 104 is subjected to ultrasonic cleaning and then acid-treated to remove the etching paste used for patterning. Here, the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
次に、図７（ｄ）に示すように、ｎ型シリコン基板１０４の裏面上（具体的にはｎ型シリコン基板１０４の裏面上のうち第１裏面側パッシベーション膜１１１および拡散防止膜１３２から露出する部分）と拡散防止膜１３２上とに、第２導電型のドーパントを含む膜１３３をたとえばＣＶＤ法により形成し、第２導電型のドーパントを含む膜１３３の上に、拡散制御膜１３４をたとえばＣＶＤ法により形成する。第２導電型のドーパントは、本実施形態では、リンなどのｎ型ドーパントである。第２導電型のドーパントを含む膜１３３は、たとえば酸化シリコン膜であることが好ましく、第２導電型のドーパントを含む膜１３３の厚さは、たとえば５０ｎｍ以上１００ｎｍ以下であることが好ましい。拡散制御膜１３４は、たとえば酸化シリコン膜または窒化シリコン膜などであることが好ましい。拡散制御膜１３４の厚さは、たとえば２００ｎｍ以上５００ｎｍ以下であることが好ましい。これにより、下記熱処理時には、第２導電型のドーパントが拡散制御膜１３４を厚さ方向に貫通することを防止できるので、第２導電型のドーパントがアウトディフュージョンすることを防止することができる。
Next, as shown in FIG. 7D, the n-type silicon substrate 104 is exposed from the first back-side passivation film 111 and the diffusion prevention film 132 on the back surface (specifically, on the back surface of the n-type silicon substrate 104). A film 133 containing a second conductivity type dopant is formed by, for example, the CVD method, and a diffusion control film 134 is formed on the film 133 containing the second conductivity type dopant, for example. It is formed by the CVD method. In the present embodiment, the second conductivity type dopant is an n-type dopant such as phosphorus. The film 133 containing the second conductivity type dopant is preferably, for example, a silicon oxide film, and the thickness of the film 133 containing the second conductivity type dopant is preferably, for example, not less than 50 nm and not more than 100 nm. The diffusion control film 134 is preferably a silicon oxide film or a silicon nitride film, for example. The thickness of the diffusion control film 134 is preferably, for example, not less than 200 nm and not more than 500 nm. Thereby, since the second conductivity type dopant can be prevented from penetrating the diffusion control film 134 in the thickness direction at the time of the following heat treatment, it is possible to prevent the second conductivity type dopant from being out-diffusioned.
次に、ｎ型シリコン基板１０４を熱処理する。これにより、第１導電型のドーパントが第１裏面側パッシベーション膜１１１からｎ型シリコン基板１０４の裏面側のうち第１裏面側パッシベーション膜１１１の下に位置する部分に拡散し、よって、ｐ+領域１１０が形成される。また、第２導電型のドーパントが第２導電型のドーパントを含む膜１３３からｎ型シリコン基板１０４の裏面側のうち第２導電型のドーパントを含む膜１３３の下に位置する部分に拡散し、よって、ｎ+領域１０９が形成される。このように、本実施形態でも、ｎ+領域１０９とｐ+領域１１０とを同時に形成することができる。また、ｎ+領域１０９とｐ+領域１１０とは、互いに隣接するように形成される。
Next, the n-type silicon substrate 104 is heat-treated. As a result, the first conductivity type dopant diffuses from the first back surface side passivation film 111 to the portion of the back surface side of the n-type silicon substrate 104 located below the first back surface side passivation film 111, and thus the p + region. 110 is formed. Further, the second conductivity type dopant diffuses from the film 133 containing the second conductivity type dopant to a portion located below the film 133 containing the second conductivity type dopant on the back side of the n-type silicon substrate 104, Therefore, n + region 109 is formed. Thus, also in this embodiment, the n + region 109 and the p + region 110 can be formed simultaneously. The n + region 109 and the p + region 110 are formed adjacent to each other.
ｎ型シリコン基板１０４の熱処理条件の一例としては、０．５時間以上２時間以下、ｎ型シリコン基板１０４を８００℃以上１０００℃以下で加熱するということが挙げられる。これにより、第２導電型のドーパント濃度が１０20ｃｍ-3以上のｎ+領域１０９が形成され、第１導電型のドーパント濃度が１０20ｃｍ-3以上のｐ+領域１１０が形成される。
As an example of the heat treatment condition of the n-type silicon substrate 104, heating the n-type silicon substrate 104 at 800 ° C. or more and 1000 ° C. or less for 0.5 hours or more and 2 hours or less can be mentioned. Thus, the dopant concentration of the second conductivity type is formed 10 20 cm -3 or more n + region 109, the dopant concentration of the first conductivity type is 10 20 cm -3 or more p + region 110 is formed.
なお、第１裏面側パッシベーション膜１１１と第２導電型のドーパントを含む膜１３３との間に拡散防止膜１３２が設けられているので、上記熱処理を行なっても第２導電型のドーパントが第２導電型のドーパントを含む膜１３３からｎ型シリコン基板１０４のうち拡散防止膜１３２の下に位置する部分へ向かって拡散することを防止することができる。また、第２導電型のドーパントを含む膜１３３の上には拡散制御膜１３４が設けられているので、第２導電型のドーパントがアウトディフュージョンすることを防止することができる。
In addition, since the diffusion prevention film 132 is provided between the first back surface side passivation film 111 and the film 133 containing the second conductivity type dopant, the second conductivity type dopant remains the second even if the heat treatment is performed. It is possible to prevent diffusion from the film 133 containing the conductive dopant toward the portion of the n-type silicon substrate 104 located under the diffusion prevention film 132. Further, since the diffusion control film 134 is provided on the film 133 containing the second conductivity type dopant, it is possible to prevent the second conductivity type dopant from being out-diffused.
次に、図７（ｅ）に示すように、ｎ型シリコン基板１０４の裏面上に形成された拡散制御膜１３４、第２導電型のドーパントを含む膜１３３および拡散防止膜１３２をエッチングにより除去する。ｎ+領域１０９上には、第２導電型のドーパントを含む膜１３３と拡散制御膜１３４とが形成されており、ｐ+領域１１０上には、第２導電型のドーパントを含む膜１３３および拡散制御膜１３４に加えて第１裏面側パッシベーション膜１１１と拡散防止膜１３２とが形成されている。そのため、第２導電型のドーパントを含む膜１３３および拡散制御膜１３４が除去されるまでエッチングを行なうと、第１裏面側パッシベーション膜１１１だけが残る。
Next, as shown in FIG. 7E, the diffusion control film 134, the film 133 containing the second conductivity type dopant, and the diffusion prevention film 132 formed on the back surface of the n-type silicon substrate 104 are removed by etching. . A film 133 containing a second conductivity type dopant and a diffusion control film 134 are formed on the n + region 109, and a film 133 containing a second conductivity type dopant and a diffusion layer are formed on the p + region 110. In addition to the control film 134, a first back-side passivation film 111 and a diffusion prevention film 132 are formed. Therefore, if etching is performed until the film 133 containing the second conductivity type dopant and the diffusion control film 134 are removed, only the first back-side passivation film 111 remains.
次に、図７（ｆ）に示すように、ｎ型シリコン基板１０４の裏面上に、第１裏面側パッシベーション膜１１１とは異なる第２裏面側パッシベーション膜１１２をたとえばスパッタ法またはＣＶＤ法により形成する。ｐ+領域１１０上には第１裏面側パッシベーション膜１１１が形成されているため、第２裏面側パッシベーション膜１１２はｎ+領域１０９上と第１裏面側パッシベーション膜１１１上とに形成される。その後、ｎ型シリコン基板１０４の受光面上に受光面側パッシベーション膜１０６と反射防止膜１０７とをたとえばＣＶＤ法により形成する。第２裏面側パッシベーション膜１１２は、たとえば窒化シリコン膜であることが好ましい。受光面側パッシベーション膜１０６および反射防止膜１０７は共に窒化シリコン膜であることが好ましく、窒素含有率は反射防止膜１０７の方が受光面側パッシベーション膜１０６よりも高いことが好ましく、屈折率は反射防止膜１０７の方が受光面側パッシベーション膜１０６よりも低いことが好ましい。受光面側パッシベーション膜１０６は、酸化シリコン膜であっても良い。
Next, as shown in FIG. 7F, a second back surface passivation film 112 different from the first back surface passivation film 111 is formed on the back surface of the n-type silicon substrate 104 by, for example, sputtering or CVD. . Since the first back surface side passivation film 111 is formed on the p + region 110, the second back surface side passivation film 112 is formed on the n + region 109 and the first back surface side passivation film 111. Thereafter, a light-receiving surface side passivation film 106 and an antireflection film 107 are formed on the light-receiving surface of the n-type silicon substrate 104 by, for example, a CVD method. The second back side passivation film 112 is preferably a silicon nitride film, for example. Both the light receiving surface side passivation film 106 and the antireflection film 107 are preferably silicon nitride films, and the nitrogen content is preferably higher in the antireflection film 107 than in the light receiving surface side passivation film 106, and the refractive index is reflected. The prevention film 107 is preferably lower than the light-receiving surface side passivation film 106. The light-receiving surface side passivation film 106 may be a silicon oxide film.
次に、図７（ｇ）を用いて次の工程を説明する。図７（ｇ）では、ｎ型シリコン基板１０４の受光面側を上に記している。ｎ+領域１０９上にｎ型用電極１０２を形成するために、第２裏面側パッシベーション膜１１２に対してパターニングを行なう。ｐ+領域１１０上にｐ型用電極１０３を形成するために、第１裏面側パッシベーション膜１１１および第２裏面側パッシベーション膜１１２に対してパターニングを行う。このパターニングは、たとえばエッチングペーストをスクリーン印刷法などで塗布してから加熱することにより行なわれることが好ましい。その後、ｎ型シリコン基板１０４を超音波洗浄して酸処理することにより、パターニングで使用したエッチングペーストを除去する。ここで、エッチングペーストとしては、たとえば、エッチング成分としてリン酸、フッ化水素、フッ化アンモニウムおよびフッ化水素アンモニウムからなる群より選択された少なくとも１種を含むことが好ましく、水、有機溶媒および増粘剤をさらに含むことが好ましい。
Next, the next step will be described with reference to FIG. In FIG. 7G, the light receiving surface side of the n-type silicon substrate 104 is shown above. In order to form the n-type electrode 102 on the n + region 109, the second back surface side passivation film 112 is patterned. In order to form the p-type electrode 103 on the p + region 110, the first back surface side passivation film 111 and the second back surface side passivation film 112 are patterned. This patterning is preferably performed, for example, by applying an etching paste by screen printing or the like and then heating. Thereafter, the n-type silicon substrate 104 is subjected to ultrasonic cleaning and acid treatment to remove the etching paste used for patterning. Here, the etching paste preferably includes, for example, at least one selected from the group consisting of phosphoric acid, hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride as an etching component. It is preferable to further contain a sticking agent.
次に、図７（ｈ）に示すように、ｎ+領域１０９のうち第２裏面側パッシベーション膜１１２から露出する部分の上と、ｐ+領域１１０のうち第１裏面側パッシベーション膜１１１および第２裏面側パッシベーション膜１１２から露出する部分の上とに、銀ペーストをたとえばスクリーン印刷法により塗布してから乾燥させる。その後、焼成する。これにより、ｎ+領域１０９上にはｎ型用電極１０２が形成され、ｐ+領域１１０上にはｐ型用電極１０３が形成される。このようにして裏面電極型太陽電池８１が製造される。
Next, as shown in FIG. 7H, the n + region 109 is exposed on the portion exposed from the second back surface side passivation film 112 and the first back surface side passivation film 111 and the second surface in the p + region 110. A silver paste is applied onto the portion exposed from the back-side passivation film 112 by, for example, a screen printing method and then dried. Thereafter, it is fired. As a result, the n-type electrode 102 is formed on the n + region 109, and the p-type electrode 103 is formed on the p + region 110. In this way, the back electrode type solar cell 81 is manufactured.
以上説明したように、本実施形態に係る裏面電極型太陽電池８１の製造方法では、ｐ+領域１１０を形成するために必要な第１導電型のドーパントを含む膜を第１裏面側パッシベーション膜１１１としている。よって、第１裏面側パッシベーション膜１１１を形成する工程を別途設けることなく裏面電極型太陽電池８１を製造することができる。また、本実施形態に係る裏面電極型太陽電池８１の製造方法では、図７（ｄ）に示す工程において、第１導電型のドーパントを拡散させてｐ+領域１１０を形成するとともに第２導電型のドーパントを拡散させてｎ+領域１０９を形成する。よって、第１導電型のドーパントを拡散させる工程とは別に第２導電型のドーパントを拡散させる工程を設けることなく、裏面電極型太陽電池８１を製造することができる。それだけでなく、ｎ+領域１０９を形成するために用いたマスクとｐ+領域１１０を形成するために用いたマスクとを同時に除去することができる。したがって、裏面電極型太陽電池８１の製造工程数を減らすことができる。一方、本実施形態に係る裏面電極型太陽電池８１の製造方法では、ｎ+領域１０９上には第２裏面側パッシベーション膜１１２が形成されており、ｐ+領域１１０上には第１裏面側パッシベーション膜１１１が形成されている。以上のことから、本実施形態に係る裏面電極型太陽電池８１の製造方法では、裏面電極型太陽電池８１の製造工程数を減らしてもｎ+領域１０９上とｐ+領域１１０上とにそれぞれ異なるパッシベーション膜を形成することができる。
As described above, in the method for manufacturing the back electrode type solar cell 81 according to the present embodiment, the first back surface passivation film 111 is formed of a film containing the first conductivity type dopant necessary for forming the p + region 110. It is said. Therefore, the back electrode type solar cell 81 can be manufactured without providing a separate step of forming the first back side passivation film 111. Further, in the method of manufacturing the back electrode type solar cell 81 according to this embodiment, in the step shown in FIG. 7D, the p + region 110 is formed by diffusing the first conductivity type dopant and the second conductivity type. N + region 109 is formed by diffusing the dopant. Therefore, the back electrode type solar cell 81 can be manufactured without providing a step of diffusing the second conductivity type dopant separately from the step of diffusing the first conductivity type dopant. In addition, the mask used to form the n + region 109 and the mask used to form the p + region 110 can be removed at the same time. Therefore, the number of manufacturing steps of the back electrode type solar cell 81 can be reduced. On the other hand, in the method of manufacturing the back electrode type solar cell 81 according to the present embodiment, the second back surface passivation film 112 is formed on the n + region 109 and the first back surface passivation is formed on the p + region 110. A film 111 is formed. From the above, in the method for manufacturing the back electrode type solar cell 81 according to the present embodiment, even if the number of manufacturing steps of the back electrode type solar cell 81 is reduced, the n + region 109 and the p + region 110 are different. A passivation film can be formed.
また、多くの設備を必要とすることなく裏面電極型太陽電池８１を製造することができるので、裏面電極型太陽電池８１の生産性が向上する。
Moreover, since the back electrode type solar cell 81 can be manufactured without requiring many facilities, the productivity of the back electrode type solar cell 81 is improved.
さらに、第１裏面側パッシベーション膜１１１を用いてｐ+領域１１０を形成する。よって、位置ずれを招くことなくｐ+領域１１０上に第１裏面側パッシベーション膜１１１を形成することができる。また、第２裏面側パッシベーション膜１１２は、ｎ型シリコン基板１０４の裏面全面上に形成されるため、第１裏面側パッシベーション膜１１１上だけでなくｎ+領域１０９上にも形成される。よって、位置ずれを招くことなくｎ+領域１０９上に第２裏面側パッシベーション膜１１２を形成することができる。
Further, the p + region 110 is formed using the first back surface side passivation film 111. Therefore, the first back-side passivation film 111 can be formed on the p + region 110 without causing a positional shift. Further, since the second back surface side passivation film 112 is formed on the entire back surface of the n-type silicon substrate 104, it is formed not only on the first back surface side passivation film 111 but also on the n + region 109. Therefore, the second back-side passivation film 112 can be formed on the n + region 109 without causing a positional shift.
その上、窒化シリコン膜は正の固定電荷を有する。そのため、第２裏面側パッシベーション膜１１２を窒化シリコン膜で構成すれば、ｎ+領域１０９上において高いパッシベーション性を有する裏面電極型太陽電池８１を製造することができる。
In addition, the silicon nitride film has a positive fixed charge. Therefore, if the second back surface side passivation film 112 is formed of a silicon nitride film, the back electrode type solar cell 81 having high passivation properties on the n + region 109 can be manufactured.
上記第１～第３の実施形態では、ｎ型シリコン基板を備えた裏面電極型太陽電池について記載したが、基板としてｐ型シリコン基板を用いることも可能である。基板としてｐ型シリコン基板を用いる場合、より高い短絡電流を得るためには、基板の裏面において、基板とは異なる導電型を有するｎ+領域の合計面積を、基板とは同一の導電型を有するｐ+領域の合計面積よりも大きくすることが好ましい。
In the first to third embodiments, the back electrode type solar cell provided with the n-type silicon substrate has been described, but a p-type silicon substrate may be used as the substrate. When a p-type silicon substrate is used as the substrate, in order to obtain a higher short-circuit current, the total area of n + regions having a conductivity type different from that of the substrate on the back surface of the substrate is the same as that of the substrate. It is preferable to make it larger than the total area of the p + region.
さらに、本発明の裏面電極型太陽電池の概念には、ＭＷＴ（Ｍｅｔａｌ Ｗｒａｐ Ｔｈｒｏｕｇｈ）型太陽電池（この太陽電池では、半導体基板に設けられた貫通孔に電極の一部が配置されている）なども含まれる。
Further, the concept of the back electrode type solar cell of the present invention includes an MWT (Metal Wrap Through) type solar cell (in this solar cell, a part of the electrode is disposed in a through hole provided in a semiconductor substrate), etc. Is also included.
今回開示された実施の形態はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は上記した説明ではなくて請求の範囲によって示され、請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。
The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.
１，７１，８１ 裏面電極型太陽電池、２，１０２ ｎ型用電極、３，１０３ ｐ型用電極、４，１０４ ｎ型シリコン基板、５，１０５ 凹凸形状、６，１０６ 受光面側パッシベーション膜、７，１０７ 反射防止膜、９，１０９ ｎ+領域、１０，１１０ ｐ+領域、１１，１１１ 第１裏面側パッシベーション膜、１１Ａ 第１裏面側パッシベーション膜形成用膜、１２，１１２ 第２裏面側パッシベーション膜、２１，１２１ テクスチャマスク、２２，２３，２５ 拡散マスク、２４ 酸化シリコン膜、３１，１３３ 第２導電型のドーパントを含む膜、３２，１３４ 拡散制御膜、３４，１３２ 拡散防止膜。
1, 71, 81 Back electrode type solar cell, 2,102 n-type electrode, 3,103 p-type electrode, 4,104 n-type silicon substrate, 5,105 uneven shape, 6,106 light-receiving surface side passivation film, 7, 107 Antireflection film, 9, 109 n + region, 10, 110 p + region, 11, 111 First back surface passivation film, 11A First back surface passivation film forming layer, 12, 112 Second back surface passivation Membrane, 21, 121 Texture mask, 22, 23, 25 Diffusion mask, 24 Silicon oxide film, 31, 133 Film containing dopant of second conductivity type, 32, 134 Diffusion control film, 34, 132 Diffusion prevention film.
Claims (5)
- シリコン基板（４，１０４）の裏面上の一部に、第１導電型のドーパントを含む第１裏面側パッシベーション膜（１１，１１１）を形成する工程と、
前記シリコン基板（４，１０４）の裏面上と前記第１裏面側パッシベーション膜（１１，１１１）上とに、第２導電型のドーパントを含む膜（３１，１３３）を形成する工程と、
前記シリコン基板（４，１０４）を熱処理することにより、前記第１導電型のドーパントが前記第１裏面側パッシベーション膜（１１，１１１）から前記シリコン基板（４，１０４）の一部に拡散されて第１導電型の半導体領域（９，１０９）が形成され、前記第２導電型のドーパントが前記第２導電型のドーパントを含む膜（３１，１３３）から前記シリコン基板（４，１０４）のうち前記第１導電型のドーパントが拡散される領域とは異なる領域の少なくとも一部に拡散されて第２導電型の半導体領域（１０，１１０）が形成される工程と、
前記第２導電型のドーパントを含む膜（３１，１３３）を除去する工程と、
前記シリコン基板（４，１０４）の裏面上と前記第１裏面側パッシベーション膜（１１，１１１）上とに、第２裏面側パッシベーション膜（１２，１１２）を形成する工程とを備えた裏面電極型太陽電池（１，８１）の製造方法。 Forming a first back surface side passivation film (11, 111) containing a first conductivity type dopant on a part of the back surface of the silicon substrate (4, 104);
Forming a film (31, 133) containing a dopant of the second conductivity type on the back surface of the silicon substrate (4, 104) and on the first back surface passivation film (11, 111);
By heat-treating the silicon substrate (4, 104), the dopant of the first conductivity type is diffused from the first back-side passivation film (11, 111) to a part of the silicon substrate (4, 104). A first conductive type semiconductor region (9, 109) is formed, and the second conductive type dopant is included in the silicon substrate (4, 104) from the film (31, 133) containing the second conductive type dopant. A step of diffusing in at least a part of a region different from a region where the first conductivity type dopant is diffused to form a second conductivity type semiconductor region (10, 110);
Removing the films (31, 133) containing the second conductivity type dopant;
Forming a second back surface passivation film (12, 112) on the back surface of the silicon substrate (4, 104) and the first back surface passivation film (11, 111); Manufacturing method of solar cell (1, 81). - シリコン基板（４）の裏面上の一部に、第１導電型の半導体領域（９）を形成する工程と、
前記第１導電型の半導体領域（９）上に、第１裏面側パッシベーション膜（１１）を形成する工程と、
第２導電型のドーパントを含む溶液を用いて、前記シリコン基板（４）の裏面のうち前記第１導電型の半導体領域（９）とは異なる領域の少なくとも一部に、第２導電型の半導体領域（１０）を形成する工程と、
前記シリコン基板（４）の裏面上と前記第１裏面側パッシベーション膜（１１）上とに、第２裏面側パッシベーション膜（１２）を形成する工程とを備えた裏面電極型太陽電池（７１）の製造方法。 Forming a first conductivity type semiconductor region (9) on a part of the back surface of the silicon substrate (4);
Forming a first back-side passivation film (11) on the first conductivity type semiconductor region (9);
Using a solution containing a dopant of the second conductivity type, a second conductivity type semiconductor is formed on at least a part of the back surface of the silicon substrate (4) different from the first conductivity type semiconductor region (9). Forming a region (10);
A back electrode type solar cell (71) comprising a step of forming a second back surface side passivation film (12) on the back surface of the silicon substrate (4) and on the first back surface side passivation film (11). Production method. - 前記第１導電型の半導体領域（９，１０９）は、ｎ型であり、
前記第２導電型の半導体領域（１０，１１０）は、ｐ型である請求項１または２に記載の裏面電極型太陽電池（１，７１，８１）の製造方法。 The semiconductor region (9, 109) of the first conductivity type is n-type,
The method of manufacturing a back electrode type solar cell (1, 71, 81) according to claim 1 or 2, wherein the semiconductor region (10, 110) of the second conductivity type is p-type. - 前記第２裏面側パッシベーション膜（１２）は、酸化アルミニウム膜である請求項３に記載の裏面電極型太陽電池（１）の製造方法。 The method for producing a back electrode type solar cell (1) according to claim 3, wherein the second back surface passivation film (12) is an aluminum oxide film.
- 前記第１裏面側パッシベーション膜（１１，１１１）は、酸化シリコン膜である請求項１～４のいずれかに記載の裏面電極型太陽電池（１，７１，８１）の製造方法。 The method for manufacturing a back electrode type solar cell (1, 71, 81) according to any one of claims 1 to 4, wherein the first back surface passivation film (11, 111) is a silicon oxide film.
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