WO2012146007A1 - 一种多合体功率放大器及其实现方法 - Google Patents
一种多合体功率放大器及其实现方法 Download PDFInfo
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- WO2012146007A1 WO2012146007A1 PCT/CN2011/081398 CN2011081398W WO2012146007A1 WO 2012146007 A1 WO2012146007 A1 WO 2012146007A1 CN 2011081398 W CN2011081398 W CN 2011081398W WO 2012146007 A1 WO2012146007 A1 WO 2012146007A1
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- power amplifier
- peak power
- peak
- carrier
- doherty
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- 238000000034 method Methods 0.000 title claims abstract description 18
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 22
- 229910002601 GaN Inorganic materials 0.000 claims description 19
- 229910044991 metal oxide Inorganic materials 0.000 claims description 5
- 150000004706 metal oxides Chemical class 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 5
- 230000003321 amplification Effects 0.000 abstract description 31
- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 31
- 238000004891 communication Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 230000007704 transition Effects 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 238000003786 synthesis reaction Methods 0.000 description 3
- 238000012053 enzymatic serum creatinine assay Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 101100440934 Candida albicans (strain SC5314 / ATCC MYA-2876) CPH1 gene Proteins 0.000 description 1
- 101100273252 Candida parapsilosis SAPP1 gene Proteins 0.000 description 1
- MWRWFPQBGSZWNV-UHFFFAOYSA-N Dinitrosopentamethylenetetramine Chemical compound C1N2CN(N=O)CN1CN(N=O)C2 MWRWFPQBGSZWNV-UHFFFAOYSA-N 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000007405 data analysis Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0277—Selecting one or more amplifiers from a plurality of amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
- H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/405—Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising more than three power stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/72—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
- H03F2203/7215—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by a switch at the input of the amplifier
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/72—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
- H03F2203/7231—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by putting into cascade or not, by choosing between amplifiers by one or more switch(es)
Definitions
- the present invention relates to the field of communications technologies, and more particularly to a multi-body power amplifier and an implementation method thereof.
- a radio frequency power amplifier (referred to as a power amplifier) in a base station device is one of the core modules of the entire system, and an important indicator of the radio frequency power amplifier is power amplifier efficiency.
- Data analysis shows that in the entire base station equipment, the power consumption of the power amplifier part accounts for about 60% of the total energy consumption. Improving the efficiency of the power amplifier has reduced the power consumption of the base station equipment and reduced the operating cost of the operator. OPEX (Operating Expense, Operation) The most effective means of cost). Therefore, in the face of increasingly fierce market competition for wireless communications, high-efficiency RF power amplifier technology has become one of the focuses of the wireless communications industry.
- the Doherty amplifier is one of the most widely used high-efficiency power amplifier technologies in wireless communication systems. It was invented in 1936 by an American electronics engineer named William H. Doherty. But in the next thirty years or so, people's attention shifted. Until the late 1960s, with the development of communication technologies, especially satellite communications, the efficiency and linearity of power amplifiers were reintroduced in a new historical era. Doherty amplifiers were discovered and widely used in communications in the 1970s. And in the broadcast system. At present, Doherty power amplifier combined with DPD (Digital Pre-distortion) technology has become the mainstream form of high-efficiency power amplifier for wireless communication system base stations.
- DPD Digital Pre-distortion
- Doherty power amplifier The basic idea of Doherty power amplifier is active load traction.
- the traditional Doherty power amplifier principle is shown in Figure 1. It mainly includes push-stage amplifier (Drl ... Dm in the figure), power distribution (D in the figure), and carrier amplifier ( Figure).
- Medium C also known as main power amplifier
- peak amplifier P, also called auxiliary power amplifier
- power synthesis circuit Combiner in the figure
- the carrier power amplifier works in class B or class AB
- the peak power amplifier works in class C.
- the two bear different input signal powers respectively, and the two parts of the power amplifiers should be operated in their respective saturation regions as much as possible, so as to ensure that the whole power is placed as far as possible. High efficiency is maintained over a large input signal power range while maintaining a certain linearity.
- the Doherty amplifier mainly includes the following three working states:
- the peak amplifier When the input signal is relatively small, the peak amplifier is in the off state, and the carrier amplifier operates in the class AB. At this time, the carrier amplifier operates in the maximum efficiency matching state;
- the carrier amplifier gradually transitions from the amplification region to the saturation region, and the peak amplifier gradually transitions from the cut-off region to the amplification region.
- the load of the carrier amplifier and the peak amplifier are unstable, and the load impedance is Change in power;
- both the carrier amplifier and the peaking amplifier eventually operate in saturation, both of which correspond to a 50 ⁇ load, and the output power is added.
- the technical problem solved by the present invention is to provide a multi-body power amplifier and an implementation method thereof, which avoids the peak power consumption when the peak amplifier is turned on in advance, and improves the efficiency of the entire peak power amplifier.
- the present invention provides a multi-body power amplifier including a carrier power amplifier circuit and a peak power amplifier circuit.
- the peak power amplifier circuit is provided with a radio frequency switch, and the radio frequency switch is configured to control a peak power amplifier to be turned on in the peak power amplifier circuit;
- Some or all of the carrier power amplifiers in the carrier power amplifier circuit are gallium nitride (GaN) devices, and some or all of the peak power amplifiers of the peak amplifying circuit are laterally diffused metal oxide semiconductor (LDMOS) devices.
- GaN gallium nitride
- LDMOS laterally diffused metal oxide semiconductor
- the carrier power amplifier circuit includes one or more carrier power amplifier branches, and each of the carrier power amplifier branches includes one or more stages of power amplifiers; wherein the final stage power amplifier uses GaN devices.
- the peak power amplifier circuit includes one or more peak power amplifier branches, and each of the peak power amplifier branches includes one or more peak power amplifiers; wherein the final peak power amplifier uses an LDMOS device.
- the RF switch is disposed in each peak power amplifier branch of the peak power amplifier circuit.
- the RF switch is disposed between the boost stage peak power amplifier and the final stage peak power amplifier, and the RF switch is configured to control the final stage.
- the peak power amplifier is turned on.
- the present invention also provides a method for implementing a multi-body power amplifier, the method comprising: setting a radio frequency switch in a peak power amplifier circuit of a multi-body (Doherty) power amplifier, and controlling a peak power amplifier in the peak power amplifier circuit through the radio frequency switch Conduction
- part or all of the carrier power amplifier circuit of the Doherty power amplifier uses a GaN device, and some or all of the peak power amplifiers of the peak amplifying circuit use an LDMOS device.
- the carrier power amplifier circuit includes one or more carrier power amplifier branches, and each of the carrier power amplifier branches includes one or more stages of power amplifiers; wherein the final stage power amplifier uses GaN devices.
- the peak power amplifier circuit includes one or more peak power amplifier branches, and each of the peak power amplifier branches includes one or more peak power amplifiers; wherein the final peak power amplifier uses an LDMOS device.
- the step of setting a radio frequency switch in the peak power amplifier circuit of the Doherty power amplifier includes: setting the radio frequency switch in each peak power amplifier branch of the peak power amplifier circuit;
- the RF switch is set between the boost level peak power amplifier and the final stage peak power amplifier.
- the step of controlling the conduction of the peak power amplifier in the peak power amplifier circuit by the radio frequency switch comprises: controlling, by the radio frequency switch, the conduction of the final peak power amplifier in the peak power amplifier branch.
- the power consumption of the general peak power amplifier accounts for 10%-20% of the total power consumption of the power amplifier. After using the above scheme, the ratio can be reduced to 5%-10%.
- the carrier power amplifier uses GaN (gallium nitride) device, the efficiency is much higher than the LDMOS (horizontal expansion) The bulk metal oxide semiconductor device, so the efficiency of the entire power amplifier is greatly improved.
- GaN + LDMOS's final amplification scheme compared to both The cost of a high efficiency solution for GaN devices is much lower.
- Figure 1 is a schematic block diagram of a conventional Doherty power amplifier
- FIG. 2 is a schematic block diagram of an embodiment of the present invention applied to a two-way Doherty architecture
- FIG. 3 is a schematic block diagram of an embodiment of the present invention applied to a multi-stage multi-channel Doherty architecture
- FIG. 4 is a schematic block diagram of an 85W power amplifier applied to a UMTS 2.1 GHz band in an application example of the present invention.
- the operator's requirement for the communication system is that the lower the power consumption, the better, and the higher the efficiency, the better. Therefore, we must constantly seek ways to further reduce power consumption and improve efficiency.
- the traditional Doherty amplifier has the following disadvantages:
- the power consumption of the peak power amplifier of the Doherty amplifier is very small, but the power consumption of the peak power amplifier in the actual power amplifier accounts for 10%-20%. This is because in the Doherty power amplifier, the peak power amplifier works in the C class. When the small signal is working, the peak amplifier does not conduct. When the amplified signal is gradually increased from small to a certain degree, the carrier amplifier begins to compress, and the peak amplifier must It can work normally, otherwise it will affect the improvement of the linearity of the power amplifier. The turn-on of the Class C amplifier is gradually turned on as the signal is turned from small to large. Therefore, in practical applications, in order to fully turn on the peak amplifier when the carrier amplifier starts to compress, it must be advanced at a lower level. Turn on, so The power consumption of the peak power amplifier is increased, thereby reducing the efficiency of the entire power amplifier.
- the power consumption of the peak amplification branch of the Doherty power amplifier is controlled to reduce the power consumption of the peak amplification; at the same time, the efficiency of the entire power amplifier is further improved by selecting the tube type of the final power amplifier.
- the embodiment of the present invention adds a radio frequency switching circuit to the peak amplification branch of Doherty.
- the radio frequency switch is turned on, and the peak power amplifier is turned on, thereby avoiding the pre-conduction of the peak power amplifier. , in turn, reduce the power consumption of the peak power amplifier; at the same time, the final power amplifier is implemented by a combination of GaN and LDMOS to further improve the efficiency of the entire power amplifier.
- Pi is the input signal port
- Drl ... Dm is the push stage amplifier
- C is the carrier amplifier
- P is the peak amplifier
- S is the RF switch circuit
- Vc is the RF switch control voltage (changing the size of Vc can adjust the RF switch Turn-on level)
- D is the power distribution circuit
- Combiner is the power synthesis circuit
- Po is the signal output port.
- control process of the peak amplifier by the RF switching circuit of the embodiment of the present invention is as follows:
- the entire peak amplification branch is in the off state, and at this time, the entire carrier amplification branch is operated at the maximum efficiency matching AB. Class status.
- the carrier amplification branch begins to gradually transition from the amplification region to the saturation region, and the peak amplification branch routing transition region transitions to the amplification region, initially the peak power amplifier is not turned on, that is, There is no power consumption.
- the signal input to the peak branch reaches the conduction level of the RF switch, the RF switch is turned on, and the peak power amplifier is fully turned on. This avoids the advance conduction of the peak power amplifier, reduces power consumption, and improves the efficiency of the power amplifier.
- the conduction level of the RF switch can be adjusted to meet the requirements of different standard signals and different peak power amplifier devices.
- the carrier power amplifier of the present invention uses the GaN device, and the efficiency is much higher than that of the LDMOS device, so the efficiency of the entire power amplifier is greatly improved.
- FIG. 1 A schematic diagram of an embodiment of the present invention applied to a multi-channel multi-stage Doherty power amplifier architecture is shown in FIG.
- Pi is the input signal port
- Dr is the push stage amplifier
- D is the power distribution
- Cl l ... Cln to Cnl - Cnn constitute the first to nth carrier amplification branch of the multi-stage Doherty power amplifier
- ⁇ 1 ⁇ to Pnl ... Pnn constitute the first to nth peak amplification branch of the multi-stage Doherty power amplifier
- Sl ... Sn is the RF switching circuit of the first to the nth peak amplification branch
- Vcl .. .Vcn is the control voltage of the corresponding RF switch (changing the size of Vcl ... Vcn can adjust the conduction level of the corresponding RF switch)
- Combiner is the power synthesis circuit.
- the principle of performance improvement is similar to that of the two-way Doherty power amplifier architecture.
- a method for controlling the switching of the peak amplifier by the radio frequency switch and a design method of Doherty are also provided.
- the main technical requirements of a UMTS power amplifier are as follows: Frequency range 2110MHz-2170MHz, output power 85W, input signal PAR7dB, gain 50dB, efficiency 42%, linear index (including ACPR, SEM, Out of Band Spurious, etc.) Meet the requirements of the standard protocol.
- Step A Determine a power amplifier architecture form. Since the power output of the power amplifier is 85W and the efficiency requirement is more than 42%, considering the requirements of the power amplifier technical specifications and the existing device conditions, the entire power amplifier adopts the 2-way Doherty architecture (such as the structure of Figure 2).
- Step B selecting the final stage carrier amplification (C1) and the final stage peak amplification (P1) power amplifier tube model.
- C1 and P1 power amplifier tube model According to the output power and input signal PAR requirements, CREE's GaN power amplifier tube CGH21120F was selected as the final stage carrier amplifier.
- NXP's LDMOS power amplifier tube BLF7G20LS-200 was selected as the final stage peak amplifier.
- GaN power amplifier tube is a new type of RF power Compared with LDMOS, the device has the advantages of high operating frequency, wide working bandwidth, high efficiency and small size. The combination of GaN power amplifier tube and LDMOS power amplifier tube achieves a good balance between high performance and low cost.
- Step C select the push level device.
- CREE's GaN power amplifier tube CGH40045 was selected as the push-level device.
- RFMD's SXA-389Z was selected as the first stage to drive the amplifier components.
- Step D Complete the RF switching circuit of the peak amplification branch.
- the implementation of the circuit includes various forms such as PIN tube RF switch, MMIC RF switch, etc.
- the switch circuit must be turned on as needed.
- Step E complete the remaining circuit design such as temperature compensation, circulator, coupler, etc., and finally the schematic diagram and PCB design of the entire power amplifier.
- Step F complete the debugging and testing of the entire power amplifier.
- modules or steps can be implemented by a general-purpose computing device, which can be concentrated on a single computing device or distributed over a network composed of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device such that they may be stored in the storage device for execution by the computing device and, in some cases, may be performed in a different order than that illustrated herein.
- the steps are described or described, either separately as individual integrated circuit modules, or as a plurality of modules or steps in a single integrated circuit module. Thus, the invention is not limited to any specific combination of hardware and software.
- the power consumption of the power amplifier increases the batch efficiency of the entire power amplifier.
- the power consumption of the general peak power amplifier accounts for 10%-20% of the total power consumption of the power amplifier. After using the above scheme, the ratio can be reduced to 5%-10%.
- the carrier power amplifier uses GaN (gallium nitride) device, the efficiency is much higher than the LDMOS (lateral diffusion metal oxide semiconductor) device, so the efficiency of the whole power amplifier is greatly improved. Upgrade.
- GaN + LDMOS's final amplification scheme compared to both The cost of a high efficiency solution for GaN devices is much lower.
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Abstract
本发明公开了一种多合体功率放大器及其实现方法,多合体功率放大器包括载波功放电路和峰值功放电路,峰值功放电路中设置有用于控制峰值功放电路中峰值功放导通的射频开关;载波功放电路中的部分或全部载波功放是采用GaN器件,峰值放大电路的部分或全部峰值功放是采用LDMOS器件。本发明避免了Doherty功放中峰值支路提前导通的缺点,降低了峰值功放的功耗;同时由于Doherty功放中载波功放的功耗占绝大部分,本发明中载波功放使用GaN器件,效率远高于LDMOS器件,因此整个功放的效率得到大幅度的提升。
Description
一种多合体功率放大器及其实现方法
技术领域
本发明涉及通信技术领域, 更具体的, 涉及一种多合体功率放大器及其 实现方法。
背景技术
随着绿色环保、 低碳经济理念在全球不断的推广深入人心, 运营商对于 无线通信***的功耗降低的要求也越来越高。 在无线通信***中, 基站设备 中的射频功率放大器 (简称功放)是整个***的核心模块之一, 射频功率放 大器的重要指标是功放效率。 数据分析表明, 在整个基站设备里, 功放部分 的能耗占到了总体能耗的 60%左右, 提高功放的效率从而成为了降低基站设 备功耗, 降低运营商的运营成本 OPEX ( Operating Expense, 运营成本)的最 有效手段。 因此, 面对无线通信日益激烈的市场竟争, 高效率的射频功放技 术已经成为无线通信行业竟争的焦点之一。
Doherty (多合体)功放是无线通信***目前最为广泛应用的一种高效率 功放技术, 它是由一位名叫 William H. Doherty的美国电子工程师于 1936年 发明的。 但是在接下来的大约三十年时间里, 人们的注意力转移了。 直到六 十年代末期, 随着通信技术, 特别是卫星通信的发展, 将功率放大器的效率 和线性问题在一个新的历史场合重新提出, Doherty放大器又被挖掘出来, 广 泛应用于七十年代的通信和广播***中。 目前, Doherty功放与 DPD ( Digital Pre-distortion, 数字预失真 )技术结合应用, 已成为无线通信***基站高效 率功放主流的构架形式。
Doherty功放的基本思想是有源负载牵引, 传统的 Doherty功放原理如图 1所示, 其主要包括推动级放大器(图中 Drl ...Dm ) 、 功率分配(图中 D )、 载波放大器(图中 C, 也称为主功放) 、 峰值放大器(图中 P, 也称为辅助 功放) 、 功率合成电路(图中 Combiner )等。 其中, 载波功放工作在 B类或 AB类, 峰值功放工作在 C类。 二者分别承担不同的输入信号功率, 且需尽 可能的使得两部分功放都工作在各自的饱和区中, 从而保证整个功放在尽量
大的输入信号功率范围内都保持较高的效率, 同时保证一定的线性。
Doherty功放主要包括如下三种工作状态:
小信号区。 当输入信号比较小的时候, 峰值放大器处于关断状态, 载波 放大器工作在 AB类, 此时, 载波放大器工作在最大效率匹配状态;
负载调制区。 当输入信号增大到一定程度, 载波放大器逐渐由放大区向 饱和区过渡, 峰值放大器逐渐由截止区向放大区过渡, 此时, 载波放大器和 峰值放大器的负载都是不稳定的, 负载阻抗随功率的变化而变化;
饱和区。 随着输入信号的不断增大, 载波放大器和峰值放大器最终都工 作在饱和状态, 二者均对应着 50Ω负载, 输出功率相加。
发明内容
本发明解决的技术问题是提供一种多合体功率放大器及其实现方法, 避 免峰值放大器提前导通时增大峰值功耗, 同时提高整个峰值功放的效率。
为解决上述技术问题, 本发明提供了一种多合体功率放大器, 包括载波 功放电路和峰值功放电路,
所述峰值功放电路中设置有射频开关, 所述射频开关设置为控制所述峰 值功放电路中峰值功放导通;
所述载波功放电路中的部分或全部载波功放是釆用氮化镓( GaN )器件, 所述峰值放大电路的部分或全部峰值功放是釆用横向扩散金属氧化物半导体 ( LDMOS ) 器件。
可选地, 所述载波功放电路包括一路或多路载波功放支路, 且每路载波 功放支路中包括一级或多级载波功放; 其中, 所述末级载波功放釆用 GaN器 件。
可选地, 所述峰值功放电路包括一路或多路峰值功放支路, 且每路峰值 功放支路中包括一级或多级峰值功放;其中,所述末级峰值功放釆用 LDMOS 器件。
可选地, 所述峰值功放电路的每路峰值功放支路中均设置有所述射频开 关。
可选地, 所述峰值功放支路中包括多级峰值功放时, 所述射频开关设置 在推动级峰值功放与所述末级峰值功放之间, 所述射频开关是设置为控制所 述末级峰值功放的导通。
本发明还提供了一种多合体功率放大器的实现方法, 所述方法包括: 在多合体(Doherty )功率放大器的峰值功放电路中设置射频开关, 通过 该射频开关控制所述峰值功放电路中峰值功放的导通;
其中, 所述 Doherty功率放大器的载波功放电路的部分或全部载波功放 釆用 GaN器件,所述峰值放大电路的部分或全部峰值功放釆用 LDMOS器件。
可选地, 所述载波功放电路包括一路或多路载波功放支路, 且每路载波 功放支路中包括一级或多级载波功放; 其中, 所述末级载波功放釆用 GaN器 件。
可选地, 所述峰值功放电路包括一路或多路峰值功放支路, 且每路峰值 功放支路中包括一级或多级峰值功放;其中,所述末级峰值功放釆用 LDMOS 器件。
可选地, 在所述 Doherty功率放大器的峰值功放电路中设置射频开关的 步骤包括: 在所述峰值功放电路的每路峰值功放支路中均设置有所述射频开 关; 且
所述峰值功放支路中包括多级峰值功放时, 将所述射频开关设置在推动 级峰值功放与所述末级峰值功放之间。
可选地, 所述通过该射频开关控制所述峰值功放电路中峰值功放的导通 的步骤包括: 通过所述射频开关控制所述峰值功放支路中末级峰值功放的导 通。
与现有技术比较, 上述方案具有以下优点:
a )效率高, 避免了 Doherty功放中峰值支路提前导通的缺点, 降低了峰 值功放的功耗, 提高了整个功放的批量效率。 未使用上述方案的 Doherty功 放中, 一般峰值功放的功耗占功放总功耗的 10%-20%, 使用上述方案后, 这 一比例数值可降低到 5%-10%。 同时由于 Doherty功放中载波功放的功耗占绝 大部分, 载波功放使用 GaN (氮化镓) 器件, 效率远高于 LDMOS (横向扩
散金属氧化物半导体) 器件, 因此整个功放的效率得到大幅度的提升。
b )低成本, 相比一些厂家使用复杂数字及射频电路来改善峰值功放导通 时间的方案, 大幅度降低了功放的产品成本和生产成本; GaN+LDMOS的末 级放大方案相比两路都是 GaN器件的高效率方案成本要降低很多。
c ) 体积小,相比一些厂家使用复杂数字及射频电路来改善峰值功放导通 时间的方案, 占用体积要小很多。 附图概述
此处所说明的附图用来提供对本发明的进一步理解, 构成本申请的一部 分, 本发明的示意性实施例及其说明用于解释本发明, 并不构成对本发明的 不当限定。 在附图中:
图 1为传统的 Doherty功率放大器的示意框图;
图 2为本发明实施方式应用于二路 Doherty架构的原理框图;
图 3为本发明实施方式应用于多级多路 Doherty架构的原理框图; 图 4为本发明应用示例中应用于 UMTS 2.1GHz频段 85W功放的示意框 图。 本发明的较佳实施方式
运营商对通信***的要求是功耗越低越好, 效率越高越好。 因此, 我们 必须不断寻求进一步降低功耗、 提升效率的方法。 而传统的 Doherty功放主 要存在如下缺点:
1 )理论上 Doherty功放的峰值功放的功耗是非常小的, 但是在实际功放 中峰值功放的功耗却占到了 10%-20%。 这是因为在 Doherty功放中峰值功放 工作在 C类, 在小信号工作时峰值放大器不导通, 在放大信号由小逐步变大 到一定程度时, 载波放大器开始出现压缩趋势, 此时峰值放大器必须能正常 导通工作, 否则会对 DPD对功放线性的改善造成影响。 而 C类放大器的导通 是随着信号由小到大逐渐导通的, 所以在实际应用中为了在载波放大器开始 压缩时峰值放大器能完全导通, 必须使之在更低的电平下提前导通, 这样就
增大了峰值功放的功耗, 从而降低了整个功放的效率。
2 )现有 Doherty功放的载波功放和峰值功放釆用的都是 LDMOS功放管, 存在工作频率低、 工作带宽窄、 效率低、 功耗高等缺点。
本发明的实施方式, 通过对 Doherty功放的峰值放大支路的信号通断进 行控制, 减小峰值放大的功耗; 同时, 通过对末级功放的管型选择, 进一步 提升整个功放的效率。
具体地, 本发明实施方式通过在 Doherty的峰值放大支路中加入射频开 关电路, 当输入信号增大到合适的幅度时射频开关导通, 峰值功放才导通, 避免了峰值功放的提前导通, 进而减小了峰值功放的功耗; 同时, 末级功放 釆用 GaN和 LDMOS组合实现, 以进一步提升整个功放的效率。
下文中将结合附图对本发明的实施例进行详细说明。 需要说明的是, 在 不冲突的情况下, 本申请中的实施例及实施例中的特征可以相互任意组合。
图 2示出了本发明实施方式应用于二路 Doherty架构的框图。 图中 Pi为 输入信号端口; Drl ...Dm为推动级放大器; C为载波放大器、 P为峰值放大 器、 S为射频开关电路、 Vc为射频开关控制电压 (改变 Vc的大小可以调节 射频开关的导通电平) 、 D为功率分配电路、 Combiner为功率合成电路、 Po 为信号输出端口。
结合图 2 , 本发明的实施例的射频开关电路对峰值放大器的控制过程描 述如下:
当峰值放大支路的输入信号较小(低于射频开关的导通电平时)的时候, 整个峰值放大支路处于关断状态, 而此时整个载波放大支路是工作在最大效 率匹配的 AB类状态。
当峰值放大支路的输入信号增大到一定程度时, 载波放大支路开始逐渐 由放大区向饱和区过渡, 峰值放大支路由截止区向放大区过渡, 起初峰值功 放并不导通, 也就并无功率消耗。 而当输入峰值支路的信号达到射频开关的 导通电平时, 射频开关导通, 峰值功放随之完全导通。 这样就避免了峰值功 放的提前导通, 减小了功耗, 提高了功放的效率。
此外,通过改变 Vc的大小可以调节射频开关的导通电平,从而满足不同 制式信号及不同峰值功放器件的要求。
最后, 随着输入信号的不断增大, 最终整个载波放大支路和峰值放大支 路都工作于饱和状态。 由于 Doherty功放中载波功放的功耗占绝大部分, 本 发明中载波功放使用 GaN器件, 效率远高于 LDMOS器件, 因此整个功放的 效率得到大幅度的提升。
本发明实施方式应用于多路多级 Doherty功放架构的示意图如图 3所示。 图中 Pi为输入信号端口; Dr为推动级放大器; D为功率分配; Cl l ...Cln至 Cnl—Cnn构成多级 Doherty功放的第一条至第 n载波放大支路; Ρ11 ...Ρ1η至 Pnl ...Pnn构成多级 Doherty功放的第一条至第 n条峰值放大支路; Sl ... Sn为 第一条至第 n条峰值放大支路的射频开关电路、 Vcl ...Vcn为相应射频开关的 控制电压 (改变 Vcl ... Vcn 的大小可以调节相应射频开关的导通电平) ; Combiner为功率合成电路。其性能改善的原理与二路 Doherty功放架构类似。
此外, 本发明实施例中还提供了一种实现由射频开关控制峰值放大器通 断的方法及 Doherty的设计方法。 例如某 UMTS功放主要技术要求如下: 频 率范围 2110MHz-2170MHz, 输出功率 85W, 输入信号 PAR7dB, 增益 50dB, 效率 42%, 线性指标(包括 ACPR、 SEM、 Out of Band Spurious等) 满足标 准协议要求。
具体地,应用本发明实施例完成整个功放研发的过程主要包括以下步骤: 步骤 A, 确定功放架构形式。 由于本功放输出功率 85W, 效率要求 42% 以上, 综合考虑功放技术指标要求及现有器件状况决定整个功放釆用 2路 Doherty架构形式(如附图 2架构) 。
步骤 B, 选定末级载波放大(C1 )和末级峰值放大(P1 )功放管型号。 依据输出功率和输入信号 PAR要求, 选定 CREE 公司的 GaN 功放管 CGH21120F 作为末级载波放大器件, 选定 NXP公司的 LDMOS 功放管 BLF7G20LS-200作为末级峰值放大器件。 GaN功放管是一种新型的射频功率
器件, 相比 LDMOS具有工作频率高、 工作带宽宽、 效率高、 体积小等优点, 釆用 GaN功放管与 LDMOS功放管二者结合应用实现了高性能与低成本的良 好平衡。
步骤 C, 选定推动级器件。 考虑各方面要求, 选定 CREE公司的 GaN功 放管 CGH40045作为推动级器件。 选定 RFMD公司的 SXA-389Z作为第一级 推动放大器件。
步骤 D, 完成峰值放大支路的射频开关电路。 该电路的实现包括 PIN管 射频开关、 MMIC射频开关等多种形式, 开关电路必需根据需要能够快速导 通。
步骤 E, 完成温度补偿、 环行器、 耦合器等其余电路设计, 最终整个功 放的原理图、 PCB设计。
步骤 F, 完成整个功放的调试及测试。
以上仅为本发明的优选实施案例而已, 并不用于限制本发明, 本发明还 可有其他多种实施例, 在不背离本发明精神及其实质的情况下, 熟悉本领域 的技术人员可根据本发明做出各种相应的改变和变形, 但这些相应的改变和 变形都应属于本发明所附的权利要求的保护范围。
显然, 本领域的技术人员应该明白, 上述的各模块或各步骤可以用通用 的计算装置来实现, 它们可以集中在单个的计算装置上, 或者分布在多个计 算装置所组成的网络上, 可选地, 它们可以用计算装置可执行的程序代码来 实现, 从而, 可以将它们存储在存储装置中由计算装置来执行, 并且在某些 情况下, 可以以不同于此处的顺序执行所示出或描述的步骤, 或者将它们分 别制作成各个集成电路模块, 或者将它们中的多个模块或步骤制作成单个集 成电路模块来实现。 这样, 本发明不限制于任何特定的硬件和软件结合。
工业实用性
上述实施方式具有以下优点:
a )效率高, 避免了 Doherty功放中峰值支路提前导通的缺点, 降低了峰
值功放的功耗, 提高了整个功放的批量效率。 未使用上述方案的 Doherty功 放中, 一般峰值功放的功耗占功放总功耗的 10%-20%, 使用上述方案后, 这 一比例数值可降低到 5%-10%。 同时由于 Doherty功放中载波功放的功耗占绝 大部分, 载波功放使用 GaN (氮化镓) 器件, 效率远高于 LDMOS (横向扩 散金属氧化物半导体) 器件, 因此整个功放的效率得到大幅度的提升。
b )低成本, 相比一些厂家使用复杂数字及射频电路来改善峰值功放导通 时间的方案, 大幅度降低了功放的产品成本和生产成本; GaN+LDMOS的末 级放大方案相比两路都是 GaN器件的高效率方案成本要降低很多。
c ) 体积小,相比一些厂家使用复杂数字及射频电路来改善峰值功放导通 时间的方案, 占用体积要小很多。
Claims
1、 一种多合体(Doherty ) 功率放大器, 包括载波功放电路和峰值功放 电路, 其中, 所述峰值功放电路中设置有射频开关, 所述射频开关设置为控制所述峰 值功放电路中峰值功放导通;
所述载波功放电路中的部分或全部载波功放是釆用氮化镓( GaN )器件, 所述峰值放大电路的部分或全部峰值功放是釆用横向扩散金属氧化物半导体 ( LDMOS ) 器件。
2、 如权利要求 1所述的功率放大器, 其中,
所述载波功放电路包括一路或多路载波功放支路, 且每路载波功放支路 中包括一级或多级载波功放; 其中, 所述末级载波功放釆用 GaN器件。
3、 如权利要求 1所述的功率放大器, 其中,
所述峰值功放电路包括一路或多路峰值功放支路, 且每路峰值功放支路 中包括一级或多级峰值功放; 其中, 所述末级峰值功放釆用 LDMOS器件。
4、 如权利要求 3所述的功率放大器, 其中,
所述峰值功放电路的每路峰值功放支路中均设置有所述射频开关。
5、 如权利要求 3或 4所述的功率放大器, 其中,
所述峰值功放支路中包括多级峰值功放时, 所述射频开关设置在推动级 峰值功放与所述末级峰值功放之间, 所述射频开关是设置为控制所述末级峰 值功放的导通。
6、 一种多合体(Doherty )功率放大器的实现方法, 所述方法包括: 在所述 Doherty功率放大器的峰值功放电路中设置射频开关, 通过该射 频开关控制所述峰值功放电路中峰值功放的导通;
其中, 所述 Doherty功率放大器的载波功放电路的部分或全部载波功放 釆用氮化镓(GaN ) 器件, 所述峰值放大电路的部分或全部峰值功放釆用横 向扩散金属氧化物半导体(LDMOS ) 器件。
7、 如权利要求 6所述的方法, 其中, 所述载波功放电路包括一路或多路载波功放支路, 且每路载波功放支路 中包括一级或多级载波功放; 其中, 所述末级载波功放釆用 GaN器件。
8、 如权利要求 6所述的方法, 其中,
所述峰值功放电路包括一路或多路峰值功放支路, 且每路峰值功放支路 中包括一级或多级峰值功放; 其中, 所述末级峰值功放釆用 LDMOS器件。
9、 如权利要求 8所述的方法, 其中,
在所述 Doherty功率放大器的峰值功放电路中设置射频开关的步骤包括: 在所述峰值功放电路的每路峰值功放支路中均设置所述射频开关; 且
所述峰值功放支路中包括多级峰值功放时, 将所述射频开关设置在推动 级峰值功放与所述末级峰值功放之间。
10、 如权利要求 8或 9所述的方法, 其中,
所述通过该射频开关控制所述峰值功放电路中峰值功放的导通的步骤包 括: 通过所述射频开关控制所述峰值功放支路中末级峰值功放的导通。
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KR100957417B1 (ko) * | 2004-12-08 | 2010-05-11 | 삼성전자주식회사 | 무선 통신 시스템에서 스위칭 구조를 이용한 전력 증폭 장치 및 제어 방법 |
US20080122542A1 (en) * | 2006-11-27 | 2008-05-29 | Gregory Bowles | Enhanced amplifier with auxiliary path bias modulation |
EP2339746B1 (en) * | 2009-12-15 | 2013-02-20 | Nxp B.V. | Doherty amplifier with composed transfer characteristic having multiple peak amplifiers |
-
2011
- 2011-04-29 CN CN2011101103139A patent/CN102158190A/zh active Pending
- 2011-10-27 EP EP20110842465 patent/EP2541759A4/en not_active Withdrawn
- 2011-10-27 WO PCT/CN2011/081398 patent/WO2012146007A1/zh active Application Filing
- 2011-10-27 US US13/513,248 patent/US20120293251A1/en not_active Abandoned
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US20040263246A1 (en) * | 2003-06-24 | 2004-12-30 | Ian Robinson | Multi-mode multi-amplifier architecture |
US7541866B2 (en) * | 2006-09-29 | 2009-06-02 | Nortel Networks Limited | Enhanced doherty amplifier with asymmetrical semiconductors |
JP2009260472A (ja) * | 2008-04-14 | 2009-11-05 | Mitsubishi Electric Corp | 電力増幅器 |
EP2159912A1 (en) * | 2008-08-29 | 2010-03-03 | Alcatel, Lucent | Multi-band Doherty amplifier |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN107493074A (zh) * | 2016-06-12 | 2017-12-19 | 中兴通讯股份有限公司 | Doherty功放电路 |
Also Published As
Publication number | Publication date |
---|---|
US20120293251A1 (en) | 2012-11-22 |
EP2541759A1 (en) | 2013-01-02 |
EP2541759A4 (en) | 2014-10-29 |
CN102158190A (zh) | 2011-08-17 |
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