WO2012141711A1

WO2012141711A1 - A clock signal generating apparatus

Info

Publication number: WO2012141711A1
Application number: PCT/US2011/032521
Authority: WO
Inventors: Hien Nguyen; Raul Hernan Etkin; Vincent Ma; Ran-Fun Chiu
Original assignee: Hewlett-Packard Development Company, L.P.
Priority date: 2011-04-14
Filing date: 2011-04-14
Publication date: 2012-10-18

Abstract

A clock signal generating apparatus includes a module to a) output a signal to place a globally synchronized clock in an active state, wherein the globally synchronized clock acquires a global timing signal in the active state and generates a periodic pulse, b) receive the periodic pulse from the globally synchronized clock, c) synchronize a local clock with the periodic pulse, d) output a signal to place the globally synchronized clock in an inactive state, wherein the globally synchronized clock consumes a reduced amount of energy in the inactive state, e) correct the local clock using a time interval between periodic pulses, f) generate a clock signal based on the corrected local clock, and g) repeat a) to f). The apparatus also includes a processor to implement the module.

Description

A CLOCK SIGNAL GENERATING APPARATUS

BACKGROUND

[0001] Many distributed systems require synchronization among different components. For example in a sensor network, sensor nodes are often required to be synchronized to a global clock source in order to tag the sensed data with appropriate time stamps. In addition, the clock signal used for data sampling is often required to have particular long-term frequency and phase stability properties. Oftentimes, the sensor nodes operate on a limited power source (for instance, battery, solar cell, etc.).

[0002] One approach to synchronizing the nodes is to use the timing information provided by a global positioning system (GPS). This synchronization system is called global positioning system disciplined oscillator (GPSDO). In the GPSDO, each node is equipped with a GPS receiver that provides a low frequency (typically 1 Hz) clock output that is synchronized to the GPS satellites. This low frequency clock signal is used as a reference to control the frequency and phase of a local oscillator (LO), that operates at a frequency appropriate for the given application, and which is used to sample and tag sensed data. The frequency of the LO is controlled via a control loop. BRIEF DESCRIPTION OF THE DRAWINGS

[0003] Features of the present disclosure are illustrated by way of example and not limited in the following figure(s), in which like numerals indicate like elements, in which:

[0004] FIG. 1 shows a functional block diagram of a clock signal generating system, according to an example of the present disclosure;

[0005] FIG. 2 depicts a flow diagram of a method for generating a clock signal, according to another example of the present disclosure;

[0006] FIG. 3 depicts a flow diagram of a method for generating a clock signal, according to another example of the present disclosure; and

[0007] FIG. 4 illustrates a schematic representation of a computing device, which may be employed to perform various functions of the local clock signal generator 104 depicted in FIG. 1 , according to an example of the present disclosure.

DETAILED DESCRIPTION

[0008] For simplicity and illustrative purposes, the present disclosure is described by referring mainly to an example thereof. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be readily apparent however, that the present disclosure may be practiced without limitation to these specific details. In other instances, some methods and structures have not been described in detail so as not to unnecessarily obscure the present disclosure. As used herein, the term "includes" means includes but not limited to, the term "including" means including but not limited to. The term "based on" means based at least in part on.

[0009] Disclosed herein are a method, apparatus, and computer readable storage medium for reducing power consumption of a clock signal generating system. In the method, a globally synchronized clock is placed in an active state, in which, the globally synchronized clock acquires a global timing signal and generates a periodic pulse. The periodic pulse is received from the globally synchronized clock and a local clock is synchronized with the periodic pulse. The globally synchronized clock is placed in an inactive state, in which, the globally synchronized clock consumes a reduced amount of energy as compared with the active state. In addition, in the inactive state, the globally synchronized clock may not receive the global timing signal and thus, may not generate a periodic pulse. The local clock is corrected using a time interval between periodic pulses and a clock signal is generated based on the corrected local clock. This process may be repeated on a substantially continuous basis to continue generation of a generally accurate clock signal.

[0010] Through implementation of the method, apparatus, and computer readable storage medium disclosed herein, power consumption of a globally synchronized clock is reduced. The method, apparatus, and computer readable storage medium achieve this reduction in power consumption by controlling the duty cycle (fraction of active time) of the globally synchronized clock. [0011] FIG. 1 is a functional block diagram of a clock signal generating system 100, according to an example of the disclosure. As depicted in FIG. 1 , the clock signal generating system 100 includes a globally synchronized clock 102, and a local clock signal generator 104. It should be understood that the clock signal generating system 100 depicted in FIG. 1 may include additional components and that some of the components described herein may be removed and/or modified without departing from a scope of the clock signal generating system 100.

[0012] The local clock signal generator 104 generates a clock signal 122, such as but not limited to, pulse per second (PPS) pulses, that are disciplined by the globally synchronized clock 102. The globally synchronized clock 102 may be a global positioning system (GPS) clock or other suitable global clock. The globally synchronized clock 102 provides periodic pulses 120 that the local clock signal generator 104 uses as references for the clock signal 122. According to various examples, the clock signal generating system 100 may be implemented in monitoring and/or sensing applications that use deployed sensors to collect sensory data, such as, temperature, light, movement, etc. In this example, the clock signal generating system 100 may comprise an apparatus that collects the sensory data and periodically broadcasts the sensory data to, for instance, a base station.

[0013] As discussed in greater detail herein below, the duty cycle of the globally synchronized clock 102 may substantially be reduced by placing the globally synchronized clock 102 in an inactive state after receipt of each periodic pulse 120. The duty cycle in this instance is the fraction of time that the globally synchronized clock 102 is active as a fraction of the time between generation of the periodic puises 120. in addition, the iocai dock signal generator 104 includes a local clock that the local clock signal generator 104 synchronizes using the periodic pulse 120 and generates a clock signal 122 that the local clock signal generator 104 corrects for local clock drift until another periodic pulse 120 is received from the globally synchronized clock 102. Clock drift is a rate at which the timing of one clock drifts apart from that of another clock, in this instance the local clock included with the local clock signal generator 04 and the globally synchronized clock 102.

[0014] As shown in FIG. 1 , the local clock signal generator 104 includes a global timer module 106, a local timer module 108, a power controlling module 110, a communication module 112, a local time adjusting module 1 14, and a local clock module 116. The modules 106-116 may comprise at least one software module and/or at least one hardware module. The modules 106-116 may thus comprise machine readable instructions that may be stored, for instance, in a volatile or nonvolatile memory, such as DRAM, EEPROM, MRAM, flash memory, floppy disk, a CD-ROM, a DVD-ROM, or other optical or magnetic media, and the like, and executable by a processor of a computing device, for instance, as depicted in FIG. 4. According to another example, each of the modules 106-116 comprises a hardware device, such as, a circuit or multiple circuits arranged on a board. According to a further example, the modules 106-116 comprise a combination of machine readable instructions and hardware modules.

[0015] In any regard, the local clock module 116 may comprise a local oscillator (LO) or other local clock, that operates at a frequency appropriate for a particular application, and may be used to sample and tag sensed data. The frequency of the local clock module 116 may be substantially greater than that of the periodic pulses 120 received from the globally synchronized clock 102.

[0016] The global timer module 106 may be implemented to receive the periodic pulses 120 from the globally synchronized clock 102. According to an example, the global timer module 106 receives the periodic pulses 120 from the globally synchronized clock 102 at a frequency of an integer number of seconds. The global timer module 106 uses an internal counter to estimate a true interval time between the periodic pulses 120. The true interval time in this instance is rounded to the units of the internal counter. The global timer module 106 may use this approach in instances in which a local drift of the local clock module 116 is sufficiently small to ensure the validity of the estimation. According to another example, the globally synchronized clock 102 provides a time interrupt to the global timer module 106, for instance, using an interrupt service routine (ISR). The communication module 112 receives an actual time that the time interrupt was provided to the global timer module 106 from the globally synchronized clock 102. The communication module 112 in this instance may comprise a universal asynchronous receiver/transmitter (UART) and the actual time (for instance coordinated universal time (UTC) time) may be provided through a UART data path. In this instance, the periodic pulses 120 may be received at either integer or non- integer numbers of seconds.

[0017] The power controlling module 110 may be implemented to control the duty cycle of the globally synchronized clock 102 and a duration of time that the globally synchronized clock 102 is in the inactive state. Periodically, and at a predetermined interval, the power controlling module 110 places the globally synchronized clock 102 in an active state through any of a variety of manners. According to an example, the power controlling module 110 controls delivery of power to the globally synchronized clock 102, for instance, from a battery (not shown). In another example, the power controlling module 1 0 sends instructions 124 to a power state controller 130 of the globally synchronized clock 102. in any regard, in the active state, the globally synchronized clock 102 acquires a global timing signal, for instance a satellite timing signal through an antenna (not shown), and a pulse generator 132 generates a periodic pulse 120 that is communicated to the global timer module 106.

[0018] According to an example, in order to conserve power, the globally synchronized clock 102 is placed in the inactive state for several seconds between the generation of each periodic puise 120. The globally synchronized clock 102 uses substantially less energy in the inactive state. In some instances, the globally synchronized clock 102 has an accuracy of nanoseconds. In many remote applications, the magnitude of an acceptable timing error may range from microseconds to milliseconds. The clock signal generating system 100 may be calibrated to conserve energy while meeting clock signal accuracy requirements of particular applications.

[0019] The local time adjusting module 1 4 may be implemented to correct the clock signal 122 between periodic pulses as described hereinbelow with respect to FIGs. 2 and 3 and the methods 200 and 300. The local time adjusting module 114 may use a true interval time from the globally synchronized clock 102 and locally observed interval time from the local clock module 116 to determine corrections to the clock signal 122.

[0020] According to an example, the local time adjusting module 114 uses historic values of clock drift measurements to improve accuracy of the clock signal 122. In some instances, an offset for the local clock module 116 may change consistently over multiple intervals but imperceptibly or inconsistently between subsequent intervals. The local time adjusting module 114 may determine the clock drift by averaging the clock drift over multiple intervals to compensate for this inconsistency. The local time adjusting module 114 may significantly reduce noise and/or uncertainty in the clock signal 122 by estimating drift using the clock drift over multiple prior intervals.

[0021] According to an example, the local time adjusting module 114 implements enhanced loop filters to remove pulses in the clock signal 122. For instance, the enhanced loop filters may include a filtering function that takes into account parameters to control a phase control loop of the local time adjusting module 1 4 to increase the long-term stability of the clock signal 122. The local time adjusting module 114 may use the enhanced loop filters to improve frequency and phase stability, reduce jitter, etc. of the clock signal 122.

[0022] According to another example, the local time adjusting module 114 implements other information, such as temperature in the control loop to increase the accuracy of correction of the clock signal 122. More particularly, the local time adjusting module 114 may utilize known properties of the local clock module 116, for instance frequency drift of a crystal-based oscillator in instances in which the local clock module 116 utilizes a crystal-based oscillator. The frequency of an oscillator depends on temperature. In this instance, the local time adjusting module may detect an ambient temperature, for instance using a thermometer, and may use that information combined with the measurement of the clock drift to increase the accuracy of correction of the clock signal 122.

[0023] The local timer module 108 may be implemented to generate the clock signal 122 based on the corrected clock signal of the local clock module 116. The clock signal 122 may be calibrated based on required timing characteristics of particular applications. Thus, for instance, the clock signal 122 may be calibrated based upon the particular application for which the clock signal generating system 100 is being implemented.

[0024] The clock signal generating system 100 may be used in an ancillary capacity to generate the clock signal 122 as an alternative or secondary backup to a primary clock signal. For instance, the primary clock signal may be provided using radio signals. The clock signal generating system 100 may provide redundancy and become active in instances in which the radio signals are shadowed. The clock signal generating system 100 reverts to inactivity when the radio signal is reacquired. The clock signal generating system 100 may also be implemented to ensure continued node synchronization in distributed sensor systems.

[0025] Various manners in which the clock signal generating system 100 may operate are discussed with respect to the methods 200 and 300 depicted in FIGs. 2 and 3. It should be readily apparent that the methods 200 and 300 depicted in FIGs. 2 and 3 represent generalized illustrations and that other processes may be added or existing processes may be removed, modified or rearranged without departing from the scope of the methods 200 and 300.

[0026] With reference first to FIG. 2, there is shown a flow diagram of a method 200 for generating a clock signal using a clock signal generating system, such as the clock signal generating system 100 depicted in FIG. 1 , according to an example. The method is cyclical and thus may repeat at block 202 after block 212.

[0027] At block 202, a globally synchronized clock 102 is placed in an active state, for instance by the power controlling module 1 10. The power controlling module 110 may place the globally synchronized clock 102 into the active state through communication of a signal 124 to the power state controller 130 of the globally synchronized clock 102. In the active state, the globally synchronized clock 102 acquires a global timing signal and generates a periodic pulse 120, which is communicated to the local clock signal generator 104.

[0028] At block 204, the periodic pulse 120 is received from the globally synchronized clock 102, for instance by the global timer module 106. The periodic pulse 120 may be received at an integer number of time intervals that the global timer module 106 uses to estimate an actual time or the globally synchronized clock 102 may provide the actual time that the periodic pulse 120 was communicated.

[0029] At block 206, a local clock of a local clock module 116 is synchronized with the periodic pulse 120, for instance, by the local time adjusting module 114. The local clock at that instant is set to a substantially same time as that of the globally synchronized clock 102. According to an example, the local time adjusting module 114 synchronizes the local clock with a time provided in a time stamp received with the periodic pulse 120.

[0030] At block 208, the globally synchronized clock 102 is placed in an inactive state, for instance, by the power controlling module 110. In the inactive state, the globally synchronized clock 120 consumes reduced energy, for instance, by not acquiring the global timing signal and by not generating or communicating the periodic pulses 120.

[0031] At block 210, a local clock of the local clock module 116 is corrected using a time interval between periodic pulses, for instance by the local time adjusting module 114. The local time adjusting module 114 may correct the local clock of the lock clock module 116 using the method 300 described with respect to FIG. 3 hereinbelow.

[0032] At block 212, a clock signal 122 is generated based on the corrected local clock. Blocks 202-210 are repeated as the clock signal generating system 100 continually generates the clock signal 122.

[0033] Turning now to FIG. 3, there is shown a flow diagram of a method 300 for generating a clock signal, according to an example. Although the method 300 may be implemented at block 210 of the method 200, the method 300 is not limited to that particular application.

[0034] At block 302, a true interval time between the periodic pulses 120 is determined, for instance, by the global timer module 106. The true interval time is a time elapsed between two valid periodic pulses 120. For instance, a value may be recorded and reset by the global timer module 106 every time a valid periodic pulse 120 is received. The true interval time is approximately the sum of the time that the globally synchronized clock 102 is in the inactive state and the time required for the globally synchronized clock 102 to become active and track a timing satellite to produce a valid periodic pulse 120. According to an example, the global timer module 106 performs clock counter recording in an interrupt service routine (ISR) that is triggered by the periodic pulse 120. In this example TimerO is a clock counter value for the local clock determined between the periodic pulses 120, and the periodic pulses 20 are received at approximately an integer number of seconds. TimerO is a local clock count that may be used to track the local clock bias and drift rate of the local clock module 116. The true interval time is given by:

TimerO

True Interval Time = round in which CLKFRQ is a nominal frequency of the local clock, measured, for instance in Hertz. [0035] At block 304, a locally observed interval time between the periodic pulses is determined using the local clock module 116. The locally observed interval time is the time elapsed between valid periodic pulses 120 as measured by, for instance, the local clock module 116. The locally observed interval time is given by:

Eqn (2) Locally Observed Interval Time =

CLKFRQ

[0036] At block 306, a local clock bias for the local clock is determined based on the true interval time and the locally observed interval time, for instance by the local time adjusting module 114. The local clock bias is given by; r- ,„ _{Λ ι} . . _n. True Interval Time x CLKFRQ - TimerO

Eqn (3) Clock Count Bias = ,

True Interval Time in which the Clock Count Bias is the local clock bias for a current interval time in terms of a local counter.

[0037] At block 308, a local clock drift is determined for the local clock, for instance by the local time adjusting module 114. The local clock drift rate is given by: _ . Clock Count Bias - Prior Clock Count Bias Eqn (4) Clock Count Drift Rate = ,

True Interval Time in which the Clock Count Drift Rate is the local clock drift rate and Prior Clock Count Bias is a clock count bias for the local clock in a preceding interval time.

[0038] At block 310, the local clock is corrected using the local clock drift and the local clock bias, for instance by the local time adjusting module 14. Once the local clock bias and local drift rate are determined, the local time adjusting module 1 4 corrects the clock signal 122 at the local timer module 108 and the clock signal 122, for instance continuous PPS pulses, each of which is one second apart, may be generated. The local time adjusting module 114 may correct the clock signal 122 by using the local drift rate and local bias to reprogram the local timer module 108 to increase or decrease speed in a next interval.

[0039] Some or all of the operations set forth in the methods 200 and 300 may be contained as a utility, program, or subprogram, in any desired computer accessible medium. In addition, the methods 200 and 300 may be embodied by computer programs, which may exist in a variety of forms both active and inactive. For example, they may exist as machine readable instructions, including source code, object code, executable code or other formats. Any of the above may be embodied on a computer readable storage medium.

[0040] Exemplary computer readable storage media include conventional computer system RAM, ROM, EPROM, EEPROM, and magnetic or optical disks or tapes. Concrete examples of the foregoing include distribution of the programs on a CD ROM or via Internet download. It is therefore to be understood that any electronic device capable of executing the above-described functions may perform those functions enumerated above.

[0041] Turning now to FIG. 4, there is shown a schematic representation of a computing device 400, which may be employed to perform various functions of the local clock signal generator 104 depicted in FIG. 1 , according to an example. The device 400 includes a processor 402; a display device 404, such as a monitor; a network interface 408, such as a Local Area Network LAN, a wireless 802.11x LAN, a 3G mobile WAN or a WiMax WAN; and a computer-readable medium 410. Each of these components is operatively coupled to a bus 412. For example, the bus 412 may be an EISA, a PCI, a USB, a FireWire, a NuBus, or a PDS.

[0042] The computer readable medium 410 may be any suitable medium that participates in providing instructions to the processor 402 for execution. For example, the computer readable medium 410 may be non-volatile media, such as an optical or a magnetic disk; volatile media, such as memory; and transmission media, such as coaxial cables, copper wire, and fiber optics. Transmission media can also take the form of acoustic, light, or radio frequency waves. The computer readable medium 410 may also store other machine readable instructions, including word processors, browsers, email, Instant Messaging, media players, and telephony machine-readable instructions.

[0043] The computer-readable medium 410 may also store an operating system 414, such as Mac OS, MS Windows, Unix, or Linux; network applications 416; and a clock signal application 418. The operating system 414 may be multiuser, multiprocessing, multitasking, multithreading, real-time and the like. The operating system 414 may also perform basic tasks such as recognizing input from input devices, such as a keyboard or a keypad; sending output to the display 404; keeping track of files and directories on the computer readable medium 410; controlling peripheral devices, such as disk drives, printers, image capture device; and managing traffic on the bus 412. The network applications 416 include various components for establishing and maintaining network connections, such as machine readable instructions for implementing communication protocols including TCP/IP, HTTP, Ethernet, USB, and FireWire.

[0044] The clock signal application 418 provides various components for generating a clock signal, as described above with respect to the methods 200 and 300 in FIGS. 2 and 3. The clock signal application 418 reduces power consumption of a clock signal generating system. In certain examples, some or all of the processes performed by the application 418 may be integrated into the operating system 414. In certain examples, the processes may be at least partially implemented in digital electronic circuitry, or in computer hardware, machine readable instructions (including firmware and/or software), or in any combination thereof.

[0045] Although described specifically throughout the entirety of the instant disclosure, representative embodiments of the present disclosure have utility over a wide range of applications, and the above discussion is not intended and should not be construed to be limiting, but is offered as an illustrative discussion of aspects of the disclosure. [0046] What has been described and illustrated herein is a preferred example of the disclosure along with some of its variations. The terms, descriptions and figures used herein are set forth by way of illustration only and are not meant as limitations. Many variations are possible within the spirit and scope of the disclosure, which is intended to be defined by the following claims - and their equivalents - in which all terms are meant in their broadest reasonable sense unless otherwise indicated.

Claims

What is claimed is:

1. A method for reducing power consumption of a clock signal generating system, said method comprising:

a) placing a globally synchronized clock in an active state, wherein the globally synchronized clock acquires a global timing signal in the active state and generates a periodic pulse;

b) receiving the periodic pulse from the globally synchronized clock;

c) synchronizing a local clock with the periodic pulse;

d) placing the globally synchronized clock in an inactive state, wherein the globally synchronized clock consumes a reduced amount of energy in the inactive state;

e) correcting, by a processor, the local clock using a time interval between periodic pulses received from the globally synchronized clock;

f) generating a clock signal based on the corrected local clock; and g) repeating a) to f).

2. The method according to claim 1 , wherein correcting the local clock using the time interval between periodic pulses further comprises:

determining a true interval time between the periodic pulses;

determining a locally observed interval time between the periodic pulses using the local clock;

determining a local clock bias for the local clock based on the true interval time and the locally observed interval time;

determining a local clock drift for the local clock; and

correcting the local clock using the local clock drift and the local clock bias.

3. The method according to claim 2, wherein determining the true interval time, the locally observed interval time, the local clock bias, and the local clock drift comprises determining the locally observed interval time, the true interval time, the local clock bias, and the local clock drift using:

f TimerO '

True Interval Time = round

CLKFRQ J '

TimerO

Locally Observed Interval Time =

CLKF Q

~ . . ~ . _,. True Interval Time x CLKFRQ - TimerO

Clock Count Bias =

True Interval Time

Clock Count Bias - Prior Clock Count Bias

Clock Count Drift Rate =

True Interval Time

wherein TimerO is a clock counter value for the local clock determined between the periodic pulses and the periodic pulses are received at approximately an integer number of seconds, CLKFRQ is a frequency of the local clock, Clock Count Bias is the local clock bias for a current interval time in terms of a local clock counter, Prior Clock Count Bias is a clock count bias for the local clock in a preceding interval time, and Clock Count Drift Rate is the local clock drift rate.

4. The method according to claim 1 , wherein correcting the local clock using the time interval between the periodic pulses comprises:

using an actual time received from the globally synchronized clock to correct the local clock.

5. The method according to claim 1 , further comprising:

using historic values of clock drift measurements for the local clock to increase an accuracy of the correction of the local clock.

6. The method according to claim 1 , further comprising:

using additional information including temperature to increase an accuracy of the correction of the local clock.

7. The method according to claim 1 , wherein correcting the local clock further comprises using a loop filter to improve at least one of a frequency and a phase stability of the clock signal.

8. The method according to claim 1 , wherein placing the globally synchronized clock into the inactive state further comprises trading between an energy usage of the globally synchronized clock and an accuracy of the clock signal.

9. The method according to claim 1 , wherein the clock signal is a secondary clock signal that is generated if a primary clock signal is not received within a predetermined time interval.

10. A clock signal generating apparatus comprising:

a module to a) output a signal to place a globally synchronized clock in an active state, wherein the globally synchronized clock acquires a global timing signal in the active state and generates a periodic pulse, b) receive the periodic pulse from the globally synchronized clock, c) synchronize a local clock with the periodic pulse, d) output a signal to place the globally synchronized clock in an inactive state, wherein the globally synchronized clock consumes a reduced amount of energy in the inactive state, e) correct the local clock using a time interval between periodic pulses, f) generate a clock signal based on the corrected local clock, and g) repeat a) to f); and

a processor to implement the module.

11. The apparatus according to claim 10, wherein, to correct the local clock using the time interval between periodic pulses, the module is further to determine a true interval time between the periodic pulses, a locally observed interval time between the periodic pulses using the local clock, a local clock bias for the local clock based on the true interval time and the locally observed interval time, and a local clock drift for the local clock, and to correct the local clock using the local clock drift and the local clock bias.

12. The apparatus according to claim 11 , wherein the module is further to determine the true interval time, the locally observed interval time, the local clock bias, and the local clock drift comprises determining the locally observed interval time, the true interval time, the local clock bias, and the local clock drift using:

⁽ TimerO

True Interval Time = round

CL FRQ J '

TimerO

Locally Observed Interval Time

CLKFRQ

Clock Count Bias ~ ^^rue ^^erva^ ^^{mie x} CLKFRQ - TimerO

True Interval Time

, Clock Count Bias - Prior Clock Count Bias

Clock Count Drift Rate = ,

True Interval Time

13. The apparatus according to claim 10, wherein the module is further to correct the local clock using an actual time received from the globally synchronized dock.

14. The apparatus according to claim 10, wherein the module is further to use historic values of clock drift measurements for the local clock to increase an accuracy of the correction of the local clock.

15. A non-transitory computer readable storage medium on which is embedded a computer program, said computer program implementing a method of reducing power consumption of a clock signal generating system, said computer program comprising computer readable code to:

a) place a globally synchronized clock in an active state, wherein the globally synchronized clock acquires a global timing signal in the active state and generates a periodic pulse;

b) receive the periodic pulse from the globally synchronized clock;

c) synchronize a local clock with the periodic pulse;

d) place the globally synchronized clock in an inactive state, wherein the globally synchronized clock consumes a reduced amount of energy in the inactive state;

e) repeat a) to d);

f) determine a true interval time between the periodic pulses received at b);

g) determine a locally observed interval time between the periodic pulses using the local clock;

h) determine a local clock bias for the local clock based on the true interval time and the locally observed interval time;

i) determine a local clock drift for the local clock; and

j) correct the local clock using the local clock drift and the local clock bias.