WO2012130004A1 - 一种用于清除电力***电压谐波的装置 - Google Patents

一种用于清除电力***电压谐波的装置 Download PDF

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Publication number
WO2012130004A1
WO2012130004A1 PCT/CN2012/071512 CN2012071512W WO2012130004A1 WO 2012130004 A1 WO2012130004 A1 WO 2012130004A1 CN 2012071512 W CN2012071512 W CN 2012071512W WO 2012130004 A1 WO2012130004 A1 WO 2012130004A1
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voltage
power
harmonic
unit
harmonic voltage
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PCT/CN2012/071512
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English (en)
French (fr)
Inventor
张银山
黄新明
郭自勇
李旷
王军
董雪武
孙丹
孟海星
牟文晶
王跃明
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荣信电力电子股份有限公司
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Publication of WO2012130004A1 publication Critical patent/WO2012130004A1/zh

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01Arrangements for reducing harmonics or ripples
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40Arrangements for reducing harmonics

Definitions

  • the present invention relates to an apparatus for removing voltage harmonics of a power system. Background technique
  • the voltage harmonics of the power system exist in the power system of each voltage level, and the harmonics will cause the loss of the power supply line to increase, damage the electrical equipment, and reduce the reliability of the power supply. Therefore, the national standard GB/T 14549-93 "Power Quality Public Grid Harmonics" has strict requirements on the voltage harmonic content of power systems of different voltage levels. In order to make the voltage harmonic content of the power system of each voltage level meet the requirements of the national standard, there are currently two solutions for suppressing the harmonics of the power grid: the load is not generated with harmonics, or compensated by appropriate means.
  • the uninterruptible power supply can be used in series between the power supply and the harmonic source load. In addition to ensuring the supply of sensitive loads during grid voltage failure, it can also compensate for some harmonics generated by harmonic source loads. The harmonic content injected into the grid voltage.
  • the object of the present invention is to provide a device for removing voltage harmonics of a power system, which is capable of eliminating the influence of a power source side harmonic voltage source on a load by a series harmonic voltage source based on a superposition principle, and the response speed fast.
  • a device for removing voltage harmonics of a power system comprising a harmonic voltage source detecting device, a reactor consisting of a reactor 1, a reactor 2, a capacitor, a high frequency transformer, an AC power source, a power unit, and a rectification Unit, filter unit, controller, harmonic voltage source detection device has two, one is set at the input end of the device, used to detect harmonics The voltage source is set at the output end of the device for detecting the voltage source after the harmonics are removed; the two harmonic voltage source detecting devices input the detected voltage source signal to the controller;
  • the harmonic voltage source detecting device collects the real-time harmonic voltage of the system, and inputs the harmonic voltage signal into the controller.
  • the controller calculates a voltage equal to the harmonic voltage and the opposite direction, and the power unit passes the high-frequency transformer.
  • Input LC branch composed of reactor and capacitor in series, the voltage is superimposed with the harmonic voltage, so that the harmonic output voltage is zero, and the function of filtering the harmonic voltage of the power grid is achieved; the controller is respectively connected with the AC power supply, the rectifying unit, The power units are connected.
  • the bypass switch having a protection function is connected in parallel between the input end and the output end of the fundamental wave filter composed of the reactor 1, the reactor 2 and the capacitor in series, and the device is put into operation between the capacitor and the output end. switch.
  • the beneficial effects of the present invention are that - based on the superposition principle, the series harmonic voltage source can be used to eliminate the influence of the high-order harmonic voltage source on the power supply side, and the response speed is fast.
  • Figure 1 is a schematic view of the structure of the present invention
  • Figure 2 is a structural diagram of a single set of isolated power supplies
  • Figure 3 is a structural diagram of a plurality of sets of isolated power supplies
  • Figure 4 is a structural diagram of an uncontrollable rectifying unit
  • Figure 5 is a structural diagram of a two-level PWM rectifying unit
  • Figure 6 is a structural diagram of a three-level PWM rectifying unit
  • Figure 7 is a structural diagram of a two-level PWM inverter
  • Figure 8 is a structural diagram of a three-level PWM inverter
  • FIG. 9 is a structural diagram of a multi-level inverter of a multi-stage series of H-bridge units
  • FIG. 10 is a block diagram of the controller. detailed description
  • a device for removing voltage harmonics of a power system includes a harmonic voltage source detecting device 1, a harmonic voltage source detecting device 2, and a base composed of a reactor 3, a reactor 4, and a capacitor 5 in series.
  • harmonic voltage source detection device 1 is provided at the input end of the device for detecting harmonics
  • the voltage source, the harmonic voltage source detecting device 2 is disposed at the output end of the device, and is used for detecting the voltage source after the harmonics are removed, and the two harmonic voltage source detecting devices respectively input the detected voltage source signal.
  • the controller 10 is also connected to the AC power source 7, the rectifying unit 9, and the power unit 8, respectively.
  • the harmonic voltage source detecting device 1 collects the real-time harmonic voltage of the system, inputs the harmonic voltage signal to the controller 10, and the controller 10 calculates a voltage equal to the harmonic voltage and the opposite direction, and the power unit 8
  • the high-frequency transformer 6 inputs an LC branch composed of a reactor 4 and a capacitor 5 connected in series, and the voltage is superimposed with the harmonic voltage to make the harmonic output voltage zero, and the function of filtering the harmonic voltage of the power grid is achieved.
  • the AC power source 7 supplies power to the control unit 10, the rectifying unit, the filtering unit C, and the power unit 8.
  • the controller 10 collects the parameters of the rectifying unit 9 and controls the output DC current of the rectifying unit 9 to ensure the output result of the power unit 8.
  • the device has a protection and bypass function, and a bypass switch 11 is connected in parallel between the input end and the output end of the fundamental wave filter composed of the reactor 3, the reactor 4 and the capacitor 5 in series, and is at the capacitor 5 and the output end.
  • a device is put into operation switch 13 between them. When the device is faulty, the device is taken out of operation by controlling the bypass switch 11 and the device is put into operation switch 13 to protect the device.
  • the controller 10 of the device performs the following functions:
  • the harmonic current generated by the power unit 8 (or the sum of the harmonic currents of the integrated current) is obtained by integrating the parameters of the series reactor 3, the reactor 4, the capacitor 5, and the high frequency transformer 6;
  • Protection and bypass function detecting the running state of the device, when the device is faulty, the device is taken out of operation by controlling the bypass switch 11 and the device to be put into operation switch 13.
  • the harmonic voltage source detecting device 1 and the harmonic voltage source detecting device 2 are any devices capable of accurately transmitting and characterizing the voltage and its harmonic content, and should have a high response speed and a small error; sensor.
  • Reactor 3 and reactor 4 are industrial reactors whose reactance is not more than 10% of the system impedance and constitutes a 50 Hz filter with capacitor 5 to ensure system stability.
  • the reactor 4 and the capacitor 5 are combined to form an LC branch, and the resonance point is lower than the minimum number of harmonics to be filtered, and is generally selected to be less than three times.
  • the operating frequency of the high-frequency transformer 6 is higher than the switching auxiliary working frequency of the inverter, preferably more than 2 times, and the capacity is greater than the sum of the total capacities of the harmonics.
  • the switching device of the power unit 8 generally selects a fully controlled device of IGBT or higher switching frequency, adopts an H-bridge or other topology, and uses current as a control target.
  • the specific embodiment of the present invention can have a plurality of free combinations of power source types, rectification topologies, and inverter topologies.
  • the present invention mainly describes the following:
  • Mode 1 Single-group isolated power supply + uncontrollable rectification unit + two-level PWM inverter, see Figure 2, Figure 4, Figure 7.
  • Method 2 Single-group isolated power supply + Uncontrollable rectifier unit + 3-level PWM inverter, see Figure 2, Figure 4, Figure 8.
  • Mode 3 Single-group isolated power supply + two-level PWM rectifier unit + two-level PWM inverter, see Figure 2, Figure 5, Figure
  • Mode 4 Single-group isolated power supply + two-level PWM rectifier unit + three-level PWM inverter, see Figure 2, Figure 5, Figure
  • Mode 5 Single-group isolated power supply + three-level PWM rectifier unit + two-level PWM inverter, see Figure 2, Figure 6, Figure
  • Mode 6 Single-group isolated power supply + three-level PWM rectifier unit + three-level PWM inverter, see Figure 2, Figure 6, Figure
  • Mode 7 Multiple sets of isolated power supplies + Uncontrolled rectifier units + H-bridge cascaded multilevel inverters, see Figure 3, Figure 4, Figure 9.
  • Mode 8 Multiple sets of isolated power supplies + two-level PWM rectifier unit + H-bridge cascaded multi-level inverter, see Figure 3, Figure 5, Figure 9.
  • Mode 9 Multiple sets of isolated power supplies + three-level PWM rectifier unit + H-bridge cascaded multi-level inverter, see Figure 3, Figure 6, Figure 9.
  • Figure 4 is a structural diagram of a three-phase uncontrollable full-bridge rectifier unit.
  • the diodes D1, D2, D3, D4, D5, and D6 form a three-phase uncontrollable full-bridge rectification structure. After rectification, the signal is input to a filter unit composed of a capacitor C. The filtered signal is input to the power unit 8.
  • Figure 5 is a two-level PWM rectifier unit structure diagram, consisting of six IGBT full-control devices (108 butyl 1, 108 butyl 2, 108 butyl 3, IGBT 4, IGBT 5, IGBT 6) and diodes (Dl, D2, D3, D4, respectively) , D5, D6) Anti-parallel constitutes two-level PWM rectification, and the rectified signal is input to the power unit 8 via the filtering unit C.
  • IGBT full-control devices 108 butyl 1, 108 butyl 2, 108 butyl 3, IGBT 4, IGBT 5, IGBT 6) and diodes (Dl, D2, D3, D4, respectively) , D5, D6)
  • Anti-parallel constitutes two-level PWM rectification, and the rectified signal is input to the power unit 8 via the filtering unit C.
  • FIG. 6 is a structural diagram of a three-level PWM rectifier unit, each phase consists of four IGBT devices, two IGBT devices are connected in series, and each IGBT device is connected in parallel with one diode; the midpoint of two series IGBTs passes through diodes (Dl, D2) D3, D4; D5, D6) are connected together, and the midpoints of the diodes (Dl, D2; D3, D4; D5, D6) are connected with the midpoints of the DC capacitors C1 and C2, so that the neutral point potential is directly clamped.
  • Neutral point clamp type Three-level PWM rectifier.
  • FIG. 7 is a structural diagram of a two-level PWM inverter power unit, which is divided into six diodes (D1, D2, D3, and D4) by six IGBT full-control devices (IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, and IGBT6).
  • IGBT full-control devices IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, and IGBT6.
  • D5, D6) Anti-parallel constitutes a two-level PWM inverter.
  • the signal is input to the LC branch composed of the reactor 4 and the capacitor 5 in series via the high-frequency transformer 6.
  • FIG 8 is a three-level PWM inverter power unit structure diagram, each phase consists of four IGBT devices, two IGBT devices are connected in series, and each IGBT device is connected in parallel with one diode; the midpoint of the two series IGBTs passes through the diode ( Dl, D2; D3, D4; D5, D6) are connected together, and the midpoints of the diodes (Dl, D2; D3, D4; D5, D6) are connected with the midpoints of the DC capacitors Cl and C2, so that the neutral point potential is directly Clamp.
  • Fig. 9 is a structural diagram of a H-bridge multi-stage series multi-level inverter power unit, which is composed of a series of H-bridges composed of anti-parallel diodes of a plurality of fully-controlled devices.
  • FIG 10 is the schematic diagram of the controller.
  • the controller consists of FPGA chip, CPU chip and A/D chip.
  • the voltage signal or current signal enters the CPU chip after A/D conversion. After processing by the CPU chip, it enters the FPGA chip and passes through the FPGA chip. After processing, the control signals of the rectifying unit and the power unit are output.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Description

一种用于清除电力***电压谐波的装置 技术领域
本发明涉及一种用于清除电力***电压谐波的装置。 背景技术
电力***的电压谐波存在于各电压等级的电力***中, 谐波会引起供电线路损耗增加, 损坏电气设备、降低供电的可靠性。因此国家标准 GB/T 14549-93《电能质量 公共电网谐波》 对不同电压等级电力***的电压谐波含量都有严格要求。要使各电压等级的电力***中电压 谐波含量满足该国家标准的要求, 目前对于抑制电网的谐波有两种解决办法: 使负载不产生 谐波, 或通过适当装置进行补偿。
1 ) 使负载不产生谐波的方法的本质是通过改造负载, 使其不向电力***注入谐波, 或 注入的谐波含量很小, 从而不会使得相关母线上电压谐波含量不超过国家标准 GB/T 14549-93 《电能质量 公共电网谐波》 的要求。 这种方法是一种最直观的解决办法, 但是改 造负载并不适用于所有负载, 而且有些负载根本无法通过改造而少产生谐波, 因此不是特别 通用。
2) 通过适当装置进行补偿是一种极具发展前途的解决方法。
不间断电源 (UPS ) 可以用来串联在供电电源与谐波源负载之间, 除了在电网电压故障 时保证对敏感负载的供电外, 还能补偿谐波源负载产生的部分谐波, 减小注入到电网电压的 谐波含量。
以上两种方法的清除电力***电压谐波装置的清除电压谐波的效果还不是很好,且响应 时间还有待于提高。 发明内容
本发明的目的是提供一种用于清除电力***电压谐波的装置,该装置基于叠加原理通过 串联谐波电压源可达到消除电源侧高次谐波电压源对负荷影响的目的, 且响应速度快。
为实现上述目的, 本发明通过以下技术方案实现:
一种用于清除电力***电压谐波的装置, 包括谐波电压源检测装置、 由电抗器一、 电抗 器二、 电容器串联组成的基波滤波器、 高频变压器、 交流电源、 功率单元、 整流单元、 滤波 单元、 控制器, 谐波电压源检测装置有两个, 一个设置在本装置的输入端, 用来检测含谐波 的电压源, 另一个设置在本装置的输出端, 用来检测清除谐波后的电压源; 两个谐波电压源 检测装置均将检测的电压源信号输入控制器;
谐波电压源检测装置采集得到***的实时谐波电压, 将谐波电压信号输入控制器, 由控 制器计算得出一个与谐波电压大小相等、方向相反的电压, 由功率单元经高频变压器输入由 电抗器、 电容器串联构成的 LC支路, 该电压与谐波电压相叠加, 使谐波输出电压为零, 达 到滤除电网谐波电压的作用; 控制器分别与交流电源、 整流单元、 功率单元相连接。
所述的由电抗器一、 电抗器二、 电容器串联组成的基波滤波器的输入端与输出端之间并 联有起保护作用的旁路开关, 在电容器与输出端之间设有设备投入运行开关。
与现有技术相比, 本发明的有益效果是- 基于叠加原理, 通过串联谐波电压源, 可达到消除电源侧高次谐波电压源对负荷影响, 响应速度快。 附图说明
图 1是本发明的结构示意图;
图 2是单组隔离电源的结构图;
图 3是多组隔离电源的结构图;
图 4是不可控整流单元的结构图;
图 5是两电平 PWM整流单元的结构图;
图 6是三电平 PWM整流单元的结构图;
图 7是两电平 PWM逆变器的结构图;
图 8是三电平 PWM逆变器的结构图;
图 9是 H桥单元多级串联的多电平逆变器的结构图;
图 10是控制器的原理框图。 具体实施方式
见图 1, 一种用于清除电力***电压谐波的装置, 包括谐波电压源检测装置 1、 谐波电 压源检测装置 2、 由电抗器 3、 电抗器 4、 电容器 5依次串联组成的基波滤波器、 高频变压器 6、 交流电源 7、 功率单元 8、 整流单元 9、 滤波单元〔、 控制器 10, 谐波电压源检测装置 1 设置在本装置的输入端, 用来检测含谐波的电压源, 谐波电压源检测装置 2设置在本装置的 输出端, 用来检测清除谐波后的电压源, 两个谐波电压源检测装置均将检测的电压源信号输 入控制器 10; 控制器 10还分别与交流电源 7、 整流单元 9、 功率单元 8相连接。
谐波电压源检测装置 1采集得到***的实时谐波电压, 将谐波电压信号输入控制器 10, 由控制器 10计算得出一个与谐波电压大小相等、 方向相反的电压, 由功率单元 8经高频变 压器 6输入由电抗器 4、 电容器 5串联构成的 LC支路, 该电压与谐波电压相叠加, 使谐波 输出电压为零, 达到滤除电网谐波电压的作用。 交流电源 7为控制单元 10、整流单元、滤波 单元 C、 功率单元 8提供电源。 控制器 10采集整流单元 9的参数, 控制整流单元 9的输出 直流电流, 以保证功率单元 8的输出结果。
本装置具有保护和旁路功能, 由电抗器 3、 电抗器 4、 电容器 5串联组成的基波滤波器 的输入端与输出端之间并联有旁路开关 11,并且在电容器 5与输出端之间设有设备投入运行 开关 13。 当装置有故障时通过控制旁路开关 11、 设备投入运行开关 13将设备退出运行, 对 设备具有保护作用。
本装置的控制器 10完成以下功能:
1 ) 采集分析由谐波电压源检测装置 1采集得到的***的谐波电压;
2) 通过综合串联电抗器 3、 电抗器 4、 电容器 5、 高频变压器 6的参数得出功率单元 8 所产生的谐波电流 (或综合电流各次谐波电流之和);
3 ) 采集和分析谐波电压源检测装置 2得到的谐波电压及功率单元 8的目标谐波电流并 通过计算调整, 使谐波电压源检测装置 2的谐波电压为 "0"或满足负荷要求;
4) 采集整流单元 9的参数, 并控制整流单元 9的输出直流电压, 保证功率单元 8的输 出结果;
5 )保护和旁路功能, 检测装置的运行状态, 当装置有故障时通过控制旁路开关 11和设 备投入运行开关 13来将设备退出运行。
谐波电压源检测装置 1和谐波电压源检测装置 2是任何一种能够准确传递和表征电压及 其谐波含量的装置, 它应具有较高的响应速度和很小的误差; 可采用电压传感器。
电抗器 3和电抗器 4为工业用电抗器,其电抗不大于***阻抗的 10%且与电容器 5构成 50Hz滤波器, 以保证***的稳定性。
电抗器 4与电容器 5综合构成 LC支路, 谐振点低于滤除谐波的最小次数, 一般选 3次 以下。
高频变压器 6的工作频率高于逆变器的开关援建工作频率, 最好是 2倍以上, 容量大于 各次谐波的总容量之和。 功率单元 8的开关器件一般选择 IGBT或更高开关频率的全控型器件,采用 H桥或其他 拓扑方式, 以电流作为控制目标。
本发明的具体实施方式可以有多种电源类型、 整流拓扑、 逆变拓扑的自由组合, 本发明 主要叙述以下几种:
方式 1 : 单组隔离电源 +不可控整流单元 +两电平 PWM逆变器, 见图 2、 图 4、 图 7。 方式 2: 单组隔离电源 +不可控整流单元 +三电平 PWM逆变器, 见图 2、 图 4、 图 8。 方式 3: 单组隔离电源 +两电平 PWM整流单元 +两电平 PWM逆变器, 见图 2、 图 5、 图
7。
方式 4: 单组隔离电源 +两电平 PWM整流单元 +三电平 PWM逆变器, 见图 2、 图 5、 图
8。
方式 5: 单组隔离电源 +三电平 PWM整流单元 +两电平 PWM逆变器, 见图 2、 图 6、 图
7。
方式 6: 单组隔离电源 +三电平 PWM整流单元 +三电平 PWM逆变器, 见图 2、 图 6、 图
8。
方式 7: 多组隔离电源 +不可控整流单元 +H桥级联多电平逆变器, 见图 3、 图 4、 图 9。 方式 8: 多组隔离电源 +两电平 PWM整流单元 +H桥级联多电平逆变器, 见图 3、 图 5、 图 9。
方式 9: 多组隔离电源 +三电平 PWM整流单元 +H桥级联多电平逆变器, 见图 3、 图 6、 图 9。
图 4为三相不可控全桥整流单元的结构图,由二极管 Dl、 D2、 D3、 D4、 D5、 D6构成三 相不可控全桥整流结构,整流后将信号输入由电容器 C构成的滤波单元,滤波后信号输入功 率单元 8。
图 5为两电平 PWM整流单元结构图,由六个 IGBT全控型器件(108丁1、108丁2、108丁3、 IGBT4、 IGBT5、 IGBT6) 分别与二极管 (Dl、 D2、 D3、 D4、 D5、 D6) 反并联组成两电平 PWM整流, 整流后信号经滤波单元 C输入功率单元 8。
图 6为三电平 PWM整流单元结构图, 每相由 4个 IGBT器件组成, 两两 IGBT器件串 联, 每个 IGBT器件分别反并联一个二极管; 两支串联 IGBT的中点通过二极管 (Dl、 D2; D3、 D4; D5、 D6)连接在一起, 并且二极管 (Dl、 D2; D3、 D4; D5、 D6) 中点与直流电 容 Cl、 C2中点连接起来, 使得中性点电位直接钳位, 因此该整流拓扑也称为中性点钳位型 三电平 PWM整流器。
图 7是两电平 PWM逆变器功率单元的结构图,由六个 IGBT全控型器件( IGBT1、IGBT2、 IGBT3、 IGBT4、 IGBT5、 IGBT6) 分另 lj与二极管 (Dl、 D2、 D3、 D4、 D5、 D6) 反并联组 成两电平 PWM逆变,逆变后信号经高频变压器 6输入由电抗器 4、 电容器 5串联构成的 LC 支路。
图 8为三电平 PWM逆变器功率单元结构图, 每相由 4个 IGBT器件组成, 两两 IGBT 器件串联,每个 IGBT器件分别反并联一个二极管; 两支串联 IGBT的中点通过二极管(Dl、 D2; D3、 D4; D5、 D6) 连接在一起, 并且二极管 (Dl、 D2; D3、 D4; D5、 D6) 中点与 直流电容 Cl、 C2中点连接起来, 使得中性点电位直接钳位。
图 9为 H桥多级串联的多电平逆变器功率单元的结构图,由多个全控型器件反并联二极 管组成的 H桥串联组成。
图 10是控制器原理图, 控制器由 FPGA芯片、 CPU芯片、 A/D芯片组成, 电压信号或 电流信号经 A/D转换后进入 CPU芯片,经 CPU芯片处理后进入 FPGA芯片,经 FPGA芯片 处理后输出整流单元、 功率单元的控制信号。

Claims

权 利 要 求 书
1、 一种用于清除电力***电压谐波的装置, 其特征在于, 包括谐波电压源检测装置、 由电抗器一、 电抗器二、 电容器串联组成的基波滤波器、 高频变压器、交流电源、功率单元、 整流单元、 滤波单元、 控制器, 谐波电压源检测装置有两个, 一个设置在本装置的输入端, 用来检测含谐波的电压源, 另一个设置在本装置的输出端, 用来检测清除谐波后的电压源; 两个谐波电压源检测装置均将检测的电压源信号输入控制器;
谐波电压源检测装置采集得到***的实时谐波电压, 将谐波电压信号输入控制器, 由控 制器计算得出一个与谐波电压大小相等、方向相反的电压, 由功率单元经高频变压器输入由 电抗器、 电容器串联构成的 LC支路, 该电压与谐波电压相叠加, 使谐波输出电压为零, 达 到滤除电网谐波电压的作用; 控制器分别与交流电源、 整流单元、 功率单元相连接。
2、 根据权利要求 1所述的一种用于清除电力***电压谐波的装置, 其特征在于, 所述 的由电抗器一、 电抗器二、 电容器串联组成的基波滤波器的输入端与输出端之间并联有起保 护作用的旁路开关, 在电容器与输出端之间设有设备投入运行开关。
3、 根据权利要求 1或 2所述的一种用于清除电力***电压谐波的装置, 其特征在于, 所述的整流单元可为三相不可控全桥整流、 两电平 PWM整流、 或三电平 PWM整流结构。
4、 根据权利要求 1或 2所述的一种用于清除电力***电压谐波的装置, 其特征在于, 所述的功率单元可为两电平 PWM逆变器、三电平 PWM逆变器、 或 H桥多级串联的多电平 逆变器结构。
5、 根据权利要求 1或 2所述的一种用于清除电力***电压谐波的装置, 其特征在于, 所述的交流电源可为单组隔离电源或多组隔离电源结构。
6、 根据权利要求 1或 2所述的一种用于清除电力***电压谐波的装置, 其特征在于, 所述的控制器由 FPGA芯片、 CPU芯片、 A/D芯片组成, 电压信号或电流信号经 A/D转换 后进入 CPU芯片,经 CPU芯片处理后进入 FPGA芯片,经 FPGA芯片处理后输出整流单元、 功率单元的控制信号。
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