WO2012100703A1 - Substrate structure for semiconductor device manufacturing and method for manufacturing same - Google Patents

Substrate structure for semiconductor device manufacturing and method for manufacturing same Download PDF

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Publication number
WO2012100703A1
WO2012100703A1 PCT/CN2012/070534 CN2012070534W WO2012100703A1 WO 2012100703 A1 WO2012100703 A1 WO 2012100703A1 CN 2012070534 W CN2012070534 W CN 2012070534W WO 2012100703 A1 WO2012100703 A1 WO 2012100703A1
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WO
WIPO (PCT)
Prior art keywords
substrate
layer
flexible material
trench
substrates
Prior art date
Application number
PCT/CN2012/070534
Other languages
French (fr)
Chinese (zh)
Inventor
朱慧珑
骆志炯
尹海洲
Original Assignee
Zhu Huilong
Luo Zhijiong
Yin Haizhou
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Filing date
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Application filed by Zhu Huilong, Luo Zhijiong, Yin Haizhou filed Critical Zhu Huilong
Priority to US13/355,946 priority Critical patent/US8754503B2/en
Publication of WO2012100703A1 publication Critical patent/WO2012100703A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
    • H01L31/035281—Shape of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells

Definitions

  • the present invention relates to the field of semiconductor fabrication, and more particularly to a substrate structure for fabricating a semiconductor device and a method of fabricating the same that increase surface area. Background technique
  • the object of the present invention is to at least solve the above-mentioned technical drawbacks, in particular, the problem that stretching of a structure comprising a relatively large brittle film structure causes the film structure to be broken to cause disconnection of the connected device structure.
  • the present invention provides a substrate structure, including:
  • a substrate array comprising a plurality of substrates arranged in a same direction on a same plane, each of the substrates having a first surface and a second surface opposite thereto, the substrate array being arranged at On a plane parallel to the first surface of the substrate;
  • a layer of flexible material the layer of flexible material being on at least a portion of the surface of the substrate and/or at least a portion of the surface of the substrate.
  • the substrate and the upstanding sidewall of the substrate to which it is attached are perpendicular.
  • the material of the substrate comprises: an insulating material, a metal, a semiconductor material, a polymer, or a combination thereof.
  • the layer of flexible material comprises a metal, a polymer, a nanomaterial, or a combination thereof.
  • the metal comprises: gold, aluminum, silver, copper, titanium, or a combination thereof.
  • the polymer comprises: silica gel, polypropylene, plexiglass, acrylic, acrylic, PMMA, Polycast, transparent synthetic resin, plexiglass, parylene, epoxy, polycarbonate Ester, silicone, polyurethane, polyamide, fluoropolymer, polyolefin, collagen, chitin, chitin, alginic acid fiber, polyvinylpyrrolidone, polyethylene glycol, polyethylene oxide, polyethylene oxide Alkane, polyvinyl alcohol, polyethylene glycol lactic acid, polylactic acid, polycaprolactone, polyamino acid, hydrogel, polydimethylsiloxane (PDMS) or a combination thereof;
  • PDMS polydimethylsiloxane
  • the nanomaterials include nanotubes, graphene, or a combination thereof.
  • the flexible material layer has a thickness of 0.1 to 100 ⁇ m, preferably 1 to 30 ⁇ m.
  • the substrate structure further includes an interface layer formed at least on the first surface and/or the second surface of the substrate.
  • the substrate material comprises: single crystal Si, single crystal Ge, single crystal SiGe, polycrystalline Si, polycrystalline Ge, polycrystalline SiGe, amorphous Si, amorphous Ge, amorphous SiGe , A III-V or ⁇ - ⁇ compound semiconductor or a combination thereof.
  • the thickness of the substrate is less than 1/3 of the thickness of the substrate, and the thickness of the substrate is the distance between the first surface and the second surface of the substrate.
  • the substrate has a first surface and a second surface opposite thereto, the layer of flexible material being on the first and second surfaces of the substrate.
  • the substrate is at least partially identical in material to the substrate.
  • the present invention further provides a method for fabricating a substrate structure for a semiconductor device, comprising the steps of:
  • a device is formed on the substrate between the steps c) and d) or after step e).
  • At least a portion of the material of the substrate is the same as the substrate material.
  • the layer of flexible material in step d) is sprayed
  • the layer of flexible material comprises a metal, a polymer, a nanomaterial, or a combination thereof.
  • the metal comprises: gold, aluminum, silver, copper, titanium, or a combination thereof.
  • the polymer comprises: silica gel, polypropylene, plexiglass, Acrylic resin, acrylic, PMMA, Polycast, transparent synthetic resin, plexiglass, parylene, epoxy resin, polycarbonate, silicone, polyurethane, polyamide, fluoropolymer, polyolefin, collagen, chitin Quality, chitin, alginic acid fiber, polyvinylpyrrolidone, polyethylene glycol, polyethylene oxide, polyethylene oxide, polyvinyl alcohol, polyethylene glycol lactic acid, polylactic acid, polycaprolactone, polyamino acid, a hydrogel, polydimethylsiloxane (PDMS) or a combination thereof;
  • PDMS polydimethylsiloxane
  • the nanomaterials include nanotubes, graphene, or a combination thereof.
  • the flexible material layer has a thickness of 0.1 to 100 ⁇ m, preferably 1 to 30 ⁇ m.
  • the stretching step in the step e) comprises: stretching the vertical substrate array in the predetermined direction to bend the substrate connecting the adjacent substrates into an arc,
  • the substrate has a first surface and a second surface opposite thereto, and the first surface and the second surface of the substrate are perpendicular to the upstanding sidewall of the curved substrate, the first surface and the second surface of the plurality of substrates The surfaces are respectively on two planes parallel to each other.
  • the temperature of the stretching step in step e) is from 0 °C to 300 °C.
  • the temperature of the stretching step in step e) is 10
  • the adjacent curved substrates are bent in opposite directions, and the substrate is bent to form an arcuate groove.
  • the curved substrate is formed with an arcuate groove having the flexible material therein.
  • the step e) further comprises the step of removing the flexible material.
  • the step a) further comprises: forming a substrate layer on the upper surface and the lower surface of the substrate.
  • the method further comprises the step of: separating the vertical substrate array from the substrate.
  • the material of the substrate comprises: an insulating layer, a metal layer, a poly Compounds, semiconductor materials, and combinations thereof.
  • the step of forming the first trench and the second trench in the step c) comprises: etching a plurality of first trenches from the first surface of the substrate, and stopping On the substrate layer of the second surface; and etching a plurality of second trenches from the second surface of the substrate and stopping on the substrate layer of the first surface.
  • step b) comprises:
  • the method of forming the first trench and the second trench in step c) comprises dry etching, wet etching, or a combination thereof.
  • step c) further comprises at least the first trench
  • At least one of the first trench and the second trench has a depth that is at least greater than a sum of a thickness of the substrate and an interval between adjacent substrates.
  • the thickness of the substrate is less than the thickness of the substrate
  • the present invention effectively utilizes the thickness of the substrate to increase the surface area or surface area utilization of the wafer without increasing the overall wafer size.
  • a layer of flexible material on the surface of the substrate, in the process of forming a planar substrate array in which a plurality of substrates are connected by stretching the vertical substrate array, even if the substrate is broken due to excessive brittleness, the adjacent substrate can be By connecting the layers of flexible material, it is easier to stretch the plurality of substrates into a planar array state distributed on the same plane, which improves the processing efficiency and yield of the device structure.
  • FIG. 1 is a flow chart of a method of fabricating a substrate structure in accordance with an embodiment of the present invention
  • FIG. 2 is a plan view of an initial manufacturing stage of a substrate structure in accordance with an embodiment of the present invention.
  • 3-14 are cross-sectional views along line A-A of FIG. 2 at various stages of fabrication of a substrate structure in accordance with an embodiment of the present invention
  • the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the applicability of other processes and/or the use of other materials.
  • the structure of the first feature described below "on" the second feature may include embodiments in which the first and second features are formed in direct contact, and may include additional features formed between the first and second features. The embodiment, such that the first and second features may not be in direct contact.
  • the present invention effectively utilizes the thickness of the substrate to increase the surface area or surface area utilization of the wafer without increasing the overall wafer size.
  • a layer of flexible material on the surface of the substrate, in the process of forming an array of a plurality of substrates connected by stretching the vertical substrate array, adjacent substrates can pass through flexibility even if the substrate is broken due to excessive brittleness of the substrate.
  • the material layers are connected, and it is easier to stretch the plurality of substrates into an array state distributed on the same plane, which improves the processing efficiency and yield of the device structure.
  • the present invention provides a substrate structure as shown in FIG.
  • a substrate array including a plurality of substrates 150 arranged in a same direction on a same plane, each of the substrates 150 having a surface 150-1 and a second surface 150-2 opposite thereto, the substrate array is arranged on a plane parallel to the first surface of the substrate; a plurality of substrates 120 connected to the adjacent substrate 150, The substrate 150 is perpendicular to the upstanding sidewall of the substrate 120 to which it is attached; the substrate 120 has a first surface and a second surface opposite thereto, the first surface of the substrate being curved within the curved substrate of FIG.
  • the EJ surface, the second surface of the substrate is an arcuate convex surface; the flexible material layer 180, the flexible material layer 180 is located on the first surface of the substrate 120 and/or at least a portion of the surface of the substrate 150; Material layer 180 may also be located on the first and second surfaces of substrate 120 to increase the strength and tensile properties of the substrate.
  • the material of the substrate 120 includes: an insulating material, a metal, a semiconductor material, a polymer, or a combination thereof.
  • the layer of flexible material 180 comprises a metal, a polymer, a nanomaterial, or a combination thereof.
  • the metal includes: gold, aluminum, silver, copper, titanium or a combination thereof;
  • the polymer includes: silica gel, polypropylene, plexiglass, acrylic resin, acrylic, PMMA, Polycast, transparent synthetic resin, plexiglass, parylene, Epoxy resin, polycarbonate, silicone, polyurethane, polyamide, fluoropolymer, polyolefin, collagen, chitin, chitin, alginic acid fiber, polyvinylpyrrolidone, polyethylene glycol, polyoxidation Ethylene, polyethylene oxide, polyvinyl alcohol, polyethylene glycol lactic acid, polylactic acid, polycaprolactone, polyamino acid, hydrogel, polydimethylsiloxane (PDMS) or a combination thereof; Nanomaterials include nanotubes, graphene, or a combination thereof.
  • the flexible material layer 180 has a thickness of 0.1 to 100 ⁇ m, preferably 1 to 30 ⁇ m.
  • the substrate structure further includes an interface layer 160 formed at least on the first surface 150-1 and/or the second surface 150-2 of the substrate 150.
  • Materials of the substrate include: single crystal Si, single crystal Ge, single crystal SiGe, polycrystalline Si, polycrystalline Ge, polycrystalline SiGe, amorphous Si, amorphous Ge, amorphous SiGe, III-V or II-VI Group compound semiconductor or a combination thereof.
  • the thickness of the substrate is less than 1/3 of the thickness of the substrate, and the thickness of the substrate is the distance between the first surface and the second surface of the substrate. In one case, at least a portion of the material of the substrate 120 can be the same as the material of the substrate 150, such as silicon.
  • Step S101 provides a wafer or substrate 101.
  • the substrate 101 is a semiconductor substrate, such as one of silicon, germanium, and a compound semiconductor, or Combination, including but not limited to single crystal Si, single crystal Ge, single crystal SiGe, in particular, the crystal plane of the surface 101-1, 101-2 is ⁇ 110 ⁇ or ⁇ 1 12 ⁇ , and the substrate 101 may also be Polycrystalline Si, polycrystalline Ge, polycrystalline SiGe, amorphous Si, amorphous Ge, amorphous SiGe, III-V or II-VI compound semiconductors, or combinations thereof, or combinations thereof.
  • the substrate can be formed by a variety of means, such as deposition, epitaxial growth, etc., which can have an N-type doped configuration or a P-type doped configuration.
  • the thickness of the substrate may be 0.1-2 mm, of course, the invention is not limited thereto.
  • the substrate includes a first surface 101-1 and a second surface 101-2 opposite thereto, reference drawing
  • a substrate layer 100 is formed on the first and second surfaces of the substrate, and the substrate layer 100 may have one or more layers of structure, which may be configured as needed for each layer.
  • the material and the thickness may include an insulating layer covering the upper and lower surfaces of the substrate as an etch mask layer, and need to be designed according to different etching methods or types of etching liquids and depths of the etched structures.
  • the material of the substrate layer and the thickness of the substrate layer are reasonably selected in step S101.
  • the substrate layer 100 is preferably SiO 2 , SiN or a combination thereof.
  • the substrate layer material may be Si0 2 , SiN or a combination thereof, or may be parylene (The flexible polymer such as parylene), of course, may also be a metal, a semiconductor material, other insulating materials, and combinations thereof, as desired.
  • Step S102 as shown in FIGS. 2-6, the first surface 101-1 and the second surface 101-2 of the substrate are patterned. Specifically, after the substrate layer 100 is formed on the first surface and the second surface of the substrate, a photoresist having a plurality of openings arranged at a predetermined interval is formed on the first surface 101-1 of the substrate 101. 110, exposing the substrate layer 100 in the opening, as shown in FIG. 3; preferably, in the case where the substrate is a single crystal material, the crystal orientation perpendicular to the longitudinal direction of the opening is ⁇ 11 1> direction .
  • the substrate layer 100 is etched by using the photoresist 110 as a mask to expose the first surface 101-1 of the substrate, and a plurality of first openings 121 and a plurality of holes are formed on the substrate layer 100.
  • the patterned substrate 120 is as shown in FIG. 4; the photoresist 110 is removed, and then a photoresist having a plurality of openings arranged at a predetermined interval is formed on the second surface 101-2. 130, as shown in FIG. 5; etching the substrate layer 100 on the second surface of the substrate with the photoresist 130 as a mask, to expose the second surface 101-2 of the substrate, A plurality of second openings 123 and a patterned substrate 120 are formed on the substrate layer 100. As shown in FIG.
  • the photoresist 130 on the second surface is finally removed.
  • the interval between adjacent first openings 121 and the spacing between adjacent second openings 123 are equal, and the first opening 121 and the second opening 123 are staggered.
  • the steps of forming the composition described above are merely examples, and those skilled in the art can obtain the patterned substrate described in this embodiment by a number of methods known in the art, and these can be applied to the present embodiment. Without departing from the scope of the invention.
  • the steps of forming the photoresist and performing photolithography on the two surfaces on the substrate 101 may be combined into one step, that is, simultaneously forming a photoresist on both surfaces while performing patterning and photolithography. And removing the photoresist.
  • step S103 as shown in FIG. 7, the first opening 121 of the first surface 101-1 and the second opening 123 of the second surface 101-2 are etched by using the substrate 120 as a mask.
  • the substrate forms at least two first trenches 125 and at least one second trench 126.
  • the first trench 125 and the second trench 126 are opposite in opening direction.
  • the sidewall of the first trench 125 is referred to as the first surface of the substrate
  • the second trench 126 is referred to as the second surface of the substrate.
  • the substrate 101 may be etched, for example, the first surface 101-1 of the substrate may be etched and stopped on the substrate layer 120 of the second surface, and etched The second surface 101-2 of the substrate is stopped on the substrate layer 120 of the first surface 101-1. It is of course also possible to etch only a portion of the substrate material, i.e. the bottom of the first trench and the second trench do not reach the substrate surface 120 of the second surface of the substrate and the first surface.
  • the substrate 101 between the first trench 125 and the second trench 126 adjacent thereto forms a substrate 150 having a width corresponding to the thickness of the substrate 101, approximately 0.1 - 2 mm; the thickness of the substrate 150
  • the distance between adjacent trenches 125 and 126 is approximately 5-120 ⁇ m.
  • the first trench and the second trench may have equal or unequal spacing, in particular, the substrate may be patterned such that the first trench and the second trench are substantially parallel, which may be designed according to Need to set it up.
  • each of the second trenches 126 is located between two adjacent first trenches 125 to divide the substrate into at least two substrates 150 and at least one substrate 120.
  • the substrate 150 is defined by sidewalls of the first trench 125 and the second trench 126.
  • FIG. 7 is a cross-sectional view taken along line AA of the schematic view of the substrate shown in Figure 2. As shown in Figure 7, the resulting basic structure includes a plurality of vertically aligned substrates 150, referred to herein as vertical substrate arrays.
  • the substrate layer 100 may be directly etched by using the photoresist as a mask in step S102, and the substrate is also etched by controlling the etching depth.
  • the vertical substrate array structure of the present invention can be obtained to achieve the object of the present invention. If the substrate is not etched, a portion between the substrate at the bottom of the formed EJ trench to the other side of the substrate is etched as the substrate described in the present invention, and the substrate between adjacent EJ trenches Part of it is the substrate described in the present invention. In this case, both the substrate and the substrate are part of the substrate, and their materials are the same as those of the substrate.
  • the thickness of the substrate 100 is less than 1/3 of the thickness of the substrate, the thickness of the substrate is the distance between the first surface and the second surface of the substrate, or two adjacent to the same substrate The distance between the surfaces corresponding to the sidewalls of the trench.
  • the depth of one of the first trench 125 and the second trench 126 is greater than the thickness of the substrate and the spacing between adjacent substrates (ie, the width of the first trench 125 or the second trench 126) And, in this way, the thickness of the substrate can be effectively utilized to increase the effective surface area, and the increased area is related to the aspect ratio of the groove, and the larger the aspect ratio, the larger the increased area.
  • the substrate has the same thickness and is equal to the width of all the grooves
  • the width of the substrate is the same and equal to the depth of all the grooves
  • the aspect ratio of the groove is n
  • the effective surface area of the substrate structure is about n/2 times the surface area of the original substrate.
  • the aspect ratio of the groove is 10 or more, the effective area increase is very remarkable. This can effectively reduce the manufacturing cost for manufacturing a device such as a solar cell that requires a large area of semiconductor material.
  • the first trench and the first trench may be formed by anisotropic etching, such as reactive ion etching (RIE), deep reactive ion etching (DRIE), or the like, dry etching or wet etching, and the like. Two grooves.
  • RIE reactive ion etching
  • DRIE deep reactive ion etching
  • wet etching may be employed, for example, using potassium hydroxide Corrosion is carried out by a solvent such as (KOH), tetramethylammonium hydroxide (TMAH) or ethylenediamine-catechol (EDP), and the crystal faces on the first surface and the second surface are ⁇ 110 ⁇ or ⁇ 1 In the case of 12 ⁇ , the crystal faces of the surfaces corresponding to the sidewalls of the first trench and the second trench formed are ⁇ 11 1 ⁇ .
  • the distance between the first trench 125 and the second trench 126 determines the thickness of the substrate structure 150, so that the method uses photolithography to control the thickness of the substrate structure 150.
  • a device structure may be formed on the sidewall of the first trench 125.
  • the interface layer 160 is formed at least on the sidewall of the first trench 125 (i.e., the first surface of the substrate) as shown in FIG.
  • the interface layer 160 may be a multi-layer structure.
  • the interface layer 160 may be a multi-layer structure including a first semiconductor layer 160-1 and a first electrode layer 160-2.
  • the first semiconductor layer has a different doping type than the substrate, that is, when the substrate is doped to be p-type, the first semiconductor is doped to be n-type, and when the substrate is doped to be n-type The first semiconductor layer is doped to be p-type.
  • the first semiconductor layer 160-1 may be formed by a method of dopant ion diffusion or deposition, and then further diffused.
  • the first semiconductor layer 160-1 may be amorphous silicon a - Si. , polysilicon poly-Si, single crystal silicon or a combination thereof.
  • the interface layer 160 may also be formed by covering the entire first trench 125.
  • the first electrode layer 160-2 is formed thereon.
  • a transparent conductive oxide TCO Transparent Conductive Oxide
  • the temperature is controlled at 550 during deposition.
  • TC0 is Sn0 2 and ZnO. In other embodiments, TC0 may also be ln 2 0 3 , IT0, CdO, Cd 2 Sn0 4 , FT0, AZO or a combination thereof.
  • the device structure may be formed on the sidewall of the second trench 126.
  • another interface layer 170 is formed at least on the sidewall of the second trench 126 (ie, the second surface of the substrate), as shown in FIG.
  • the interface layer 170 can be a one-layer or multi-layer structure.
  • the interface layer 170 is multi-layered
  • the structure includes a second semiconductor layer 170-1 and a second electrode layer 170-2 having the same doping type as the substrate, and the second semiconductor layer 170-1 may be formed by a method of dopant ion diffusion or deposition, Further, diffusion may be further performed.
  • the second semiconductor layer 170-1 may be amorphous silicon a-Si, polycrystalline silicon poly-Si, single crystal silicon, or a combination thereof.
  • the interface layer 170 may also be formed covering the entire second trench 126.
  • the second electrode layer 170-2 is formed thereon, and likewise, the second electrode layer 170-2 may be formed of any conductive material, such as a metal material, as the present invention.
  • a transparent conductive oxide TCO Transparent Conductive Oxide
  • the temperature is controlled at 550 during deposition. Below C.
  • the TCO is Sn0 2 and ZnO. In other embodiments, the TCO may also be ln 2 0 3 , ITO, CdO, Cd 2 Sn0 4 , FTO, AZO or a combination thereof.
  • step SI 04 the substrate 101 is diced to cut the vertical substrate array from the substrate.
  • a flexible material layer 180 is formed on the substrate 120 of the substrate, and the substrate 101 is stretched to form an array of substrates, as shown in Figs.
  • FIG. 1 is a cross-sectional view of a vertical substrate array after cutting off edge wafers according to an embodiment of the present invention.
  • a layer of flexible material 180 is formed over the first and second surfaces of the substrate, respectively, as shown in FIG.
  • the flexible material layer may be formed by a process such as spray coating, CVD, PVD, ALD, evaporation, spin coating, or a combination thereof.
  • the flexible material layer has a thickness of 1 ⁇ 30 ⁇ m, and the material thereof may be metal, polymer, nano material or a combination thereof, wherein the metal comprises: gold, aluminum, silver, copper, titanium or a combination thereof; the polymer may be silica gel , polypropylene, plexiglass, acrylic, acrylic, PMMA, Polycast, transparent synthetic resin, plexiglass, parylene, epoxy, polycarbonate, silicone, polyurethane, polyamide, fluoropolymer, Polyolefin, collagen, chitin, chitin, alginic acid fiber, polyvinylpyrrolidone, polyethylene glycol, polyethylene oxide, polyethylene oxide, polyvinyl alcohol, polyethylene glycol lactic acid, polylactic acid, poly Caprolactone, polyamino acid, hydrogel, polydimethylsiloxane (PDMS), or a combination thereof; and the nanomaterials include nanotubes, graphene, or a combination thereof.
  • the metal comprises: gold, aluminum, silver
  • the flexible material chosen needs to have adequate flexibility, ductility and adhesion.
  • the topography of the layer of flexible material can be controlled such that a layer of flexible material 180 is formed on the first and second surfaces of the substrate, even if a portion of the flexible material enters the trench the goal of.
  • the flexible material does not close the groove opening.
  • the flexible material may enter the trench and cover the interface between the substrate and the substrate (as shown in FIG. 12) and may even cover the entire surface of the substrate as long as it does not affect the operation of stretching and stretching the substrate in a subsequent process. Just fine.
  • One advantage of covering the interface of the substrate with the substrate is that it is possible to avoid separation of the substrate from the substrate at the interface during subsequent stretching of the substrate.
  • the flexible material can at least partially cover the bottom surface of the trench (i.e., the second surface of the substrate).
  • the layer of flexible material is that the likelihood of substrate rupture during subsequent stretching and stretching of the substrate can be reduced.
  • the step of cutting the substrate and the step of covering the layer of flexible material may be exchanged in order to cover the edge of the flexible material layer and then cut off the edge of the substrate wafer.
  • the entire substrate structure is smoothly stretched from both ends of the vertical substrate array such that the first trench and the second trench are pulled apart to form a planar substrate array, as shown in FIG. Schematic of an array of planar substrates.
  • the plurality of substrates 150 are inverted by 90°, and the substrate 120 is curved into an arc shape to connect adjacent substrates.
  • the plurality of substrates are perpendicular to the vertical sidewalls of the curved substrate, and the adjacent substrates 120 have opposite bending curvatures. .
  • the operating temperature for stretching the substrate is from 0 ° C to 300 ° C, preferably from 10 ° C to 90 ° C. Within this temperature range, the flexible material layer 180 softens and bends with the substrate 120.
  • the material of the substrate 120 is a material having a relatively high brittleness such as SiO 2 or SiN, the film is easily broken during stretching, so that the vertical substrate array is broken at the substrate before being stretched into a planar substrate array.
  • the difficulty of stretching is increased.
  • the use of a layer of flexible material to join adjacent substrates avoids the problem of the substrate array being broken due to tensile fracture of the substrate.
  • the plurality of substrates can be stretched into a planar substrate array connected in the same plane. Improve the efficiency of device fabrication and yield.
  • the substrate 120 when a flexible polymer such as parylene is used as the substrate 120, polyparadimethylene
  • the polymer material such as benzene itself has flexibility and is not easily broken during stretching.
  • the flexibility of the substrate can be further increased, and at the same time, the plurality of substrates are stretched into a plane connected on the same plane.
  • Substrate array can also improve the efficiency of device fabrication and finished products
  • the device is subsequently processed.
  • the operation of forming devices on the sides of the first trench and the second trench may be performed after stretching the vertical substrate array into a planar substrate array.
  • the flexible material layer 180 may be etched away to facilitate separation of the individual substrates, as shown in FIG. Each separate substrate constitutes a separate device 190. Removal of the flexible material layer 180 can be carried out using process techniques well known in the art of semiconductor and micromechanical system processing.
  • the structure in which a plurality of substrates are connected has been formed in accordance with the method of the present invention.
  • the substrate structure effectively utilizes the thickness of the substrate to obtain more surface area of the processable wafer and increase the utilization of the wafer without increasing the overall wafer size.
  • the adjacent substrate it is also possible to connect through a layer of flexible material, and it is relatively easy to stretch a plurality of substrates into a planar substrate array distributed on the same plane, otherwise the adjacent substrates are broken due to the breakage of the substrate, A few substrates are difficult to separate or stretch into a coplanar arrangement.
  • the method of the present invention therefore improves the processing efficiency and yield of the device structure.

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Abstract

Provided are a substrate structure and a method for manufacturing same. The substrate structure comprises: a substrate array, comprising multiple substrates (150) arranged in the same plane according to a predetermined direction, each of the substrates (150) having a first surface (150-1) and a second surface (150-2) opposite to the first surface (150-1), and the substrate array being arranged in a plane parallel to the first surface (150-1) of the substrate (150); multiple chips (120), connected to the adjacent substrates (150), the substrate (150) being perpendicular to an upright side wall of the chip (120) connected thereto; and a flexible material layer (180), located on at least part of the surface of the chip (120) and/or at least part of the surface of the substrate (150).

Description

用于半导体器件制造的基板结构及其制造方法  Substrate structure for semiconductor device fabrication and method of fabricating the same
[0001]本申请要求了 2011年 1月 24日提交的、 申请号为 201110025831.0、 发明名称为 "用于半导体器件制造的基板结构及其制造方法" 的中国专利申 请的优先权， 其全部内容通过引用结合在本申请中。 技术领域 [0001] The present application claims priority to Chinese Patent Application No. 201110025831.0, entitled "Substrate Structure for Semiconductor Device Manufacturing and Its Manufacturing Method", filed on Jan. 24, 2011, the entire contents of The citations are incorporated herein by reference. Technical field
[0002]本发明涉及半导体制造领域， 特别涉及一种增大表面积的、用于半 导体器件制造的基板结构及其制造方法。 背景技术  The present invention relates to the field of semiconductor fabrication, and more particularly to a substrate structure for fabricating a semiconductor device and a method of fabricating the same that increase surface area. Background technique
[0003]近年来，随着半导体产业的迅速发展，半导体器件不断地朝小体积、 高电路密集度、 快速、 低耗电方向发展， 集成电路现已进入亚微米级的 技术阶段。 因此， 为了适应小体积、 高集成度的需要， 目前提出了两方 面的要求，一方面是要求晶圆片的直径逐渐增大，到 2005年，直径 300mm 硅片已成为主流产品， 预计到 2012年， 将开始使用直径 450mm ( 18in ) 硅片， 晶圆片的直径大约以每 9年增大 1.5倍的速度不断增大， 而向大面 积发展。 另一方面也提出了一种要求， 即希望在不增加现有的晶圆片尺 寸的基础上增加表面积利用率， 从而提高其可加工的表面积。  [0003] In recent years, with the rapid development of the semiconductor industry, semiconductor devices are continually moving toward small size, high circuit density, fast, low power consumption, and integrated circuits have now entered the sub-micron technology stage. Therefore, in order to meet the needs of small size and high integration, two requirements have been put forward. On the one hand, the diameter of the wafer is required to gradually increase. By 2005, the 300 mm diameter silicon wafer has become a mainstream product, and it is expected to be 2012. In the year, silicon wafers with a diameter of 450mm (18in) will be used, and the diameter of the wafer will increase by about 1.5 times every 9 years, and will grow to a large area. On the other hand, a requirement has been made to increase the surface area utilization without increasing the existing wafer size, thereby increasing the surface area that can be processed.
[0004】在半导体器件加工工艺中， 常用的材料如 Si02、 SiN等具有较大的 脆性， 在制作如太阳能电池等薄膜结构的器件时， 弯折或拉伸时容易导 致 Si02、 SiN等材料断裂， 使得相连接的器件结构之间断开， 导致整体的 器件结构被破坏或是在器件加工过程中使得成品率、 生产效率降低。 发明内容 [0004] In the semiconductor device processing process, commonly used materials such as SiO 2 , SiN, etc. have greater brittleness, and when fabricating a device such as a solar cell film, it is easy to cause SiO 2 , SiN, etc. when bent or stretched. The material breaks, causing the disconnected device structures to be disconnected, resulting in the destruction of the overall device structure or the reduction in yield and production efficiency during device processing. Summary of the invention
[0005]本发明的目的旨在至少解决上述技术缺陷，特别是对包含较大脆性 薄膜结构进行拉伸易使薄膜结构断裂而导致相连接的器件结构断开的问 题。 [0006】为达到上述目的，本发明提供了一种基板结构，其特征在于， 包括： [0005] The object of the present invention is to at least solve the above-mentioned technical drawbacks, in particular, the problem that stretching of a structure comprising a relatively large brittle film structure causes the film structure to be broken to cause disconnection of the connected device structure. In order to achieve the above object, the present invention provides a substrate structure, including:
[0007]基板阵列，所述基板阵列包括按照预定方向排列在同一平面上的多 个基板， 每个所述基板具有第一表面和与之相对的第二表面， 所述基板 阵列排列在与所述基板第一表面平行的平面上； [0007] A substrate array comprising a plurality of substrates arranged in a same direction on a same plane, each of the substrates having a first surface and a second surface opposite thereto, the substrate array being arranged at On a plane parallel to the first surface of the substrate;
[0008]多个基片， 其连接所述相邻基板； a plurality of substrates connected to the adjacent substrate;
[0009]柔性材料层， 所述柔性材料层位于至少部分所述基片表面和 \或至 少部分基板表面上。  [0009] A layer of flexible material, the layer of flexible material being on at least a portion of the surface of the substrate and/or at least a portion of the surface of the substrate.
[0010]根据本发明一个方面， 所述基板和与其连接的基片的直立侧壁垂 直。  [0010] According to one aspect of the invention, the substrate and the upstanding sidewall of the substrate to which it is attached are perpendicular.
[0011】根据本发明一个方面， 所述基片的材料包括： 绝缘材料、 金属、 半 导体材料、 聚合物或其组合。  [0011] According to one aspect of the invention, the material of the substrate comprises: an insulating material, a metal, a semiconductor material, a polymer, or a combination thereof.
[0012】根据本发明一个方面， 所述柔性材料层包括金属、 聚合物、 纳米材 料或其组合。  [0012] According to one aspect of the invention, the layer of flexible material comprises a metal, a polymer, a nanomaterial, or a combination thereof.
[0013】根据本发明一个方面， 所述金属包括： 金、 铝、 银、 铜、 钛或其组 合。  [0013] According to one aspect of the invention, the metal comprises: gold, aluminum, silver, copper, titanium, or a combination thereof.
[0014】根据本发明一个方面， 所述聚合物包括： 硅胶、聚丙烯、有机玻璃、 丙烯酸树脂、 丙烯酸、 PMMA、 Polycast, 透明合成树脂、 树脂玻璃、 聚 对二甲苯、 环氧树脂、 聚碳酸酯、 聚硅酮、 聚氨酯、 聚酰胺、 含氟聚合 物、 聚烯烃、 胶原、 几丁质， 甲壳素、 藻朊酸纤维、 聚乙烯吡咯烷酮、 聚乙二醇、 聚氧化乙烯， 聚环氧乙烷、 聚乙烯醇、 聚乙二醇乳酸、 聚乳 酸、 聚己内酯、 聚氨基酸、 水凝胶、 聚二甲基硅氧烷（PDMS )或其组合； 以及  [0014] According to one aspect of the invention, the polymer comprises: silica gel, polypropylene, plexiglass, acrylic, acrylic, PMMA, Polycast, transparent synthetic resin, plexiglass, parylene, epoxy, polycarbonate Ester, silicone, polyurethane, polyamide, fluoropolymer, polyolefin, collagen, chitin, chitin, alginic acid fiber, polyvinylpyrrolidone, polyethylene glycol, polyethylene oxide, polyethylene oxide Alkane, polyvinyl alcohol, polyethylene glycol lactic acid, polylactic acid, polycaprolactone, polyamino acid, hydrogel, polydimethylsiloxane (PDMS) or a combination thereof;
[0015】所述纳米材料包括纳米管、 石墨烯或其组合。  [0015] The nanomaterials include nanotubes, graphene, or a combination thereof.
[0016】根据本发明一个方面， 所述柔性材料层的厚度为 0.1~100 μ ιη, 优 选为 1-30 μ m。  According to one aspect of the invention, the flexible material layer has a thickness of 0.1 to 100 μm, preferably 1 to 30 μm.
[0017】根据本发明一个方面，所述的基板结构还包括至少在所述基板的第 一表面和 /或第二表面形成的界面层。  [0017] According to one aspect of the invention, the substrate structure further includes an interface layer formed at least on the first surface and/or the second surface of the substrate.
[0018】根据本发明一个方面， 所述基板材料包括： 单晶 Si、 单晶 Ge、 单 晶 SiGe、 多晶 Si、 多晶 Ge、 多晶 SiGe、 非晶 Si、 非晶 Ge、 非晶 SiGe、 III-V或 π-νι族化合物半导体或其组合。 [0018] According to one aspect of the invention, the substrate material comprises: single crystal Si, single crystal Ge, single crystal SiGe, polycrystalline Si, polycrystalline Ge, polycrystalline SiGe, amorphous Si, amorphous Ge, amorphous SiGe , A III-V or π-νι compound semiconductor or a combination thereof.
[0019】根据本发明一个方面， 所述基片的厚度小于所述基板厚度的 1/3 , 所述基板的厚度为基板第一表面和第二表面之间的距离。  [0019] According to one aspect of the invention, the thickness of the substrate is less than 1/3 of the thickness of the substrate, and the thickness of the substrate is the distance between the first surface and the second surface of the substrate.
[0020]根据本发明一个方面，所述基片具有第一表面和与其相对的第二表 面， 所述柔性材料层位于所述基片的第一表面和第二表面上。  [0020] According to one aspect of the invention, the substrate has a first surface and a second surface opposite thereto, the layer of flexible material being on the first and second surfaces of the substrate.
[0021】根据本发明一个方面， 所述基片至少部分材料与基板的材料相同。  [0021] According to one aspect of the invention, the substrate is at least partially identical in material to the substrate.
[0022]此外本发明还提供了一种用于半导体器件的基板结构的制造方法， 其特征在于， 包括如下步骤：  [0022] The present invention further provides a method for fabricating a substrate structure for a semiconductor device, comprising the steps of:
a ) 提供衬底， 所述衬底包括第一表面和与第一表面相对的第二表 面；  a) providing a substrate, the substrate comprising a first surface and a second surface opposite the first surface;
b ) 对所述衬底的第一表面和第二表面进行构图；  b) patterning the first surface and the second surface of the substrate;
c ) 从所述衬底的第一表面形成至少两个第一沟槽；以及从所述衬底 的第二表面形成至少一个第二沟槽，其中每个所述第二沟槽位于 相邻的两个所述第一沟槽之间，从而形成至少两个基板和至少一 个基片构成的竖直基板阵列；  c) forming at least two first trenches from the first surface of the substrate; and forming at least one second trench from the second surface of the substrate, wherein each of the second trenches is adjacent Between the two first trenches, thereby forming an array of vertical substrates composed of at least two substrates and at least one substrate;
d ) 在竖直基板阵列的至少部分基片表面和 \或至少部分基板表面上 形成柔性材料层；  d) forming a layer of flexible material on at least a portion of the substrate surface and/or at least a portion of the substrate surface of the vertical substrate array;
e ) 拉伸所述竖直基板阵列形成平面基板阵列。  e) stretching the array of vertical substrates to form a planar substrate array.
[0023】根据本发明一个方面， 在所述步骤 c ) 和 d )之间或者在步骤 e ) 之后在所述基板上形成器件。  [0023] According to one aspect of the invention, a device is formed on the substrate between the steps c) and d) or after step e).
[0024]根据本发明一个方面，所述基片的至少部分材料与所述衬底材料相 同。  [0024] According to one aspect of the invention, at least a portion of the material of the substrate is the same as the substrate material.
[0025】根据本发明一个方面， 所述步骤 d ) 中的柔性材料层通过喷涂、 [0025] According to one aspect of the invention, the layer of flexible material in step d) is sprayed,
CVD、 PVD、 ALD、 蒸镀、 旋涂或其组合的工艺所形成。 A process of CVD, PVD, ALD, evaporation, spin coating, or a combination thereof.
[0026】根据本发明一个方面， 所述柔性材料层包括金属、 聚合物、 纳米材 料或其组合。  According to one aspect of the invention, the layer of flexible material comprises a metal, a polymer, a nanomaterial, or a combination thereof.
[0027】根据本发明一个方面， 所述金属包括： 金、 铝、 银、 铜、 钛或其组 合。  [0027] According to one aspect of the invention, the metal comprises: gold, aluminum, silver, copper, titanium, or a combination thereof.
[0028】根据本发明一个方面， 所述聚合物包括： 硅胶、聚丙烯、有机玻璃、 丙烯酸树脂、 丙烯酸、 PMMA、 Polycast, 透明合成树脂、 树脂玻璃、 聚 对二甲苯、 环氧树脂、 聚碳酸酯、 聚硅酮、 聚氨酯、 聚酰胺、 含氟聚合 物、 聚烯烃、 胶原、 几丁质， 甲壳素、 藻朊酸纤维、 聚乙烯吡咯烷酮、 聚乙二醇、 聚氧化乙烯， 聚环氧乙烷、 聚乙烯醇、 聚乙二醇乳酸、 聚乳 酸、 聚己内酯、 聚氨基酸、 水凝胶、 聚二甲基硅氧烷（PDMS )或其组合； 以及 [0028] According to one aspect of the invention, the polymer comprises: silica gel, polypropylene, plexiglass, Acrylic resin, acrylic, PMMA, Polycast, transparent synthetic resin, plexiglass, parylene, epoxy resin, polycarbonate, silicone, polyurethane, polyamide, fluoropolymer, polyolefin, collagen, chitin Quality, chitin, alginic acid fiber, polyvinylpyrrolidone, polyethylene glycol, polyethylene oxide, polyethylene oxide, polyvinyl alcohol, polyethylene glycol lactic acid, polylactic acid, polycaprolactone, polyamino acid, a hydrogel, polydimethylsiloxane (PDMS) or a combination thereof;
[0029】所述纳米材料包括纳米管、 石墨烯或其组合。  [0029] The nanomaterials include nanotubes, graphene, or a combination thereof.
[0030】根据本发明一个方面， 所述柔性材料层的厚度为 0.1~100 μ ιη, 优 选为 1-30 μ m。  According to one aspect of the invention, the flexible material layer has a thickness of 0.1 to 100 μm, preferably 1 to 30 μm.
[0031】根据本发明一个方面， 所述步骤 e ) 中拉伸步骤包括： 沿所述预定 方向拉伸所述竖直基板阵列， 以使连接相邻基板间的基片弯曲成弧形， 所述基板具有第一表面和与之相对的第二表面， 且所述基板的第一表面 和第二表面与弧形基片的直立侧壁垂直， 所述多个基板的第一表面和第 二表面分别在相互平行的两个平面上。  [0031] According to one aspect of the invention, the stretching step in the step e) comprises: stretching the vertical substrate array in the predetermined direction to bend the substrate connecting the adjacent substrates into an arc, The substrate has a first surface and a second surface opposite thereto, and the first surface and the second surface of the substrate are perpendicular to the upstanding sidewall of the curved substrate, the first surface and the second surface of the plurality of substrates The surfaces are respectively on two planes parallel to each other.
[0032】根据本发明一个方面， 所述步骤 e ) 中拉伸步骤操作的温度为 0 °C ~300 °C。  [0032] According to one aspect of the invention, the temperature of the stretching step in step e) is from 0 °C to 300 °C.
[0033】根据本发明一个方面， 所述步骤 e ) 中拉伸步骤操作的温度为 10 [0033] According to one aspect of the invention, the temperature of the stretching step in step e) is 10
°C ~90 °C。 °C ~ 90 °C.
[0034】根据本发明一个方面， 所述步骤 e ) 中， 相邻的所述弯曲基片弯曲 方向相反， 基片弯曲形成弧形槽。  According to an aspect of the invention, in the step e), the adjacent curved substrates are bent in opposite directions, and the substrate is bent to form an arcuate groove.
[0035】根据本发明一个方面，所述弯曲基片形成的弧形槽内具有所述柔性 材料。  [0035] According to one aspect of the invention, the curved substrate is formed with an arcuate groove having the flexible material therein.
[0036】根据本发明一个方面， 其中所述步骤 e )之后还包括除去所述柔性 材料的步骤。  According to an aspect of the invention, the step e) further comprises the step of removing the flexible material.
[0037】根据本发明一个方面， 在所述步骤 a )还包括： 在所述衬底的上表 面和下表面形成基片层。  According to an aspect of the invention, the step a) further comprises: forming a substrate layer on the upper surface and the lower surface of the substrate.
[0038】根据本发明一个方面， 其中在所述步骤 c ) 和 d )之间或者在所述 步骤 d )和 e )之间还包括如下步骤： 将竖直基板阵列从衬底上分离出来。  [0038] According to one aspect of the invention, between the steps c) and d) or between the steps d) and e), the method further comprises the step of: separating the vertical substrate array from the substrate.
[0039】根据本发明一个方面， 所述基片的材料包括： 绝缘层、 金属层、 聚 合物、 半导体材料及其组合。 [0039] According to one aspect of the invention, the material of the substrate comprises: an insulating layer, a metal layer, a poly Compounds, semiconductor materials, and combinations thereof.
[0040】根据本发明一个方面， 其中所述步骤 c ) 中形成第一沟槽和第二沟 槽的步骤包括： 从所述衬底的第一表面刻蚀多个第一沟槽， 并停止在所 述第二表面的基片层上； 以及从所述衬底的第二表面刻蚀多个第二沟槽， 并停止在所述第一表面的基片层上。  [0040] According to an aspect of the invention, the step of forming the first trench and the second trench in the step c) comprises: etching a plurality of first trenches from the first surface of the substrate, and stopping On the substrate layer of the second surface; and etching a plurality of second trenches from the second surface of the substrate and stopping on the substrate layer of the first surface.
[0041】根据本发明一个方面， 其中步骤 b ) 包括：  [0041] According to one aspect of the invention, wherein step b) comprises:
[0042]在所述第一表面的基片层上形成具有多个开口的光刻胶；  [0042] forming a photoresist having a plurality of openings on the substrate layer of the first surface;
[0043]刻蚀所述基片层， 以去除所述第一表面的多个开口处的基片层；  Etching the substrate layer to remove the substrate layer at the plurality of openings of the first surface;
[0044]去除所述光刻胶；  Removing the photoresist;
[0045]在所述第二表面的基片层上形成具有多个开口的光刻胶；  Forming a photoresist having a plurality of openings on the substrate layer of the second surface;
[0046]刻蚀所述基片层， 以去除第二表面的多个开口处的基片层； Etching the substrate layer to remove the substrate layer at the plurality of openings of the second surface;
[0047]去除所述光刻胶。 [0047] The photoresist is removed.
[0048】根据本发明一个方面， 其中步骤 c ) 中形成所述第一沟槽和第二沟 槽的方法包括干法刻蚀、 湿法刻蚀或其组合。  [0048] According to one aspect of the invention, the method of forming the first trench and the second trench in step c) comprises dry etching, wet etching, or a combination thereof.
[0049】根据本发明一个方面， 其中步骤 c )还包括至少在所述第一沟槽和 [0049] According to one aspect of the invention, wherein step c) further comprises at least the first trench and
/或第二沟槽的侧壁形成界面层的步骤。 / or the step of forming a boundary layer on the sidewall of the second trench.
[0050]根据本发明一个方面，其中至少所述第一沟槽和第二沟槽之一的深 度至少大于所述基板厚度与相邻基板之间间隔之和。  [0050] According to one aspect of the invention, wherein at least one of the first trench and the second trench has a depth that is at least greater than a sum of a thickness of the substrate and an interval between adjacent substrates.
[0051】根据本发明一个方面， 其中所述基片的厚度小于所述基板厚度的 [0051] According to one aspect of the invention, wherein the thickness of the substrate is less than the thickness of the substrate
1/3。 1/3.
[0052]本发明有效地利用了衬底的厚度， 在不增加整个晶圆尺寸的前提 下， 提高了晶圆可加工的表面积或表面积的利用率。 通过在所述基片的 表面形成柔性材料层， 在拉伸竖直基板阵列形成多个基板相连的平面基 板阵列过程中， 即使由于所述基片脆性过大发生断裂， 相邻的基板还可 以通过柔性材料层相连， 较容易地实现将多个基板拉伸成分布在同一个 平面上的平面阵列状态， 提高了器件结构的加工效率和成品率。  [0052] The present invention effectively utilizes the thickness of the substrate to increase the surface area or surface area utilization of the wafer without increasing the overall wafer size. By forming a layer of flexible material on the surface of the substrate, in the process of forming a planar substrate array in which a plurality of substrates are connected by stretching the vertical substrate array, even if the substrate is broken due to excessive brittleness, the adjacent substrate can be By connecting the layers of flexible material, it is easier to stretch the plurality of substrates into a planar array state distributed on the same plane, which improves the processing efficiency and yield of the device structure.
[0053 ]本发明附加的方面和优点将在下面的描述部分中给出，部分将从下 面的描述中变得明显， 或通过本发明的实践了解到。 附图说明 [0053] Additional aspects and advantages of the invention will be set forth in the <RTIgt; DRAWINGS
[0054]本发明上述的和 /或附加的方面和优点从下面结合附图对实施例的 描述中将变得明显和容易理解， 其中：  The above and/or additional aspects and advantages of the present invention will become apparent and readily understood from
[0055]图 1为根据本发明实施例的基板结构的制造方法的流程图；  1 is a flow chart of a method of fabricating a substrate structure in accordance with an embodiment of the present invention;
[0056]图 2为根据本发明实施例的基板结构的初始制造阶段的平面视图 2 is a plan view of an initial manufacturing stage of a substrate structure in accordance with an embodiment of the present invention.
[0057]图 3-14为根据本发明实施例的基板结构的各个制造阶段的沿着图 2中所示的 A-A，剖线的剖面图； 具体实施方式 3-14 are cross-sectional views along line A-A of FIG. 2 at various stages of fabrication of a substrate structure in accordance with an embodiment of the present invention;
[0058]下面详细描述本发明的实施例， 所述实施例的示例在附图中示出， 其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类 似功能的元件。 下面通过参考附图描述的实施例是示例性的， 仅用于解 释本发明， 而不能解释为对本发明的限制。 下文的公开提供了许多不同 的实施例或例子用来实现本发明的不同结构。 为了筒化本发明的公开， 下文中对特定例子的部件和设置进行描述。 当然， 它们仅仅为示例， 并 且目的不在于限制本发明。 此外， 本发明可以在不同例子中重复参考数 字和 /或字母。 这种重复是为了筒化和清楚的目的， 其本身不指示所讨论 各种实施例和 /或设置之间的关系。 此外， 本发明提供了的各种特定的工 艺和材料的例子， 但是本领域普通技术人员可以意识到其他工艺的可应 用于性和 /或其他材料的使用。 另外， 以下描述的第一特征在第二特征之 "上" 的结构可以包括第一和第二特征形成为直接接触的实施例， 也可 以包括另外的特征形成在第一和第二特征之间的实施例， 这样第一和第 二特征可能不是直接接触。  The embodiments of the present invention are described in detail below, and the examples of the embodiments are illustrated in the drawings, wherein the same or similar reference numerals are used to refer to the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are intended to illustrate and not to limit the invention. The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and arrangements of the specific examples are described below. Of course, they are merely examples and are not intended to limit the invention. Moreover, the present invention may repeat reference numerals and/or letters in different examples. This repetition is for the purpose of clarity and clarity and does not in itself indicate the relationship between the various embodiments and/or arrangements discussed. Moreover, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the applicability of other processes and/or the use of other materials. Additionally, the structure of the first feature described below "on" the second feature may include embodiments in which the first and second features are formed in direct contact, and may include additional features formed between the first and second features. The embodiment, such that the first and second features may not be in direct contact.
[0059]本发明有效地利用了衬底的厚度， 在不增加整个晶圆尺寸的前提 下， 提高了晶圆可加工的表面积或表面积的利用率。 通过在所述基片的 表面形成柔性材料层， 在拉伸竖直基板阵列形成多个基板相连的阵列过 程中， 即使由于所述基片脆性过大发生断裂， 相邻的基板还可以通过柔 性材料层相连， 较容易地实现将多个基板拉伸成分布在同一个平面上的 阵列状态， 提高了器件结构的加工效率和成品率。 [0060】本发明提供一种如图 13所示的基板结构， 其中包括： 基板阵列， 所述基板阵列包括按照预定方向排列在同一平面上的多个基板 150,每个 所述基板 150具有第一表面 150-1和与之相对的第二表面 150-2 , 所述基 板阵列排列在与所述基板第一表面平行的平面上； 多个基片 120, 其连接 所述相邻基板 150,所述基板 150和与其连接的基片 120的直立侧壁垂直； 基片 120具有第一表面和与其相对的第二表面， 基片的第一表面为图 13 中弯曲基片的弧形的内 EJ表面， 基片的第二表面为弧形的外凸表面； 柔 性材料层 180 , 所述柔性材料层 180位于所述基片 120第一表面和 \或至 少部分基板 150表面上； 所述柔性材料层 180也可以位于基片 120的第 一表面和第二表面上， 以增加基片的强度和抗拉性能。 所述基片 120 的 材料包括： 绝缘材料、 金属、 半导体材料、 聚合物或其组合。 所述柔性 材料层 180包括金属、 聚合物、 纳米材料或其组合。 其中金属包括： 金、 铝、 银、 铜、 钛或其组合； 聚合物包括： 硅胶、 聚丙烯、 有机玻璃、 丙 烯酸树脂、 丙烯酸、 PMMA、 Polycast, 透明合成树脂、 树脂玻璃、 聚对 二甲苯、 环氧树脂、 聚碳酸酯、 聚硅酮、 聚氨酯、 聚酰胺、 含氟聚合物、 聚烯烃、 胶原、 几丁质， 甲壳素、 藻朊酸纤维、 聚乙烯吡咯烷酮、 聚乙 二醇、 聚氧化乙烯， 聚环氧乙烷、 聚乙烯醇、 聚乙二醇乳酸、 聚乳酸、 聚己内酯、 聚氨基酸、 水凝胶、 聚二甲基硅氧烷（PDMS )或其组合； 以 及所述纳米材料包括纳米管、 石墨烯或其组合。 [0059] The present invention effectively utilizes the thickness of the substrate to increase the surface area or surface area utilization of the wafer without increasing the overall wafer size. By forming a layer of flexible material on the surface of the substrate, in the process of forming an array of a plurality of substrates connected by stretching the vertical substrate array, adjacent substrates can pass through flexibility even if the substrate is broken due to excessive brittleness of the substrate. The material layers are connected, and it is easier to stretch the plurality of substrates into an array state distributed on the same plane, which improves the processing efficiency and yield of the device structure. [0060] The present invention provides a substrate structure as shown in FIG. 13, which includes: a substrate array including a plurality of substrates 150 arranged in a same direction on a same plane, each of the substrates 150 having a surface 150-1 and a second surface 150-2 opposite thereto, the substrate array is arranged on a plane parallel to the first surface of the substrate; a plurality of substrates 120 connected to the adjacent substrate 150, The substrate 150 is perpendicular to the upstanding sidewall of the substrate 120 to which it is attached; the substrate 120 has a first surface and a second surface opposite thereto, the first surface of the substrate being curved within the curved substrate of FIG. The EJ surface, the second surface of the substrate is an arcuate convex surface; the flexible material layer 180, the flexible material layer 180 is located on the first surface of the substrate 120 and/or at least a portion of the surface of the substrate 150; Material layer 180 may also be located on the first and second surfaces of substrate 120 to increase the strength and tensile properties of the substrate. The material of the substrate 120 includes: an insulating material, a metal, a semiconductor material, a polymer, or a combination thereof. The layer of flexible material 180 comprises a metal, a polymer, a nanomaterial, or a combination thereof. The metal includes: gold, aluminum, silver, copper, titanium or a combination thereof; the polymer includes: silica gel, polypropylene, plexiglass, acrylic resin, acrylic, PMMA, Polycast, transparent synthetic resin, plexiglass, parylene, Epoxy resin, polycarbonate, silicone, polyurethane, polyamide, fluoropolymer, polyolefin, collagen, chitin, chitin, alginic acid fiber, polyvinylpyrrolidone, polyethylene glycol, polyoxidation Ethylene, polyethylene oxide, polyvinyl alcohol, polyethylene glycol lactic acid, polylactic acid, polycaprolactone, polyamino acid, hydrogel, polydimethylsiloxane (PDMS) or a combination thereof; Nanomaterials include nanotubes, graphene, or a combination thereof.
[0061】所述柔性材料层 180的厚度为 0.1~100 μ ιη, 优选为 1~30 μ πι。 所 述基板结构还包括至少在所述基板 150的第一表面 150-1和 /或第二表面 150-2形成的界面层 160。 所述基板的材料包括： 单晶 Si、 单晶 Ge、 单晶 SiGe、 多晶 Si、 多晶 Ge、 多晶 SiGe、 非晶 Si、 非晶 Ge、 非晶 SiGe、 III-V 或 II-VI族化合物半导体或其组合。 所述基片的厚度小于所述基板厚度的 1/3 , 所述基板的厚度为基板第一表面和第二表面之间的距离。 在一种情 况中， 基片 120的至少部分材料可以与基板 150的材料相同， 例如都为 硅。  The flexible material layer 180 has a thickness of 0.1 to 100 μm, preferably 1 to 30 μm. The substrate structure further includes an interface layer 160 formed at least on the first surface 150-1 and/or the second surface 150-2 of the substrate 150. Materials of the substrate include: single crystal Si, single crystal Ge, single crystal SiGe, polycrystalline Si, polycrystalline Ge, polycrystalline SiGe, amorphous Si, amorphous Ge, amorphous SiGe, III-V or II-VI Group compound semiconductor or a combination thereof. The thickness of the substrate is less than 1/3 of the thickness of the substrate, and the thickness of the substrate is the distance between the first surface and the second surface of the substrate. In one case, at least a portion of the material of the substrate 120 can be the same as the material of the substrate 150, such as silicon.
[0062]图 1示出了本发明实施例的形成图 13中所示的基板结构的方法的 流程图， 包括以下步骤： [0063】步骤 S101 , 参考图 2 , 提供晶圆或衬底 101 , 在本发明的一个实施 例中， 所述衬底 101 为半导体衬底， 例如为硅、 锗以及化合物半导体的 一种或其组合， 包括但不限于单晶 Si、 单晶 Ge、 单晶 SiGe , 特别地， 表 面 101-1、 101-2的晶面为 { 110 } 或 { 1 12} , 所述衬底 101 还可以是多晶 Si、 多晶 Ge、 多晶 SiGe、 非晶 Si、 非晶 Ge、 非晶 SiGe、 III-V或 II- VI 族化合物半导体或其组合或其组合。 在其他实施例中， 可通过多种方式 生成该衬底， 例如淀积、 外延生长等， 所述衬底可以具有 N型掺杂配置 或 P型掺杂配置。 其中， 该衬底的厚度可为 0.1-2mm, 当然本发明不限于 此。 所述衬底包括第一表面 101-1和与其相对的第二表面 101-2 , 参考图 1 shows a flow chart of a method of forming the substrate structure shown in FIG. 13 in accordance with an embodiment of the present invention, including the following steps: [0063] Step S101, referring to FIG. 2, provides a wafer or substrate 101. In one embodiment of the present invention, the substrate 101 is a semiconductor substrate, such as one of silicon, germanium, and a compound semiconductor, or Combination, including but not limited to single crystal Si, single crystal Ge, single crystal SiGe, in particular, the crystal plane of the surface 101-1, 101-2 is {110} or {1 12}, and the substrate 101 may also be Polycrystalline Si, polycrystalline Ge, polycrystalline SiGe, amorphous Si, amorphous Ge, amorphous SiGe, III-V or II-VI compound semiconductors, or combinations thereof, or combinations thereof. In other embodiments, the substrate can be formed by a variety of means, such as deposition, epitaxial growth, etc., which can have an N-type doped configuration or a P-type doped configuration. Wherein, the thickness of the substrate may be 0.1-2 mm, of course, the invention is not limited thereto. The substrate includes a first surface 101-1 and a second surface 101-2 opposite thereto, reference drawing
[0064】特别地， 在所述衬底的第一和第二表面上形成基片层 100 , 所述基 片层 100 可以具有一层或多层结构， 可以根据需要配置每个层所使用的 材料和厚度， 例如， 可以包括覆盖所述衬底上下表面的绝缘层， 作为刻 蚀掩膜层， 并需要根据不同的刻蚀方法或腐蚀液的类型以及所刻蚀结构 的深度等设计要求， 在步骤 S101中合理地选择基片层的材料以及基片层 的厚度。例如，采用湿法腐蚀时，基片层 100优选为 Si02、 SiN或其组合， 用反应离子刻蚀形成结构时， 基片层材料可以是 Si02、 SiN或其组合， 也 可以是 parylene (聚对二甲苯） 等柔性聚合物， 当然， 根据需要基片层 100也可以是金属、 半导体材料、 其他绝缘材料及其组合。 [0064] In particular, a substrate layer 100 is formed on the first and second surfaces of the substrate, and the substrate layer 100 may have one or more layers of structure, which may be configured as needed for each layer. The material and the thickness, for example, may include an insulating layer covering the upper and lower surfaces of the substrate as an etch mask layer, and need to be designed according to different etching methods or types of etching liquids and depths of the etched structures. The material of the substrate layer and the thickness of the substrate layer are reasonably selected in step S101. For example, when wet etching is used, the substrate layer 100 is preferably SiO 2 , SiN or a combination thereof. When the structure is formed by reactive ion etching, the substrate layer material may be Si0 2 , SiN or a combination thereof, or may be parylene ( The flexible polymer such as parylene), of course, may also be a metal, a semiconductor material, other insulating materials, and combinations thereof, as desired.
[0065】步骤 S 102 , 如图 2~6所示， 对所述衬底的第一表面 101-1和第二 表面 101-2进行构图。 具体地， 在所述衬底的第一表面和第二表面形成基 片层 100后，在所述衬底 101的第一表面 101-1上形成具有预定间隔配置 的多个开口的光刻胶 110 , 在开口中暴露出基片层 100, 如图 3所示； 优 选地， 对于衬底为单晶材料的情况下， 与所述开口的长度方向相垂直的 晶向为 <11 1>方向。 以光刻胶 110为掩膜， 刻蚀所述基片层 100 , 至露出 所述衬底的第一表面 101-1 , 在所述基片层 100上形成多个第一开口 121 以及多个图形化后的基片 120, 如图 4所示； 去除所述光刻胶 110, 而后， 在所述第二表面 101-2 上形成具有预定间隔配置的多个开口的光刻胶 130 , 如图 5所示； 以光刻胶 130为掩膜， 刻蚀衬底第二表面上的所述基 片层 100 , 至露出所述衬底的第二表面 101-2 , 在所述基片层 100上形成 多个第二开口 123以及图形化后的基片 120 , 如图 6所示， 最后去除第二 表面上的光刻胶 130。 作为本发明的一个优选实施例， 相邻第一开口 121 之间的间隔和相邻第二开口 123之间的间距相等， 并且第一开口 121 与 第二开口 123 之间交错排列。 当然以上所述的形成构图的步骤仅仅是示 例， 本领域的技术人员可以通过许多本领域所公知的方法获得本实施例 所述的构图的衬底， 这些均可以应用到本实施例中， 而不脱离本发明的 保护范围。 例如， 上述在衬底 101 上的两个表面分两次形成光刻胶和进 行光刻的步骤也可以合为一个步骤， 即同时在两个表面上形成光刻胶， 同时进行构图、 光刻和去除光刻胶。 [0065] Step S102, as shown in FIGS. 2-6, the first surface 101-1 and the second surface 101-2 of the substrate are patterned. Specifically, after the substrate layer 100 is formed on the first surface and the second surface of the substrate, a photoresist having a plurality of openings arranged at a predetermined interval is formed on the first surface 101-1 of the substrate 101. 110, exposing the substrate layer 100 in the opening, as shown in FIG. 3; preferably, in the case where the substrate is a single crystal material, the crystal orientation perpendicular to the longitudinal direction of the opening is <11 1> direction . The substrate layer 100 is etched by using the photoresist 110 as a mask to expose the first surface 101-1 of the substrate, and a plurality of first openings 121 and a plurality of holes are formed on the substrate layer 100. The patterned substrate 120 is as shown in FIG. 4; the photoresist 110 is removed, and then a photoresist having a plurality of openings arranged at a predetermined interval is formed on the second surface 101-2. 130, as shown in FIG. 5; etching the substrate layer 100 on the second surface of the substrate with the photoresist 130 as a mask, to expose the second surface 101-2 of the substrate, A plurality of second openings 123 and a patterned substrate 120 are formed on the substrate layer 100. As shown in FIG. 6, the photoresist 130 on the second surface is finally removed. As a preferred embodiment of the present invention, the interval between adjacent first openings 121 and the spacing between adjacent second openings 123 are equal, and the first opening 121 and the second opening 123 are staggered. Of course, the steps of forming the composition described above are merely examples, and those skilled in the art can obtain the patterned substrate described in this embodiment by a number of methods known in the art, and these can be applied to the present embodiment. Without departing from the scope of the invention. For example, the steps of forming the photoresist and performing photolithography on the two surfaces on the substrate 101 may be combined into one step, that is, simultaneously forming a photoresist on both surfaces while performing patterning and photolithography. And removing the photoresist.
[0066】而后， 在步骤 S103中， 如图 7所示， 以基片 120为掩膜， 从第一 表面 101-1的第一开口 121和第二表面 101-2的第二开口 123刻蚀所述衬 底， 形成至少两个第一沟槽 125和至少一个第二沟槽 126。 所述第一沟槽 125和所述第二沟槽 126开口方向相反。在此把第一沟槽 125的侧壁称为 基板的第一表面， 第二沟槽 126 称为基板的第二表面。 可选地， 可以刻 蚀全部或部分所述衬底 101 , 例如可以刻蚀所述衬底的第一表面 101-1并 停止在所述第二表面的基片层 120上， 并刻蚀所述衬底的第二表面 101-2 并停止在所述第一表面 101-1的基片层 120上。当然也可以只刻蚀一部分 衬底材料， 即第一沟槽和第二沟槽的底部不到达衬底第二表面和第一表 面的基片层 120。所述第一沟槽 125和与其相邻第二沟槽 126之间的衬底 101形成基板 150 , 所述基板 150的宽度与衬底 101的厚度相当， 大约为 0.1 -2mm;基板 150的厚度为相邻沟槽 125和 126之间的距离，大约为 5- 120 μ πι。 所述第一沟槽和第二沟槽可以具有相等或者不等的间隔， 特别地， 可以构图所述衬底， 以使所述第一沟槽和第二沟槽基本平行， 这些可以 根据设计需要来设置。 这样每个所述第二沟槽 126 位于相邻的两个所述 第一沟槽 125之间， 以将所述衬底分割成至少两个基板 150和至少一个 基片 120。 所述基板 150由第一沟槽 125和第二沟槽 126的侧壁所限定， 所述基片 120连接相邻的两个所述基板 150。 图 7为图 2所示衬底示意图 中 A-A，方向的剖面图。 如图 7中所示， 所形成的基本结构包括多个竖直 排列的基板 150, 在本文称为竖直基板阵列。 Then, in step S103, as shown in FIG. 7, the first opening 121 of the first surface 101-1 and the second opening 123 of the second surface 101-2 are etched by using the substrate 120 as a mask. The substrate forms at least two first trenches 125 and at least one second trench 126. The first trench 125 and the second trench 126 are opposite in opening direction. Here, the sidewall of the first trench 125 is referred to as the first surface of the substrate, and the second trench 126 is referred to as the second surface of the substrate. Alternatively, all or a portion of the substrate 101 may be etched, for example, the first surface 101-1 of the substrate may be etched and stopped on the substrate layer 120 of the second surface, and etched The second surface 101-2 of the substrate is stopped on the substrate layer 120 of the first surface 101-1. It is of course also possible to etch only a portion of the substrate material, i.e. the bottom of the first trench and the second trench do not reach the substrate surface 120 of the second surface of the substrate and the first surface. The substrate 101 between the first trench 125 and the second trench 126 adjacent thereto forms a substrate 150 having a width corresponding to the thickness of the substrate 101, approximately 0.1 - 2 mm; the thickness of the substrate 150 The distance between adjacent trenches 125 and 126 is approximately 5-120 μm. The first trench and the second trench may have equal or unequal spacing, in particular, the substrate may be patterned such that the first trench and the second trench are substantially parallel, which may be designed according to Need to set it up. Thus each of the second trenches 126 is located between two adjacent first trenches 125 to divide the substrate into at least two substrates 150 and at least one substrate 120. The substrate 150 is defined by sidewalls of the first trench 125 and the second trench 126. The substrate 120 connects two adjacent substrates 150. Figure 7 is a cross-sectional view taken along line AA of the schematic view of the substrate shown in Figure 2. As shown in Figure 7, the resulting basic structure includes a plurality of vertically aligned substrates 150, referred to herein as vertical substrate arrays.
[0067】应当知道， 如果在步骤 S101 中不形成基片层 100 也可以在步骤 S102 中直接用光刻胶作为掩膜对衬底进行刻蚀， 通过控制刻蚀深度不刻 蚀穿衬底也可以获得本发明竖直基板阵列结构， 实现本发明的目的。 如 果不刻蚀穿衬底， 则刻蚀所形成的 EJ槽底部的衬底到衬底的另一面之间 的部分作为本发明中所述的基片， 而相邻 EJ槽之间的衬底部分作为本发 明中所述的基板。 在这种情况下， 基片和基板都为衬底的一部分， 它们 的材料与衬底相同。  [0067] It should be noted that if the substrate layer 100 is not formed in step S101, the substrate may be directly etched by using the photoresist as a mask in step S102, and the substrate is also etched by controlling the etching depth. The vertical substrate array structure of the present invention can be obtained to achieve the object of the present invention. If the substrate is not etched, a portion between the substrate at the bottom of the formed EJ trench to the other side of the substrate is etched as the substrate described in the present invention, and the substrate between adjacent EJ trenches Part of it is the substrate described in the present invention. In this case, both the substrate and the substrate are part of the substrate, and their materials are the same as those of the substrate.
[0068】优选地， 基片 100的厚度小于所述基板厚度的 1/3 , 所述基板的厚 度为基板第一表面和第二表面之间的距离， 或者为属于同一基板的、 相 邻两沟槽的侧壁所对应的表面之间的距离。  [0068] Preferably, the thickness of the substrate 100 is less than 1/3 of the thickness of the substrate, the thickness of the substrate is the distance between the first surface and the second surface of the substrate, or two adjacent to the same substrate The distance between the surfaces corresponding to the sidewalls of the trench.
[0069]优选地，所述第一沟槽 125和第二沟槽 126之一的深度大于基板厚 度与相邻基板之间间隔 （即第一沟槽 125或第二沟槽 126的宽度）之和， 这样就能够有效地利用衬底的厚度增加有效表面面积， 所增加的面积与 沟槽的深宽比相关， 深宽比越大则增加的面积越大。 在一种情况下， i 设基板的厚度都相同并与所有沟槽的宽度相等， 基板的宽度都相同并与 所有沟槽的深度相等， 如果沟槽的深宽比为 n, 则本发明的基板结构的有 效表面面积约为原有衬底表面面积的 n/2倍。 当沟槽的深宽比为 10或以 上时， 有效面积增加非常明显。 这对于制造太阳能电池等需要大面积半 导体材料的器件来说能够有效地降低制造成本。  [0069] Preferably, the depth of one of the first trench 125 and the second trench 126 is greater than the thickness of the substrate and the spacing between adjacent substrates (ie, the width of the first trench 125 or the second trench 126) And, in this way, the thickness of the substrate can be effectively utilized to increase the effective surface area, and the increased area is related to the aspect ratio of the groove, and the larger the aspect ratio, the larger the increased area. In one case, i the substrate has the same thickness and is equal to the width of all the grooves, the width of the substrate is the same and equal to the depth of all the grooves, and if the aspect ratio of the groove is n, the present invention The effective surface area of the substrate structure is about n/2 times the surface area of the original substrate. When the aspect ratio of the groove is 10 or more, the effective area increase is very remarkable. This can effectively reduce the manufacturing cost for manufacturing a device such as a solar cell that requires a large area of semiconductor material.
[0070]根据所述衬底的材料性质，本领域技术人员可以选择适当的刻蚀方 法形成所述第一沟槽 125和第二沟槽 126 ,这些均不脱离本发明的保护范 围。 例如， 可以采用各向异性刻蚀， 例如反应离子刻蚀 （RIE ) 、 深反应 离子刻蚀 （DRIE ) 等干法刻蚀或湿法腐蚀及其组合等方法形成所述第一 沟槽和第二沟槽。 特别地， 当所述衬底包含单晶材料时， 例如单晶 Si、 单晶 Ge、 单晶 SiGe或其组合时， 可以采用湿法腐蚀， 例如采用氢氧化钾 ( KOH ) 、 四甲基氢氧化铵 ( TMAH )或乙二胺 -邻苯二酚 (EDP )等溶剂 进行腐蚀， 在所述第一表面和第二表面的晶面为 { 110}或 { 1 12}的情况下， 所形成的第一沟槽和第二沟槽其侧壁所对应的表面的晶面为 { 11 1 }。 第一 沟槽 125和第二沟槽 126之间的距离 （即半导体衬底 101水平方向的距 离 )决定了基板结构 150的厚度， 从而本方法用光刻来控制基板结构 150 的厚度。 Depending on the material properties of the substrate, those skilled in the art can select the appropriate etching method to form the first trench 125 and the second trench 126 without departing from the scope of the present invention. For example, the first trench and the first trench may be formed by anisotropic etching, such as reactive ion etching (RIE), deep reactive ion etching (DRIE), or the like, dry etching or wet etching, and the like. Two grooves. In particular, when the substrate comprises a single crystal material, such as single crystal Si, single crystal Ge, single crystal SiGe or a combination thereof, wet etching may be employed, for example, using potassium hydroxide Corrosion is carried out by a solvent such as (KOH), tetramethylammonium hydroxide (TMAH) or ethylenediamine-catechol (EDP), and the crystal faces on the first surface and the second surface are {110} or {1 In the case of 12}, the crystal faces of the surfaces corresponding to the sidewalls of the first trench and the second trench formed are {11 1 }. The distance between the first trench 125 and the second trench 126 (i.e., the distance in the horizontal direction of the semiconductor substrate 101) determines the thickness of the substrate structure 150, so that the method uses photolithography to control the thickness of the substrate structure 150.
[0071】特别地， 在步骤 S103中， 在形成图 7所示的所述第一沟槽 125和 第二沟槽 126后， 可以在第一沟槽 125侧壁上形成器件结构。 例如， 至 少在所述第一沟槽 125的侧壁（即基板的第一表面 )形成界面层 160 , 如 图 8所示。 所述界面层 160可以为多层结构， 在本发明的一个实施例中， 所述界面层 160可以为多层结构，包括第一半导体层 160-1和第一电极层 160-2 , 所述第一半导体层具有与所述衬底不同的掺杂类型， 即当所述衬 底掺杂为 p型时， 所述第一半导体掺杂为 n型， 当所述衬底掺杂为 n型 时， 所述第一半导体层掺杂为 p型。 所述第一半导体层 160-1可以通过掺 杂离子扩散或沉积的方法形成， 而后还可以进一步进行扩散， 此实施例 中， 所述第一半导体层 160-1可以是非晶态硅 a - Si、 多晶硅 poly - Si、 单晶硅或其组合。 特别地， 也可以覆盖整个第一沟槽 125 形成所述界面 层 160。  In particular, in step S103, after the first trench 125 and the second trench 126 shown in FIG. 7 are formed, a device structure may be formed on the sidewall of the first trench 125. For example, the interface layer 160 is formed at least on the sidewall of the first trench 125 (i.e., the first surface of the substrate) as shown in FIG. The interface layer 160 may be a multi-layer structure. In an embodiment of the present invention, the interface layer 160 may be a multi-layer structure including a first semiconductor layer 160-1 and a first electrode layer 160-2. The first semiconductor layer has a different doping type than the substrate, that is, when the substrate is doped to be p-type, the first semiconductor is doped to be n-type, and when the substrate is doped to be n-type The first semiconductor layer is doped to be p-type. The first semiconductor layer 160-1 may be formed by a method of dopant ion diffusion or deposition, and then further diffused. In this embodiment, the first semiconductor layer 160-1 may be amorphous silicon a - Si. , polysilicon poly-Si, single crystal silicon or a combination thereof. In particular, the interface layer 160 may also be formed by covering the entire first trench 125.
[0072】形成第一半导体层 160-1后， 在其上形成第一电极层 160-2。 作为 本发明的一个优选实施例， 淀积透明导电氧化物 TCO (Transparent Conductive Oxide)以形成第一电极层 160-2。 作为本发明的一个优选实施 例，在淀积时， 温度控制在 550。 C以下。作为本发明的一个优选实施例， TC0为 Sn02和 ZnO , 其他的实施例中， TC0还可以为 ln203、 IT0、 CdO、 Cd2Sn04、 FT0、 AZO或其组合。 After the first semiconductor layer 160-1 is formed, the first electrode layer 160-2 is formed thereon. As a preferred embodiment of the present invention, a transparent conductive oxide TCO (Transparent Conductive Oxide) is deposited to form the first electrode layer 160-2. As a preferred embodiment of the invention, the temperature is controlled at 550 during deposition. Below C. As a preferred embodiment of the present invention, TC0 is Sn0 2 and ZnO. In other embodiments, TC0 may also be ln 2 0 3 , IT0, CdO, Cd 2 Sn0 4 , FT0, AZO or a combination thereof.
[0073】同样的， 也可以在形成图 7 所示的基板结构后， 在第二沟槽 126 的侧壁形成器件结构。 例如， 至少在所述第二沟槽 126 的侧壁 （即基板 的第二表面）形成另一个界面层 170 , 如图 9所示。 所述界面层 170可以 为一层或多层结构。 在本发明的一个实施例中， 所述界面层 170 为多层 结构，包括具有与衬底相同掺杂类型的第二半导体层 170-1和第二电极层 170-2 , 所述第二半导体层 170-1 可以通过掺杂离子扩散或沉积的方法来 形成，而后还可以进一步进行扩散，此实施例中，所述第二半导体层 170-1 可以是非晶态硅 a - Si、 多晶硅 poly - Si、 单晶硅或其组合。 特别地， 也 可以覆盖整个第二沟槽 126形成所述界面层 170。 [0073] Similarly, after forming the substrate structure shown in FIG. 7, the device structure may be formed on the sidewall of the second trench 126. For example, another interface layer 170 is formed at least on the sidewall of the second trench 126 (ie, the second surface of the substrate), as shown in FIG. The interface layer 170 can be a one-layer or multi-layer structure. In an embodiment of the invention, the interface layer 170 is multi-layered The structure includes a second semiconductor layer 170-1 and a second electrode layer 170-2 having the same doping type as the substrate, and the second semiconductor layer 170-1 may be formed by a method of dopant ion diffusion or deposition, Further, diffusion may be further performed. In this embodiment, the second semiconductor layer 170-1 may be amorphous silicon a-Si, polycrystalline silicon poly-Si, single crystal silicon, or a combination thereof. In particular, the interface layer 170 may also be formed covering the entire second trench 126.
[0074】在形成第二半导体层 170-1后， 在其上形成第二电极层 170-2 , 同 样， 第二电极层 170-2可以由任意导电材料形成， 比如金属材料， 作为本 发明的一个优选实施例， 淀积透明导电氧化物 TCO (Transparent Conductive Oxide)以形成第二电极层 170-2。 作为本发明的一个优选实施 例，在淀积时， 温度控制在 550。 C以下。作为本发明的一个优选实施例， TCO为 Sn02和 ZnO , 其他的实施例中， TCO还可以为 ln203、 ITO、 CdO、 Cd2Sn04、 FTO、 AZO或其组合。 [0074] After the second semiconductor layer 170-1 is formed, the second electrode layer 170-2 is formed thereon, and likewise, the second electrode layer 170-2 may be formed of any conductive material, such as a metal material, as the present invention. In a preferred embodiment, a transparent conductive oxide TCO (Transparent Conductive Oxide) is deposited to form the second electrode layer 170-2. As a preferred embodiment of the invention, the temperature is controlled at 550 during deposition. Below C. As a preferred embodiment of the present invention, the TCO is Sn0 2 and ZnO. In other embodiments, the TCO may also be ln 2 0 3 , ITO, CdO, Cd 2 Sn0 4 , FTO, AZO or a combination thereof.
[0075】在步骤 SI 04中， 切割所述衬底 101 , 将竖直基板阵列从衬底上切 割下来。 在衬底的基片 120上形成柔性材料层 180, 拉伸所述衬底 101形 成基板阵列， 具体如图 10~14所示。  [0075] In step SI 04, the substrate 101 is diced to cut the vertical substrate array from the substrate. A flexible material layer 180 is formed on the substrate 120 of the substrate, and the substrate 101 is stretched to form an array of substrates, as shown in Figs.
[0076】首先， 用激光束或其它切割工具切掉衬底晶圆的边缘， 如图 10所 示。 图 1 1为本发明实施例的切掉边缘晶圆后的竖直基板阵列的截面图。  [0076] First, the edge of the substrate wafer is cut away with a laser beam or other cutting tool, as shown in FIG. FIG. 1 is a cross-sectional view of a vertical substrate array after cutting off edge wafers according to an embodiment of the present invention.
[0077】在切割衬底 101后，在所述衬底的第一表面和第二表面的基片之上 分别形成柔性材料层 180 , 如图 12所示。 所述柔性材料层可以通过喷涂、 CVD、 PVD、 ALD、 蒸镀、 旋涂或其组合等工艺方法形成。 所述柔性材 料层厚度为 1~30 μ ιη, 其材料可以是金属、 聚合物、 纳米材料或其组合， 其中金属包括： 金、 铝、 银、 铜、 钛或其组合； 聚合物可以是硅胶、 聚 丙烯、 有机玻璃、 丙烯酸树脂、 丙烯酸、 PMMA、 Polycast, 透明合成树 脂、 树脂玻璃、 聚对二甲苯、 环氧树脂、 聚碳酸酯、 聚硅酮、 聚氨酯、 聚酰胺、 含氟聚合物、 聚烯烃、 胶原、 几丁质， 甲壳素、 藻朊酸纤维、 聚乙烯吡咯烷酮、 聚乙二醇、 聚氧化乙烯， 聚环氧乙烷、 聚乙烯醇、 聚 乙二醇乳酸、 聚乳酸、 聚己内酯、 聚氨基酸、 水凝胶、 聚二甲基硅氧烷 ( PDMS )或其组合； 以及所述纳米材料包括纳米管、 石墨烯或其组合。 所选择的柔性材料需要具有适当的柔性、 延展性和附着力。 通过控制喷 涂工艺的参数， 可以控制柔性材料层的形貌， 使得柔性材料层 180 形成 在所述衬底的第一表面和第二表面上， 即便有部分柔性材料进入沟槽也 可实现本发明的目的。 优选地， 柔性材料不封闭沟槽口。 在另一个实施 例中， 柔性材料可以进入沟槽并覆盖基片与基板交界处 （如图 12所示） 甚至可以覆盖基板的整个表面， 只要不影响后续工艺中将基板拉伸展平 的操作即可。 覆盖基片与基板交界处的一个优点是可以避免在后续将基 板拉伸展平过程中基板与基片在该交界处分离。 [0077] After the substrate 101 is diced, a layer of flexible material 180 is formed over the first and second surfaces of the substrate, respectively, as shown in FIG. The flexible material layer may be formed by a process such as spray coating, CVD, PVD, ALD, evaporation, spin coating, or a combination thereof. The flexible material layer has a thickness of 1~30 μm, and the material thereof may be metal, polymer, nano material or a combination thereof, wherein the metal comprises: gold, aluminum, silver, copper, titanium or a combination thereof; the polymer may be silica gel , polypropylene, plexiglass, acrylic, acrylic, PMMA, Polycast, transparent synthetic resin, plexiglass, parylene, epoxy, polycarbonate, silicone, polyurethane, polyamide, fluoropolymer, Polyolefin, collagen, chitin, chitin, alginic acid fiber, polyvinylpyrrolidone, polyethylene glycol, polyethylene oxide, polyethylene oxide, polyvinyl alcohol, polyethylene glycol lactic acid, polylactic acid, poly Caprolactone, polyamino acid, hydrogel, polydimethylsiloxane (PDMS), or a combination thereof; and the nanomaterials include nanotubes, graphene, or a combination thereof. The flexible material chosen needs to have adequate flexibility, ductility and adhesion. By controlling the parameters of the spray process, the topography of the layer of flexible material can be controlled such that a layer of flexible material 180 is formed on the first and second surfaces of the substrate, even if a portion of the flexible material enters the trench the goal of. Preferably, the flexible material does not close the groove opening. In another embodiment, the flexible material may enter the trench and cover the interface between the substrate and the substrate (as shown in FIG. 12) and may even cover the entire surface of the substrate as long as it does not affect the operation of stretching and stretching the substrate in a subsequent process. Just fine. One advantage of covering the interface of the substrate with the substrate is that it is possible to avoid separation of the substrate from the substrate at the interface during subsequent stretching of the substrate.
[0078】在另一个实施例， 柔性材料可以至少部分覆盖沟槽底部表面（也就 是基片的第二表面） 。 基片的相对的第一表面和第二表面都被柔性材料 层覆盖的一个优点是可以减少在后续将基板拉伸展平过程中基片破裂的 可能性。  In another embodiment, the flexible material can at least partially cover the bottom surface of the trench (i.e., the second surface of the substrate). One advantage of the opposing first and second surfaces of the substrate being covered by the layer of flexible material is that the likelihood of substrate rupture during subsequent stretching and stretching of the substrate can be reduced.
[0079]上述切割衬底的步骤与覆盖柔性材料层的步骤可以交换次序，即先 覆盖柔性材料层再进行切掉衬底晶圆的边缘。  [0079] The step of cutting the substrate and the step of covering the layer of flexible material may be exchanged in order to cover the edge of the flexible material layer and then cut off the edge of the substrate wafer.
[0080】然后，从竖直基板阵列两端平稳地拉伸整个基板结构，使得第一沟 槽和第二沟槽拉开， 形成平面的基板阵列， 如图 13所示， 为拉伸后形成 的平面基板阵列的示意图。 所述多个基板 150翻转 90° , 基片 120弯曲 成弧形， 连接相邻的基板， 所述多个基板与弧形基片的直立侧壁垂直， 相邻的基片 120 的弯曲曲率相反。 拉伸所述衬底的操作温度为 0 °C ~300 °C , 优选为 10 °C ~90°C , 在这个温度范围内， 所述柔性材料层 180软化， 并随着基片 120 的弯曲， 填充在基片弯曲后形成的弧形槽内。 如果没有 柔性材料层， 当基片 120材料为 Si02、 SiN等脆性较大的材料时， 拉伸过 程中容易发生断裂， 使得竖直基板阵列在拉伸成平面基板阵列之前在基 片处断裂， 基板个数较少且基板尺寸很小的情况下， 增加了拉伸的难度。 采用柔性材料层连接相邻的基板避免了由于基片拉伸断裂而导致基板阵 列断开的问题， 在拉伸过程中， 可以将多个基板拉伸成在同一平面上相 连的平面基板阵列， 提高了器件制作的效率以及成品率。 [0080] Then, the entire substrate structure is smoothly stretched from both ends of the vertical substrate array such that the first trench and the second trench are pulled apart to form a planar substrate array, as shown in FIG. Schematic of an array of planar substrates. The plurality of substrates 150 are inverted by 90°, and the substrate 120 is curved into an arc shape to connect adjacent substrates. The plurality of substrates are perpendicular to the vertical sidewalls of the curved substrate, and the adjacent substrates 120 have opposite bending curvatures. . The operating temperature for stretching the substrate is from 0 ° C to 300 ° C, preferably from 10 ° C to 90 ° C. Within this temperature range, the flexible material layer 180 softens and bends with the substrate 120. , filled in an arcuate groove formed after the substrate is bent. If there is no flexible material layer, when the material of the substrate 120 is a material having a relatively high brittleness such as SiO 2 or SiN, the film is easily broken during stretching, so that the vertical substrate array is broken at the substrate before being stretched into a planar substrate array. When the number of substrates is small and the substrate size is small, the difficulty of stretching is increased. The use of a layer of flexible material to join adjacent substrates avoids the problem of the substrate array being broken due to tensile fracture of the substrate. During the stretching process, the plurality of substrates can be stretched into a planar substrate array connected in the same plane. Improve the efficiency of device fabrication and yield.
[0081】另外， 当使用聚对二甲苯等柔性聚合物作为基片 120时， 聚对二甲 苯等聚合物材料本身具有柔韧性， 在拉伸过程中不易断裂， 结合所述柔 性材料层 180, 可进一步增加基片的柔韧度， 同时将多个基板拉伸成在同 一平面上相连的平面基板阵列， 同样可以提高器件制作的效率以及成品 [0081] In addition, when a flexible polymer such as parylene is used as the substrate 120, polyparadimethylene The polymer material such as benzene itself has flexibility and is not easily broken during stretching. In combination with the flexible material layer 180, the flexibility of the substrate can be further increased, and at the same time, the plurality of substrates are stretched into a plane connected on the same plane. Substrate array can also improve the efficiency of device fabrication and finished products
[0082】随后，对器件进行后续加工。 例如上文所述的在第一沟槽和第二沟 槽的侧面形成器件的操作可以在将竖直基板阵列拉伸为一个平面基板阵 列之后执行。 可选地， 在形成平面基板阵列之后， 可以将柔性材料层 180 腐蚀掉， 以便于分离各个基板， 如图 14所示。 每个分离的基板构成独立 的器件 190。去除柔性材料层 180可以利用半导体及微机械***加工技术 领域公知的工艺技术进行。 [0082] Subsequently, the device is subsequently processed. The operation of forming devices on the sides of the first trench and the second trench, for example, as described above, may be performed after stretching the vertical substrate array into a planar substrate array. Alternatively, after forming the planar substrate array, the flexible material layer 180 may be etched away to facilitate separation of the individual substrates, as shown in FIG. Each separate substrate constitutes a separate device 190. Removal of the flexible material layer 180 can be carried out using process techniques well known in the art of semiconductor and micromechanical system processing.
[0083】以上已经根据本发明的方法形成了多个基板相连的结构。所述基板 结构有效地利用了衬底的厚度， 在不增加整个晶圆尺寸的前提下， 获得 更多可加工的晶圆片的表面积， 提高晶圆的利用率。 而且， 通过在所述 基片的表面形成柔性材料层， 在拉伸竖直基板阵列形成多个基板相连的 平面基板阵列过程中， 即使由于所述基片脆性过大发生断裂， 相邻的基 板还可以通过柔性材料层相连， 较容易的实现将多个基板拉伸成分布在 同一个平面上的平面基板阵列状态， 否则由于基片断裂， 相邻的基板之 间断开， 对于连在一起的少数几个基板， 难于将其分开或是拉伸成共面 排列。 因此本发明的方法提高了器件结构的加工效率和成品率。  [0083] The structure in which a plurality of substrates are connected has been formed in accordance with the method of the present invention. The substrate structure effectively utilizes the thickness of the substrate to obtain more surface area of the processable wafer and increase the utilization of the wafer without increasing the overall wafer size. Moreover, by forming a layer of flexible material on the surface of the substrate, in the process of forming a planar substrate array in which a plurality of substrates are connected by stretching the vertical substrate array, even if the substrate is broken due to excessive brittleness, the adjacent substrate It is also possible to connect through a layer of flexible material, and it is relatively easy to stretch a plurality of substrates into a planar substrate array distributed on the same plane, otherwise the adjacent substrates are broken due to the breakage of the substrate, A few substrates are difficult to separate or stretch into a coplanar arrangement. The method of the present invention therefore improves the processing efficiency and yield of the device structure.
[0084] 虽然关于示例实施例及其优点已经详细说明，应当理解在不脱离本发 明的精神和所附权利要求限定的保护范围的情况下，可以对这些实施例进行 各种变化、 替换和修改。 对于其他例子， 本领域的普通技术人员应当容易理 解在保持本发明保护范围内的同时， 工艺步骤的次序可以变化。 [0084] While the invention has been described with respect to the preferred embodiments and the embodiments of the embodiments of the invention . For other examples, one of ordinary skill in the art will readily appreciate that the order of process steps can be varied while remaining within the scope of the invention.
[0085】此外， 本发明的应用范围不局限于说明书中描述的特定实施例的工 艺、 机构、 制造、 物质组成、 手段、 方法及步骤。 从本发明的公开内容， 作 为本领域的普通技术人员将容易地理解，对于目前已存在或者以后即将开发 出的工艺、 机构、 制造、 物质组成、 手段、 方法或步骤， 其中它们执行与本 发明描述的对应实施例大体相同的功能或者获得大体相同的结果，依照本发 明可以对它们进行应用。 因此，本发明所附权利要求旨在将这些工艺、机构、 制造、 物质组成、 手段、 方法或步骤包含在其保护范围内。 Further, the scope of application of the present invention is not limited to the process, mechanism, manufacture, composition, means, methods and steps of the specific embodiments described in the specification. From the disclosure of the present invention, it will be readily understood by those skilled in the art that the processes, mechanisms, manufactures, compositions, means, methods, or steps that are presently present or will be developed in the Corresponding embodiments of the described embodiments have substantially the same function or obtain substantially the same results, in accordance with the present invention They can be applied to them. Therefore, the appended claims are intended to cover such modifications, such as

Claims

权 利 要 求 Rights request
1、 一种基板结构， 其特征在于， 包括： A substrate structure, comprising:
基板阵列， 所述基板阵列包括按照预定方向排列在同一平面上的多 个基板， 每个所述基板具有第一表面和与之相对的第二表面， 所述基板 阵列排列在与所述基板第一表面平行的平面上；  a substrate array, the substrate array including a plurality of substrates arranged in a same direction on a same plane, each of the substrates having a first surface and a second surface opposite thereto, the substrate array being arranged on the substrate a plane parallel to the surface;
多个基片， 其连接所述相邻基板；  a plurality of substrates connected to the adjacent substrate;
柔性材料层， 所述柔性材料层位于至少部分所述基片表面和\或至少 部分基板表面上。  A layer of flexible material, the layer of flexible material being on at least a portion of the surface of the substrate and/or at least a portion of the surface of the substrate.
2、 根据权利要求 1所述的基板结构， 其中所述基板和与其连接的基 片的直立侧壁垂直。  2. The substrate structure of claim 1 wherein the substrate is perpendicular to the upstanding sidewalls of the substrate to which it is attached.
3、 根据权利要求 1所述的基板结构， 其中所述基片的材料包括： 绝 缘材料、 金属、 半导体材料、 聚合物或其组合。  3. The substrate structure according to claim 1, wherein the material of the substrate comprises: an insulating material, a metal, a semiconductor material, a polymer, or a combination thereof.
4、根据权利要求 1所述的基板结构，其中所述柔性材料层包括金属、 聚合物、 纳米材料或其组合。  4. The substrate structure of claim 1 wherein the layer of flexible material comprises a metal, a polymer, a nanomaterial, or a combination thereof.
5、 根据权利要求 4所述的基板结构， 其中所述金属包括： 金、 铝、 银、 铜、 钛或其组合。  5. The substrate structure of claim 4, wherein the metal comprises: gold, aluminum, silver, copper, titanium, or a combination thereof.
6、 根据权利要求 4所述的基板结构， 其中所述聚合物包括： 硅胶、 聚丙烯、 有机玻璃、 丙烯酸树脂、 丙烯酸、 PMMA、 Polycast, 透明合成 树脂、 树脂玻璃、 聚对二甲苯、 环氧树脂、 聚碳酸酯、 聚硅酮、 聚氨酯、 聚酰胺、 含氟聚合物、 聚烯烃、 胶原、 几丁质， 甲壳素、 藻朊酸纤维、 聚乙烯吡咯烷酮、 聚乙二醇、 聚氧化乙烯， 聚环氧乙烷、 聚乙烯醇、 聚 乙二醇乳酸、 聚乳酸、 聚己内酯、 聚氨基酸、 水凝胶、 聚二甲基硅氧烷 ( PDMS )或其组合； 以及  6. The substrate structure according to claim 4, wherein the polymer comprises: silica gel, polypropylene, plexiglass, acrylic resin, acrylic, PMMA, Polycast, transparent synthetic resin, plexiglass, parylene, epoxy Resin, polycarbonate, silicone, polyurethane, polyamide, fluoropolymer, polyolefin, collagen, chitin, chitin, alginic acid fiber, polyvinylpyrrolidone, polyethylene glycol, polyethylene oxide, Polyethylene oxide, polyvinyl alcohol, polyethylene glycol lactic acid, polylactic acid, polycaprolactone, polyamino acid, hydrogel, polydimethylsiloxane (PDMS) or a combination thereof;
所述纳米材料包括纳米管、 石墨烯或其组合。  The nanomaterials include nanotubes, graphene, or a combination thereof.
7、 根据权利要求 1、 3或 6所述的基板结构， 其中所述柔性材料层 的厚度为 0.1~100 μ πι。  7. The substrate structure according to claim 1, 3 or 6, wherein the flexible material layer has a thickness of 0.1 to 100 μm.
8、 根据权利要求 1、 3或 6所述的基板结构， 其中所述柔性材料层 的厚度为 1~30 μ πι。 8. The substrate structure according to claim 1, 3 or 6, wherein the flexible material layer has a thickness of 1 to 30 μm.
9、 根据权利要求 1所述的基板结构， 还包括至少在所述基板的第一 表面和 /或第二表面形成的界面层。 9. The substrate structure of claim 1, further comprising an interface layer formed at least on the first surface and/or the second surface of the substrate.
10、 根据权利要求 1 所述的基板结构， 其中所述基板材料包括： 单 晶 Si、 单晶 Ge、 单晶 SiGe、 多晶 Si、 多晶 Ge、 多晶 SiGe、 非晶 Si、 非 晶 Ge、 非晶 SiGe、 III-V或 II-VI族化合物半导体或其组合。  10. The substrate structure according to claim 1, wherein the substrate material comprises: single crystal Si, single crystal Ge, single crystal SiGe, polycrystalline Si, polycrystalline Ge, polycrystalline SiGe, amorphous Si, amorphous Ge An amorphous SiGe, III-V or II-VI compound semiconductor or a combination thereof.
11、 根据权利要求 1 所述的基板结构， 其中所述基片的厚度小于所 述基板厚度的 1/3 , 所述基板的厚度为基板第一表面和第二表面之间的距 离。  11. The substrate structure according to claim 1, wherein a thickness of the substrate is less than 1/3 of a thickness of the substrate, and a thickness of the substrate is a distance between a first surface and a second surface of the substrate.
12、 根据权利要求 1 所述的基板结构， 其中所述基片具有第一表面 和与其相对的第二表面， 所述柔性材料层位于所述基片的第一表面和第 二表面上。  12. The substrate structure of claim 1, wherein the substrate has a first surface and a second surface opposite thereto, the layer of flexible material being on the first and second surfaces of the substrate.
13、 根据权利要求 1 所述的基板结构， 其中所述基片至少部分材料 与基板的材料相同。  13. The substrate structure according to claim 1, wherein the substrate is at least partially made of the same material as the substrate.
14、 一种用于半导体器件的基板结构的制造方法， 其特征在于， 包 括如下步骤：  A method of fabricating a substrate structure for a semiconductor device, comprising the steps of:
a )提供衬底，所述衬底包括第一表面和与第一表面相对的第二表面； b )对所述衬底的第一表面和第二表面进行构图；  a) providing a substrate comprising a first surface and a second surface opposite the first surface; b) patterning the first surface and the second surface of the substrate;
c )从所述衬底的第一表面形成至少两个第一沟槽； 以及从所述衬底 的第二表面形成至少一个第二沟槽， 其中每个所述第二沟槽位于相邻的 两个所述第一沟槽之间， 从而形成至少两个基板和至少一个基片构成的 竖直基板阵列；  c) forming at least two first trenches from the first surface of the substrate; and forming at least one second trench from the second surface of the substrate, wherein each of the second trenches is adjacent Between the two first trenches, thereby forming an array of vertical substrates composed of at least two substrates and at least one substrate;
d )在竖直基板阵列的至少部分基片表面和 \或至少部分基板表面上形 成柔性材料层；  d) forming a layer of flexible material on at least a portion of the substrate surface and/or at least a portion of the substrate surface of the vertical substrate array;
e )拉伸所述竖直基板阵列形成平面基板阵列。  e) stretching the array of vertical substrates to form a planar substrate array.
15、 根据权利要求 14所述的方法， 其中在所述步骤 c )和 d )之间或 者在步骤 e )之后在所述基板上形成器件。  15. A method according to claim 14, wherein a device is formed on the substrate between the steps c) and d) or after step e).
16、 根据权利要求 14所述的方法， 其中所述基片的至少部分材料与 所述衬底材料相同。  16. The method of claim 14 wherein at least a portion of the material of the substrate is the same as the substrate material.
17、 根据权利要求 14所述的方法， 其中所述步骤 d ) 中的柔性材料 层通过喷涂、 CVD、 PVD、 ALD、 蒸镀、 旋涂或其组合的工艺所形成。17. The method of claim 14 wherein said flexible material in step d) The layers are formed by processes such as spray coating, CVD, PVD, ALD, evaporation, spin coating, or a combination thereof.
18、 根据权利要求 14或 17所述的方法， 其中所述柔性材料层包括 金属、 聚合物、 纳米材料或其组合。 18. The method of claim 14 or 17, wherein the layer of flexible material comprises a metal, a polymer, a nanomaterial, or a combination thereof.
19、 根据权利要求 18所述的方法， 其中所述金属包括： 金、 铝、 银、 铜、 钛或其组合。  19. The method of claim 18, wherein the metal comprises: gold, aluminum, silver, copper, titanium, or a combination thereof.
20、 根据权利要求 18所述的方法， 其中所述聚合物包括： 硅胶、 聚 丙烯、 有机玻璃、 丙烯酸树脂、 丙烯酸、 PMMA、 Polycast, 透明合成树 脂、 树脂玻璃、 聚对二甲苯、 环氧树脂、 聚碳酸酯、 聚硅酮、 聚氨酯、 聚酰胺、 含氟聚合物、 聚烯烃、 胶原、 几丁质， 甲壳素、 藻朊酸纤维、 聚乙烯吡咯烷酮、 聚乙二醇、 聚氧化乙烯， 聚环氧乙烷、 聚乙烯醇、 聚 乙二醇乳酸、 聚乳酸、 聚己内酯、 聚氨基酸、 水凝胶、 聚二甲基硅氧烷 ( PDMS )或其组合以及  20. The method according to claim 18, wherein the polymer comprises: silica gel, polypropylene, plexiglass, acrylic resin, acrylic acid, PMMA, Polycast, transparent synthetic resin, plexiglass, parylene, epoxy resin , polycarbonate, silicone, polyurethane, polyamide, fluoropolymer, polyolefin, collagen, chitin, chitin, alginic acid fiber, polyvinylpyrrolidone, polyethylene glycol, polyethylene oxide, poly Ethylene oxide, polyvinyl alcohol, polyethylene glycol lactic acid, polylactic acid, polycaprolactone, polyamino acid, hydrogel, polydimethylsiloxane (PDMS) or a combination thereof
所述纳米材料包括纳米管、 石墨烯或其组合。  The nanomaterials include nanotubes, graphene, or a combination thereof.
21、 根据权利要求 14、 18或 20所述的方法， 其中所述柔性材料层 的厚度为 0.1~100 μ ιη。  The method according to claim 14, 18 or 20, wherein the flexible material layer has a thickness of 0.1 to 100 μm.
22、 根据权利要求 14、 18或 20所述的方法， 其中所述柔性材料层 的厚度为 1~30 μ ιη。  22. The method of claim 14, 18 or 20, wherein the layer of flexible material has a thickness of from 1 to 30 μm.
23、 根据权利要求 14所述的方法， 其中所述步骤 e ) 中拉伸步骤包 括： 沿所述预定方向拉伸所述竖直基板阵列， 以使连接相邻基板间的基 片弯曲成弧形， 所述基板具有第一表面和与之相对的第二表面， 且所述 基板的第一表面和第二表面与弧形基片的直立侧壁垂直， 所述多个基板 的第一表面和第二表面分别在相互平行的两个平面上。  23. The method according to claim 14, wherein the stretching step in the step e) comprises: stretching the vertical substrate array in the predetermined direction to bend a substrate connecting adjacent substrates into an arc Forming, the substrate has a first surface and a second surface opposite thereto, and the first surface and the second surface of the substrate are perpendicular to the upstanding sidewall of the curved substrate, the first surface of the plurality of substrates And the second surface are respectively on two planes parallel to each other.
24、 根据权利要求 14或 23述的方法， 其中所述步骤 e ) 中拉伸步骤 操作的温度为 0°C ~300 °C。  24. A method according to claim 14 or 23, wherein the temperature of the stretching step in step e) is from 0 °C to 300 °C.
25、 根据权利要求 14、 23或 24述的方法， 其中所述步骤 e ) 中拉伸 步骤操作的温度为 10°C ~90 °C。  The method according to claim 14, 23 or 24, wherein the temperature of the stretching step in the step e) is from 10 ° C to 90 ° C.
26、 根据权利要求 14或 23所述的方法， 其中所述步骤 e ) 中， 相邻 的所述弯曲基片弯曲方向相反， 基片弯曲形成弧形槽。  The method according to claim 14 or 23, wherein in the step e), the adjacent curved substrates are bent in opposite directions, and the substrate is bent to form an arcuate groove.
27、 根据权利要求 26所述的方法， 所述弯曲基片形成的弧形槽内具 有所述柔性材料。 27. The method according to claim 26, wherein the curved substrate is formed in an arcuate groove There is the flexible material.
28、 根据权利要求 14或 26所述的方法， 其中所述步骤 e )之后还包 括除去所述柔性材料的步骤。  28. A method according to claim 14 or 26, wherein said step e) further comprises the step of removing said flexible material.
29、 根据权利要求 14所述的方法， 在所述步骤 a )还包括： 在所述 衬底的上表面和下表面形成基片层。  29. The method of claim 14, further comprising: forming a substrate layer on the upper and lower surfaces of the substrate.
30、 根据权利要求 14所述的方法， 其中在所述步骤 c )和 d )之间或 者在所述步骤 d ) 和 e )之间还包括如下步骤： 将竖直基板阵列从衬底上 分离出来。  30. The method according to claim 14, wherein between the steps c) and d) or between the steps d) and e), the method further comprises the steps of: separating the vertical substrate array from the substrate come out.
31、 根据权利要求 14或 29所述的方法， 所述基片的材料包括： 绝 缘层、 金属层、 聚合物、 半导体材料及其组合。  31. The method of claim 14 or 29, the material of the substrate comprising: an insulating layer, a metal layer, a polymer, a semiconductor material, and combinations thereof.
32、 根据权利要求 29所述的方法， 其中所述步骤 c ) 中形成第一沟 槽和第二沟槽的步骤包括： 从所述衬底的第一表面刻蚀多个第一沟槽， 并停止在所述第二表面的基片层上； 以及从所述衬底的第二表面刻蚀多 个第二沟槽， 并停止在所述第一表面的基片层上。  32. The method according to claim 29, wherein the forming the first trench and the second trench in the step c) comprises: etching a plurality of first trenches from the first surface of the substrate, And stopping on the substrate layer of the second surface; and etching a plurality of second trenches from the second surface of the substrate and stopping on the substrate layer of the first surface.
33、 根据权利要求 29所述的方法， 其中步骤 b ) 包括：  33. The method of claim 29, wherein step b) comprises:
在所述第一表面的基片层上形成具有多个开口的光刻胶；  Forming a photoresist having a plurality of openings on the substrate layer of the first surface;
刻蚀所述基片层， 以去除所述第一表面的多个开口处的基片层； 去除所述光刻胶；  Etching the substrate layer to remove the substrate layer at the plurality of openings of the first surface; removing the photoresist;
在所述第二表面的基片层上形成具有多个开口的光刻胶；  Forming a photoresist having a plurality of openings on the substrate layer of the second surface;
刻蚀所述基片层， 以去除第二表面的多个开口处的基片层； 去除所述光刻胶。  The substrate layer is etched to remove the substrate layer at the plurality of openings of the second surface; the photoresist is removed.
34、 根据权利要求 32所述的方法， 其中步骤 c ) 中形成所述第一沟 槽和第二沟槽的方法包括干法刻蚀、 湿法刻蚀或其组合。  34. The method of claim 32, wherein the forming the first trench and the second trench in step c) comprises dry etching, wet etching, or a combination thereof.
35、 根据权利要求 14所述的方法， 其中步骤 c )还包括至少在所述 第一沟槽和 /或第二沟槽的侧壁形成界面层的步骤。  35. The method of claim 14, wherein step c) further comprises the step of forming an interfacial layer at least on sidewalls of the first trench and/or the second trench.
36、 根据权利要求 32所述的方法， 其中至少所述第一沟槽和第二沟 槽之一的深度至少大于所述基板厚度与相邻基板之间间隔之和。  36. The method of claim 32, wherein at least one of the first trench and the second trench has a depth that is at least greater than a sum of a thickness of the substrate and an interval between adjacent substrates.
37、 根据权利要求 32或 36所述的方法， 其中所述基片的厚度小于 所述基板厚度的 1/3。  37. The method of claim 32 or 36, wherein the substrate has a thickness less than 1/3 of the thickness of the substrate.
PCT/CN2012/070534 2011-01-24 2012-01-18 Substrate structure for semiconductor device manufacturing and method for manufacturing same WO2012100703A1 (en)

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