WO2012099436A2 - Method for manufacturing a light-emitting diode, and light-emitting diode manufactured thereby - Google Patents

Method for manufacturing a light-emitting diode, and light-emitting diode manufactured thereby Download PDF

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WO2012099436A2
WO2012099436A2 PCT/KR2012/000549 KR2012000549W WO2012099436A2 WO 2012099436 A2 WO2012099436 A2 WO 2012099436A2 KR 2012000549 W KR2012000549 W KR 2012000549W WO 2012099436 A2 WO2012099436 A2 WO 2012099436A2
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emitting diode
semiconductor layer
light emitting
nanostructure
manufacturing
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PCT/KR2012/000549
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French (fr)
Korean (ko)
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WO2012099436A3 (en
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이종람
김종욱
손준호
송양희
김범준
유철종
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포항공과대학교 산학협력단
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Publication of WO2012099436A2 publication Critical patent/WO2012099436A2/en
Publication of WO2012099436A3 publication Critical patent/WO2012099436A3/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0091—Scattering means in or on the semiconductor body or semiconductor body package

Definitions

  • the present invention relates to a method of manufacturing a light emitting diode and a light emitting diode manufactured by the method, and more particularly, dry etching process tailored to a mask material in forming a nanostructure on the upper semiconductor layer of the light emitting diode through dry etching.
  • the present invention relates to a method for maximizing light extraction efficiency of a light emitting diode and a light emitting diode manufactured by the method.
  • the white light source gallium nitride-based light emitting diodes have various types of energy conversion efficiency, long life, good light directivity, low voltage driving, no preheating time, no complicated driving circuit, and strong against shock and vibration. It is easy to implement high-quality lighting systems and is expected to be a solid-state lighting source that will replace light sources such as incandescent, fluorescent and mercury lamps in the near future.
  • the gallium nitride-based light emitting diodes In order to use the gallium nitride-based light emitting diodes as a white light source to replace the existing mercury lamps or fluorescent lamps, the gallium nitride-based light emitting diodes must not only have excellent thermal stability but also can emit high power at low power consumption.
  • Horizontal gallium nitride-based light emitting diodes which are widely used as white light sources, have the advantages of low manufacturing cost and simple manufacturing process, but they are disadvantageous in that they are not suitable for use as high power sources with high applied current and large area. .
  • the device developed for overcoming the disadvantages of the horizontal structured light emitting diode and applying a large area high power light emitting diode is a vertical structured light emitting diode, and the vertical structured light emitting diode has various advantages compared with the conventional horizontal structured light emitting diode.
  • Vertical structured light emitting diodes can achieve very uniform current spreading due to small current spreading resistance, resulting in lower operating voltage and greater light output, and smooth heat dissipation through a thermally conductive metal or semiconductor substrate. This allows longer device life and significantly improved high power operation. Accordingly, the maximum applied current is increased in the vertical light emitting diode compared to the horizontal light emitting diode, and thus it is expected to be widely used as a white light source for illumination.
  • a portion that can greatly improve the light output of the device is an n-type semiconductor layer on the top of the device. Since there is a big difference between the refractive index of the n-type semiconductor layer made of a smooth plane and the refractive index of the atmosphere, as shown in FIG. 1A, total reflection occurs at the interface of the air / semiconductor layer, and a large part of the light generated in the active layer falls out. Because it can not come out, high light output cannot be expected. Therefore, as shown in FIG.
  • a nanostructure having an angle of 23.5 o corresponding to the total reflection critical angle at the interface of the air / semiconductor layer is artificially formed on the surface of the semiconductor layer to prevent total reflection from occurring, thereby allowing the light to escape to the outside with minimal loss. It is necessary to do
  • pyramid-shaped nanostructures are formed on the n-type semiconductor surface by wet etching using a basic solution such as KOH or NaOH, thereby greatly improving light extraction of the light emitting diode.
  • the pyramid structure formation method using wet etching requires not only the formation of a protective film to prevent the n-type electrode, the conductive substrate, and the light emitting diode mesa structure from being damaged during the wet etching process, but also through the wet etching process.
  • the technical problem is that it is difficult to form a uniform nanostructure of large area.
  • the pyramidal nanostructures formed by wet etching the gallium nitride semiconductor surface have an angle of about 32 o as shown in FIG. 2, but the nanostructures can be adjusted through wet etching, but the angle cannot be adjusted. There was a limit in maximizing the light extraction efficiency by adjusting the tilt angle of the structure.
  • the present invention is to solve the above problems of the prior art, the present invention can overcome the problems caused by wet etching using dry etching, as well as the side of the nanostructure formed on the semiconductor layer constituting the light emitting diode It is possible to effectively control the inclination angle, to provide a method of manufacturing a light emitting diode that can form a pattern of light extraction efficiency is maximized.
  • Another object of the present invention is to provide a light emitting diode having a very effective pattern for light extraction.
  • the present invention provides a method of manufacturing a light emitting diode in which the active layer and the second semiconductor layer is sequentially formed on the first semiconductor layer, the step of coating a nanostructure on the second semiconductor layer, Dry etching together with the second semiconductor layer using the nanostructure as a mask to form an uneven portion in the second semiconductor layer, wherein the nanostructure is a material that is easier to dry etch than the second semiconductor layer. And controlling a dry etching condition in consideration of the difference in etching speed between the second semiconductor layer and the nanostructure, thereby controlling the inclination angle of the side surfaces of the uneven portion formed in the second semiconductor.
  • the second semiconductor layer may be made of gallium nitride.
  • the nanostructure may be made of one or more selected from silica (SiO 2 ), ZnO, aluminum oxide, MgO, TiO 2 , SnO 2 , lithium oxide, indium oxide, copper oxide. .
  • the nanostructures may be spherical, wherein the spherical nanostructures may be a mixture of two or more kinds having different diameters, of the spherical nanostructures It is preferable that the diameter is 100 nm-3 micrometers.
  • the dry etching condition may be an etching time.
  • the surface of the second semiconductor can be surface treated before the dry etching.
  • after the formation of the uneven portion may further comprise the step of growing a nanowire or nanorods on the uneven portion.
  • the second semiconductor layer may be n-type having an n-face.
  • the present invention provides a light emitting diode, characterized in that as the light emitting diode in the above-described method, wherein the uneven portion is made of a conical or truncated cone.
  • the angle between the side surface of the conical or truncated conical concave-convex portion and the normal direction of the second semiconductor layer is 30 ° or less.
  • Application of the semiconductor patterning technology according to the present invention can increase the light output more than three times compared to the vertical light emitting diode having the conventional flat n-type semiconductor surface, and is conventionally known as wet etching which is most effective for light extraction. Since the result equivalent to that can be obtained, it can be used suitably for a high output light emitting diode.
  • the present invention can be immediately applied to the manufacturing process of the gallium nitride-based light emitting diode which is widely used now, and can be applied to not only vertical but also horizontal light emitting diode structure.
  • the method according to the present invention is characterized in that it is possible to form various nanostructures by changing the dry etching conditions without using electron beam lithography patterning, which is expensive to manufacture and difficult to apply to a large area wafer process.
  • the area can be applied, manufacturing cost can be reduced, and process time can be reduced.
  • FIG. 1 is a view for explaining the formation of the total surface reflection at the semiconductor / air interface formed in the present invention and the surface structure corresponding to the total reflection critical angle to effectively remove it.
  • FIG. 2 is a scanning electron micrograph showing a cross section of a pyramid nanostructure formed by the most representative wet etching.
  • FIG. 3 is a view for explaining a method of forming nanostructures having various inclination angles according to etching time during dry etching.
  • FIG. 4 is a scanning electron micrograph showing a flat light emitting diode surface and a state in which a spherical silica nanostructure is coated on the light emitting diode surface.
  • FIG. 5 illustrates an uneven portion having different inclination angles when the etching time of the n-type gallium nitride-based vertical light emitting diode manufactured according to the embodiment of the present invention is changed to 4 minutes, 5 minutes, 6 minutes, and 7 minutes, respectively. Scanning electron micrograph showing the condition.
  • 6A, 6B, and 6C are vertical light emitting diodes each having no concave-convex portions in the n-type semiconductor layer, and vertical concave-convex portions (four-minute dry etching) of FIG. 5 according to the first embodiment of the present invention. It is an optical micrograph of a light emitting diode in which a pyramid-shaped concave-convex portion as shown in FIG. 2 is formed through a type light emitting diode and wet etching.
  • FIG. 7 shows electroluminescence spectra of light emitting diodes manufactured as shown in FIGS. 6a, 6b and 6c.
  • FIG. 8 is a view schematically illustrating a state in which nanowires or nanorods are additionally formed between the valleys of the concave-convex portions after the conical concave-convex portions are formed on the semiconductor surface of the n-type gallium nitride-based vertical light emitting diode of the present invention.
  • FIG. 8 is a view schematically illustrating a state in which nanowires or nanorods are additionally formed between the valleys of the concave-convex portions after the conical concave-convex portions are formed on the semiconductor surface of the n-type gallium nitride-based vertical light emitting diode of the present invention.
  • sphere means not only a sphere of mathematical definition of a three-dimensional shape consisting of all points at the same distance from one point, but also encompassing all apparently rounded shapes, and a 'nano structure'.
  • 1 is a view for explaining the light extraction efficiency of the light emitting diode using the conical surface structure formed in the present invention.
  • the present inventors have developed a method for patterning a semiconductor surface capable of realizing a uniform conical shape on the surface of the semiconductor substrate.
  • the patterning process for forming a light emitting diode according to the present invention comprises a spherical nanostructure coating process and a dry etching process on a semiconductor surface.
  • a vertical light emitting diode is used, but a horizontal light emitting diode may also be used.
  • Vertical light emitting diodes are sequentially connected to a conductive substrate, a p-type semiconductor layer (first semiconductor layer), and can reflect light generated from the bottom, a p-type semiconductor layer, an active layer, and an n-type semiconductor layer (second semiconductor). Layer) were formed sequentially, and the p-type and n-type semiconductor layers were all made of gallium nitride.
  • a 500 nm diameter spherical nanostructure (particle) made of silica (SiO 2 ) is coated on a surface of an n-type semiconductor layer of the vertical light emitting diode to form a uniform single layer.
  • silica particles are used as spherical nanostructures.
  • nanostructures made of glass or metal oxides may be used.
  • dry etching of the nanostructure and the n-type semiconductor layer is performed by dry etching the silica structure by using the uniformly coated silica nanostructure as a mask, taking into account the difference in the etching rate of the silica nanostructure and the n-type gallium nitride semiconductor layer.
  • the side inclination angle of the uneven portion formed on the n-type gallium nitride semiconductor layer is adjusted.
  • 3A to 3D schematically show a process of changing the shape of the uneven portion formed on the n-type semiconductor layer through a dry etching process. That is, when dry etching is performed after coating the spherical nanostructure on the n-type semiconductor layer, the inclination angle of the sidewalls formed on the n-type semiconductor layer changes as the etching proceeds, and the present invention provides a nanostructure and an n-type semiconductor.
  • the etching conditions in consideration of the difference in etching speed between the layers, it is characterized in that the uneven portion having an inclination angle of 30 ° or less, which is difficult to implement by wet etching, is formed.
  • the dry etching method may be used as long as the method can be used to etch the nanostructure and the n-type semiconductor layer used as a mask, in the embodiment of the present invention ICP (Inductive Coupled Plasma) etching equipment (etcher) Dry etching was performed.
  • ICP Inductive Coupled Plasma
  • etcher etching equipment
  • the spherical silica nanostructures 500 nm in diameter are first dropped on the substrate, and then spin coating is started for about 1 minute so that the nanostructures can be dispersed on the substrate.
  • Spin coating starts in stages, first spin coating at 200 rpm for 1 minute, then 30 seconds at 800 rpm, and finally 10 seconds at 1200 rpm.
  • Figure 4a shows a flat n-type semiconductor surface before patterning
  • Figure 4b is a photograph showing a spherical silica nanostructure formed on the surface of the vertical light emitting diode by spin coating method. It can be seen from FIG. 4b that the spherical nanostructure is uniformly formed on the n-type semiconductor surface through the method according to the embodiment of the present invention.
  • the substrate on which the spherical silica nanostructures are uniformly coated is subjected to dry etching using an ICP (Inductive Coupled Plasma) etching equipment. Dry etching was performed by mixing Cl 2 and BCl 3 gas in a 7: 3 ratio, where plasma power was etched using a chuck bias of -300 Volt at about 300 Watts.
  • ICP Inductive Coupled Plasma
  • n-type semiconductor formed by uniformly coating a spherical silica nanostructure on a dry etching time of 4 minutes, 5 minutes, 6 minutes, and 7 minutes using an inductive coupled plasma (ICP) etching apparatus.
  • ICP inductive coupled plasma
  • SEM Scanning electron microscope
  • FIG. 5 the shape of the uneven portion formed as the etching time increases from the truncated cone to the conical shape, and the angle between the side surface of the conical uneven portion and the normal direction of the n-type semiconductor layer (hereinafter referred to as an inclination angle) ) Also varies from 28.7 ° to 44 °.
  • the change in the inclination angle may be due to different etching rates (etching ratios) for dry etching of the silica nanostructure and the gallium nitride based semiconductor substrate.
  • an n-type electrode was formed of Cr / Au using an electron beam deposition method.
  • 6A, 6B, and 6C are vertical light emitting diodes each having no concave-convex portions in the n-type semiconductor layer, and vertical concave-convex portions (four-minute dry etching) of FIG. 5 according to the first embodiment of the present invention. It is an optical micrograph of a light emitting diode in which a pyramid-shaped concave-convex portion as shown in FIG. 2 is formed through a type light emitting diode and wet etching.
  • FIG. 7 shows electroluminescence spectra of light emitting diodes manufactured as shown in FIGS. 6a, 6b and 6c. From this, when the uniform conical irregularities are formed on the n-type semiconductor surface according to the embodiment of the present invention, it is confirmed that the light output can be increased by about three times or more, compared to the flat n-type semiconductor, and wet etching. It is confirmed that the light output characteristic is higher than that of the vertical light emitting diode in which the pyramidal irregularities are formed.
  • the present invention by using dry etching, not only the problem of the uneven portion forming method through wet etching can be solved, but also the light emitting diode which can obtain light extraction efficiency equal to or higher than that of the light emitting diode using wet etching. It can be prepared.
  • FIG. 8 is a view schematically illustrating a state in which nanowires or nanorods are additionally formed between the valleys of the concave-convex portions after the conical concave-convex portions are formed on the semiconductor surface of the n-type gallium nitride-based vertical light emitting diode of the present invention.
  • FIG. 8 is a view schematically illustrating a state in which nanowires or nanorods are additionally formed between the valleys of the concave-convex portions after the conical concave-convex portions are formed on the semiconductor surface of the n-type gallium nitride-based vertical light emitting diode of the present invention.
  • the hydrothermal synthesis method which can grow large area can be used. Specifically, zinc nitrate hexahydrate, a precursor of Zn ions, and Hexame (HMT), an OH ion precursor, are added to deionized water to form a reaction aqueous solution.
  • HMT Hexame
  • the light emitting diode substrate on which the conical concave-convex portion is formed is immersed in the reaction aqueous solution and synthesized at 70 ° C. for 3 hours, nanowires and / or nanorods are formed between the conical concave-convex portions as shown in FIG. 8.
  • the light extraction efficiency may be increased by increasing the probability that light generated in the light emitting layer of the light emitting diode is emitted to the atmosphere by multiple scattering.

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Abstract

The present invention relates to a method for manufacturing a light-emitting diode, in which the tilt angle of a convex-concave portion formed in a semiconductor layer are adjusted through the variation of a dry-etching condition using the difference between etching speeds (etching rates) of a nanostructure and a semiconductor layer during dry etching, to thereby improve light extraction efficiency. The present invention also relates to a light-emitting diode manufactured by the method. The present invention is a method for manufacturing a light-emitting diode in which an active layer and a second semiconductor layer are sequentially formed on a first semiconductor layer, wherein the method comprises: a step of coating a nanostructure onto the second semiconductor layer; and a step of dry-etching the nanostructure together with the second semiconductor layer using the nanostructure as a mask, to thus form a convex-concave portion in the second semiconductor layer. The nanostructure uses a material which enables easier dry-etching than the material of the second semiconductor layer, and a dry-etching condition is set in consideration of the difference in the etching rate between the second semiconductor layer and the nanostructure, so as to adjust the tilt angle of the side surface of the convex-concave portion formed in the second semiconductor layer.

Description

발광다이오드 제조방법 및 이에 의해 제조된 발광다이오드Method for manufacturing light emitting diodes and light emitting diodes manufactured thereby
본 발명은 발광다이오드의 제조방법과 이 방법에 의해 제조된 발광다이오드에 관한 것으로, 보다 상세하게는 건식에칭을 통해 발광다이오드의 상부 반도체층 상에 나노구조체를 형성함에 있어서 마스크 재료에 맞춘 건식에칭 공정조건의 조절을 통해, 발광다이오드의 광 추출 효율을 극대화할 수 있는 방법과 이 방법에 의해 제조된 발광다이오드에 관한 것이다.The present invention relates to a method of manufacturing a light emitting diode and a light emitting diode manufactured by the method, and more particularly, dry etching process tailored to a mask material in forming a nanostructure on the upper semiconductor layer of the light emitting diode through dry etching. By adjusting the conditions, the present invention relates to a method for maximizing light extraction efficiency of a light emitting diode and a light emitting diode manufactured by the method.
백색광원 질화갈륨계 발광다이오드는 에너지 변환효율이 좋고, 수명이 길며, 빛의 지향성이 좋고, 저전압 구동이 가능하며, 예열 시간과 복잡한 구동회로가 필요하지 않고, 충격 및 진동에 강하기 때문에 다양한 형태의 고품격 조명 시스템을 구현하기에 용이하여, 가까운 미래에 백열등, 형광등, 수은등과 같은 광원을 대체할 고체 조명(solid-state lighting) 광원으로 기대되고 있다.The white light source gallium nitride-based light emitting diodes have various types of energy conversion efficiency, long life, good light directivity, low voltage driving, no preheating time, no complicated driving circuit, and strong against shock and vibration. It is easy to implement high-quality lighting systems and is expected to be a solid-state lighting source that will replace light sources such as incandescent, fluorescent and mercury lamps in the near future.
이러한 질화갈륨계 발광다이오드가 기존의 수은등이나 형광등을 대체하여 백색광원으로서 광범위하게 사용되기 위해서는 열적 안정성이 뛰어나야 할 뿐만 아니라 낮은 소비 전력에서도 고출력의 빛을 발할 수 있어야 한다.In order to use the gallium nitride-based light emitting diodes as a white light source to replace the existing mercury lamps or fluorescent lamps, the gallium nitride-based light emitting diodes must not only have excellent thermal stability but also can emit high power at low power consumption.
현재 백색광원으로 널리 이용되고 있는 수평구조의 질화갈륨계 발광다이오드는 상대적으로 제조단가가 낮고 제작 공정이 간단하다는 장점이 있으나, 인가전류가 높고 면적이 큰 고출력의 광원으로 쓰이기에는 부적절하다는 단점이 있다.Horizontal gallium nitride-based light emitting diodes, which are widely used as white light sources, have the advantages of low manufacturing cost and simple manufacturing process, but they are disadvantageous in that they are not suitable for use as high power sources with high applied current and large area. .
이러한 수평구조 발광다이오드의 단점을 극복하고 대면적의 고출력 발광다이오드 적용을 위해 개발된 소자가 수직구조 발광다이오드인데, 수직구조 발광다이오드는 기존의 수평구조 소자와 비교하여 여러 가지 장점이 있다. 수직구조 발광다이오드는 작은 전류 확산 저항으로 인해 매우 균일한 전류 확산을 얻을 수 있기 때문에 보다 낮은 작동 전압과 큰 광출력을 얻을 수 있고, 열전도성이 좋은 금속 또는 반도체 기판을 통해 원활한 열방출이 가능하기 때문에 보다 긴 소자 수명과 월등히 향상된 고출력 작동이 가능하다. 이에 따라 수직구조 발광다이오드에서는 최대 인가전류가 수평구조 발광다이오드에 비해 증가하므로 조명용 백색광원으로 널리 이용될 것으로 전망되고 있다.The device developed for overcoming the disadvantages of the horizontal structured light emitting diode and applying a large area high power light emitting diode is a vertical structured light emitting diode, and the vertical structured light emitting diode has various advantages compared with the conventional horizontal structured light emitting diode. Vertical structured light emitting diodes can achieve very uniform current spreading due to small current spreading resistance, resulting in lower operating voltage and greater light output, and smooth heat dissipation through a thermally conductive metal or semiconductor substrate. This allows longer device life and significantly improved high power operation. Accordingly, the maximum applied current is increased in the vertical light emitting diode compared to the horizontal light emitting diode, and thus it is expected to be widely used as a white light source for illumination.
질화갈륨계 수직형 발광다이오드에 있어 소자의 광출력을 크게 향상시킬 수 있는 부분은 소자 상부의 n형 반도체층이다. 매끄러운 평면으로 이루어진 n형 반도체층의 굴절률과 대기의 굴절률에는 큰 차이가 있기 때문에, 도 1a에 도시된 바와 같이 대기/반도체층 계면에서 일어나는 전반사가 발생하여 활성층에서 발생한 빛의 상당부분이 외부로 빠져나올 수 없기 때문에 높은 광출력을 기대할 수 없다. 따라서 도 1b와 같이 반도체층 표면에 대기/반도체층 계면에서의 전반사 임계각에 해당하는 23.5o의 각도를 가지는 나노구조물을 인위적으로 형성하여 전반사가 일어나는 것을 방지하여 최소한의 손실로 빛을 외부로 빠져나오게 하는 것이 필요하다.In the gallium nitride-based vertical light emitting diode, a portion that can greatly improve the light output of the device is an n-type semiconductor layer on the top of the device. Since there is a big difference between the refractive index of the n-type semiconductor layer made of a smooth plane and the refractive index of the atmosphere, as shown in FIG. 1A, total reflection occurs at the interface of the air / semiconductor layer, and a large part of the light generated in the active layer falls out. Because it can not come out, high light output cannot be expected. Therefore, as shown in FIG. 1B, a nanostructure having an angle of 23.5 o corresponding to the total reflection critical angle at the interface of the air / semiconductor layer is artificially formed on the surface of the semiconductor layer to prevent total reflection from occurring, thereby allowing the light to escape to the outside with minimal loss. It is necessary to do
이를 위해 종래에는 n형 반도체 표면을 KOH, NaOH와 같은 염기성 용액을 이용한 습식에칭을 통해 n형 반도체 표면에 피라미드 형태의 나노구조물을 형성함으로써, 발광다이오드의 광추출을 크게 개선하고 있다.To this end, conventionally, pyramid-shaped nanostructures are formed on the n-type semiconductor surface by wet etching using a basic solution such as KOH or NaOH, thereby greatly improving light extraction of the light emitting diode.
그런데, 습식에칭을 이용한 피라미드 구조물 형성 방법의 경우, 습식에칭 과정 중에 n형 전극, 전도성 기판, 발광다이오드 메사 구조 등이 손상되는 것을 방지하기 위한 보호막의 형성이 요구될 뿐 아니라, 습식에칭 과정을 통해서는 기술적으로 대면적의 나노구조물 균일하게 형성하기 어려운 문제점이 있다.However, the pyramid structure formation method using wet etching requires not only the formation of a protective film to prevent the n-type electrode, the conductive substrate, and the light emitting diode mesa structure from being damaged during the wet etching process, but also through the wet etching process. The technical problem is that it is difficult to form a uniform nanostructure of large area.
또한 질화갈륨 반도체 표면의 습식에칭을 이용하여 생성되는 피라미드 형상 나노구조물은 도 2에서처럼 약 32o의 각도를 갖는데, 습식 에칭을 통해서는 나노구조물의 크기를 조절할 수는 있으나 각도 조절이 불가능하기 때문에 나노구조물의 경사각 조절을 통한 광 추출 효율의 극대화에는 한계가 있었다.In addition, the pyramidal nanostructures formed by wet etching the gallium nitride semiconductor surface have an angle of about 32 o as shown in FIG. 2, but the nanostructures can be adjusted through wet etching, but the angle cannot be adjusted. There was a limit in maximizing the light extraction efficiency by adjusting the tilt angle of the structure.
본 발명은 상기한 종래 기술의 문제점을 해결하기 위한 것으로서, 본 발명은 건식에칭을 사용하여 습식에칭에 따른 문제점을 극복할 수 있을 뿐 아니라 발광다이오드를 구성하는 반도체층 상에 형성되는 나노구조물의 측면 경사각을 효과적으로 제어할 수 있어, 광 추출 효율이 극대화된 패턴을 형성할 수 있는 발광다이오드의 제조방법을 제공하는 것이다.The present invention is to solve the above problems of the prior art, the present invention can overcome the problems caused by wet etching using dry etching, as well as the side of the nanostructure formed on the semiconductor layer constituting the light emitting diode It is possible to effectively control the inclination angle, to provide a method of manufacturing a light emitting diode that can form a pattern of light extraction efficiency is maximized.
또한, 본 발명의 다른 과제는 광 추출에 매우 효과적인 패턴이 형성된 발광다이오드를 제공하는 것이다.In addition, another object of the present invention is to provide a light emitting diode having a very effective pattern for light extraction.
상기 과제를 해결하기 위한 수단으로 본 발명은, 제1 반도체층 상에 활성층 및 제2 반도체층이 순차적으로 형성된 발광다이오드의 제조방법으로서, 상기 제2 반도체층 상에 나노구조체를 코팅하는 단계와, 상기 나노구조체를 마스크로 이용하여 상기 제2 반도체층과 함께 건식에칭하여 상기 제2 반도체층에 요철부를 형성하는 단계를 포함하고, 상기 나노구조체는 상기 제2 반도체층에 비해 건식에칭이 용이한 물질을 사용하고, 상기 제2 반도체층과 나노구조체 사이의 에칭속도 차이를 고려하여 건식에칭 조건을 조절함으로써, 상기 제2 반도체에 생성된 요철부의 측면 경사각을 조절하는 것을 특징으로 하는 발광다이오드의 제조방법을 제공한다.As a means for solving the above problems, the present invention provides a method of manufacturing a light emitting diode in which the active layer and the second semiconductor layer is sequentially formed on the first semiconductor layer, the step of coating a nanostructure on the second semiconductor layer, Dry etching together with the second semiconductor layer using the nanostructure as a mask to form an uneven portion in the second semiconductor layer, wherein the nanostructure is a material that is easier to dry etch than the second semiconductor layer. And controlling a dry etching condition in consideration of the difference in etching speed between the second semiconductor layer and the nanostructure, thereby controlling the inclination angle of the side surfaces of the uneven portion formed in the second semiconductor. To provide.
또한, 본 발명에 따른 방법에 있어서, 상기 제2 반도체층은 질화갈륨으로 이루어질 수 있다.In the method according to the present invention, the second semiconductor layer may be made of gallium nitride.
또한, 본 발명에 따른 방법에 있어서, 상기 나노구조체는 실리카(SiO2), ZnO, 알루미늄 산화물, MgO, TiO2, SnO2, 리튬 산화물, 인듐 산화물, 구리 산화물 중에서 선택된 1종 이상으로 이루어질 수 있다.In addition, in the method according to the present invention, the nanostructure may be made of one or more selected from silica (SiO 2 ), ZnO, aluminum oxide, MgO, TiO 2 , SnO 2 , lithium oxide, indium oxide, copper oxide. .
또한, 본 발명에 따른 방법에 있어서, 상기 나노구조체는 구 모양일 수 있으며, 이때 상기 구 모양의 나노구조체는 서로 다른 직경을 갖는 2 종 이상의 것이 혼합된 것일 수 있으며, 상기 구 모양의 나노구조체의 직경은 100nm ~ 3㎛인 것이 바람직하다.In addition, in the method according to the present invention, the nanostructures may be spherical, wherein the spherical nanostructures may be a mixture of two or more kinds having different diameters, of the spherical nanostructures It is preferable that the diameter is 100 nm-3 micrometers.
또한, 본 발명에 따른 방법에 있어서, 상기 건식에칭 조건은 에칭시간일 수 있다.In addition, in the method according to the present invention, the dry etching condition may be an etching time.
또한, 본 발명에 따른 방법에 있어서, 상기 건식에칭 전에 상기 제2 반도체 표면을 표면처리할 수 있다. Further, in the method according to the invention, the surface of the second semiconductor can be surface treated before the dry etching.
또한, 본 발명에 따른 방법에 있어서, 상기 요철부를 형성한 후에 상기 요철부 상에 추가로 나노선 또는 나노막대를 성장시키는 단계를 포함할 수 있다.In addition, in the method according to the present invention, after the formation of the uneven portion may further comprise the step of growing a nanowire or nanorods on the uneven portion.
또한, 본 발명에 따른 방법에 있어서, 상기 제2 반도체층은 n-face를 갖는 n형일 수 있다.In the method according to the present invention, the second semiconductor layer may be n-type having an n-face.
또한, 상기 다른 과제를 해결하기 위해 본 발명은, 상기한 방법으로 발광다이오드로서, 상기 요철부는 원추형 또는 절두원추형으로 이루어진 것을 특징으로 하는 발광다이오드를 제공한다.In another aspect, the present invention provides a light emitting diode, characterized in that as the light emitting diode in the above-described method, wherein the uneven portion is made of a conical or truncated cone.
또한, 본 발명에 따른 발광다이오드에 있어서, 상기 원추형 또는 절두원추형 요철부의 측면과 상기 제2 반도체층의 법선방향 사이의 각도는 30°이하인 것을 특징으로 한다.In the light emitting diode according to the present invention, the angle between the side surface of the conical or truncated conical concave-convex portion and the normal direction of the second semiconductor layer is 30 ° or less.
본 발명에 따른 반도체의 패터닝 기술을 적용하게 되면 종래의 평편한 n형 반도체 표면을 가지는 수직 발광다이오드에 비해 광출력을 3 배 이상 증가시킬 수 있으며, 종래에 광추출에 가장 효과적이라고 알려진 습식에칭에 의한 것과 동등한 결과를 얻을 수 있기 때문에, 고출력 발광다이오드에 적합하게 사용될 수 있다.Application of the semiconductor patterning technology according to the present invention can increase the light output more than three times compared to the vertical light emitting diode having the conventional flat n-type semiconductor surface, and is conventionally known as wet etching which is most effective for light extraction. Since the result equivalent to that can be obtained, it can be used suitably for a high output light emitting diode.
또한, 본 발명은 현재 널리 사용되고 있는 질화물갈륨계 발광다이오드의 제조공정에 즉시 적용할 수 있고, 수직형뿐만 아니라 수평형 발광 다이오드 구조에도 적용할 수 있다.In addition, the present invention can be immediately applied to the manufacturing process of the gallium nitride-based light emitting diode which is widely used now, and can be applied to not only vertical but also horizontal light emitting diode structure.
또한, 본 발명에 따른 방법은 제조단가가 높으며 대면적 웨이퍼 공정에의 적용이 어려운 전자선 리소그라피 패터닝을 사용하지 않고, 건식 에칭 조건 변화에 의해 다양한 형태의 나노구조물을 형성할 수 있는 특징이 있어, 대면적 적용, 제조단가의 절감, 공정시간 단축 등의 효과를 얻을 수 있다.In addition, the method according to the present invention is characterized in that it is possible to form various nanostructures by changing the dry etching conditions without using electron beam lithography patterning, which is expensive to manufacture and difficult to apply to a large area wafer process. The area can be applied, manufacturing cost can be reduced, and process time can be reduced.
도 1은 본 발명에서 형성한 반도체/대기 계면에서의 전반사와 이를 효과적으로 제거하기 위해 전반사 임계각에 해당하는 표면 구조물을 형성하는 것을 설명하기 위한 도면이다.1 is a view for explaining the formation of the total surface reflection at the semiconductor / air interface formed in the present invention and the surface structure corresponding to the total reflection critical angle to effectively remove it.
도 2는 가장 대표적인 습식에칭에 의해 형성된 피라미드 나노구조물의 단면을 나타내는 주사전자현미경 사진이다. 2 is a scanning electron micrograph showing a cross section of a pyramid nanostructure formed by the most representative wet etching.
도 3은 건식에칭 시 에칭시간에 따라 서로 다른 경사각을 갖는 다양한 형태의 나노구조물 형성 방법을 설명하기 위한 도면이다.FIG. 3 is a view for explaining a method of forming nanostructures having various inclination angles according to etching time during dry etching.
도 4는 편평한 발광다이오드 표면과, 이 발광다이오드 표면에 구형 실리카 나노구조물을 코팅한 상태를 나타내는 주사전자현미경 사진이다.4 is a scanning electron micrograph showing a flat light emitting diode surface and a state in which a spherical silica nanostructure is coated on the light emitting diode surface.
도 5는 본 발명의 실시예에 따라 제조된 n형 질화물갈륨계 수직형 발광다이오드 표면에 에칭 시간을 각각 4분, 5분, 6분 및 7분으로 다르게 할 경우 서로 다른 경사각을 갖는 요철부가 형성된 상태를 보여주는 주사전자현미경 사진이다.FIG. 5 illustrates an uneven portion having different inclination angles when the etching time of the n-type gallium nitride-based vertical light emitting diode manufactured according to the embodiment of the present invention is changed to 4 minutes, 5 minutes, 6 minutes, and 7 minutes, respectively. Scanning electron micrograph showing the condition.
도 6a, 6b 및 6c는 각각 n형 반도체층에 요철부를 형성하지 않은 수직형 발광다이오드, 본 발명의 실시예 1에 따라 도 5의 원추형의 요철부(4분 건식에칭한 것)를 형성한 수직형 발광다이오드, 및 습식에칭을 통해 도 2와 같은 피라미스 형상의 요철부를 형성한 발광다이오드의 광학현미경 사진이다.6A, 6B, and 6C are vertical light emitting diodes each having no concave-convex portions in the n-type semiconductor layer, and vertical concave-convex portions (four-minute dry etching) of FIG. 5 according to the first embodiment of the present invention. It is an optical micrograph of a light emitting diode in which a pyramid-shaped concave-convex portion as shown in FIG. 2 is formed through a type light emitting diode and wet etching.
도 7은 도 6a, 6b 및 6c와 같이 제조한 발광다이오드의 전기 발광 스펙트럼을 나타낸 것이다.FIG. 7 shows electroluminescence spectra of light emitting diodes manufactured as shown in FIGS. 6a, 6b and 6c.
도 8은 본 발명에서의 n형 질화물갈륨계 수직형 발광다이오드의 반도체 표면에 원추형 요철부를 형성한 후, 원추형 요철부의 골 사이에 추가적으로 나노선 또는 나노막대 형성한 상태를 모식적으로 설명하는 도면이다. FIG. 8 is a view schematically illustrating a state in which nanowires or nanorods are additionally formed between the valleys of the concave-convex portions after the conical concave-convex portions are formed on the semiconductor surface of the n-type gallium nitride-based vertical light emitting diode of the present invention. FIG. .
이하에서는, 본 발명의 바람직한 실시예에 기초하여 본 발명을 보다 구체적으로 설명한다. 그러나 하기 실시예는 본 발명의 이해를 돕기 위한 일 예에 불과한 것으로 이에 의해 본 발명의 권리범위가 축소 및 한정되는 것은 아니다.Hereinafter, the present invention will be described in more detail based on the preferred embodiments of the present invention. However, the following examples are merely examples to help the understanding of the present invention, whereby the scope of the present invention is not reduced or limited.
본 발명에 있어서, '구(sphere) 모양'이란 한 점에서 같은 거리에 있는 모든 점으로 이루어진 입체 모양이라는 수학적 정의의 구뿐 아니라, 외견상 둥글게 생긴 형상의 것을 모두 포괄하는 것을 의미하며, '나노구조체'란 크기 10㎛ 이하의 구조체를 의미한다.In the present invention, the term "sphere" means not only a sphere of mathematical definition of a three-dimensional shape consisting of all points at the same distance from one point, but also encompassing all apparently rounded shapes, and a 'nano structure'. 'Means a structure having a size of 10 μm or less.
도 1은 본 발명에서 형성한 원뿔 모양의 표면 구조물을 이용해 발광다이오드의 광 추출 효율 향상을 설명하기 위한 도면이다. 1 is a view for explaining the light extraction efficiency of the light emitting diode using the conical surface structure formed in the present invention.
도 1a에 도시된 바와 같이 매끈한 표면의 반도체 기판의 경우, 질화갈륨 반도체 기판의 굴절률(n~2.5)과 대기의 굴절률(n=1)이 크게 다르기 때문에 전반사에 대한 임계각이 23.5°에 불과하다. 이에 따라 반도체 내부에서 발생한 빛의 상당 부분이 외부로 빠져나오지 못하고, 내부에서 소멸하여 광 추출 효율이 낮은 문제점이 있다. 이에 비해 도 1b와 같이 반도체 표면에 임계각에 해당하는 각도를 가지는 원뿔 형태의 구조물을 형성할 경우, 내부에서 발생한 빛이 대기 중으로 방출될 확률이 급격하게 증가하여 발광다이오드의 광 추출 효율을 크게 향상시킬 수 있으므로, 본 발명자들은 반도체 기판의 표면에 균일한 원뿔형 형상을 구현할 수 있는 반도체 표면의 패터닝 방법을 개발하게 되었다.In the case of the semiconductor substrate having a smooth surface as shown in FIG. 1A, the critical angle for total reflection is only 23.5 ° because the refractive index (n˜2.5) and the atmospheric refractive index (n = 1) of the gallium nitride semiconductor substrate are significantly different. As a result, a large portion of the light generated inside the semiconductor does not escape to the outside, and disappears from the inside, resulting in low light extraction efficiency. On the other hand, when forming a cone-shaped structure having an angle corresponding to the critical angle on the surface of the semiconductor, as shown in Figure 1b, the probability of light emitted from the inside is rapidly increased to greatly improve the light extraction efficiency of the light emitting diode Accordingly, the present inventors have developed a method for patterning a semiconductor surface capable of realizing a uniform conical shape on the surface of the semiconductor substrate.
본 발명에 따른 발광다이오드의 패터닝 형성공정은, 크게 반도체 표면상에 구형 나노구조체 코팅 공정과, 건식에칭 공정을 포함하여 이루어진다.The patterning process for forming a light emitting diode according to the present invention comprises a spherical nanostructure coating process and a dry etching process on a semiconductor surface.
본 발명의 실시예에서는 수직형 발광다이오드를 사용하였으나, 수평형 발광다이오드도 사용될 수 있다. 수직형 발광다이오드는 하부에서 순서대로, 전도성기판, p형 반도체층(제1 반도체층)과 접속하며 발생한 빛을 반사할 수 있는 전극, p형 반도체층, 활성층 및 n형 반도체층(제2 반도체층)이 순차적으로 형성되어 있고, p형과 n형 반도체층은 모두 질화갈륨으로 이루어진 것을 사용하였다.In the embodiment of the present invention, a vertical light emitting diode is used, but a horizontal light emitting diode may also be used. Vertical light emitting diodes are sequentially connected to a conductive substrate, a p-type semiconductor layer (first semiconductor layer), and can reflect light generated from the bottom, a p-type semiconductor layer, an active layer, and an n-type semiconductor layer (second semiconductor). Layer) were formed sequentially, and the p-type and n-type semiconductor layers were all made of gallium nitride.
먼저, 상기 수직형 발광다이오드의 n형 반도체층 표면에 실리카(SiO2)로 이루어진 직경 500nm의 구형 나노구조체(입자)를 균일한 단일층이 형성되도록 코팅한다. 본 발명의 실시예에서는 구형 나노구조체로 실리카 입자를 사용하였으나, 실리카와 다른 에칭비를 필요로 할 경우에는 유리 또는 금속 산화물로 이루어진 나노구조체를 사용할 수도 있다.First, a 500 nm diameter spherical nanostructure (particle) made of silica (SiO 2 ) is coated on a surface of an n-type semiconductor layer of the vertical light emitting diode to form a uniform single layer. In the exemplary embodiment of the present invention, silica particles are used as spherical nanostructures. However, when silica and other etching ratios are required, nanostructures made of glass or metal oxides may be used.
이어서, 균일하게 도포된 실리카 나노구조체를 마스크로 활용하여 에칭조건을 조절하여 나노구조체와 n형 반도체층을 함께 건식에칭하며, 이때 실리카 나노구조체와 n형 질화갈륨 반도체층의 에칭속도의 차이를 고려하여 에칭조건을 설정함으로써, n형 질화갈륨 반도체층 상에 형성되는 요철부의 측면 경사각을 조절한다.Subsequently, dry etching of the nanostructure and the n-type semiconductor layer is performed by dry etching the silica structure by using the uniformly coated silica nanostructure as a mask, taking into account the difference in the etching rate of the silica nanostructure and the n-type gallium nitride semiconductor layer. By setting the etching conditions, the side inclination angle of the uneven portion formed on the n-type gallium nitride semiconductor layer is adjusted.
도 3a 내지 도 3d는 건식에칭 과정을 통해 n형 반도체층 상에 형성되는 요철부의 형상 변화의 과정을 모식적으로 나타낸 것이다. 즉, n형 반도체층 상에 구형 나노구조체를 코팅한 후 건식에칭을 실시하게 되면 에칭이 진행됨에 따라 n형 반도체층 상에 형성되는 요철부의 측면 경사각이 변하며, 본 발명은 나노구조체와 n형 반도체층 간의 에칭속도의 차이를 고려하여 에칭조건을 설정함으로써 습식에칭으로는 구현하기 어려운 30°이하의 경사각을 갖는 요철부를 형성하는데 특징이 있다. 3A to 3D schematically show a process of changing the shape of the uneven portion formed on the n-type semiconductor layer through a dry etching process. That is, when dry etching is performed after coating the spherical nanostructure on the n-type semiconductor layer, the inclination angle of the sidewalls formed on the n-type semiconductor layer changes as the etching proceeds, and the present invention provides a nanostructure and an n-type semiconductor. By setting the etching conditions in consideration of the difference in etching speed between the layers, it is characterized in that the uneven portion having an inclination angle of 30 ° or less, which is difficult to implement by wet etching, is formed.
한편, 건식에칭 방법은 마스크로 사용하는 나노구조체와 n형 반도체층을 함께 에칭할 수 있는 방법이라면 어떤 것이라도 사용할 수 있으며, 본 발명의 실시예에서는 ICP(Inductive Coupled Plasma) 에칭장비(etcher)를 이용하여 건식에칭을 수행하였다.On the other hand, the dry etching method may be used as long as the method can be used to etch the nanostructure and the n-type semiconductor layer used as a mask, in the embodiment of the present invention ICP (Inductive Coupled Plasma) etching equipment (etcher) Dry etching was performed.
스핀 코터를 이용하여 먼저 직경 500nm의 구형 실리카 나노구조체를 기판에 떨어뜨려 놓은 후 나노구조체들이 기판에서 분산될 수 있도록 1분 정도를 유지한 후 스핀 코팅을 시작한다. 스핀 코팅은 단계별로 시작하면 먼저 200rpm에서 1분간 스핀 코팅을 한 후 800rpm에서 30초 마지막으로 1200rpm에서 10초간 코팅을 하여 준다. Using a spin coater, the spherical silica nanostructures 500 nm in diameter are first dropped on the substrate, and then spin coating is started for about 1 minute so that the nanostructures can be dispersed on the substrate. Spin coating starts in stages, first spin coating at 200 rpm for 1 minute, then 30 seconds at 800 rpm, and finally 10 seconds at 1200 rpm.
도 4a는 패터닝 전의 평편한 n형 반도체 표면을 나타내고 있으며 도 4b는 수직 발광다이오드 표면에 스핀 코팅 방법으로 형성된 구 모양의 실리카 재질의 나노구조체를 보여주는 사진이다. 도 4b를 통해 본 발명의 실시예에 따른 방법을 통해 구 모양의 나노구조체가 균일하게 n형 반도체 표면에 형성되었음을 확인할 수 있다.Figure 4a shows a flat n-type semiconductor surface before patterning, Figure 4b is a photograph showing a spherical silica nanostructure formed on the surface of the vertical light emitting diode by spin coating method. It can be seen from FIG. 4b that the spherical nanostructure is uniformly formed on the n-type semiconductor surface through the method according to the embodiment of the present invention.
이와 같이 구형 실리카 나노구조체가 균일하게 코팅되어 있는 기판을 ICP(Inductive Coupled Plasma) 에칭장비를 이용하여 건식에칭을 한다. 건식에칭은 Cl2와 BCl3가스를 7:3비율로 혼합하여 사용을 하며 이때 플라즈마 파워는 약 300Watt에서 척바이어스(chuck bias) -300Volt를 이용해 에칭하였다.As such, the substrate on which the spherical silica nanostructures are uniformly coated is subjected to dry etching using an ICP (Inductive Coupled Plasma) etching equipment. Dry etching was performed by mixing Cl 2 and BCl 3 gas in a 7: 3 ratio, where plasma power was etched using a chuck bias of -300 Volt at about 300 Watts.
도 5는 구형 실리카 나노구조체가 균일하게 코팅되어 있는 기판을 ICP(Inductive Coupled Plasma) 에칭장비를 이용하여 건식에칭 시간을 각각 4분, 5분, 6분, 7분으로 달리하여 형성한 n형 반도체층에 형성된 원뿔 형상의 요철부를 보여주는 주사전자현미경(SEM) 사진이다. 도 5에서 확인되는 바와 같이, 에칭 시간이 증가함에 따라 형성되는 요철부의 형상이 절두 원추형에서 원추형으로 변하며, 원추형 요철부의 측면과 n형 반도체층의 법선방향이 이루는 각도(이하, '경사각'이라 함)도 28.7°에서 44°로 변화하는 것을 보여준다. 이와 같은 경사각의 변화는 실리카 나노구조물과 질화물갈륨계 반도체 기판의 건식에칭에 대한 에칭속도(에칭비)가 서로 다른데 기인하는 것으로 보인다.5 is an n-type semiconductor formed by uniformly coating a spherical silica nanostructure on a dry etching time of 4 minutes, 5 minutes, 6 minutes, and 7 minutes using an inductive coupled plasma (ICP) etching apparatus. Scanning electron microscope (SEM) images showing conical irregularities formed in the layer. As shown in FIG. 5, the shape of the uneven portion formed as the etching time increases from the truncated cone to the conical shape, and the angle between the side surface of the conical uneven portion and the normal direction of the n-type semiconductor layer (hereinafter referred to as an inclination angle) ) Also varies from 28.7 ° to 44 °. The change in the inclination angle may be due to different etching rates (etching ratios) for dry etching of the silica nanostructure and the gallium nitride based semiconductor substrate.
이와 같이 n형 반도체층에 원추형 요철부를 형성한 후, Cr/Au을 전자선증착법을 이용하여 n형 전극을 형성하였다.After forming conical concave-convex portions in the n-type semiconductor layer in this manner, an n-type electrode was formed of Cr / Au using an electron beam deposition method.
도 6a, 6b 및 6c는 각각 n형 반도체층에 요철부를 형성하지 않은 수직형 발광다이오드, 본 발명의 실시예 1에 따라 도 5의 원추형의 요철부(4분 건식에칭한 것)를 형성한 수직형 발광다이오드, 및 습식에칭을 통해 도 2와 같은 피라미스 형상의 요철부를 형성한 발광다이오드의 광학현미경 사진이다.6A, 6B, and 6C are vertical light emitting diodes each having no concave-convex portions in the n-type semiconductor layer, and vertical concave-convex portions (four-minute dry etching) of FIG. 5 according to the first embodiment of the present invention. It is an optical micrograph of a light emitting diode in which a pyramid-shaped concave-convex portion as shown in FIG. 2 is formed through a type light emitting diode and wet etching.
도 7은 도 6a, 6b 및 6c와 같이 제조한 발광다이오드의 전기 발광 스펙트럼을 나타낸 것이다. 이로부터 본 발명의 실시예에 따라 n형 반도체 표면에 균일한 원추형의 요철부를 형성한 경우, 평편한 n형 반도체에 비하여 광 출력이 약 3배 이상 증가할 수 있음이 확인될 뿐 아니라, 습식에칭에 의해 피라미드 형상의 요철부를 형성한 수직형 발광다이오드보다 더 높은 광출력 특성을 나타냄이 확인된다. 즉, 본 발명에 의하면 건식에칭을 사용함으로써, 습식에칭을 통한 요철부 형성방법이 갖는 문제점을 해결할 수 있을 뿐 아니라, 습식에칭을 사용한 발광다이오드와 비교할 때 동등 이상의 광 추출 효율을 얻을 수 있는 발광다이오드를 제조할 수 있게 된다.FIG. 7 shows electroluminescence spectra of light emitting diodes manufactured as shown in FIGS. 6a, 6b and 6c. From this, when the uniform conical irregularities are formed on the n-type semiconductor surface according to the embodiment of the present invention, it is confirmed that the light output can be increased by about three times or more, compared to the flat n-type semiconductor, and wet etching. It is confirmed that the light output characteristic is higher than that of the vertical light emitting diode in which the pyramidal irregularities are formed. That is, according to the present invention, by using dry etching, not only the problem of the uneven portion forming method through wet etching can be solved, but also the light emitting diode which can obtain light extraction efficiency equal to or higher than that of the light emitting diode using wet etching. It can be prepared.
도 8은 본 발명에서의 n형 질화물갈륨계 수직형 발광다이오드의 반도체 표면에 원추형 요철부를 형성한 후, 원추형 요철부의 골 사이에 추가적으로 나노선 또는 나노막대 형성한 상태를 모식적으로 설명하는 도면이다. FIG. 8 is a view schematically illustrating a state in which nanowires or nanorods are additionally formed between the valleys of the concave-convex portions after the conical concave-convex portions are formed on the semiconductor surface of the n-type gallium nitride-based vertical light emitting diode of the present invention. FIG. .
나노선 및/또는 나노막대를 성장시키는 방법으로는, 대면적 성장이 가능한 수열합성법을 사용할 수 있다. 구체적으로, Zn 이온의 전구체인 질산아연6수화물(Znic nitrate hexahydrate)과 OH 이온 전구체인 Hexame(HMT)을 탈이온수에 첨가하여 반응 수용액을 만든다. 그리고 상기 원추형 요철부가 형성된 발광다이오드 기판을 상기 반응 수용액에 침지하여 70℃에서 3시간 동안 합성시키면 도 8과 같이 원추형 요철부 사이에 나노선 및/또는 나노막대가 형성된다. 이와 같이 추가로 나노선 및/또는 나노막대를 형성할 경우, 발광다이오드의 발광층에서 생성된 빛이 다중 산란에 의해 대기 중으로 방출될 확률이 증가하여 광 추출 효율이 보다 증가할 수 있다.As a method of growing a nanowire and / or a nanorod, the hydrothermal synthesis method which can grow large area can be used. Specifically, zinc nitrate hexahydrate, a precursor of Zn ions, and Hexame (HMT), an OH ion precursor, are added to deionized water to form a reaction aqueous solution. When the light emitting diode substrate on which the conical concave-convex portion is formed is immersed in the reaction aqueous solution and synthesized at 70 ° C. for 3 hours, nanowires and / or nanorods are formed between the conical concave-convex portions as shown in FIG. 8. As such, when the nanowires and / or the nanorods are additionally formed, the light extraction efficiency may be increased by increasing the probability that light generated in the light emitting layer of the light emitting diode is emitted to the atmosphere by multiple scattering.

Claims (12)

  1. 제1 반도체층 상에 활성층 및 제2 반도체층이 순차적으로 형성된 발광다이오드의 제조방법으로서,A method of manufacturing a light emitting diode in which an active layer and a second semiconductor layer are sequentially formed on a first semiconductor layer,
    상기 제2 반도체층 상에 나노구조체를 코팅하는 단계와,Coating a nanostructure on the second semiconductor layer;
    상기 나노구조체를 마스크로 이용하여 상기 제2 반도체층과 함께 건식에칭하여 상기 제2 반도체층에 요철부를 형성하는 단계를 포함하고,Dry etching together with the second semiconductor layer using the nanostructure as a mask to form an uneven portion in the second semiconductor layer,
    상기 나노구조체는 상기 제2 반도체층에 비해 건식에칭이 용이한 물질을 사용하고, 상기 제2 반도체층과 나노구조체 사이의 에칭속도 차이를 고려하여 건식에칭 조건을 설정함으로써, 상기 제2 반도체에 생성된 요철부의 측면 경사각을 조절하는 것을 특징으로 하는 발광다이오드의 제조방법.The nanostructure is formed in the second semiconductor by using a material that is easier to dry etch than the second semiconductor layer, and setting dry etching conditions in consideration of the difference in etching rate between the second semiconductor layer and the nanostructure. Method of manufacturing a light emitting diode, characterized in that for adjusting the side inclination angle of the irregularities.
  2. 제 1 항에 있어서,The method of claim 1,
    상기 제2 반도체층은 질화갈륨으로 이루어지는 것을 특징으로 하는 발광다이오드의 제조방법.And the second semiconductor layer is made of gallium nitride.
  3. 제 1 항에 있어서,The method of claim 1,
    상기 나노구조체는 실리카(SiO2), ZnO, 알루미늄 산화물, MgO, TiO2, SnO2, 리튬 산화물, 인듐 산화물, 구리 산화물 중에서 선택된 1종 이상으로 이루어진 것을 특징으로 하는 발광다이오드의 제조방법.The nanostructure is a method of manufacturing a light emitting diode, characterized in that made of one or more selected from silica (SiO 2 ), ZnO, aluminum oxide, MgO, TiO 2 , SnO 2 , lithium oxide, indium oxide, copper oxide.
  4. 제 1 항에 있어서,The method of claim 1,
    상기 나노구조체는 구 모양인 것을 특징으로 하는 발광다이오드의 제조방법.The nanostructure is a manufacturing method of the light emitting diode, characterized in that the spherical shape.
  5. 제 1 항에 있어서, The method of claim 1,
    상기 건식에칭 조건은 에칭시간인 것을 특징으로 하는 발광다이오드의 제조방법.The dry etching condition is a method of manufacturing a light emitting diode, characterized in that the etching time.
  6. 제 1 항에 있어서,The method of claim 1,
    상기 건식에칭 전에 상기 제2 반도체 표면을 표면처리하는 것을 특징으로 하는 발광다이오드의 제조방법.The surface of the second semiconductor surface before the dry etching method of manufacturing a light emitting diode.
  7. 제 1 항에 있어서,The method of claim 1,
    상기 요철부에 추가로 나노선 또는 나노막대를 성장시키는 단계를 포함하는 것을 특징으로 하는 발광다이오드의 제조방법.The method of manufacturing a light emitting diode comprising the step of growing a nanowire or a nanorod in addition to the uneven portion.
  8. 제 1 항에 있어서,The method of claim 1,
    상기 제2 반도체층이 n-face를 갖는 n형인 것을 특징으로 하는 발광다이오드의 제조방법.The second semiconductor layer is n-type having an n-face manufacturing method of a light emitting diode.
  9. 제 4 항에 있어서,The method of claim 4, wherein
    상기 구 모양의 나노구조체는 서로 다른 직경을 갖는 2 종 이상의 것이 혼합된 것을 특징으로 하는 발광다이오드의 제조방법.The spherical nanostructure is a method of manufacturing a light emitting diode, characterized in that two or more kinds having different diameters are mixed.
  10. 제 4 항에 있어서,The method of claim 4, wherein
    상기 구 모양의 나노구조체의 직경은 100nm ~ 3㎛인 것을 특징으로 하는 발광다이오드의 제조방법.The spherical nanostructure has a diameter of 100nm ~ 3㎛ manufacturing method of the light emitting diode.
  11. 제 1 항 내지 제 10 항 중 어느 한 항에 기재된 방법으로 제조되는 발광다이오드로서, 상기 요철부는 원추형 또는 절두원추형으로 이루어진 것을 특징으로 하는 발광다이오드.A light emitting diode manufactured by the method according to any one of claims 1 to 10, wherein the uneven portion is a conical or truncated conical light emitting diode.
  12. 제 11 항에 있어서,The method of claim 11,
    상기 원추형 또는 절두원추형 요철부의 측면과 상기 제2 반도체층의 법선방향 사이의 각도는 30°이하인 것을 특징으로 하는 발광다이오드.The angle between the side surface of the conical or truncated conical concave-convex portion and the normal direction of the second semiconductor layer is 30 ° or less.
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