WO2012050186A1 - Method of producing crystalline silicon-based photovoltaic cell - Google Patents

Method of producing crystalline silicon-based photovoltaic cell Download PDF

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WO2012050186A1
WO2012050186A1 PCT/JP2011/073640 JP2011073640W WO2012050186A1 WO 2012050186 A1 WO2012050186 A1 WO 2012050186A1 JP 2011073640 W JP2011073640 W JP 2011073640W WO 2012050186 A1 WO2012050186 A1 WO 2012050186A1
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silicon
layer
type
based layer
transparent conductive
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PCT/JP2011/073640
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French (fr)
Japanese (ja)
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俊彦 宇都
崇 口山
足立　大輔
山本　憲治
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株式会社カネカ
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Priority to US13/879,367 priority Critical patent/US9276163B2/en
Priority to JP2012538724A priority patent/JPWO2012050186A1/en
Publication of WO2012050186A1 publication Critical patent/WO2012050186A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/208—Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method for manufacturing a crystalline silicon photoelectric conversion device having a heterojunction on the surface of a single crystal silicon substrate.
  • a crystalline silicon photoelectric conversion device provided with a crystalline silicon substrate has high photoelectric conversion efficiency, and is widely put into practical use as a photovoltaic power generation system.
  • a crystalline silicon photoelectric conversion device having a conductive amorphous silicon-based layer having a band gap different from that of single-crystal silicon on the surface of a single-crystal silicon substrate is called a heterojunction solar cell.
  • those having an intrinsic amorphous silicon-based layer between a conductive amorphous silicon-based layer and a crystalline silicon substrate are in the form of a crystalline silicon photoelectric conversion device having the highest conversion efficiency.
  • the Defect levels are generated by depositing the conductive amorphous silicon layer by forming an intrinsic amorphous silicon layer between the crystalline silicon substrate and the conductive amorphous silicon layer.
  • defects mainly silicon dangling bonds
  • existing on the surface of the crystalline silicon substrate are terminated with hydrogen (passivation).
  • the presence of the intrinsic amorphous silicon-based layer can prevent the carrier-introduced impurity from diffusing to the surface of the crystalline silicon substrate when forming the conductive amorphous silicon-based layer.
  • a transparent conductive layer is formed on the surface of the conductive amorphous silicon-based layer.
  • This transparent conductive layer preferably has high light transmittance and low resistance.
  • a transparent conductive metal oxide such as crystalline indium tin composite oxide (ITO) is used.
  • ITO crystalline indium tin composite oxide
  • a collector electrode is formed on the transparent conductive layer.
  • Ag paste or the like is used as the material.
  • Patent Document 1 discloses that, in manufacturing a solar cell using a crystalline silicon substrate, after applying a conductive paste, heat treatment is performed at 300 ° C. to 700 ° C. in a hydrogen atmosphere.
  • Patent Document 1 it is reported that the metal oxide contained in the glass frit in the conductive paste is reduced by hydrogen by heat treatment, so that both high adhesive strength and low electrical contact resistance are compatible.
  • Patent Document 2 discloses that in the production of a flexible solar cell, the resistance of the transparent electrode is reduced by performing a heat treatment after the electrode is formed.
  • Patent Document 3 a thin film solar cell using microcrystalline silicon as a photoelectric conversion layer and a conductive type layer is heat-treated in a low oxygen partial pressure atmosphere for 1 hour or more, so that the doped impurities in the conductive microcrystalline silicon layer are reduced. It is disclosed to activate and improve electrical properties.
  • a silicon-based layer and a transparent conductive layer are formed at a low temperature of less than 200 ° C. Therefore, when a heat treatment is performed at a high temperature as in Patent Document 1, diffusion of doped impurities from the conductive amorphous silicon-based layer to the intrinsic amorphous silicon-based layer, or from the transparent conductive layer to the silicon-based layer is performed. Since diffusion of different elements occurs, there is a problem that impurity levels and defect levels are formed and conversion efficiency is lowered. In addition, in the heterojunction solar cell, even when heat treatment at a low temperature as disclosed in Patent Documents 2 and 3 is performed, the conversion characteristics are not improved, and the conversion characteristics decrease as the heating time increases. There was a trend. In view of these, an object of the present invention is to improve conversion characteristics of a heterojunction solar cell.
  • the present inventors have found that, in the manufacture of heterojunction solar cells, it is possible to improve photoelectric conversion characteristics by performing heat treatment under predetermined conditions after forming the transparent conductive layer. And made the present invention.
  • the present invention has an intrinsic silicon-based layer, a p-type silicon-based layer, and a transparent conductive layer in this order on one surface of a conductive single crystal silicon substrate, and an intrinsic silicon-based layer on the other surface of the conductive single crystal silicon substrate.
  • the present invention relates to a method of manufacturing a crystalline silicon-based photoelectric conversion device having a layer, an n-type silicon-based layer, and a transparent conductive layer in this order.
  • heat treatment is performed after at least one transparent conductive layer is formed. This heat treatment is performed at a temperature lower than 200 ° C. in an atmosphere containing hydrogen.
  • the p-type silicon-based layer is preferably formed with a thickness of 3 nm to 8 nm.
  • the p-type silicon-based layer is preferably a p-type amorphous silicon-based layer.
  • an n-type amorphous silicon-based layer and an n-type microcrystalline silicon-based layer are sequentially formed from the second intrinsic silicon-based layer side.
  • the heat treatment is performed in a hydrogen-containing atmosphere, whereby the conversion characteristics of the heterojunction solar cell are improved.
  • a first intrinsic silicon-based layer 2 is formed on one surface of a one-conductivity-type single-crystal silicon substrate 1, and a second intrinsic silicon-based layer 4 is formed on the other surface.
  • a p-type silicon-based layer 3 and an n-type silicon-based layer 5 are formed on the respective surfaces of the first intrinsic silicon-based layer 2 and the second intrinsic silicon-based layer 4.
  • a first transparent conductive layer 6 and a second transparent conductive layer 8 are formed on the respective surfaces of the p-type silicon-based layer 3 and the n-type silicon-based layer 5.
  • a collector electrode is formed at least on the transparent conductive layer on the light incident side. In FIG. 1, collector electrodes 7 and 9 are formed on both the light incident side and the back side.
  • a single crystal silicon substrate contains impurities that supply charges to silicon and has conductivity.
  • a p-type single crystal silicon substrate having an impurity (for example, boron atom) into which is introduced is introduced. That is, “one conductivity type” in this specification means either n-type or p-type.
  • the heterojunction on the incident side where the light incident on the single crystal silicon substrate is absorbed most is a reverse junction. If the heterojunction on the light incident side is a reverse junction, a strong electric field is provided, and electron / hole pairs can be efficiently separated and recovered. On the other hand, when holes and electrons are compared, electrons having smaller effective mass and scattering cross section generally have higher mobility. From the above viewpoint, it is preferable that the single conductivity type single crystal silicon substrate 1 used in the present invention is an n type single crystal silicon substrate.
  • One having layer 4 / n-type single crystal silicon substrate 1 / intrinsic silicon-based layer 4 / n-type silicon-based layer 5 / transparent conductive layer 8 / collecting electrode 9 in this order is mentioned.
  • the n-type silicon-based layer (also referred to as n layer) side is the back surface side. From the viewpoint of light confinement, a texture (uneven structure) is preferably formed on the surface of the single crystal silicon substrate.
  • a silicon-based layer is formed on the surface of the single crystal silicon substrate 1.
  • plasma CVD is preferable.
  • the conditions for forming the silicon-based layer by plasma CVD for example, a substrate temperature of 100 to 300 ° C., a pressure of 20 to 2600 Pa, and a high frequency power density of 0.004 to 0.8 W / cm 2 are preferably used.
  • a silicon-containing gas such as SiH 4 or Si 2 H 6 or a mixture of these gases and H 2 is used as a source gas.
  • a dopant gas for forming the p layer or the n layer B 2 H 6 or PH 3 is preferably used.
  • a mixed gas in which the dopant gas is previously diluted with a raw material gas or H 2 can also be used.
  • a gas containing a different element such as CH 4 , CO 2 , NH 3 , GeH 4
  • a silicon alloy layer such as silicon carbide, silicon nitride, silicon germanium or the like is manufactured as a silicon-based layer. It may be membraned.
  • the intrinsic silicon layers 2 and 4 are substantially intrinsic non-doped silicon thin films.
  • the intrinsic silicon-based layers 2 and 4 are preferably intrinsic hydrogenated amorphous silicon substantially consisting of silicon and hydrogen.
  • the film thickness of the intrinsic silicon-based layers 2 and 4 is preferably 3 to 16 nm, more preferably 4 to 14 nm, and further preferably 5 to 12 nm. If the thickness of the intrinsic silicon-based layer is excessively small, the interface is caused by the diffusion of impurity atoms in the conductive silicon-based layers 3 and 5 to the surface of the single crystal silicon substrate and the deterioration of the coverage of the surface of the single crystal silicon substrate. Defects tend to increase. On the other hand, if the thickness of the intrinsic silicon-based layer is excessively large, the conversion characteristics may be deteriorated due to an increase in resistance or an increase in light absorption loss.
  • a p-type silicon-based layer 3 is formed on the first intrinsic silicon-based layer 2.
  • the p-type silicon-based layer is preferably an amorphous silicon-based layer such as a p-type hydrogenated amorphous silicon layer, a p-type amorphous silicon carbide layer, or a p-type oxidized amorphous silicon layer. Since the amorphous silicon-based layer can be formed at a lower power density than the microcrystalline silicon-based layer, diffusion of impurity atoms to the surface of the single crystal silicon substrate is suppressed.
  • a p-type hydrogenated amorphous silicon layer is preferable from the viewpoint of suppressing impurity diffusion and reducing series resistance.
  • a p-type amorphous silicon carbide layer or a p-type oxidized amorphous silicon layer is preferable as a wide-gap low-refractive index layer in terms of reducing optical loss.
  • the thickness of the p-type silicon-based layer 3 is preferably in the range of 3 nm to 50 nm.
  • the conductive layer (p-type silicon-based layer 3 and n-type silicon-based layer 5) is a layer necessary for taking out carriers to the transparent conductive layer, and if the thickness is too small, the carrier movement tends to be controlled. On the other hand, if the thickness of the conductive layer is too large, it tends to cause light absorption loss.
  • the p layer and the n layer need to have a thickness of about 15 nm in order to form a diffusion potential. .
  • the p-layer and n-layers required for forming a diffusion potential are smaller in thickness than a thin-film solar cell. Therefore, in the heterojunction solar cell, it is particularly preferable to reduce the film thickness of the conductive layer disposed on the light incident side.
  • the p-layer thickness is preferably small.
  • the film thickness of the p-type silicon-based layer 3 is more preferably 15 nm or less, further preferably 10 nm or less, and particularly preferably 8 nm or less.
  • n-type silicon-based layer 5 is formed on the second intrinsic silicon-based layer 4.
  • the n-type silicon-based layer 5 may be constituted by a single layer of an n-type amorphous silicon-based layer or an n-type microcrystalline silicon-based layer, and as shown in FIG. It may be configured.
  • the n-type silicon-based layer 5 is preferably composed of two layers of an n-type amorphous silicon-based layer 51 and an n-type microcrystalline silicon-based layer 52 as shown in FIG.
  • the n-type silicon-based layer is an n-type microcrystalline silicon-based layer
  • the crystallinity of the transparent conductive layer 8 formed thereon can be improved, so that a good ohmic junction is formed at the interface. And has the advantage.
  • an n-type amorphous silicon-based layer 51 is formed on the intrinsic silicon-based layer 4 with a film thickness of about 5 nm to 20 nm, an n-type microcrystal is formed thereon.
  • the power required for forming the n-type microcrystalline silicon-based layer can be reduced. Therefore, in the case where the n-type silicon-based layer 5 is composed of two layers, an n-type amorphous silicon-based layer 51 and an n-type microcrystalline silicon-based layer 52, the diffusion of doped impurities into the intrinsic silicon-based layer 4 And film formation damage is reduced.
  • n-type amorphous silicon-based layer an n-type hydrogenated amorphous silicon layer or an n-type amorphous silicon nitride layer is preferable because good bonding characteristics with an adjacent layer can be easily obtained.
  • the n-type microcrystalline silicon-based layer include an n-type microcrystalline silicon layer, an n-type microcrystalline silicon carbide layer, and an n-type microcrystalline silicon oxide layer. From the viewpoint of suppressing the generation of defects inside the n layer, an n-type microcrystalline silicon layer to which impurities other than doped impurities are not actively added is preferably used.
  • the effective optical gap can be widened and the refractive index is also reduced. , Optical merit is obtained.
  • the thickness of the n-type silicon-based layer 5 is preferably in the range of 5 nm to 50 nm. As shown in FIG. 2, when the n-type silicon-based layer is composed of two layers of an n-type amorphous silicon-based layer 51 and an n-type microcrystalline silicon-based layer 52, the n-type amorphous silicon-based layer The film thickness of 51 is preferably 5 nm or more, and more preferably 10 nm or more. By setting the thickness of the n-type amorphous silicon-based layer 51 in the above range, the power density when forming the n-type microcrystalline silicon-based layer 52 thereon can be kept low.
  • the film thickness of the n-type microcrystalline silicon-based layer 52 is preferably 5 nm or more, and more preferably 10 nm or more. By setting the thickness of the n-type microcrystalline silicon-based layer 52 within the above range, the crystallinity of the transparent conductive layer 8 formed thereon can be improved. On the other hand, if the film thickness of the n-type amorphous silicon-based layer or the n-type microcrystalline silicon-based layer is excessively large, conversion characteristics may be deteriorated due to light absorption by the doped impurities. Therefore, the film thickness of the n-type amorphous silicon-based layer is preferably 20 nm or less, and more preferably 15 nm or less. Further, the film thickness of the n-type microcrystalline silicon-based layer is preferably 30 nm or less, and more preferably 20 nm or less.
  • a first transparent conductive layer 6 and a second transparent conductive layer 8 are formed on the p-type silicon-based layer 3 and the n-type silicon-based layer 5, respectively.
  • the film thickness of the first and second transparent conductive layers is preferably 10 nm or more and 140 nm or less from the viewpoint of transparency and conductivity.
  • the role of the transparent conductive layer is to transport carriers to the collector electrode, and it is only necessary to have conductivity necessary for that purpose.
  • a transparent conductive layer that is too thick may cause a decrease in transmittance due to its own absorption loss, resulting in a decrease in photoelectric conversion efficiency.
  • a thin film made of a transparent conductive metal oxide such as indium oxide, tin oxide, zinc oxide, titanium oxide or a composite oxide thereof is generally used.
  • a transparent conductive metal oxide such as indium oxide, tin oxide, zinc oxide, titanium oxide or a composite oxide thereof.
  • indium composite oxides mainly composed of indium oxide are preferable.
  • ITO indium tin composite oxide
  • Both the first transparent conductive layer and the second transparent conductive layer can be formed by a known method.
  • film forming methods include sputtering, metal organic chemical vapor deposition (MOCVD), thermal CVD, plasma CVD, molecular beam epitaxy (MBE), and pulsed laser deposition (PLD).
  • MOCVD metal organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • PLD pulsed laser deposition
  • sputtering is preferably used for forming an indium composite oxide layer such as ITO.
  • the substrate temperature at the time of forming the transparent conductive layer may be appropriately set, but is preferably 200 ° C. or lower. When the temperature is higher than that, hydrogen is desorbed from the silicon-based layer, and a dangling bond is generated in the silicon atom, which may become a carrier recombination center.
  • collector electrodes 7 and 9 for taking out current are formed on the transparent conductive layers 6 and 8.
  • the collector electrode can be produced by a known technique such as inkjet, screen printing, wire bonding, spraying, etc., but screen printing is preferable from the viewpoint of productivity.
  • screen printing method a process of printing a conductive paste composed of metal particles and a resin binder by screen printing is preferably used.
  • At least the collecting electrode on the light incident side is patterned into a shape such as a comb pattern in order to increase the light incident area to the solar battery cell.
  • the collector electrode on the side opposite to the light incident side may be patterned or may not be patterned.
  • the metal electrode 10 opposite to the light incident side is formed on substantially the entire surface of the transparent conductive layer, the light that has not been absorbed by the silicon substrate is absorbed by the metal electrode layer. It can act as a reflective layer that suppresses leakage to the outside.
  • a metal layer such as Ag or Al may be formed as a reflective layer between the transparent conductive layer and the collector electrode or the metal electrode layer.
  • a heat treatment step is performed in an atmosphere containing hydrogen.
  • the heat treatment may be performed after at least one of the first transparent conductive layer 6 and the second transparent conductive layer 8 is formed. From the viewpoint of enhancing the conversion characteristic improvement effect, after the first transparent conductive layer 6 is formed, or after both the first transparent conductive layer and the second transparent conductive layer are formed, heat treatment is performed in a hydrogen atmosphere. Are preferred.
  • the heat treatment may be performed after the collector electrode and the reflective electrode are formed on the transparent conductive layer.
  • heat treatment for the purpose of solidifying a conductive paste used for the collector electrode or the reflective electrode may be performed in an atmosphere containing hydrogen.
  • the heat treatment in an atmosphere containing hydrogen according to the present invention can be performed also as the heat treatment for electrode formation. Therefore, it is possible to improve the conversion efficiency without adding a new process.
  • the heat treatment temperature in an atmosphere containing hydrogen is less than 200 ° C. If the heating temperature is too high, diffusion of doped impurities from the conductive silicon-based layers 3 and 5 to the intrinsic silicon-based layers 2 and 4 and diffusion of different elements from the transparent conductive layer to the silicon-based layers may occur. And defect levels are formed, and the open circuit voltage and short circuit current density tend to decrease. On the other hand, if the heating temperature is too low, the effect of improving the conversion characteristics may not be sufficiently obtained, or the heat treatment may take a long time. Therefore, the heating temperature is preferably 130 ° C. or higher, more preferably 150 ° C. or higher, and further preferably 160 ° C. or higher.
  • the hydrogen concentration during the heat treatment is not particularly limited, but if the hydrogen concentration is too low, the effect of improving the conversion characteristics may not be sufficiently obtained. Moreover, when hydrogen concentration is too high, the conductive oxide which comprises a transparent conductive layer may be reduce
  • the heat treatment time can be appropriately set according to the above hydrogen concentration and heating temperature.
  • the heating time is preferably 5 minutes to 120 minutes, more preferably 20 minutes to 90 minutes, and even more preferably 30 minutes to 60 minutes. If the heating time is too short, the effect of improving the conversion characteristics according to the present invention may not be sufficiently obtained. Moreover, when heating time is too long, in addition to being inferior to productivity, the conversion efficiency by the conductive oxide which comprises a transparent conductive layer may be reduced may be caused.
  • the heat treatment in the present invention does not act to improve the conductivity type layer by activating the doped impurities. Furthermore, in the present invention, the heat treatment tends to improve not only the fill factor but also the open circuit voltage. In general, it is considered that the open circuit voltage does not improve even when the resistance of the transparent conductive layer is lowered. Considering these, in the present invention, it is considered that the improvement of the interface characteristics by the heat treatment contributes to the improvement of the conversion characteristics.
  • oxygen damage during film formation of the transparent conductive layer is repaired by heat treatment in an atmosphere containing hydrogen.
  • a transparent conductive layer made of ITO is formed by sputtering
  • oxygen bonding defects Si--
  • Si-- oxygen bonding defects
  • the heat treatment of the present invention is not performed under high energy application conditions such as hydrogen plasma treatment or under high temperature conditions, and the activation energy required for termination of dangling bonds of silicon hydride on the surface of the silicon-based layer It is considered that energy exceeding the barrier is not applied.
  • silicon hydride having oxygen bond defects has a strain in the lattice structure, and therefore, the activity necessary for repairing defects such as dangling bonds compared to silicon hydride having no oxygen bond defects.
  • the chemical energy is small. Therefore, in the present invention, it is considered that even when heating is performed at a low temperature of less than 200 ° C., oxygen bond defects and dangling bonds adjacent to the oxygen bond defects are repaired and conversion characteristics are improved.
  • the transparent conductive layer is also formed at the interface between the p-layer and the intrinsic silicon-based layer.
  • oxygen damage during film formation and a decrease in open circuit voltage and fill factor.
  • defects at the interface between the p-layer and the intrinsic silicon-based layer can be repaired by heat treatment under an atmosphere containing hydrogen, so that the open-circuit voltage and the fill factor are improved and the short-circuit current density is increased. It is possible to achieve both improvement.
  • the conversion characteristic improvement effect according to the present invention tends to become more prominent, and a heterojunction solar cell having high conversion characteristics can be obtained.
  • the above heat treatment may be performed in two or more stages.
  • at least one stage of heat treatment may be performed in an atmosphere containing hydrogen.
  • the film thickness was obtained by observing the cross section with a transmission electron microscope (TEM). Note that it is difficult to identify the interface between the intrinsic silicon-based layer and the conductive silicon-based layer by TEM observation. Therefore, the film thicknesses of these layers were calculated from the ratio between the total thickness of each layer determined from TEM observation and the film formation time. For the layer formed on the surface of the silicon substrate on which the texture was formed, the direction perpendicular to the texture slope was defined as the film thickness direction.
  • the photoelectric conversion characteristics of the photoelectric conversion device were evaluated using a solar simulator.
  • Example 1 a crystalline silicon-based photoelectric conversion device schematically shown in FIG. 1 was manufactured.
  • An n-type single crystal silicon substrate having a plane orientation of the incident surface of (100) and a thickness of 200 ⁇ m was washed in acetone. Thereafter, the substrate was immersed in a 2 wt% HF aqueous solution for 3 minutes to remove the silicon oxide film on the surface, and then rinsed with ultrapure water twice.
  • the silicon substrate was immersed in a 5/15 wt% KOH / isopropyl alcohol aqueous solution maintained at 70 ° C. for 15 minutes, and the substrate surface was etched to form a texture. Thereafter, rinsing with ultrapure water was performed twice.
  • the surface of the single crystal silicon substrate 1 was observed with an atomic force microscope (manufactured by AFM Pacific Nanotechnology), the substrate surface was most etched, and a pyramidal texture with the (111) face exposed was formed. It had been.
  • the single crystal silicon substrate 1 after the etching was introduced into the CVD apparatus, and the first intrinsic amorphous silicon layer 2 was formed with a film thickness of 5 nm on one surface (incident surface side).
  • the film forming conditions were a substrate temperature of 150 ° C., a pressure of 120 Pa, a SiH 4 / H 2 flow rate ratio of 3/10, and a high frequency power density of 0.011 W / cm 2 .
  • a p-type amorphous silicon layer 3 having a thickness of 10 nm was formed on the first intrinsic amorphous silicon layer 2.
  • the film formation conditions for the p-type amorphous silicon layer 3 were a substrate temperature of 150 ° C., a pressure of 60 Pa, a SiH 4 / dilution B 2 H 6 flow rate ratio of 1/3, and a high-frequency power density of 0.011 W / cm 2. It was.
  • As the diluted B 2 H 6 gas a gas diluted with H 2 to a B 2 H 6 concentration of 5000 ppm was used.
  • a second intrinsic amorphous silicon layer 4 having a film thickness of 5 nm was formed on the other surface (back surface side) of the single crystal silicon substrate 1.
  • the conditions for forming the second intrinsic amorphous silicon layer 4 were the same as those for the first intrinsic amorphous silicon layer 2.
  • An n-type amorphous silicon layer 5 having a thickness of 10 nm was formed on the second intrinsic amorphous silicon layer 4.
  • the film forming conditions for the n-type amorphous silicon layer 5 were a substrate temperature of 150 ° C., a pressure of 60 Pa, a SiH 4 / dilution PH 3 flow rate ratio of 1/2, and a high frequency power density of 0.011 W / cm 2 .
  • As the diluted PH 3 gas a gas diluted with H 2 to a PH 3 concentration of 5000 ppm was used.
  • a film of indium tin composite oxide (ITO) having a thickness of 100 nm is formed on the p-type amorphous silicon layer 3 and the n-type amorphous silicon layer 5 as the first transparent conductive layer 6 and the second transparent conductive layer 8, respectively.
  • a film was formed with a thickness.
  • a sintered body of indium oxide and tin oxide (with a tin oxide content of 5% by weight) was used as a target.
  • Argon was introduced as a carrier gas at 100 sccm, and film formation was performed under conditions of a substrate temperature of room temperature, a pressure of 0.2 Pa, and a high frequency power density of 0.5 W / cm 2 .
  • Silver paste was screen-printed as collector electrodes 7 and 9 on the surfaces of the transparent conductive layers 6 and 8, respectively. Thereafter, in order to solidify the silver paste, heating was performed in an atmosphere at 150 ° C. for 60 minutes to form a comb-shaped collector electrode. The interval between the collector electrodes was 10 mm.
  • Examples 2 to 5 A solar cell was produced in the same manner as in Example 1 except that the hydrogen content and the heat treatment time during the heat treatment were changed as shown in Table 1.
  • Example 1 A solar cell was produced in the same manner as in Example 1 except that the heat treatment was not performed under an atmosphere containing hydrogen.
  • Table 1 shows the results of evaluating the photoelectric conversion characteristics of the solar cells of the above examples and comparative examples using a solar simulator.
  • Table 1 in addition to the actual measurement values of the photoelectric conversion characteristics (open circuit voltage, short circuit current density, fill factor, and conversion efficiency), numerical values that are normalized with reference to Comparative Example 1 are also shown.
  • Example 6 and Comparative Example 2 A solar battery cell was produced in the same manner as in Example 1 except that the temperature during the heat treatment was changed as shown in Table 2.
  • the results of evaluating the photoelectric conversion characteristics of the obtained solar battery cell using a solar simulator are shown in Table 2 together with the results of Comparative Example 1 and Example 2.
  • Table 2 In Table 2, in addition to the actual measurement values of the photoelectric conversion characteristics, numerical values normalized with the comparative example 1 as a reference value are also shown.
  • Comparative Example 3 In Comparative Example 3, a solar battery cell was produced in the same manner as in Comparative Example 1, but the manufacturing method was different from that in Comparative Example 1 in that the heat treatment was performed in the atmosphere at 150 ° C.
  • Example 7 a solar battery cell was produced in the same manner as in Example 1.
  • Example 7 after the first transparent conductive layer 6 and the second transparent conductive layer 8 are formed, before the silver paste is screen-printed, heat treatment is performed at a temperature of 170 ° C. for 60 minutes in an atmosphere containing 25% hydrogen. After the collector electrode was formed, the heat treatment under an atmosphere containing hydrogen was not performed. Other than that was carried out similarly to Example 1, and produced the photovoltaic cell.
  • Comparative Example 4 a solar battery cell was produced in the same manner as in Example 1, but after forming each amorphous silicon-based layer, in an atmosphere containing 25% hydrogen before forming the transparent conductive layer, The manufacturing method was different from Example 1 in that the heat treatment was performed at a temperature of 170 ° C. for 60 minutes. In Comparative Example 4, the heat treatment under an atmosphere containing hydrogen was not performed after the collector electrode was formed.
  • Table 3 shows the results of evaluating the photoelectric conversion characteristics of the solar cells obtained in Example 7 and Comparative Examples 3 and 4 using a solar simulator.
  • the photoelectric conversion characteristics in Table 3 are numerical values normalized using the measurement value of Comparative Example 3 as a reference value.
  • Example 7 in which heat treatment was performed in a hydrogen-containing atmosphere after forming the transparent electrode layer, the conversion efficiency was improved along with the improvement of the fill factor as in Examples 1-6. From this, it can be seen that it is important to perform heat treatment in a hydrogen-containing atmosphere after forming the transparent conductive layer in order to improve the conversion efficiency.
  • Example 8 the crystalline silicon photoelectric conversion device schematically shown in FIG. 3 was manufactured. Similarly to Example 1, the single crystal silicon substrate 1 after the etching was introduced into the CVD apparatus, and the first intrinsic amorphous silicon layer 2 having a thickness of 5 nm was formed on one surface (incident surface side). It was done. A p-type amorphous silicon layer 3 having a thickness of 10 nm was formed on the first intrinsic amorphous silicon layer 2. The conditions for forming the first intrinsic amorphous silicon layer and the p-type amorphous silicon layer were the same as in Example 1.
  • a second intrinsic amorphous silicon layer 4 having a thickness of 5 nm was formed on the other surface (back surface side) of the single crystal silicon substrate 1 in the same manner as in Example 1.
  • An n-type amorphous silicon layer 51 having a thickness of 10 nm was formed on the second intrinsic amorphous silicon layer 4.
  • the conditions for forming the first intrinsic amorphous silicon layer and the n-type amorphous silicon layer were the same as in Example 1.
  • n-type microcrystalline silicon layer 52 was formed on the n-type amorphous silicon layer 51 with a thickness of 20 nm.
  • the film forming conditions for the n-type microcrystalline silicon layer were a substrate temperature of 150 ° C., a pressure of 100 Pa, a SiH 4 / dilution PH 3 flow rate ratio of 1/5, and a high frequency power density of 0.01 W / cm 2 .
  • As the diluted PH 3 gas a gas diluted with H 2 to a PH 3 concentration of 5000 ppm was used.
  • ITO transparent conductive layers 6 and 8 having a thickness of 100 nm were formed in the same manner as in Example 1.
  • a silver paste was screen-printed on the surface of the transparent conductive layer 6 on the light incident side in the same manner as in Example 1, and a heat treatment was performed in the atmosphere at 150 ° C. for 60 minutes to form the collector electrode 7.
  • a silver paste was applied to the entire surface without patterning, and drying was performed in the same manner to form the metal electrode 10.
  • Example 5 A solar battery cell was produced in the same manner as in Example 8 except that heat treatment was not performed in an atmosphere containing hydrogen.
  • Example 9 A solar cell was produced in the same manner as in Example 8 except that the thickness of the p-type amorphous silicon layer was changed to 5 nm.
  • Example 6 A solar battery cell was produced in the same manner as in Example 8 except that heat treatment was not performed in an atmosphere containing hydrogen.
  • Table 4 shows the results of evaluating the photoelectric conversion characteristics of the solar cells of Examples 8 and 9 and Comparative Examples 5 and 6 using a solar simulator.
  • the n-type silicon-based layer is composed of two layers of an amorphous silicon layer and a microcrystalline silicon layer. Also, it can be seen that by performing the heat treatment in a hydrogen-containing atmosphere, the fill factor is improved and the conversion efficiency is improved.
  • Example 9 in which the thickness of the p-type amorphous silicon layer is 5 nm is compared with Comparative Example 6, in Example 9, in addition to the fact that the fill factor is improved by about 5%, the open circuit voltage is increased. Also improved by about 2%. That is, when the thickness of the p layer is small, it can be seen that the effect of improving the conversion characteristics by the heat treatment in a hydrogen-containing atmosphere is more remarkable.
  • Examples 10 to 17, Comparative Example 7 A solar cell was produced in the same manner as in Example 9 except that the hydrogen content, temperature, and time during the heat treatment were changed as shown in Table 5.
  • Example 8 A solar battery cell was produced in the same manner as in Example 9 except that the heat treatment under an atmosphere containing hydrogen was not performed.
  • Table 5 shows the results of evaluating the photoelectric conversion characteristics of the solar cells obtained in Examples 10 to 17 and Comparative Examples 8 and 9 using a solar simulator.
  • conversion characteristic values normalized with the measured values of Comparative Example 8 as reference values are shown.
  • the conversion factor was improved as a result of the improvement of the fill factor and the open-circuit voltage as compared with Comparative Example 8.
  • the open circuit voltage is improved by 1% (about 7 mV) or more compared to Comparative Example 8.
  • Comparative Example 9 the conversion characteristics of Comparative Example 9 in which heating was performed at 190 ° C. for 30 minutes under an atmosphere containing no hydrogen (hydrogen concentration 0%) were the same as those of Comparative Example 8.
  • Example 10 in which the heat treatment at 190 ° C. for 30 minutes was performed in an atmosphere with a hydrogen concentration of 0.5% by volume, conversion characteristics were improved mainly by improving the fill factor.
  • Example 17 in which the heat treatment was performed for 10 minutes at a hydrogen concentration of 80%, the short circuit current density was reduced, but since the improvement effect of the fill factor and open circuit voltage was large, the conversion was compared with Comparative Example 8. The characteristics are improved. From these results, the heat treatment for a short time in an atmosphere with high hydrogen concentration improves the fill factor while suppressing the decrease in short-circuit current density due to the reduction of the transparent conductive layer. It can be seen that the characteristics can be improved.

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Abstract

The present invention relates to a method of producing a crystalline silicon-based photoelectric conversion device sequentially having an intrinsic silicon-based layer, a p-type silicon-based layer and a transparent conductive layer on one side of a conductive monocrystalline silicon substrate, and sequentially having an intrinsic silicon-based layer, a n-type silicon-based layer and a transparent conductive layer on the other side of the conductive monocrystalline silicon substrate. In the present invention, heat treatment is performed after at least one transparent conductive layer has been formed. The heat treatment is performed at a temperature of less than 200°C under a hydrogen-containing atmosphere.

Description

結晶シリコン系太陽電池の製造方法Method for manufacturing crystalline silicon solar cell
　本発明は、単結晶シリコン基板表面にヘテロ接合を有する結晶シリコン系光電変換装置の製造方法に関する。 The present invention relates to a method for manufacturing a crystalline silicon photoelectric conversion device having a heterojunction on the surface of a single crystal silicon substrate.
　結晶シリコン基板を備える結晶シリコン系光電変換装置は、光電変換効率が高く、太陽光発電システムとして広く一般に実用化されている。中でも、単結晶シリコン基板の表面に、単結晶シリコンとは異なるバンドギャップを有する導電型非晶質シリコン系層を有する結晶シリコン系光電変換装置は、ヘテロ接合太陽電池と呼ばれている。 A crystalline silicon photoelectric conversion device provided with a crystalline silicon substrate has high photoelectric conversion efficiency, and is widely put into practical use as a photovoltaic power generation system. Among these, a crystalline silicon photoelectric conversion device having a conductive amorphous silicon-based layer having a band gap different from that of single-crystal silicon on the surface of a single-crystal silicon substrate is called a heterojunction solar cell.
　ヘテロ接合太陽電池の中でも、導電型非晶質シリコン系層と結晶シリコン基板との間に、真性の非晶質シリコン系層を有するものは、変換効率の最も高い結晶シリコン系光電変換装置の形態の一つとして知られている。結晶シリコン基板と導電型非晶質シリコン系層との間に、真性の非晶質シリコン系層が製膜されることで、導電型非晶質シリコン系層の製膜による欠陥準位の生成が低減され、かつ結晶シリコン基板表面に存在する欠陥（主にシリコンの未結合手）が水素で終端化処理（パッシベーション）される。また、真性の非晶質シリコン系層の存在によって、導電型非晶質シリコン系層製膜時の、結晶シリコン基板表面へのキャリア導入不純物の拡散を防止することもできる。 Among heterojunction solar cells, those having an intrinsic amorphous silicon-based layer between a conductive amorphous silicon-based layer and a crystalline silicon substrate are in the form of a crystalline silicon photoelectric conversion device having the highest conversion efficiency. Known as one of the Defect levels are generated by depositing the conductive amorphous silicon layer by forming an intrinsic amorphous silicon layer between the crystalline silicon substrate and the conductive amorphous silicon layer. And defects (mainly silicon dangling bonds) existing on the surface of the crystalline silicon substrate are terminated with hydrogen (passivation). In addition, the presence of the intrinsic amorphous silicon-based layer can prevent the carrier-introduced impurity from diffusing to the surface of the crystalline silicon substrate when forming the conductive amorphous silicon-based layer.
　このようなヘテロ接合太陽電池では、導電型非晶質シリコン系層の表面に透明導電層が形成される。この透明導電層は、光透過性が高く、かつ低抵抗であることが好ましい。その材料としては、結晶性のインジウム錫複合酸化物（ＩＴＯ）等の透明導電性金属酸化物が用いられる。一般には、透明導電層上には集電極が形成される。集電極としては、Ａｇペースト等が材料に用いられている。 In such a heterojunction solar cell, a transparent conductive layer is formed on the surface of the conductive amorphous silicon-based layer. This transparent conductive layer preferably has high light transmittance and low resistance. As the material, a transparent conductive metal oxide such as crystalline indium tin composite oxide (ITO) is used. In general, a collector electrode is formed on the transparent conductive layer. As the collector electrode, Ag paste or the like is used as the material.
　太陽電池の製法に関する技術として、電極形成後に大気雰囲気で加熱処理を実施することが知られている。例えば、特許文献１では、結晶シリコン基板を用いた太陽電池の製造において、導電性ペーストを塗布した後、水素雰囲気下において３００℃以上７００℃以下で加熱処理を行うことが開示されている。特許文献１においては、加熱処理によって、導電性ペースト中のガラスフリットに含まれる金属酸化物が水素還元されるために、高い接着強度と低い電気的接触抵抗が両立されることが報告されている。特許文献２では、フレキシブル太陽電池の製造において、電極形成後に加熱処理を行うことで、透明電極を低抵抗化することが開示されている。特許文献３では、光電変換層および導電型層として微結晶シリコンを用いた薄膜太陽電池を低酸素分圧雰囲気下で１時間以上加熱処理することで、導電型微結晶シリコン層中のドープ不純物を活性させて、電気特性を改善することが開示されている。 As a technique related to a method for manufacturing a solar cell, it is known that heat treatment is performed in an air atmosphere after electrode formation. For example, Patent Document 1 discloses that, in manufacturing a solar cell using a crystalline silicon substrate, after applying a conductive paste, heat treatment is performed at 300 ° C. to 700 ° C. in a hydrogen atmosphere. In Patent Document 1, it is reported that the metal oxide contained in the glass frit in the conductive paste is reduced by hydrogen by heat treatment, so that both high adhesive strength and low electrical contact resistance are compatible. . Patent Document 2 discloses that in the production of a flexible solar cell, the resistance of the transparent electrode is reduced by performing a heat treatment after the electrode is formed. In Patent Document 3, a thin film solar cell using microcrystalline silicon as a photoelectric conversion layer and a conductive type layer is heat-treated in a low oxygen partial pressure atmosphere for 1 hour or more, so that the doped impurities in the conductive microcrystalline silicon layer are reduced. It is disclosed to activate and improve electrical properties.
特開２００７－２９４４９４号公報JP 2007-294494 A 特開２００３－３１８４２５号公報JP 2003-318425 A 特開２００４－１１１５５１号公報JP 2004-111551A
　一般に、ヘテロ接合太陽電池の製造においては、シリコン系層および透明導電層が２００℃未満の低温で製膜される。そのため、特許文献１のような高温で加熱処理が行われると、導電型非晶質シリコン系層から真性非晶質シリコン系層へのドープ不純物の拡散や、透明導電層からシリコン系層への異種元素の拡散が生じるために、不純物準位や欠陥準位が形成され、変換効率が低下するといった問題があった。また、ヘテロ接合太陽電池では、特許文献２，３に開示されているような低温での加熱処理を行っても、変換特性の向上は見られず、加熱時間が長くなると、変換特性が低下する傾向があった。これらに鑑みて、本発明は、ヘテロ接合太陽電池の変換特性の向上を目的とする。 Generally, in manufacturing a heterojunction solar cell, a silicon-based layer and a transparent conductive layer are formed at a low temperature of less than 200 ° C. Therefore, when a heat treatment is performed at a high temperature as in Patent Document 1, diffusion of doped impurities from the conductive amorphous silicon-based layer to the intrinsic amorphous silicon-based layer, or from the transparent conductive layer to the silicon-based layer is performed. Since diffusion of different elements occurs, there is a problem that impurity levels and defect levels are formed and conversion efficiency is lowered. In addition, in the heterojunction solar cell, even when heat treatment at a low temperature as disclosed in Patent Documents 2 and 3 is performed, the conversion characteristics are not improved, and the conversion characteristics decrease as the heating time increases. There was a trend. In view of these, an object of the present invention is to improve conversion characteristics of a heterojunction solar cell.
　本発明者らは上記課題に鑑み鋭意検討した結果、ヘテロ接合型太陽電池の製造において、透明導電層形成後に所定の条件下で加熱処理を行うことで、光電変換特性の向上が可能であることを見出し、本発明を為した。 As a result of intensive studies in view of the above problems, the present inventors have found that, in the manufacture of heterojunction solar cells, it is possible to improve photoelectric conversion characteristics by performing heat treatment under predetermined conditions after forming the transparent conductive layer. And made the present invention.
　本発明は、導電型単結晶シリコン基板の一方の面に真性シリコン系層、ｐ型シリコン系層、および透明導電層をこの順に有し、導電型単結晶シリコン基板の他方の面に真性シリコン系層、ｎ型シリコン系層および透明導電層をこの順に有する結晶シリコン系光電変換装置を製造する方法に関する。本発明においては、少なくとも一方の透明導電層が形成された後に、加熱処理が行われる。この加熱処理は、水素を含む雰囲気下で２００℃未満の温度で行われる。 The present invention has an intrinsic silicon-based layer, a p-type silicon-based layer, and a transparent conductive layer in this order on one surface of a conductive single crystal silicon substrate, and an intrinsic silicon-based layer on the other surface of the conductive single crystal silicon substrate. The present invention relates to a method of manufacturing a crystalline silicon-based photoelectric conversion device having a layer, an n-type silicon-based layer, and a transparent conductive layer in this order. In the present invention, heat treatment is performed after at least one transparent conductive layer is formed. This heat treatment is performed at a temperature lower than 200 ° C. in an atmosphere containing hydrogen.
　前記ｐ型シリコン系層は、３ｎｍ～８ｎｍの膜厚で形成されることが好ましい。また、前記ｐ型シリコン系層はｐ型非晶質シリコン系層であることが好ましい。一実施形態において、前記ｎ型シリコン系層として、ｎ型非晶質シリコン系層およびｎ型微結晶シリコン系層が、前記第２真性シリコン系層側から順に形成される。 The p-type silicon-based layer is preferably formed with a thickness of 3 nm to 8 nm. The p-type silicon-based layer is preferably a p-type amorphous silicon-based layer. In one embodiment, as the n-type silicon-based layer, an n-type amorphous silicon-based layer and an n-type microcrystalline silicon-based layer are sequentially formed from the second intrinsic silicon-based layer side.
　本発明によれば、透明導電層形成後に水素含有雰囲気下で加熱処理が行われることによって、ヘテロ接合太陽電池の変換特性が向上される。 According to the present invention, after the transparent conductive layer is formed, the heat treatment is performed in a hydrogen-containing atmosphere, whereby the conversion characteristics of the heterojunction solar cell are improved.
本発明の一実施形態による結晶シリコン系光電変換装置の模式的断面図である。It is a typical sectional view of a crystalline silicon system photoelectric conversion device by one embodiment of the present invention. 本発明の一実施形態による結晶シリコン系光電変換装置の模式的断面図である。It is a typical sectional view of a crystalline silicon system photoelectric conversion device by one embodiment of the present invention. 本発明の一実施形態による結晶シリコン系光電変換装置の模式的断面図である。It is a typical sectional view of a crystalline silicon system photoelectric conversion device by one embodiment of the present invention.
　以下、本発明の実施形態を、図１に示した結晶シリコン系光電変換装置の模式的断面図を用いて説明する。図１の結晶シリコン系光電変換装置において、一導電型単結晶シリコン基板１の一方の面に第１真性シリコン系層２、他方の面に第２真性シリコン系層４が形成されている。第１真性シリコン系層２および第２真性シリコン系層４のそれぞれの表面には、ｐ型シリコン系層３およびｎ型シリコン系層５が形成されている。ｐ型シリコン系層３およびｎ型シリコン系層５のそれぞれの表面には、第１透明導電層６および第２透明導電層８が形成されている。少なくとも光入射側の透明導電層上には、集電極が形成される。図１においては、光入射側および裏面側の両方に集電極７，９が形成されている。 Hereinafter, an embodiment of the present invention will be described with reference to a schematic cross-sectional view of the crystalline silicon photoelectric conversion device shown in FIG. In the crystalline silicon-based photoelectric conversion device of FIG. 1, a first intrinsic silicon-based layer 2 is formed on one surface of a one-conductivity-type single-crystal silicon substrate 1, and a second intrinsic silicon-based layer 4 is formed on the other surface. A p-type silicon-based layer 3 and an n-type silicon-based layer 5 are formed on the respective surfaces of the first intrinsic silicon-based layer 2 and the second intrinsic silicon-based layer 4. A first transparent conductive layer 6 and a second transparent conductive layer 8 are formed on the respective surfaces of the p-type silicon-based layer 3 and the n-type silicon-based layer 5. A collector electrode is formed at least on the transparent conductive layer on the light incident side. In FIG. 1, collector electrodes 7 and 9 are formed on both the light incident side and the back side.
　まず、一導電型単結晶シリコン基板１について説明する。一般的に単結晶シリコン基板は、シリコンに対して電荷を供給する不純物を含有しており、導電性を有している。このような不純物を含有する導電型単結晶シリコン基板としては、Ｓｉ原子に対して電子を導入する不純物（例えば、リン原子）を含有するｎ型単結晶シリコン基板と、Ｓｉ原子に対して正孔を導入する不純物（例えば、ホウ素原子）を有するｐ型単結晶シリコン基板とがある。すなわち、本明細書における「一導電型」とは、ｎ型またはｐ型のいずれか一方であることを意味する。 First, the one conductivity type single crystal silicon substrate 1 will be described. In general, a single crystal silicon substrate contains impurities that supply charges to silicon and has conductivity. As the conductive single crystal silicon substrate containing such an impurity, an n-type single crystal silicon substrate containing an impurity that introduces electrons into Si atoms (for example, phosphorus atoms) and a hole with respect to Si atoms. And a p-type single crystal silicon substrate having an impurity (for example, boron atom) into which is introduced. That is, “one conductivity type” in this specification means either n-type or p-type.
　このような一導電型単結晶シリコン基板が光電変換装置に用いられる場合、単結晶シリコン基板へ入射した光が最も多く吸収される入射側のへテロ接合が逆接合であることが好ましい。光入射側のヘテロ接合が逆接合であれば、強い電場が設けられ、電子・正孔対を効率的に分離回収することができる。一方で、正孔と電子とを比較した場合、有効質量および散乱断面積の小さい電子の方が、一般的に移動度が大きい。以上の観点から、本発明において用いられる一導電型単結晶シリコン基板１は、ｎ型単結晶シリコン基板であることが好ましい。 When such a single conductivity type single crystal silicon substrate is used for a photoelectric conversion device, it is preferable that the heterojunction on the incident side where the light incident on the single crystal silicon substrate is absorbed most is a reverse junction. If the heterojunction on the light incident side is a reverse junction, a strong electric field is provided, and electron / hole pairs can be efficiently separated and recovered. On the other hand, when holes and electrons are compared, electrons having smaller effective mass and scattering cross section generally have higher mobility. From the above viewpoint, it is preferable that the single conductivity type single crystal silicon substrate 1 used in the present invention is an n type single crystal silicon substrate.
　このようにｎ型単結晶シリコン基板が用いられる場合の結晶シリコン系光電変換装置の構成例としては、光入射側から、集電極７／透明導電層６／ｐ型シリコン系層３／真性シリコン系層４／ｎ型単結晶シリコン基板１／真性シリコン系層４／ｎ型シリコン系層５／透明導電層８／集電極９をこの順に有するものが挙げられる。当該形態においては、ｎ型シリコン系層（ｎ層ともいう）側を裏面側とすることが好ましい。光閉じ込めの観点から、単結晶シリコン基板の表面にはテクスチャ（凹凸構造）が形成されていることが好ましい。 As a configuration example of the crystalline silicon-based photoelectric conversion device in the case where the n-type single crystal silicon substrate is used in this way, the collector electrode 7 / transparent conductive layer 6 / p-type silicon-based layer 3 / intrinsic silicon-based from the light incident side. One having layer 4 / n-type single crystal silicon substrate 1 / intrinsic silicon-based layer 4 / n-type silicon-based layer 5 / transparent conductive layer 8 / collecting electrode 9 in this order is mentioned. In this embodiment, it is preferable that the n-type silicon-based layer (also referred to as n layer) side is the back surface side. From the viewpoint of light confinement, a texture (uneven structure) is preferably formed on the surface of the single crystal silicon substrate.
　単結晶シリコン基板１の表面にはシリコン系層が製膜される。シリコン系層の製膜方法としてはプラズマＣＶＤが好ましい。プラズマＣＶＤ法によるシリコン系層の形成条件としては、例えば、基板温度１００～３００℃、圧力２０～２６００Ｐａ、高周波パワー密度０．００４～０．８Ｗ／ｃｍ２が好ましく用いられる。シリコン系層の製膜には、原料ガスとして、ＳｉＨ４、Ｓｉ２Ｈ６等のシリコン含有ガスまたは、それらのガスとＨ２を混合したものが用いられる。ｐ層またはｎ層を形成するためのドーパントガスとしては、Ｂ２Ｈ６またはＰＨ３等が好ましく用いられる。この場合、ＰやＢといった不純物の添加量は微量でよいため、ドーパントガスが予め原料ガスやＨ２などで希釈された混合ガスを用いることもできる。また、ＣＨ４、ＣＯ２、ＮＨ３、ＧｅＨ４等の異種元素を含むガスを上記ガスに添加することにより、シリコン系層として、シリコンカーバイド、シリコンナイトライド、シリコンゲルマニウム等のシリコン合金層が製膜されてもよい。 A silicon-based layer is formed on the surface of the single crystal silicon substrate 1. As a method for forming a silicon-based layer, plasma CVD is preferable. As the conditions for forming the silicon-based layer by plasma CVD, for example, a substrate temperature of 100 to 300 ° C., a pressure of 20 to 2600 Pa, and a high frequency power density of 0.004 to 0.8 W / cm 2 are preferably used. For film formation of the silicon-based layer, a silicon-containing gas such as SiH 4 or Si 2 H 6 or a mixture of these gases and H 2 is used as a source gas. As a dopant gas for forming the p layer or the n layer, B 2 H 6 or PH 3 is preferably used. In this case, since the addition amount of impurities such as P and B may be small, a mixed gas in which the dopant gas is previously diluted with a raw material gas or H 2 can also be used. Further, by adding a gas containing a different element such as CH 4 , CO 2 , NH 3 , GeH 4 to the above gas, a silicon alloy layer such as silicon carbide, silicon nitride, silicon germanium or the like is manufactured as a silicon-based layer. It may be membraned.
　上記の真性シリコン系層２，４は、実質的に真性なノンドープシリコン系薄膜である。真性シリコン系層２，４は、実質的にシリコンおよび水素からなる真性水素化非晶質シリコンであることが好ましい。単結晶シリコン基板１表面に真性シリコン系層２，４が形成されることで、導電型シリコン層製膜時の単結晶シリコン基板への不純物拡散が抑制されつつ、単結晶シリコン基板表面のパッシベーションを有効に行うことができる。また、真性シリコン系層の膜中の水素量を変化させることで、エネルギーギャップにキャリア回収を行う上で有効なプロファイルを持たせることができる。 The intrinsic silicon layers 2 and 4 are substantially intrinsic non-doped silicon thin films. The intrinsic silicon-based layers 2 and 4 are preferably intrinsic hydrogenated amorphous silicon substantially consisting of silicon and hydrogen. By forming the intrinsic silicon-based layers 2 and 4 on the surface of the single crystal silicon substrate 1, the diffusion of impurities to the single crystal silicon substrate during the formation of the conductive silicon layer is suppressed, and passivation of the surface of the single crystal silicon substrate is performed. It can be done effectively. In addition, by changing the amount of hydrogen in the intrinsic silicon-based layer, it is possible to have an effective profile for carrier recovery in the energy gap.
　真性シリコン系層２，４の膜厚は、３～１６ｎｍであることが好ましく、４ｎｍ～１４ｎｍであることがより好ましく、５ｎｍ～１２ｎｍであることがさらに好ましい。真性シリコン系層の膜厚が過度に小さいと、導電型シリコン系層３，５中の不純物原子の単結晶シリコン基板面への拡散や、単結晶シリコン基板表面のカバレッジ悪化に起因して、界面欠陥が増大する傾向がある。一方、真性シリコン系層の膜厚が過度に大きいと、高抵抗化や光吸収ロスの増大による変換特性の低下を招く場合がある。 The film thickness of the intrinsic silicon-based layers 2 and 4 is preferably 3 to 16 nm, more preferably 4 to 14 nm, and further preferably 5 to 12 nm. If the thickness of the intrinsic silicon-based layer is excessively small, the interface is caused by the diffusion of impurity atoms in the conductive silicon-based layers 3 and 5 to the surface of the single crystal silicon substrate and the deterioration of the coverage of the surface of the single crystal silicon substrate. Defects tend to increase. On the other hand, if the thickness of the intrinsic silicon-based layer is excessively large, the conversion characteristics may be deteriorated due to an increase in resistance or an increase in light absorption loss.
　第１真性シリコン系層２上には、ｐ型シリコン系層３が形成される。ｐ型シリコン系層は、ｐ型水素化非晶質シリコン層、ｐ型非晶質シリコンカーバイド層、ｐ型酸化非晶質シリコン層等の非晶質シリコン系層であることが好ましい。非晶質シリコン系層は、微結晶シリコン系層に比して低パワー密度での製膜が可能であるため、不純物原子の単結晶シリコン基板面への拡散が抑制される。非晶質シリコン系層の中でも、不純物拡散の抑制や直列抵抗低下の観点では、ｐ型水素化非晶質シリコン層が好ましい。一方で、ｐ型非晶質シリコンカーバイド層あるいはｐ型酸化非晶質シリコン層はワイドギャップの低屈折率層として光学的なロスを低減できる点において好ましい。 A p-type silicon-based layer 3 is formed on the first intrinsic silicon-based layer 2. The p-type silicon-based layer is preferably an amorphous silicon-based layer such as a p-type hydrogenated amorphous silicon layer, a p-type amorphous silicon carbide layer, or a p-type oxidized amorphous silicon layer. Since the amorphous silicon-based layer can be formed at a lower power density than the microcrystalline silicon-based layer, diffusion of impurity atoms to the surface of the single crystal silicon substrate is suppressed. Among the amorphous silicon-based layers, a p-type hydrogenated amorphous silicon layer is preferable from the viewpoint of suppressing impurity diffusion and reducing series resistance. On the other hand, a p-type amorphous silicon carbide layer or a p-type oxidized amorphous silicon layer is preferable as a wide-gap low-refractive index layer in terms of reducing optical loss.
　ｐ型シリコン系層３の厚みは、３ｎｍ～５０ｎｍの範囲が好ましい。導電型層（ｐ型シリコン系層３およびｎ型シリコン系層５）は、キャリアを透明導電層に取り出すために必要な層であり、その厚みが小さすぎるとキャリア移動を律速させる傾向がある。一方、導電型層の厚みが大きすぎると、光吸収ロスの原因となる傾向がある。光電変換層として非晶質シリコン系薄膜や微結晶シリコン系薄膜等を有する薄膜太陽電池では、拡散電位形成のために、ｐ層およびｎ層は１５ｎｍ程度の膜厚を有している必要がある。これに対して、結晶シリコン基板が用いられるヘテロ接合型太陽電池では、薄膜太陽電池に比して、拡散電位の形成に必要なｐ層およびｎ層の膜厚が小さい。そのため、ヘテロ接合型太陽電池では、特に、光入射側に配置される導電型層の膜厚を小さくすることが好ましい。例えば、ｎ型結晶シリコン基板が用いられ、ｐ層側が光入射側である構成のヘテロ接合太陽電池においては、ｐ層の厚みが小さいことが好ましい。具体的には、ｐ型シリコン系層３の膜厚は、１５ｎｍ以下であることがより好ましく、１０ｎｍ以下であることがさらに好ましく、８ｎｍ以下であることが特に好ましい The thickness of the p-type silicon-based layer 3 is preferably in the range of 3 nm to 50 nm. The conductive layer (p-type silicon-based layer 3 and n-type silicon-based layer 5) is a layer necessary for taking out carriers to the transparent conductive layer, and if the thickness is too small, the carrier movement tends to be controlled. On the other hand, if the thickness of the conductive layer is too large, it tends to cause light absorption loss. In a thin film solar cell having an amorphous silicon-based thin film, a microcrystalline silicon-based thin film, or the like as a photoelectric conversion layer, the p layer and the n layer need to have a thickness of about 15 nm in order to form a diffusion potential. . In contrast, in a heterojunction solar cell using a crystalline silicon substrate, the p-layer and n-layers required for forming a diffusion potential are smaller in thickness than a thin-film solar cell. Therefore, in the heterojunction solar cell, it is particularly preferable to reduce the film thickness of the conductive layer disposed on the light incident side. For example, in a heterojunction solar cell in which an n-type crystalline silicon substrate is used and the p-layer side is the light incident side, the p-layer thickness is preferably small. Specifically, the film thickness of the p-type silicon-based layer 3 is more preferably 15 nm or less, further preferably 10 nm or less, and particularly preferably 8 nm or less.
　第２真性シリコン系層４上には、ｎ型シリコン系層５が形成される。ｎ型シリコン系層５は、図１に示すように、ｎ型非晶質シリコン系層あるいはｎ型微結晶シリコン系層の単層により構成されてもよく、図２に示すように複数層により構成されてもよい。中でもｎ型シリコン系層５は、図２に示すように、ｎ型非晶質シリコン系層５１とｎ型微結晶シリコン系層５２の２層により構成されることが望ましい。ｎ型シリコン系層がｎ型微結晶シリコン系層である場合には、その上に製膜される透明導電層８の結晶性を向上させることができるため、界面で良好なオーミック接合が形成されるとの利点を有する。その一方で、ｎ型微結晶シリコン層を製膜するには高密度の水素プラズマを発生させるために、高パワーでプラズマを発生させる必要がある。これに対して、図２に示すように、真性シリコン系層４上にｎ型非晶質シリコン系層５１が５ｎｍ～２０ｎｍ程度の膜厚で製膜された後、その上にｎ型微結晶シリコン系層５２が製膜される場合は、ｎ型微結晶シリコン系層の製膜に要するパワーを低減することができる。そのため、ｎ型シリコン系層５が、ｎ型非晶質シリコン系層５１とｎ型微結晶シリコン系層５２の２層で構成される場合には、真性シリコン系層４へのドープ不純物の拡散や製膜ダメージが低減される。 An n-type silicon-based layer 5 is formed on the second intrinsic silicon-based layer 4. As shown in FIG. 1, the n-type silicon-based layer 5 may be constituted by a single layer of an n-type amorphous silicon-based layer or an n-type microcrystalline silicon-based layer, and as shown in FIG. It may be configured. In particular, the n-type silicon-based layer 5 is preferably composed of two layers of an n-type amorphous silicon-based layer 51 and an n-type microcrystalline silicon-based layer 52 as shown in FIG. When the n-type silicon-based layer is an n-type microcrystalline silicon-based layer, the crystallinity of the transparent conductive layer 8 formed thereon can be improved, so that a good ohmic junction is formed at the interface. And has the advantage. On the other hand, in order to form an n-type microcrystalline silicon layer, it is necessary to generate plasma with high power in order to generate high-density hydrogen plasma. On the other hand, as shown in FIG. 2, after an n-type amorphous silicon-based layer 51 is formed on the intrinsic silicon-based layer 4 with a film thickness of about 5 nm to 20 nm, an n-type microcrystal is formed thereon. When the silicon-based layer 52 is formed, the power required for forming the n-type microcrystalline silicon-based layer can be reduced. Therefore, in the case where the n-type silicon-based layer 5 is composed of two layers, an n-type amorphous silicon-based layer 51 and an n-type microcrystalline silicon-based layer 52, the diffusion of doped impurities into the intrinsic silicon-based layer 4 And film formation damage is reduced.
　ｎ型非晶質シリコン系層としては、隣接層との良好な接合特性が得られやすいことから、ｎ型水素化非晶質シリコン層やｎ型非晶質シリコンナイトライド層が好ましい。ｎ型微結晶シリコン系層としては、例えばｎ型微結晶シリコン層、ｎ型微結晶シリコンカーバイド層、ｎ型微結晶シリコンオキサイド層が挙げられる。ｎ層内部の欠陥の生成を抑制する観点からは、ドープ不純物以外の不純物が積極的に添加されていないｎ型微結晶シリコン層が好適に用いられる。一方で、ｎ型微結晶シリコン系層としてｎ型微結晶シリコンカーバイド層や、ｎ型微結晶シリコンオキサイド層を用いることで、実効的な光学ギャップを広げることができ、屈折率も低下することから、光学的なメリットが得られる。 As the n-type amorphous silicon-based layer, an n-type hydrogenated amorphous silicon layer or an n-type amorphous silicon nitride layer is preferable because good bonding characteristics with an adjacent layer can be easily obtained. Examples of the n-type microcrystalline silicon-based layer include an n-type microcrystalline silicon layer, an n-type microcrystalline silicon carbide layer, and an n-type microcrystalline silicon oxide layer. From the viewpoint of suppressing the generation of defects inside the n layer, an n-type microcrystalline silicon layer to which impurities other than doped impurities are not actively added is preferably used. On the other hand, by using an n-type microcrystalline silicon carbide layer or an n-type microcrystalline silicon oxide layer as the n-type microcrystalline silicon-based layer, the effective optical gap can be widened and the refractive index is also reduced. , Optical merit is obtained.
　ｎ型シリコン系層５の厚みは、５ｎｍ～５０ｎｍの範囲が好ましい。図２に示すように、ｎ型シリコン系層がｎ型非晶質シリコン系層５１とｎ型微結晶シリコン系層５２の２層で構成される場合には、ｎ型非晶質シリコン系層５１の膜厚は５ｎｍ以上であることが好ましく、１０ｎｍ以上であることがより好ましい。ｎ型非晶質シリコン系層５１の厚みを前記範囲とすることで、その上にｎ型微結晶シリコン系層５２を製膜する際のパワー密度を低く抑えることができる。また、ｎ型微結晶シリコン系層５２の膜厚は、５ｎｍ以上であることが好ましく、１０ｎｍ以上であることがより好ましい。ｎ型微結晶シリコン系層５２の厚みを前記範囲とすることで、その上に製膜される透明導電層８の結晶性を向上させることができる。一方、ｎ型非晶質シリコン系層やｎ型微結晶シリコン系層の膜厚が過度に大きいと、ドープ不純物による光吸収に起因して、変換特性が低下する場合がある。そのため、ｎ型非晶質シリコン系層の膜厚は、２０ｎｍ以下であることが好ましく、１５ｎｍ以下であることがより好ましい。また、ｎ型微結晶シリコン系層の膜厚は、３０ｎｍ以下であることが好ましく、２０ｎｍ以下であることがより好ましい。 The thickness of the n-type silicon-based layer 5 is preferably in the range of 5 nm to 50 nm. As shown in FIG. 2, when the n-type silicon-based layer is composed of two layers of an n-type amorphous silicon-based layer 51 and an n-type microcrystalline silicon-based layer 52, the n-type amorphous silicon-based layer The film thickness of 51 is preferably 5 nm or more, and more preferably 10 nm or more. By setting the thickness of the n-type amorphous silicon-based layer 51 in the above range, the power density when forming the n-type microcrystalline silicon-based layer 52 thereon can be kept low. The film thickness of the n-type microcrystalline silicon-based layer 52 is preferably 5 nm or more, and more preferably 10 nm or more. By setting the thickness of the n-type microcrystalline silicon-based layer 52 within the above range, the crystallinity of the transparent conductive layer 8 formed thereon can be improved. On the other hand, if the film thickness of the n-type amorphous silicon-based layer or the n-type microcrystalline silicon-based layer is excessively large, conversion characteristics may be deteriorated due to light absorption by the doped impurities. Therefore, the film thickness of the n-type amorphous silicon-based layer is preferably 20 nm or less, and more preferably 15 nm or less. Further, the film thickness of the n-type microcrystalline silicon-based layer is preferably 30 nm or less, and more preferably 20 nm or less.
　ｐ型シリコン系層３上およびｎ型シリコン系層５上には、それぞれ第１透明導電層６および第２透明導電層８が形成される。第１および第２透明導電層の膜厚は、透明性と導電性の観点から、１０ｎｍ以上１４０ｎｍ以下であることが好ましい。透明導電層の役割は、集電極へのキャリアの輸送であり、そのために必要な導電性があればよい。一方で透明性の観点から、厚すぎる透明導電層は、それ自身の吸収ロスのために透過率を減少させて、光電変換効率を低下させる原因となる場合がある。透明導電層としては、一般に、透明導電性金属酸化物、例えば酸化インジウムや酸化錫、酸化亜鉛、酸化チタンやその複合酸化物などからなる薄膜が用いられる。中でも、酸化インジウムを主成分とするインジウム系複合酸化物が好ましい。高い導電率と透明性の観点からは、インジウム錫複合酸化物（ＩＴＯ）が特に好ましく用いられる。 A first transparent conductive layer 6 and a second transparent conductive layer 8 are formed on the p-type silicon-based layer 3 and the n-type silicon-based layer 5, respectively. The film thickness of the first and second transparent conductive layers is preferably 10 nm or more and 140 nm or less from the viewpoint of transparency and conductivity. The role of the transparent conductive layer is to transport carriers to the collector electrode, and it is only necessary to have conductivity necessary for that purpose. On the other hand, from the viewpoint of transparency, a transparent conductive layer that is too thick may cause a decrease in transmittance due to its own absorption loss, resulting in a decrease in photoelectric conversion efficiency. As the transparent conductive layer, a thin film made of a transparent conductive metal oxide such as indium oxide, tin oxide, zinc oxide, titanium oxide or a composite oxide thereof is generally used. Among these, indium composite oxides mainly composed of indium oxide are preferable. From the viewpoint of high conductivity and transparency, indium tin composite oxide (ITO) is particularly preferably used.
　第１透明導電層および第２透明導電層は、いずれも公知の手法により製膜することができる。製膜方法としては、スパッタリング法、有機金属化学気相堆積（ＭＯＣＶＤ）法、熱ＣＶＤ法、プラズマＣＶＤ法、分子線ビームエピタキシー（ＭＢＥ）法やパルスレーザー堆積（ＰＬＤ）法などが挙げられる。中でもＩＴＯ等のインジウム系複合酸化物層の製膜には、スパッタリング法が好適に用いられる。透明導電層製膜時の基板温度は適宜設定すればよいが、２００℃以下が好ましい。それ以上の高温となると、シリコン系層から水素が脱離して、ケイ素原子にダングリングボンドが発生し、キャリアの再結合中心となる場合がある。 Both the first transparent conductive layer and the second transparent conductive layer can be formed by a known method. Examples of film forming methods include sputtering, metal organic chemical vapor deposition (MOCVD), thermal CVD, plasma CVD, molecular beam epitaxy (MBE), and pulsed laser deposition (PLD). Among these, sputtering is preferably used for forming an indium composite oxide layer such as ITO. The substrate temperature at the time of forming the transparent conductive layer may be appropriately set, but is preferably 200 ° C. or lower. When the temperature is higher than that, hydrogen is desorbed from the silicon-based layer, and a dangling bond is generated in the silicon atom, which may become a carrier recombination center.
　透明導電層６，８上には、電流取り出しのための集電極７，９が形成される。集電極は、インクジェット、スクリーン印刷、導線接着、スプレー等の公知技術によって作製できるが、生産性の観点からはスクリーン印刷が好ましい。スクリーン印刷法においては、金属粒子と樹脂バインダーからなる導電ペーストをスクリーン印刷によって印刷する工程が好ましく用いられる。 On the transparent conductive layers 6 and 8, collector electrodes 7 and 9 for taking out current are formed. The collector electrode can be produced by a known technique such as inkjet, screen printing, wire bonding, spraying, etc., but screen printing is preferable from the viewpoint of productivity. In the screen printing method, a process of printing a conductive paste composed of metal particles and a resin binder by screen printing is preferably used.
　少なくとも光入射側の集電極は、太陽電池セルへの光入射面積を大きくするために、櫛形パターン等の形状にパターン化されていることが好ましい。光入射側と反対側の集電極は、パターン化されていてもよく、パターン化されていなくともよい。例えば、図３に示すように、光入射側と反対側の金属電極１０が透明導電層上の略全面に形成されている場合は、金属電極層が、シリコン基板に吸収されなかった光がセル外に漏れることを抑止する反射層として作用し得る。また、透明導電層と集電極あるいは金属電極層との間に、反射層としてＡｇやＡｌ等の金属層が形成されていてもよい。 It is preferable that at least the collecting electrode on the light incident side is patterned into a shape such as a comb pattern in order to increase the light incident area to the solar battery cell. The collector electrode on the side opposite to the light incident side may be patterned or may not be patterned. For example, as shown in FIG. 3, when the metal electrode 10 opposite to the light incident side is formed on substantially the entire surface of the transparent conductive layer, the light that has not been absorbed by the silicon substrate is absorbed by the metal electrode layer. It can act as a reflective layer that suppresses leakage to the outside. Further, a metal layer such as Ag or Al may be formed as a reflective layer between the transparent conductive layer and the collector electrode or the metal electrode layer.
　本発明では、上記の光電変換装置の形成過程において、透明導電層形成後に、水素を含む雰囲気下で加熱処理工程が行われる。透明導電層形成後に加熱処理が行われることで、光電変換装置の変換特性、特に曲線因子の向上がみられる。加熱処理は、第１透明導電層６および第２透明導電層８の少なくとも一方が形成された後に行えばよい。変換特性向上効果を高める観点からは、第１透明導電層６が形成された後、あるいは第１透明導電層および第２透明導電層の両者が形成された後に水素雰囲気下での加熱処理が行われることが好ましい。 In the present invention, in the process of forming the photoelectric conversion device, after the transparent conductive layer is formed, a heat treatment step is performed in an atmosphere containing hydrogen. By performing the heat treatment after the formation of the transparent conductive layer, the conversion characteristics of the photoelectric conversion device, particularly the curve factor, is improved. The heat treatment may be performed after at least one of the first transparent conductive layer 6 and the second transparent conductive layer 8 is formed. From the viewpoint of enhancing the conversion characteristic improvement effect, after the first transparent conductive layer 6 is formed, or after both the first transparent conductive layer and the second transparent conductive layer are formed, heat treatment is performed in a hydrogen atmosphere. Are preferred.
　加熱処理は、透明導電層上に集電極や反射電極が形成された後に行ってもよい。また、集電極や反射電極に用いられる導電ペーストの固化等を目的とした加熱処理を、水素を含む雰囲気下で行ってもよい。この場合、電極形成のための加熱処理を兼ねて本発明の水素を含む雰囲気下での加熱処理を行うことができる。そのため、新たな工程を付加することなく、変換効率を向上することが可能である。 The heat treatment may be performed after the collector electrode and the reflective electrode are formed on the transparent conductive layer. In addition, heat treatment for the purpose of solidifying a conductive paste used for the collector electrode or the reflective electrode may be performed in an atmosphere containing hydrogen. In this case, the heat treatment in an atmosphere containing hydrogen according to the present invention can be performed also as the heat treatment for electrode formation. Therefore, it is possible to improve the conversion efficiency without adding a new process.
　本発明において、水素を含む雰囲気下での加熱処理温度は、２００℃未満である。加熱温度が高すぎると、導電型シリコン系層３，５から真性シリコン系層２，４へのドープ不純物の拡散や、透明導電層からシリコン系層への異種元素の拡散が生じ、不純物準位や欠陥準位が形成されて、開放電圧や短絡電流密度が低下する傾向がある。一方で、加熱温度が低すぎると、変換特性の向上効果が十分に得られなかったり、加熱処理に長時間を要する場合がある。そのため、加熱温度は、１３０℃以上が好ましく、１５０℃以上がより好ましく、１６０℃以上がさらに好ましい。 In the present invention, the heat treatment temperature in an atmosphere containing hydrogen is less than 200 ° C. If the heating temperature is too high, diffusion of doped impurities from the conductive silicon-based layers 3 and 5 to the intrinsic silicon-based layers 2 and 4 and diffusion of different elements from the transparent conductive layer to the silicon-based layers may occur. And defect levels are formed, and the open circuit voltage and short circuit current density tend to decrease. On the other hand, if the heating temperature is too low, the effect of improving the conversion characteristics may not be sufficiently obtained, or the heat treatment may take a long time. Therefore, the heating temperature is preferably 130 ° C. or higher, more preferably 150 ° C. or higher, and further preferably 160 ° C. or higher.
　加熱処理時の水素濃度は特に制限されないが、水素濃度が低すぎると変換特性の向上効果が十分に得られない場合がある。また、水素濃度が高すぎると、透明導電層を構成する導電性酸化物が還元されて、透過率の低減や直列抵抗の増大を生じる場合がある。そのため、加熱処理工程における雰囲気中の水素濃度は、０．１～９５体積％であることが好ましく、０．５～８０体積％であることがより好ましく、１～４５体積％であることがさらに好ましい。なお、水素濃度が上記範囲外であっても、加熱温度等を調整することによって、効果的に変換効率を向上させることも可能である。本発明において、加熱処理雰囲気における水素以外のガスは特に制限されないが、安全上の理由から、窒素やアルゴンなどの不活性ガスと水素の混合ガスが用いられることが好ましい。 The hydrogen concentration during the heat treatment is not particularly limited, but if the hydrogen concentration is too low, the effect of improving the conversion characteristics may not be sufficiently obtained. Moreover, when hydrogen concentration is too high, the conductive oxide which comprises a transparent conductive layer may be reduce | restored, and the reduction | decrease of transmittance | permeability and the increase in series resistance may be produced. Therefore, the hydrogen concentration in the atmosphere in the heat treatment step is preferably 0.1 to 95% by volume, more preferably 0.5 to 80% by volume, and further preferably 1 to 45% by volume. preferable. Even if the hydrogen concentration is outside the above range, the conversion efficiency can be effectively improved by adjusting the heating temperature or the like. In the present invention, a gas other than hydrogen in the heat treatment atmosphere is not particularly limited, but for safety reasons, it is preferable to use a mixed gas of inert gas such as nitrogen or argon and hydrogen.
　加熱処理時間は、上記の水素濃度や加熱温度に応じて適宜に設定し得る。生産性および変換特性向上の観点から、加熱時間は５分～１２０分が好ましく、２０分～９０分がより好ましく、３０分～６０分がさらに好ましい。加熱時間が短すぎると、本発明による変換特性向上効果が十分に得られない場合がある。また、加熱時間が長過ぎると、生産性に劣ることに加えて、透明導電層を構成する導電性酸化物が還元されることによる変換効率の低下を招く場合がある。 The heat treatment time can be appropriately set according to the above hydrogen concentration and heating temperature. From the viewpoint of improving productivity and conversion characteristics, the heating time is preferably 5 minutes to 120 minutes, more preferably 20 minutes to 90 minutes, and even more preferably 30 minutes to 60 minutes. If the heating time is too short, the effect of improving the conversion characteristics according to the present invention may not be sufficiently obtained. Moreover, when heating time is too long, in addition to being inferior to productivity, the conversion efficiency by the conductive oxide which comprises a transparent conductive layer may be reduced may be caused.
　後述の実施例および比較例の対比からも明らかなように、ヘテロ接合型太陽電池の製造工程において、透明導電層形成前に水素を含む雰囲気下で加熱処理が行われた場合は、変換特性の向上がみられない。このことから、本発明における加熱処理は、ドープ不純物の活性化等によって導電型層を改善させるとの作用を及ぼすものではないと考えられる。さらに、本発明では、加熱処理によって曲線因子のみならず開放電圧も向上する傾向がみられるが、一般には、透明導電層が低抵抗化されても開放電圧は向上しないと考えられる。これらを勘案すると、本発明においては、加熱処理による界面特性の向上が、変換特性の向上に寄与していると考えられる。 As is clear from the comparison of Examples and Comparative Examples described later, in the manufacturing process of the heterojunction solar cell, when heat treatment is performed in an atmosphere containing hydrogen before forming the transparent conductive layer, conversion characteristics There is no improvement. From this, it is considered that the heat treatment in the present invention does not act to improve the conductivity type layer by activating the doped impurities. Furthermore, in the present invention, the heat treatment tends to improve not only the fill factor but also the open circuit voltage. In general, it is considered that the open circuit voltage does not improve even when the resistance of the transparent conductive layer is lowered. Considering these, in the present invention, it is considered that the improvement of the interface characteristics by the heat treatment contributes to the improvement of the conversion characteristics.
　界面特性の向上の１つの要因として、水素を含む雰囲気下での加熱処理によって、透明導電層製膜時の酸素ダメージが修復されることが考えられる。例えば、スパッタリング法によってＩＴＯからなる透明導電層が形成される場合は、製膜時の酸素プラズマによって、導電型シリコン系層と透明導電層との界面の水素化シリコンに、酸素結合欠陥（Ｓｉ－Ｏ－Ｓｉ結合）が生じる傾向がある As one factor for improving the interfacial characteristics, it is considered that oxygen damage during film formation of the transparent conductive layer is repaired by heat treatment in an atmosphere containing hydrogen. For example, when a transparent conductive layer made of ITO is formed by sputtering, oxygen bonding defects (Si--) are formed in silicon hydride at the interface between the conductive silicon-based layer and the transparent conductive layer by oxygen plasma during film formation. O-Si bond) tends to occur
　本発明の加熱処理は、水素プラズマ処理のような高エネルギー印加条件下や、高温条件下で行われるものではなく、シリコン系層表面における水素化シリコンの未結合手の終端に必要な活性化エネルギー障壁を超えるエネルギーは印加されないと考えられる。一方、酸素結合欠陥を有する水素化シリコンは、格子構造に歪を生じているため、酸素結合欠陥を有していない水素化シリコンに比して、未結合手等の欠陥の修復に必要な活性化エネルギーが小さい。そのため、本発明においては、２００℃未満の低温での加熱でも、酸素結合欠陥や酸素結合欠陥に隣接する未結合手等が修復されて、変換特性が向上すると考えられる。 The heat treatment of the present invention is not performed under high energy application conditions such as hydrogen plasma treatment or under high temperature conditions, and the activation energy required for termination of dangling bonds of silicon hydride on the surface of the silicon-based layer It is considered that energy exceeding the barrier is not applied. On the other hand, silicon hydride having oxygen bond defects has a strain in the lattice structure, and therefore, the activity necessary for repairing defects such as dangling bonds compared to silicon hydride having no oxygen bond defects. The chemical energy is small. Therefore, in the present invention, it is considered that even when heating is performed at a low temperature of less than 200 ° C., oxygen bond defects and dangling bonds adjacent to the oxygen bond defects are repaired and conversion characteristics are improved.
　特に、ｐ型シリコン系層の厚みが小さい場合には、水素を含む雰囲気下での加熱処理によって、曲線因子に加えて開放電圧も向上する傾向がみられる。これは、ｐ層の厚みが小さい場合には、水素を含む雰囲気下での加熱処理によって、導電型シリコン系層と透明導電層との界面のみならず、導電型シリコン系層と真性シリコン系層との界面に生じた欠陥も修復されるためであると推定される。すなわち、ｐ層の厚みが小さい場合は、透明導電層形成時の酸素によるダメージが、導電型シリコン系層と真性シリコン系層との界面にも及びやすくなると考えられるが、水素を含む雰囲気下での加熱処理によって当該界面に生じた欠陥も修復されて、開放電圧が向上するとのメカニズムが推定される。 In particular, when the thickness of the p-type silicon-based layer is small, a heat treatment under an atmosphere containing hydrogen tends to improve the open circuit voltage in addition to the fill factor. This is because when the thickness of the p-layer is small, not only the interface between the conductive silicon-based layer and the transparent conductive layer but also the conductive silicon-based layer and the intrinsic silicon-based layer by heat treatment in an atmosphere containing hydrogen. It is estimated that this is because defects generated at the interface with the repair are also repaired. That is, when the thickness of the p layer is small, it is considered that damage due to oxygen at the time of forming the transparent conductive layer easily reaches the interface between the conductive silicon layer and the intrinsic silicon layer, but in an atmosphere containing hydrogen. It is presumed that the defect that occurred at the interface by the heat treatment is also repaired and the open circuit voltage is improved.
　一般には、ヘテロ接合型太陽電池のｐ層の厚みを小さくした場合は、光吸収ロス低減による短絡電流密度の向上が期待される反面、ｐ層と真性シリコン系層との界面にも透明導電層製膜時の酸素ダメージが及び、開放電圧および曲線因子が低下することが懸念される。これに対して、本発明では、水素を含む雰囲気下での加熱処理によって、ｐ層と真性シリコン系層との界面の欠陥も修復され得るため、開放電圧および曲線因子の向上と短絡電流密度の向上とを両立可能である。このように、ｐ層の厚みが小さい場合には、本発明による変換特性向上効果がより顕著となる傾向があり、高い変換特性を有するヘテロ接合型太陽電池を得ることができる。 In general, when the thickness of the p-layer of the heterojunction solar cell is reduced, an improvement in the short-circuit current density is expected by reducing the light absorption loss, but the transparent conductive layer is also formed at the interface between the p-layer and the intrinsic silicon-based layer. There is concern about oxygen damage during film formation and a decrease in open circuit voltage and fill factor. In contrast, in the present invention, defects at the interface between the p-layer and the intrinsic silicon-based layer can be repaired by heat treatment under an atmosphere containing hydrogen, so that the open-circuit voltage and the fill factor are improved and the short-circuit current density is increased. It is possible to achieve both improvement. Thus, when the thickness of the p layer is small, the conversion characteristic improvement effect according to the present invention tends to become more prominent, and a heterojunction solar cell having high conversion characteristics can be obtained.
　なお、本発明において、上記の加熱処理は２段階以上で行ってもよい。２段階以上の加熱処理が行われる場合、少なくとも１段階の加熱処理が水素を含む雰囲気下で行われればよい。 In the present invention, the above heat treatment may be performed in two or more stages. In the case where two or more stages of heat treatment are performed, at least one stage of heat treatment may be performed in an atmosphere containing hydrogen.
　以下、本発明を実施例により具体的に説明するが、本発明は以下の実施例に限定されるものではない。 Hereinafter, the present invention will be specifically described by way of examples. However, the present invention is not limited to the following examples.
[測定方法]
　膜厚は、断面の透過型電子顕微鏡（ＴＥＭ）観察により求めた。なお、ＴＥＭ観察によって、真性シリコン系層と導電型シリコン系層との界面を識別することは困難である。そのため、これらの層の膜厚は、ＴＥＭ観察から求められた各層の合計厚みと製膜時間の比から算出した。また、テクスチャが形成されたシリコン基板表面に形成された層については、テクスチャの斜面と垂直な方向を膜厚方向とした。光電変換装置の光電変換特性は、ソーラーシミュレータを用いて評価した。 [Measuring method]
The film thickness was obtained by observing the cross section with a transmission electron microscope (TEM). Note that it is difficult to identify the interface between the intrinsic silicon-based layer and the conductive silicon-based layer by TEM observation. Therefore, the film thicknesses of these layers were calculated from the ratio between the total thickness of each layer determined from TEM observation and the film formation time. For the layer formed on the surface of the silicon substrate on which the texture was formed, the direction perpendicular to the texture slope was defined as the film thickness direction. The photoelectric conversion characteristics of the photoelectric conversion device were evaluated using a solar simulator.
[実施例１]
　実施例１では、図１に模式的に示す結晶シリコン系光電変換装置が製造された。
　入射面の面方位が（１００）で、厚みが２００μｍのｎ型単結晶シリコン基板がアセトン中で洗浄された。その後、基板が２重量％のＨＦ水溶液に３分間浸漬され、表面の酸化シリコン膜が除去された後、超純水によるリンスが２回行われた。次に７０℃に保持された５／１５重量％のＫＯＨ／イソプロピルアルコール水溶液に、シリコン基板が１５分間浸漬され、基板表面がエッチングされて、テクスチャが形成された。その後、超純水によるリンスが２回行われた。原子間力顕微鏡（ＡＦＭ　パシフィックナノテクノロジー社製）により単結晶シリコン基板１の表面観察を行ったところ、基板表面はエッチングが最も進行しており、（１１１）面が露出したピラミッド型のテクスチャが形成されていた。 [Example 1]
In Example 1, a crystalline silicon-based photoelectric conversion device schematically shown in FIG. 1 was manufactured.
An n-type single crystal silicon substrate having a plane orientation of the incident surface of (100) and a thickness of 200 μm was washed in acetone. Thereafter, the substrate was immersed in a 2 wt% HF aqueous solution for 3 minutes to remove the silicon oxide film on the surface, and then rinsed with ultrapure water twice. Next, the silicon substrate was immersed in a 5/15 wt% KOH / isopropyl alcohol aqueous solution maintained at 70 ° C. for 15 minutes, and the substrate surface was etched to form a texture. Thereafter, rinsing with ultrapure water was performed twice. When the surface of the single crystal silicon substrate 1 was observed with an atomic force microscope (manufactured by AFM Pacific Nanotechnology), the substrate surface was most etched, and a pyramidal texture with the (111) face exposed was formed. It had been.
　エッチングが終了した単結晶シリコン基板１がＣＶＤ装置へ導入され、一方の面（入射面側）に、第１真性非晶質シリコン層２が５ｎｍの膜厚で製膜された。製膜条件は、基板温度が１５０℃、圧力１２０Ｐａ、ＳｉＨ４／Ｈ２流量比が３／１０、高周波パワー密度が０．０１１Ｗ／ｃｍ２であった。第１真性非晶質シリコン層２上にｐ型非晶質シリコン層３が１０ｎｍの膜厚で製膜された。ｐ型非晶質シリコン層３の製膜条件は、基板温度が１５０℃、圧力６０Ｐａ、ＳｉＨ４／希釈Ｂ２Ｈ６流量比が１／３、高周波パワー密度が０．０１１Ｗ／ｃｍ２であった。なお、上記希釈Ｂ２Ｈ６ガスとしては、Ｈ２によりＢ２Ｈ６濃度が５０００ｐｐｍまで希釈されたガスが用いられた。 The single crystal silicon substrate 1 after the etching was introduced into the CVD apparatus, and the first intrinsic amorphous silicon layer 2 was formed with a film thickness of 5 nm on one surface (incident surface side). The film forming conditions were a substrate temperature of 150 ° C., a pressure of 120 Pa, a SiH 4 / H 2 flow rate ratio of 3/10, and a high frequency power density of 0.011 W / cm 2 . A p-type amorphous silicon layer 3 having a thickness of 10 nm was formed on the first intrinsic amorphous silicon layer 2. The film formation conditions for the p-type amorphous silicon layer 3 were a substrate temperature of 150 ° C., a pressure of 60 Pa, a SiH 4 / dilution B 2 H 6 flow rate ratio of 1/3, and a high-frequency power density of 0.011 W / cm 2. It was. As the diluted B 2 H 6 gas, a gas diluted with H 2 to a B 2 H 6 concentration of 5000 ppm was used.
　単結晶シリコン基板１の他方の面（裏面側）に、第２真性非晶質シリコン層４が５ｎｍの膜厚で製膜された。第２真性非晶質シリコン層４の製膜条件は、第１真性非晶質シリコン層２の製膜条件と同一であった。第２真性非晶質シリコン層４上にｎ型非晶質シリコン層５が１０ｎｍの膜厚で製膜された。ｎ型非晶質シリコン層５の製膜条件は、基板温度が１５０℃、圧力６０Ｐａ、ＳｉＨ４／希釈ＰＨ３流量比が１／２、高周波パワー密度が０．０１１Ｗ／ｃｍ２であった。なお、上記希釈ＰＨ３ガスとしては、Ｈ２によりＰＨ３濃度が５０００ｐｐｍまで希釈されたガスが用いられた。 A second intrinsic amorphous silicon layer 4 having a film thickness of 5 nm was formed on the other surface (back surface side) of the single crystal silicon substrate 1. The conditions for forming the second intrinsic amorphous silicon layer 4 were the same as those for the first intrinsic amorphous silicon layer 2. An n-type amorphous silicon layer 5 having a thickness of 10 nm was formed on the second intrinsic amorphous silicon layer 4. The film forming conditions for the n-type amorphous silicon layer 5 were a substrate temperature of 150 ° C., a pressure of 60 Pa, a SiH 4 / dilution PH 3 flow rate ratio of 1/2, and a high frequency power density of 0.011 W / cm 2 . As the diluted PH 3 gas, a gas diluted with H 2 to a PH 3 concentration of 5000 ppm was used.
　ｐ型非晶質シリコン層３上およびｎ型非晶質シリコン層５上のそれぞれに、第１透明導電層６および第２透明導電層８として、インジウム錫複合酸化物（ＩＴＯ）が１００ｎｍの膜厚で製膜された。ＩＴＯの製膜には、ターゲットとして酸化インジウムと酸化スズの焼結体（酸化錫含有量が５重量％）が用いられた。キャリアガスとしてアルゴンが１００ｓｃｃｍで導入され、基板温度は室温、圧力０．２Ｐａ、高周波パワー密度０．５Ｗ／ｃｍ２の条件で製膜が行われた。 A film of indium tin composite oxide (ITO) having a thickness of 100 nm is formed on the p-type amorphous silicon layer 3 and the n-type amorphous silicon layer 5 as the first transparent conductive layer 6 and the second transparent conductive layer 8, respectively. A film was formed with a thickness. For the ITO film formation, a sintered body of indium oxide and tin oxide (with a tin oxide content of 5% by weight) was used as a target. Argon was introduced as a carrier gas at 100 sccm, and film formation was performed under conditions of a substrate temperature of room temperature, a pressure of 0.2 Pa, and a high frequency power density of 0.5 W / cm 2 .
　上記の透明導電層６，８のそれぞれの表面に、集電極７，９として、銀ペーストがスクリーン印刷された。その後、銀ペーストを固化するために、１５０℃の大気下にて６０分間加熱が行われて、櫛形の集電極が形成された。集電極の間隔は１０ｍｍとした。 Silver paste was screen-printed as collector electrodes 7 and 9 on the surfaces of the transparent conductive layers 6 and 8, respectively. Thereafter, in order to solidify the silver paste, heating was performed in an atmosphere at 150 ° C. for 60 minutes to form a comb-shaped collector electrode. The interval between the collector electrodes was 10 mm.
　集電極形成後に、水素を２％含む雰囲気下で、温度１７０℃にて６０分加熱処理が行われた。 After the collector electrode was formed, heat treatment was performed for 60 minutes at a temperature of 170 ° C. in an atmosphere containing 2% hydrogen.
[実施例２～５]
　加熱処理時の水素含有量および加熱処理時間が表１に示すように変更された以外は、実施例１と同様にして太陽電池セルが作製された。 [Examples 2 to 5]
A solar cell was produced in the same manner as in Example 1 except that the hydrogen content and the heat treatment time during the heat treatment were changed as shown in Table 1.
[比較例１]
　水素を含む雰囲気下での加熱処理が行われなかったこと以外は、実施例１と同様にして太陽電池セルが作製された。 [Comparative Example 1]
A solar cell was produced in the same manner as in Example 1 except that the heat treatment was not performed under an atmosphere containing hydrogen.
　上記各実施例、および比較例の太陽電池セルの光電変換特性を、ソーラーシミュレータを用いて評価した結果を表１に示す。なお、表１においては、光電変換特性（開放電圧、短絡電流密度、曲線因子および変換効率）の実測値に加えて、比較例１を基準値として規格化された数値も示されている。 Table 1 shows the results of evaluating the photoelectric conversion characteristics of the solar cells of the above examples and comparative examples using a solar simulator. In Table 1, in addition to the actual measurement values of the photoelectric conversion characteristics (open circuit voltage, short circuit current density, fill factor, and conversion efficiency), numerical values that are normalized with reference to Comparative Example 1 are also shown.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
[実施例６および比較例２]
　加熱処理時の温度が表２に示すように変更された以外は、実施例１と同様にして太陽電池セルが作製された。得られた太陽電池セルの光電変換特性を、ソーラーシミュレータを用いて評価した結果を、比較例１および実施例２の結果とともに表２に示す。なお、表２においては、光電変換特性の実測値に加えて、比較例１を基準値として規格化された数値も示されている。 [Example 6 and Comparative Example 2]
A solar battery cell was produced in the same manner as in Example 1 except that the temperature during the heat treatment was changed as shown in Table 2. The results of evaluating the photoelectric conversion characteristics of the obtained solar battery cell using a solar simulator are shown in Table 2 together with the results of Comparative Example 1 and Example 2. In Table 2, in addition to the actual measurement values of the photoelectric conversion characteristics, numerical values normalized with the comparative example 1 as a reference value are also shown.
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
[比較例３]
　比較例３では、比較例１と同様にして太陽電池セルが作製されたが、加熱処理が１５０℃の大気下にて行われた点において、比較例１とは製造方法が異なっていた。 [Comparative Example 3]
In Comparative Example 3, a solar battery cell was produced in the same manner as in Comparative Example 1, but the manufacturing method was different from that in Comparative Example 1 in that the heat treatment was performed in the atmosphere at 150 ° C.
[実施例７]
　実施例７では、実施例１と同様にして太陽電池セルが作製された。実施例７では、第１透明導電層６および第２透明導電層８を形成後、銀ペーストがスクリーン印刷される前に、水素を２５％含む雰囲気下で温度１７０℃にて６０分加熱処理が行われ、集電極形成後には、水素を含む雰囲気下での加熱処理が行われなかった。それ以外は、実施例１と同様にして太陽電池セルが作製された。 [Example 7]
In Example 7, a solar battery cell was produced in the same manner as in Example 1. In Example 7, after the first transparent conductive layer 6 and the second transparent conductive layer 8 are formed, before the silver paste is screen-printed, heat treatment is performed at a temperature of 170 ° C. for 60 minutes in an atmosphere containing 25% hydrogen. After the collector electrode was formed, the heat treatment under an atmosphere containing hydrogen was not performed. Other than that was carried out similarly to Example 1, and produced the photovoltaic cell.
[比較例４]
　比較例４では、実施例１と同様にして太陽電池セルが作製されたが、各非晶質シリコン系層を形成後、透明導電層が形成される前に水素を２５％含む雰囲気下で、温度１７０℃にて６０分加熱処理が行われた点において、実施例１とは製造方法が異なっていた。また、比較例４において、集電極形成後には水素を含む雰囲気下での加熱処理が行われなかった。 [Comparative Example 4]
In Comparative Example 4, a solar battery cell was produced in the same manner as in Example 1, but after forming each amorphous silicon-based layer, in an atmosphere containing 25% hydrogen before forming the transparent conductive layer, The manufacturing method was different from Example 1 in that the heat treatment was performed at a temperature of 170 ° C. for 60 minutes. In Comparative Example 4, the heat treatment under an atmosphere containing hydrogen was not performed after the collector electrode was formed.
　実施例７および比較例３，４で得られた太陽電池セルの光電変換特性を、ソーラーシミュレータを用いて評価した結果を表３に示す。表３における光電変換特性は、比較例３の測定値を基準値として規格化された数値が示されている。 Table 3 shows the results of evaluating the photoelectric conversion characteristics of the solar cells obtained in Example 7 and Comparative Examples 3 and 4 using a solar simulator. The photoelectric conversion characteristics in Table 3 are numerical values normalized using the measurement value of Comparative Example 3 as a reference value.
Figure JPOXMLDOC01-appb-T000003
Figure JPOXMLDOC01-appb-T000003
　表１の実施例１～５と比較例１との対比から、水素を含む雰囲気において加熱処理を行うことで、曲線因子が改善するために、変換効率が向上していることがわかる。また、実施例１と実施例４、５との対比から、高水素濃度雰囲気下では、短時間の加熱により変換特性の向上がみられることがわかる。 From the comparison between Examples 1 to 5 and Comparative Example 1 in Table 1, it can be seen that the heat treatment in an atmosphere containing hydrogen improves the conversion efficiency because the curve factor is improved. Further, from comparison between Example 1 and Examples 4 and 5, it can be seen that the conversion characteristics are improved by heating in a short time under a high hydrogen concentration atmosphere.
　表２によれば、加熱処理時の温度が２００℃を超える比較例２では、曲線因子の向上がみられるものの、短絡電流密度および開放電圧の低下に起因して変換効率が低下している。これは、高温での加熱処理によって、導電型非晶質シリコン層から真性シリコン系層へのドープ不純物の拡散や、透明導電層からシリコン系層の異種元素の拡散等が生じたためであると考えられる。
According to Table 2, in Comparative Example 2 in which the temperature during the heat treatment exceeds 200 ° C., the conversion factor is lowered due to the decrease in the short circuit current density and the open circuit voltage although the improvement of the fill factor is observed. This is thought to be due to the diffusion of doped impurities from the conductive amorphous silicon layer to the intrinsic silicon-based layer and the diffusion of foreign elements from the transparent conductive layer to the silicon-based layer due to the heat treatment at a high temperature. It is done.
　表３によれば、透明電極層形成前に水素含有雰囲気下で加熱処理が行われた比較例４では、比較例３に比して変換効率に変化がみられていない。これに対して、透明電極層形成後に水素含有雰囲気下で加熱処理が行われた実施例７では、上記実施例１～６と同様に曲線因子の改善に伴って変換効率が向上している。このことから、変換効率の向上には、透明導電層形成後に水素含有雰囲気下で加熱処理が行われることが重要であることがわかる。 According to Table 3, in Comparative Example 4 in which the heat treatment was performed in a hydrogen-containing atmosphere before forming the transparent electrode layer, no change was observed in the conversion efficiency as compared with Comparative Example 3. On the other hand, in Example 7, in which heat treatment was performed in a hydrogen-containing atmosphere after forming the transparent electrode layer, the conversion efficiency was improved along with the improvement of the fill factor as in Examples 1-6. From this, it can be seen that it is important to perform heat treatment in a hydrogen-containing atmosphere after forming the transparent conductive layer in order to improve the conversion efficiency.
[実施例８]
　実施例８では、図３に模式的に示す結晶シリコン系光電変換装置が製造された。
　実施例１と同様に、エッチングが終了した単結晶シリコン基板１がＣＶＤ装置へ導入され、一方の面（入射面側）に、第１真性非晶質シリコン層２が５ｎｍの膜厚で製膜された。第１真性非晶質シリコン層２上にｐ型非晶質シリコン層３が１０ｎｍの膜厚で製膜された。第１真性非晶質シリコン層およびｐ型非晶質シリコン層の製膜条件は、実施例１と同様とであった。 [Example 8]
In Example 8, the crystalline silicon photoelectric conversion device schematically shown in FIG. 3 was manufactured.
Similarly to Example 1, the single crystal silicon substrate 1 after the etching was introduced into the CVD apparatus, and the first intrinsic amorphous silicon layer 2 having a thickness of 5 nm was formed on one surface (incident surface side). It was done. A p-type amorphous silicon layer 3 having a thickness of 10 nm was formed on the first intrinsic amorphous silicon layer 2. The conditions for forming the first intrinsic amorphous silicon layer and the p-type amorphous silicon layer were the same as in Example 1.
　単結晶シリコン基板１の他方の面（裏面側）に、実施例１と同様に第２真性非晶質シリコン層４が５ｎｍの膜厚で製膜された。第２真性非晶質シリコン層４上にｎ型非晶質シリコン層５１が１０ｎｍの膜厚で製膜された。第１真性非晶質シリコン層およびｎ型非晶質シリコン層の製膜条件は、実施例１と同様であった。 A second intrinsic amorphous silicon layer 4 having a thickness of 5 nm was formed on the other surface (back surface side) of the single crystal silicon substrate 1 in the same manner as in Example 1. An n-type amorphous silicon layer 51 having a thickness of 10 nm was formed on the second intrinsic amorphous silicon layer 4. The conditions for forming the first intrinsic amorphous silicon layer and the n-type amorphous silicon layer were the same as in Example 1.
　ｎ型非晶質シリコン層５１上にｎ型微結晶シリコン層５２が２０ｎｍの膜厚で製膜された。ｎ型微結晶シリコン層の製膜条件は、基板温度が１５０℃、圧力１００Ｐａ、ＳｉＨ４／希釈ＰＨ３流量比が１／５、高周波パワー密度が０．０１Ｗ／ｃｍ２であった。上記希釈ＰＨ３ガスとしては、Ｈ２によりＰＨ３濃度が５０００ｐｐｍまで希釈されたガスが用いられた。 An n-type microcrystalline silicon layer 52 was formed on the n-type amorphous silicon layer 51 with a thickness of 20 nm. The film forming conditions for the n-type microcrystalline silicon layer were a substrate temperature of 150 ° C., a pressure of 100 Pa, a SiH 4 / dilution PH 3 flow rate ratio of 1/5, and a high frequency power density of 0.01 W / cm 2 . As the diluted PH 3 gas, a gas diluted with H 2 to a PH 3 concentration of 5000 ppm was used.
　ｐ型非晶質シリコン層３上およびｎ型微結晶シリコン層５２上のそれぞれに、実施例１と同様にして、ＩＴＯ透明導電層６，８が１００ｎｍの膜厚で製膜された。光入射側の透明導電層６の表面には、実施例１と同様にして銀ペーストがスクリーン印刷され、１５０℃の大気下で６０分間加熱処理が行われて、集電極７が形成された。裏面側の透明導電層８上には、パターン化を行わずに全面に銀ペーストが塗布され、同様に乾燥が行われて、金属電極１０が形成された。 On the p-type amorphous silicon layer 3 and the n-type microcrystalline silicon layer 52, ITO transparent conductive layers 6 and 8 having a thickness of 100 nm were formed in the same manner as in Example 1. A silver paste was screen-printed on the surface of the transparent conductive layer 6 on the light incident side in the same manner as in Example 1, and a heat treatment was performed in the atmosphere at 150 ° C. for 60 minutes to form the collector electrode 7. On the transparent conductive layer 8 on the back side, a silver paste was applied to the entire surface without patterning, and drying was performed in the same manner to form the metal electrode 10.
　電極形成後に、水素を２５％含む雰囲気下で、温度１９０℃にて３０分加熱処理が行われた。 After the electrode formation, heat treatment was performed for 30 minutes at 190 ° C. in an atmosphere containing 25% hydrogen.
[比較例５]
　水素を含む雰囲気下での加熱処理が行われなかったこと以外は、実施例８と同様にして太陽電池セルが作製された。 [Comparative Example 5]
A solar battery cell was produced in the same manner as in Example 8 except that heat treatment was not performed in an atmosphere containing hydrogen.
[実施例９]
　ｐ型非晶質シリコン層の膜厚が５ｎｍに変更された以外は、実施例８と同様にして太陽電池セルが作製された。 [Example 9]
A solar cell was produced in the same manner as in Example 8 except that the thickness of the p-type amorphous silicon layer was changed to 5 nm.
[比較例６]
　水素を含む雰囲気下での加熱処理が行われなかったこと以外は、実施例８と同様にして太陽電池セルが作製された。 [Comparative Example 6]
A solar battery cell was produced in the same manner as in Example 8 except that heat treatment was not performed in an atmosphere containing hydrogen.
　実施例８，９および比較例５，６の太陽電池セルの光電変換特性を、ソーラーシミュレータを用いて評価した結果を表４に示す。 Table 4 shows the results of evaluating the photoelectric conversion characteristics of the solar cells of Examples 8 and 9 and Comparative Examples 5 and 6 using a solar simulator.
Figure JPOXMLDOC01-appb-T000004
Figure JPOXMLDOC01-appb-T000004
　実施例８と比較例５との対比、および実施例９と比較例６との対比から明らかなように、ｎ型シリコン系層が非晶質シリコン層と微結晶シリコン層の２層からなる構成においても、水素含有雰囲気下で加熱処理を行うことによって、曲線因子が改善されて、変換効率が向上していることが分かる。 As is clear from the comparison between Example 8 and Comparative Example 5 and the comparison between Example 9 and Comparative Example 6, the n-type silicon-based layer is composed of two layers of an amorphous silicon layer and a microcrystalline silicon layer. Also, it can be seen that by performing the heat treatment in a hydrogen-containing atmosphere, the fill factor is improved and the conversion efficiency is improved.
　また、ｐ型非晶質シリコン層の膜厚が５ｎｍである実施例９と比較例６とを対比すると、実施例９では、曲線因子が約５％向上していることに加えて、開放電圧も約２％向上している。すなわち、ｐ層の厚みが小さい場合には、水素含有雰囲気下での加熱処理による変換特性改善効果がより顕著であることが分かる。 Further, when Example 9 in which the thickness of the p-type amorphous silicon layer is 5 nm is compared with Comparative Example 6, in Example 9, in addition to the fact that the fill factor is improved by about 5%, the open circuit voltage is increased. Also improved by about 2%. That is, when the thickness of the p layer is small, it can be seen that the effect of improving the conversion characteristics by the heat treatment in a hydrogen-containing atmosphere is more remarkable.
[実施例１０～１７、比較例７]
　加熱処理時の水素含有量、温度および時間が表５に示すように変更された以外は、実施例９と同様にして太陽電池セルが作製された。 [Examples 10 to 17, Comparative Example 7]
A solar cell was produced in the same manner as in Example 9 except that the hydrogen content, temperature, and time during the heat treatment were changed as shown in Table 5.
[比較例８]
　水素を含む雰囲気下での加熱処理が行われなかったこと以外は、実施例９と同様にして太陽電池セルが作製された。 [Comparative Example 8]
A solar battery cell was produced in the same manner as in Example 9 except that the heat treatment under an atmosphere containing hydrogen was not performed.
[比較例９]
　電極形成後に、水素含有雰囲気下で加熱処理が行われる代わりに、温度１９０℃の大気下で３０分加熱処理が行われたこと以外は、実施例９と同様にして太陽電池セルが作製された。 [Comparative Example 9]
After the electrode formation, a solar battery cell was produced in the same manner as in Example 9 except that the heat treatment was performed in an atmosphere of 190 ° C. for 30 minutes instead of the heat treatment in a hydrogen-containing atmosphere. .
　実施例１０～１７、および比較例８，９で得られた太陽電池セルの光電変換特性を、ソーラーシミュレータを用いて評価した結果を、表５に示す。なお、表５においては、比較例８の測定値を基準値として規格化された変換特性の値が示されている。 Table 5 shows the results of evaluating the photoelectric conversion characteristics of the solar cells obtained in Examples 10 to 17 and Comparative Examples 8 and 9 using a solar simulator. In Table 5, conversion characteristic values normalized with the measured values of Comparative Example 8 as reference values are shown.
Figure JPOXMLDOC01-appb-T000005
Figure JPOXMLDOC01-appb-T000005
　水素を含む雰囲気下で加熱処理が行われた実施例１０～１７では、比較例８に比して、曲線因子および開放電圧が改善された結果、変換効率が向上している。また、上記実施例１２～１７では、比較例８に対して開放電圧が１％（約７ｍＶ）以上改善されている。 In Examples 10 to 17 in which the heat treatment was performed in an atmosphere containing hydrogen, the conversion factor was improved as a result of the improvement of the fill factor and the open-circuit voltage as compared with Comparative Example 8. In Examples 12 to 17, the open circuit voltage is improved by 1% (about 7 mV) or more compared to Comparative Example 8.
　従来より、太陽電池の製造工程において、大気雰囲気下で加熱処理を行うことで透明電極を低抵抗化する手法が知られていたが、透明電極の低抵抗化によって開放電圧が改善されることはないと考えられる。これらの結果を考慮すると、本発明における水素含有雰囲気下での加熱処理によって、界面に生じた欠陥が修復されるために、変換効率が向上していると考えられる。 Conventionally, a method for reducing the resistance of a transparent electrode by performing a heat treatment in an air atmosphere in a manufacturing process of a solar cell has been known, but the open circuit voltage is improved by reducing the resistance of a transparent electrode. It is not considered. Considering these results, it is considered that the conversion efficiency is improved because defects generated at the interface are repaired by the heat treatment in the hydrogen-containing atmosphere in the present invention.
　一方、水素を含有しない大気下（水素濃度０％）で、１９０℃３０分の加熱が行われた比較例９の変換特性は比較例８と同様であった。これに対して、水素濃度０．５体積％の雰囲気下で、１９０℃３０分の加熱処理が行われた実施例１０では、主に曲線因子の改善による変換特性の向上がみられている。 On the other hand, the conversion characteristics of Comparative Example 9 in which heating was performed at 190 ° C. for 30 minutes under an atmosphere containing no hydrogen (hydrogen concentration 0%) were the same as those of Comparative Example 8. On the other hand, in Example 10 in which the heat treatment at 190 ° C. for 30 minutes was performed in an atmosphere with a hydrogen concentration of 0.5% by volume, conversion characteristics were improved mainly by improving the fill factor.
　水素濃度８０％で１０分間の加熱処理が行われた実施例１７では、短絡電流密度の低下がみられるが、曲線因子および開放電圧の改善効果が大きいために、比較例８に比して変換特性が向上している。これらの結果から、水素濃度が高い雰囲気下で短時間の加熱処理を行うことにより、透明導電層の還元による短絡電流密度の低下が抑制されつつ曲線因子が改善されるために、効率的に変換特性を向上し得ることがわかる。 In Example 17 in which the heat treatment was performed for 10 minutes at a hydrogen concentration of 80%, the short circuit current density was reduced, but since the improvement effect of the fill factor and open circuit voltage was large, the conversion was compared with Comparative Example 8. The characteristics are improved. From these results, the heat treatment for a short time in an atmosphere with high hydrogen concentration improves the fill factor while suppressing the decrease in short-circuit current density due to the reduction of the transparent conductive layer. It can be seen that the characteristics can be improved.
　１　　　　一導電型単結晶シリコン基板
　２，４　　真性シリコン系層
　３　　　　ｐ型シリコン系層
　５　　　　ｎ型シリコン系層
　５１　　　ｎ型非晶質シリコン系層
　５２　　　ｎ型微結晶シリコン系層
　６，８　　透明導電層
　７，９　　集電極
　１０　　　反射電極 DESCRIPTION OF SYMBOLS 1 Single conductivity type single crystal silicon substrate 2,4 Intrinsic silicon system layer 3 p-type silicon system layer 5 n type silicon system layer 51 n type amorphous silicon system layer 52 n type microcrystalline silicon system layer 6, 8 Transparent conductive layer 7, 9 Collector electrode 10 Reflective electrode

Claims (3)

  1. 　一導電型単結晶シリコン基板の一方の面に第１真性シリコン系層、ｐ型シリコン系層、および第１透明導電層をこの順に有し、前記一導電型単結晶シリコン基板の他方の面に第２真性シリコン系層、ｎ型シリコン系層および第２透明導電層をこの順に有する結晶シリコン系光電変換装置を製造する方法であって、
    　前記第１透明導電層および前記第２透明導電層の少なくとも一方が形成された後に、加熱処理が行われ、
    　前記加熱処理が、水素を含む雰囲気下で２００℃未満の温度で行われる、結晶シリコン系光電変換装置の製造方法。     A first intrinsic silicon-based layer, a p-type silicon-based layer, and a first transparent conductive layer are disposed in this order on one surface of the one-conductivity-type single crystal silicon substrate, and the other surface of the one-conductivity-type single-crystal silicon substrate is disposed on the other surface. A method for producing a crystalline silicon-based photoelectric conversion device having a second intrinsic silicon-based layer, an n-type silicon-based layer, and a second transparent conductive layer in this order,
    After at least one of the first transparent conductive layer and the second transparent conductive layer is formed, a heat treatment is performed,
    A method for manufacturing a crystalline silicon-based photoelectric conversion device, wherein the heat treatment is performed at a temperature of less than 200 ° C. in an atmosphere containing hydrogen.
  2. 　前記ｐ型シリコン系層が、３ｎｍ～８ｎｍの膜厚で形成される、請求項１に記載の結晶シリコン系光電変換装置の製造方法。 2. The method for producing a crystalline silicon-based photoelectric conversion device according to claim 1, wherein the p-type silicon-based layer is formed with a thickness of 3 nm to 8 nm.
  3. 　前記ｎ型シリコン系層として、ｎ型非晶質シリコン系層およびｎ型微結晶シリコン系層が、前記第２真性シリコン系層側から順に形成される、請求項１または２に記載の結晶シリコン系光電変換装置の製造方法。 3. The crystalline silicon according to claim 1, wherein an n-type amorphous silicon-based layer and an n-type microcrystalline silicon-based layer are formed in order from the second intrinsic silicon-based layer side as the n-type silicon-based layer. Method of manufacturing a photoelectric conversion device.
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