WO2011120275A1 - 一种控制调制器相位延迟偏置点的方法及装置 - Google Patents
一种控制调制器相位延迟偏置点的方法及装置 Download PDFInfo
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- WO2011120275A1 WO2011120275A1 PCT/CN2010/076052 CN2010076052W WO2011120275A1 WO 2011120275 A1 WO2011120275 A1 WO 2011120275A1 CN 2010076052 W CN2010076052 W CN 2010076052W WO 2011120275 A1 WO2011120275 A1 WO 2011120275A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
- H04L27/2032—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner
- H04L27/2053—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases
- H04L27/206—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases using a pair of orthogonal carriers, e.g. quadrature carriers
- H04L27/2067—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases using a pair of orthogonal carriers, e.g. quadrature carriers with more than two phase states
- H04L27/2071—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases using a pair of orthogonal carriers, e.g. quadrature carriers with more than two phase states in which the data are represented by the carrier phase, e.g. systems with differential coding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/501—Structural aspects
- H04B10/503—Laser transmitters
- H04B10/505—Laser transmitters using external modulation
- H04B10/5053—Laser transmitters using external modulation using a parallel, i.e. shunt, combination of modulators
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/501—Structural aspects
- H04B10/503—Laser transmitters
- H04B10/505—Laser transmitters using external modulation
- H04B10/5057—Laser transmitters using external modulation using a feedback signal generated by analysing the optical output
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/516—Details of coding or modulation
- H04B10/548—Phase or frequency modulation
- H04B10/556—Digital modulation, e.g. differential phase shift keying [DPSK] or frequency shift keying [FSK]
- H04B10/5561—Digital phase modulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0018—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0044—Control loops for carrier regulation
- H04L2027/0046—Open loops
- H04L2027/0051—Harmonic tracking
Definitions
- the present invention relates to the field of communications technologies, and in particular, to a method and apparatus for controlling a modulator phase delay bias point. Background technique
- DQPSK Different Quadrature Phase Shift Keying
- DQPSK modulation is based on four different phases of light waves to represent different data signals, so the symbol speed is only half of the symbol speed of conventional optical amplitude modulation, so the requirements for optical devices are much smaller.
- DQPSK modulation has superior dispersion and polarization mode dispersion performance with respect to optical amplitude modulation, and is more suitable for large-capacity, long-distance optical transmission systems.
- the optical carrier can generally be expressed as: E,.
- E is the field strength, ".
- (t) is the modulation phase.
- the basic working principle of DQPSK modulation is: The information to be transmitted is encoded in the differential phase of successive optical bits, and any value of [0, ⁇ /2 , ⁇ , 3 / 2 ] can be taken.
- the more commonly used modulator is a lithium niobate modulator, but in practical applications, due to the characteristics of the material of the lithium niobate modulator itself, that is, the sensitivity to temperature and stress, therefore, To achieve precise phase control, it is necessary to pass certain peripheral control circuits. To guarantee.
- the commonly used control methods include the following two methods: The first method is: setting pilot signals of different frequencies on the I and Q arms of the lithium niobate modulator, and then collecting the backlight detection signals and filtering out the difference therein. The frequency signal, when the beat signal disappears, the lithium niobate modulator is locked to the normal bias point.
- the disadvantage of this method is that since the output amplitude of the difference frequency signal is very small, it is difficult to accurately detect whether the difference frequency signal actually disappears, thereby affecting the accuracy of controlling the position of the bias point.
- the second method is: directly detecting the backlight detection signal, determining whether the backlight detection signal contains an RF (Radio Frequency) harmonic signal with the same data bit stream rate, and setting the bias point to satisfy the RF harmonic signal power. At the very least, it is determined that the current bias point is in a normal lock state.
- the disadvantage of this method is that the circuit design is more complicated, and the cost of implementation is higher and the feasibility is poor.
- the implementation of the peripheral control circuit will be directly related to the performance of the entire DQPSK modulation system.
- the phase delay of the above two methods for the lithium niobate modulator The control accuracy of the bias point is low, which reduces the performance of the entire DQPSK modulation system.
- embodiments of the present invention provide a method and apparatus for controlling a phase delay bias point of a modulator, which improves the accuracy of controlling a phase delay bias point of a modulator.
- the invention provides a method for controlling a phase delay bias point of a modulator, comprising: collecting a backlight detection current signal of a modulator under different working states, and determining a harmonic amplitude of a backlight detection current signal corresponding to different working states Value
- the detected value is compared with a target value of the set phase delay bias point, and the position of the phase delay bias point corresponding to the modulator is controlled according to the comparison result.
- the present invention also provides an apparatus for controlling a phase delay bias point of a modulator, comprising: a signal collecting unit, a harmonic amplitude value determining unit, a detected value determining unit, a comparing unit, and a control unit;
- a signal collecting unit configured to collect a backlight detecting current signal output by the modulator under different working states
- a harmonic amplitude value determining unit configured to determine a harmonic amplitude value of the backlight detecting current signal corresponding to different working states of the signal collecting unit set;
- a detection value determining unit configured to determine a detection value of a phase delay bias point corresponding to the modulator according to the harmonic amplitude value determined by the harmonic amplitude value determining unit;
- a comparing unit configured to compare the detected value determined by the detected value determining unit with a target value of the set phase delay bias point
- control unit configured to control a position of a phase delay bias point corresponding to the modulator according to a comparison result of the comparison unit.
- the corresponding harmonic amplitude values are determined, and then the phase delay offset is determined according to the determined harmonic amplitude value.
- the detected value of the point, and the position of the phase delay bias point corresponding to the modulator is controlled by comparing the detected value with the target value of the set phase delay bias point.
- the modulator is actually working.
- the output value in the state controls the position of the bias point, taking into account the interference of the various external factors that may cause the modulator.
- the working state of the modulator can be flexibly set, and the output values of the various working states are combined.
- the test value of the phase delay bias point is determined, thereby improving the accuracy of controlling the phase delay bias point position of the modulator and improving the performance of the DQPSK modulation system.
- FIG. 1 is a flow chart of a method for controlling a phase delay bias point of a modulator according to the present invention
- FIG. 2 is a flowchart of a method for controlling a phase delay bias point of a modulator based on a control mode three according to the present invention
- FIG. 3 is a flow chart of a method for determining a harmonic amplitude value of a backlight detection current signal according to the present invention
- FIG. 4 is a flow chart of a method for controlling a bias point of a lithium niobate modulator according to a comparison result according to the present invention
- FIG. 5 is a basic structural diagram of a lithium niobate modulator according to the present invention.
- FIG. 7 is a timing diagram of implementing a pilot signal added according to the present invention.
- FIG. 9 is a schematic diagram of an apparatus for controlling a phase delay bias point of a modulator according to the present invention. detailed description
- the present invention provides a method and apparatus for controlling the phase delay bias point of a modulator, the basic scheme of which is: ⁇ ⁇ modulator output in different working states
- the backlight detects the current signal, and determines a harmonic amplitude value of the backlight detection current signal corresponding to different working states; determining, according to the determined harmonic amplitude value, a detection value of the phase delay bias point corresponding to the modulator;
- the detected value is compared with a target value of the set phase delay bias point, and the position of the phase delay bias point corresponding to the modulator is controlled according to the comparison result.
- FIG. 1 is a flowchart of a method for controlling a phase delay bias point of a modulator according to the present invention. As shown in FIG. 1, the method includes the following steps:
- Step 101 Collecting a backlight detection current signal outputted by the modulator under different working states, and determining a harmonic amplitude value of the backlight detection current signal corresponding to different working states.
- Step 102 Determine a detected value of a phase delay bias point corresponding to the modulator according to the determined harmonic amplitude value of the backlight detection current signal corresponding to different working states.
- Step 103 Compare the determined detection value with a target value of the set phase delay bias point, and control a position of the phase delay bias point corresponding to the modulator according to the comparison result.
- the working state of the modulator can be flexibly set according to the control requirement.
- the different working states of the modulator may be: a state in which the pilot signal is not input to the modulator; and a time division to the modulator Superimpose the state of two different phase-shifted pilot signals.
- one of the pilot signals superimposed to the modulator can select a phase shift of 0, which can reduce the amount of calculation, thereby improving the control efficiency.
- superimposing the pilot signal to the modulator is to superimpose the pilot signal on the two bias voltage signals of the modulators I and Q.
- step 101 determining a harmonic amplitude value of the backlight detection current signal corresponding to different working states, comprising: determining a harmonic amplitude value of the backlight detection current signal corresponding to different working states after the filtering process.
- harmonic amplitude values of the backlight detection current signals corresponding to different working states can be determined by the following formula:
- v d I , ⁇ ⁇ 1 , I ⁇ respectively represent the modulation amplitude, voltage and bias voltage of the modulator I path, Set by the system separately;
- v d , e , ⁇ ⁇ , ⁇ , e represent the modulation amplitude, voltage and bias voltage of the modulator Q path, respectively, which are set by the system;
- step 102 determining the detected value of the phase delay bias point corresponding to the modulator according to the harmonic amplitude value determined in step 101, comprising: combining the harmonic amplitude values of the backlight detection current signals corresponding to different working states
- step 103 the position of the phase delay bias point corresponding to the modulator is controlled according to the comparison result, preferably by any one of the following control modes:
- Control method 1 Directly control according to the current comparison result, as follows:
- the phase delay bias point corresponding to the modulator is controlled to be the current phase delay bias point of the modulator and locked; if according to the current comparison result It is determined that the difference between the detected value and the target value is not less than the set threshold, and the phase delay bias point corresponding to the modulator is adjusted within the difference range.
- Control method 2 according to the current comparison results and subsequent comparison of the comparison results control, as follows:
- the phase delay bias point corresponding to the modulator is controlled to be the current phase delay bias point of the modulator and locked; if according to the current comparison result Determining that the difference between the detected value and the target value is not less than the set threshold, adjusting the phase delay bias point corresponding to the modulator within the difference range; and adjusting the phase delay bias point corresponding to the modulator, returning ⁇ Backlight detection of modulator output under different working conditions
- the step of measuring the current signal returns to step 101.
- Control method 3 according to the historical comparison result and the current comparison result control, specifically as follows: Before controlling the position of the phase delay bias point corresponding to the modulator according to the comparison result, determining whether the detected value determined before determining the current detection value is saved Comparing with the target value of the set phase delay bias point, if so, acquiring the historical comparison result, and determining a comparison result of the saved history comparison result and the current comparison result is used to control the modulator The position of the corresponding phase delay bias point; if not, it is controlled according to the current comparison result.
- the specific control process of controlling the modulator bias point according to the historical comparison result or the current comparison result is consistent with the basic principle described in the foregoing control mode 1 or control mode 2, and details are not described herein again.
- the above method for controlling a phase delay bias point of a modulator provided by the present invention is particularly suitable for
- the lithium niobate modulator in the DQPSK modulation system can improve the accuracy of phase delay bias point control, on the other hand, it also has higher flexibility and is simple to implement.
- a lithium niobate modulator will be described in detail below as an example.
- FIG. 2 is a flow chart of a method for controlling a phase delay bias point of a modulator based on a control mode three according to the present invention. As shown in FIG. 2, the method includes the following steps:
- Step 201 In the case of a pilot signal superimposed on the first lithium niobate modulator, determining a harmonic amplitude value of the backlight detection current signal at the first sample point according to the first superimposed pilot signal .
- Step 202 In the case of the pilot signal superimposed on the second time of the lithium niobate modulator, determine the harmonic amplitude value A2 of the backlight detection current signal at the second sample point according to the second superimposed pilot signal.
- Step 203 Determine a harmonic amplitude value A3 of the backlight detection current signal at the third sample point without superimposing the pilot signal on the lithium niobate modulator.
- Step 204 Determine a detection value of the phase delay bias point according to the harmonic amplitude values A1, A2, and A3.
- Step 205 Determine whether a comparison result of the previously determined phase delay bias point and a target value of the set phase delay bias point (history comparison result) is saved, and if yes, execute step 206, if no, Go back to step 201.
- Step 206 Compare the detected value of the currently determined phase delay bias point with the target value of the set phase delay bias point to obtain a current comparison result.
- Step 207 Adjust the phase delay bias point of the lithium niobate modulator according to the current comparison result and the saved comparison result, and lock.
- step 201, step 202, and step 203 may use different execution sequences, for example, adjust the execution order to step 202, step 201, and step 203, or adjust the execution order to step 203, step 201, and step 202, where - List.
- step 201 The specific process in step 201 is:
- FIG. 3 is a method for determining a backlight detection current signal according to the present invention.
- a method flow diagram for harmonic amplitude values the method comprising the steps of:
- Step 301 Collecting a backlight detection current signal output by the lithium niobate modulator after superimposing the pilot signal.
- Step 302 Perform filtering processing on the backlight detection current signal of the set.
- filtering the backlight detection current signal of the set may use a narrowband band pass filter whose center frequency is equal to the output frequency of the superimposed pilot signal, that is, the output frequency of the superimposed pilot signal is taken as a center point.
- the filtering process based on the pilot signal input this time, the center frequency of the narrowband bandpass filter used here is &.
- step 303 the pilot signal is detected, and the harmonic amplitude value of the backlight detection current signal at the first sampling point, that is, the phase shift of the detected pilot signal is equal to the backlight detection current signal corresponding to the phase shift of the superimposed pilot signal.
- the harmonic amplitude value is Al. According to the pilot signal input this time, the harmonic amplitude value of the corresponding backlight detection current signal when the pilot signal phase shift is equal to 0 is determined as the final harmonic amplitude value A1 to be obtained.
- step 202 the specific execution process of step 202 is basically the same as the specific execution process of step 201 above.
- the second input pilot signal and the first input pilot signal are used for the output.
- the power is the same and the phase shift is different.
- the phase shift of the second input pilot signal is ⁇ and 0 ⁇ 0.
- the harmonic amplitude value of the backlight detection current signal at the second sample point is the harmonic amplitude value A2 of the corresponding backlight detection current signal when the phase shift of the pilot signal is detected to be equal to 0. .
- the setting of the pilot signal for the first superimposition and the setting of the pilot signal for the second superimposition are only preferred embodiments of the present invention, and the superimposed pilot signals are The phase shift of one of the pilot signals is set to 0, which reduces the amount of calculation. In practical applications, it is only necessary to ensure that the two superimposed pilot signals use different phase shifts, for example, the phase shift of the first superimposed pilot signal is the phase of the second superimposed pilot signal. Move to, where the setting of the pilot signal is not described here.
- FIG. 4 is a method for implementing the bias point of the lithium niobate modulator according to the comparison result. Flow chart, the method includes the following steps:
- Step 401 Determine, according to the current comparison result and the saved comparison result, a bias point detection value corresponding to a comparison result in which the target value difference of the set phase delay bias point is the smallest.
- the current comparison result is the detected value of the currently determined phase delay bias point and
- the comparison result of the target value of the set phase delay bias point the saved comparison result is a comparison result between the detected value of the currently determined phase delay bias point and the target value of the set phase delay bias point.
- Step 402 Determine whether the comparison result with the smallest difference satisfies the preset threshold requirement. If yes, go to step 403. If no, go to step 404.
- Step 403 Lock the phase delay bias point of the lithium niobate modulator to the detected value position of the currently determined phase delay bias point.
- Step 404 Adjust a phase delay bias point of the lithium niobate modulator within a difference range.
- step 201 can be further returned.
- FIG. 5 is a basic structural diagram of the lithium niobate modulator according to the present invention, as shown in FIG. 5, according to the structure shown in FIG. After analysis, it can be concluded that:
- Vw, ⁇ ⁇ I ⁇ respectively represent the modulation amplitude, voltage and bias voltage of the I path;
- v d , e , ⁇ ⁇ , ⁇ and e respectively represent the modulation amplitude, voltage and bias voltage of the Q path.
- the position of the phase delay bias point is controlled by the lithium niobate modulator to meet the set conditions:
- the control of the /, e bias point can be performed by a general method.
- the output intensity represented by ⁇ ⁇ ⁇ ⁇ is:
- the value obtained by solving the above equations (4), (5), and (6) is the detection value of the phase delay bias point.
- FIG. 6 is a preferred embodiment of the present invention for controlling a phase delay bias point of a modulator, as shown in FIG.
- the optical signal emitted from the laser (100) is divided into two paths of I and Q after passing through a 3dB coupler (101), and then the I path light passes through the MZ modulator 1 (102A) and outputs E lout , MZ modulator 1 (102A).
- Modulated by DATASTREAM1 ie, stream 1
- its bias point is set by the applied voltage DC BIAS1.
- the same Q path light passes through MZ modulator 2 (102B) and outputs E Qout .
- MZ Modulator 2 (102B) is modulated by DATASTREAM2 (ie, Data Stream 2) with its bias point set by the applied voltage DC BIAS2. ( ⁇ and after the phase delays of ( ? (104A) and -(p IQ (104B) respectively), E is synthesized by the 3dB coupler (105) and the 3dB coupler (106). Mi and E outTln , where, E Mff/ perhaps is used in the system for backlight detection.
- the main body of the bias point control is a digital processing chip DSP (110), which controls three high-precision DA (114) outputs two pilots whose frequency is &, but the phase shift is different (can be set to 0 and ⁇ , respectively).
- the signal and a DC signal without a pilot signal can be freely switched between the three by the DSP (110) control switch (113).
- the pilot signal without phase shift is first added to the two main arms of the DQPSK lithium niobate modulator, and the pilot signal (phase shift is 0) is superimposed, and the high-speed high-precision AD (109) is utilized.
- the first harmonic component filtered by the narrowband filter (108) is integrated into the DSP (110), and the amplitude value A1 of the signal can be expressed by the above formula (4). Then, the phase of the pilot signal is switched to phase shift ⁇ , and the first harmonic component of the backlight detection signal is also collected into the DSP ( l lO ), and the signal amplitude A2 is represented by the formula (5). Finally, without the pilot signal, the same backlight detection signal is collected, and the signal amplitude A3 is represented by the formula (6).
- FIG. 7 is a timing diagram of the applied pilot signal according to the present invention.
- FIG. 8 is a flowchart of a control method for implementing the DSP in the present invention, and the method includes the following steps:
- Step 801 The DSP controls the pilot signal whose output frequency is &, and the phase shift is 0, and the backlight detection signal is input from the high-speed high-precision AD to obtain the amplitude value A1;
- Step 802 the DSP controls the phase shift of the pilot signal and enters the backlight detection signal from the high-speed high-precision AD to obtain the amplitude value ⁇ 2;
- Step 803 the DSP does not superimpose the pilot signal, and the backlight detection signal is input from the high-speed high-precision AD to obtain the amplitude value A3;
- Step 804 jointly solving the equations of the amplitude values Al, ⁇ 2, and A3, and obtaining the current bias point 2; Step 805, adjusting the bias voltage, and locking the modulator position;
- Step 806 After delaying for a period of time, repeat steps 801 to 805 until the preset bias point target value is met.
- FIG. 9 is a schematic diagram of an apparatus for controlling a phase delay bias point of a modulator according to the present invention. As shown in FIG. 9, the apparatus includes:
- a signal collecting unit 901 configured to collect a backlight detecting current signal output by the modulator under different working states
- the harmonic amplitude value determining unit 902 is configured to determine a harmonic amplitude value of the backlight detecting current signal corresponding to different working states of the signal collecting unit 901;
- the detected value determining unit 903 is configured to determine a detected value of a phase delay bias point corresponding to the modulator according to the harmonic amplitude value determined by the harmonic amplitude value determining unit 902;
- the comparing unit 904 is configured to compare the detected value determined by the detected value determining unit 903 with the target value of the set phase delay bias point;
- the control unit 905 is configured to control the position of the phase delay bias point corresponding to the modulator according to the comparison result of the comparing unit 904.
- the signal collecting unit 901 is specifically configured to:
- the backlight detects a current signal outputted by the modulator in a state where the pilot signal is not input to the modulator and a state in which the two different phase-shifted pilot signals are superimposed on the modulator.
- the signal collecting unit 901 is specifically configured to:
- the backlight detection current output by the modulator in a state in which the pilot signal is not input to the modulator and the two different phase-shifted pilot signals are superimposed on the two bias voltage signals of the modulators I and Q. signal.
- the harmonic amplitude value determining unit 902 is specifically configured to: determine a harmonic amplitude value of the backlight detecting current signal corresponding to different working states after the filtering process. In a preferred embodiment of the present invention, the harmonic amplitude value determining unit 902 is specifically configured to: determine a harmonic amplitude of a backlight detecting current signal corresponding to different working states by using the following formula:
- V, V, I ⁇ respectively represent the modulation amplitude, voltage and bias voltage of the modulator I, respectively, which are set by the system;
- v d , e , ⁇ ⁇ , ⁇ , e represent the modulation amplitude, voltage and bias voltage of the modulator Q path, respectively, which are set by the system;
- the detection value determining unit 903 is specifically configured to:
- the detection group consisting of the harmonic amplitude values of the backlight detection current signals corresponding to different working states is coupled to obtain the detected value of the phase delay bias point corresponding to the modulator 2 .
- control unit 905 is further configured to:
- control unit 905 is specifically configured to:
- the phase delay bias point corresponding to the modulator is controlled to be the current phase delay bias point of the modulator and locked;
- the phase delay bias point corresponding to the modulator is adjusted within the difference range.
- control unit 905 is further configured to:
- control signal collecting unit 901 collects the backlight detecting current signal output by the modulator after adjusting the phase delay bias point in different operating states.
- the above apparatus for controlling the phase delay bias point of the modulator includes only the logical division according to the functions implemented by the apparatus. In practical applications, the superposition or splitting of the above units may be performed.
- the function implemented by the device provided in this embodiment corresponds to the method flow for controlling the phase delay bias point of the modulator provided by the foregoing embodiment, and the more detailed processing flow implemented by the device is in the above method embodiment. The detailed description of Zhongzhang is not described in detail here.
- the present invention also provides a system for controlling a modulator phase delay bias point, the system comprising the following components:
- a narrowband bandpass filter having a center frequency of ⁇ for filtering to obtain a first harmonic amplitude value of the backlight detection current signal
- High-speed high-precision AD for collecting the first harmonic amplitude value of the backlight detection signal into the digital algorithm processing unit
- Digital algorithm processing units such as DSP, FPGA, etc. for the generation and switching of pilot signals, and the implementation of feedback control algorithms
- High-speed, high-precision DA for converting the digital pilot signal generated by the digital algorithm processing unit into an analog pilot signal, and feeding back the feedback amount of the digital algorithm processing unit to the lithium niobate modulator.
- the digital control switch for time-division switching of pilot signals.
- the corresponding harmonic amplitude values are determined, and then the phase delay offset is determined according to the determined harmonic amplitude value.
- the detected value of the point, and the position of the phase delay bias point corresponding to the modulator is controlled by comparing the detected value with the target value of the set phase delay bias point.
- the modulator is actually working.
- the output value in the state controls the position of the bias point, taking into account the interference of the various external factors that may cause the modulator.
- the working state of the modulator can be flexibly set, and the output values of the various working states are combined.
- the test value of the phase delay bias point is determined, thereby improving the accuracy of controlling the phase delay bias point position of the modulator and improving the performance of the DQPSK modulation system.
- the phase delay bias point of the DQPSK lithium niobate modulator can be locked at the correct position, and the bias point can only be locked at a specific position compared with other control methods.
- the technical solution provided by the embodiment can lock the bias point to any value, and can improve the control precision, can more conveniently and flexibly control the position of the bias point, has high applicability, and is beneficial to digital implementation, and is compatible with other systems. Compared, it has a very obvious cost advantage, and the control method is relatively flexible and simple.
- the technical solution provided by the embodiment of the present invention has an important significance for the 40G dense wavelength division system because the DQPSK lithium niobate modulator can be locked at the correct bias point and has low cost.
- the spirit and scope of the invention Thus, it is intended that the present invention cover the modifications and modifications of the invention
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Abstract
本发明公开了一种控制调制器相位延迟偏置点的方法及装置,包括:采集调制器在不同工作状态下输出的背光检测电流信号,并确定对应不同工作状态的背光检测电流信号的谐波幅度值;根据确定的所述谐波幅度值,确定所述调制器对应的相位延迟偏置点的检测值;将所述检测值与设定的相位延迟偏置点的目标值进行比较,根据比较结果控制所述调制器对应的相位延迟偏置点的位置。根据该技术方案,提高了控制调制器的相位延迟偏置点位置的准确度,提高了DQPSK调制***的性能。
Description
一种控制调制器相位延迟偏置点的方法及装置 技术领域
本发明涉及通信技术领域, 尤其涉及一种控制调制器相位延迟偏置点 的方法及装置。 背景技术
近几年来, 随着光传输***速度的提高和容量的增大, 以 DQPSK ( Differential Quadrature Phase Shift Keying, 差分四相相移键控 )调制为代 表的光相位调制方法越来越受到业界的重视。 DQPSK调制是以光波的四个 不同相位来代表不同的数据信号, 因此其码元速度只有传统光幅度调制时 码元速度的一半, 从而对于光器件的要求小了许多。 此外, DQPSK调制相 对于光幅度调制还具有更加优越的色散和偏振模色散性能, 更加适用于大 容量、 长距离的光传输***。
在光纤通讯中, 光载波一般可以表示为: E,.
其中, E 为场强, 《。为光载波的角频率, (t)为调制相位。 DQPSK调制的基本工作 原理为: 将要传输的信息在连续光比特的差分相位中进行编码,用 表示, 可取 [0, π/2 , π, 3 /2]中的任意值。 ^叚设第 -1个光比特脉冲的相位 为 θ _ 若相邻比特为 {0、 0}, 则 0 = ^_i)+ ; 若相邻比特位为 {0、
1}, 则^ = ^ _1) + /2; 若相邻比特位为 {1、 1}, 则 = 1); 若相邻 比特位为 {1、 0}, 则^ = ^ - 1) + 3 /2。
在 DQPSK调制***中, 比较常用的调制器为铌酸锂调制器,但在实际 应用中, 由于铌酸锂调制器自身材料的特性, 即对温度和应力都有较高的 敏感度, 因此, 要实现精准的相位控制, 就必须通过一定的***控制电路
来保证。 目前常用的控制方法包括以下两种方法: 第一种方法是: 在铌酸 锂调制器的 I、 Q臂上设置不同频率的导频信号, 然后釆集背光检测信号并 滤除其中含有的差频信号, 当差频信号消失时, 铌酸锂调制器便锁定到了 正常的偏置点上。 这种方法的缺点是, 由于差频信号的输出幅度非常小, 因此很难准确检测出差频信号是否真正消失, 从而影响控制偏置点位置的 精确度。 第二种方法是: 直接釆样背光检测信号, 判断背光检测信号中是 否含有与数据比特流速率相同的 RF ( Radio Frequency, 射频)谐波信号, 当偏置点的设置满足 RF谐波信号功率最小时,则确定当前偏置点处于正常 锁定状态。 这中方法的缺点是, 电路设计比较复杂, 且实现的成本较高, 可行性较差。
不管釆用何种控制方法对铌酸锂调制器的偏置点进行控制, ***控制 电路的实现都将直接关系到整个 DQPSK调制***的性能,上述两种方法对 于铌酸锂调制器的相位延迟偏置点的控制精确度低, 从而降低了整个 DQPSK调制***的性能。 发明内容
有鉴于此, 本发明实施例提供一种控制调制器相位延迟偏置点的方法 及装置, 提高了控制调制器相位延迟偏置点的精确度。
本发明通过如下技术方案实现:
发明实提供了一种控制调制器相位延迟偏置点的方法, 包括: 釆集调制器在不同工作状态下输出的背光检测电流信号, 并确定对应 不同工作状态的背光检测电流信号的谐波幅度值;
根据确定的所述谐波幅度值, 确定所述调制器对应的相位延迟偏置点 的检测值;
将所述检测值与设定的相位延迟偏置点的目标值进行比较, 根据比较 结果控制所述调制器对应的相位延迟偏置点的位置。
本发明还提供了一种控制调制器相位延迟偏置点的装置, 包括: 信号 釆集单元、 谐波幅度值确定单元、 检测值确定单元、 比较单元、 控制单元; 其中,
信号釆集单元, 用于釆集调制器在不同工作状态下输出的背光检测电 流信号;
谐波幅度值确定单元, 用于确定所述信号釆集单元釆集的对应不同工 作状态的背光检测电流信号的谐波幅度值;
检测值确定单元, 用于根据所述谐波幅度值确定单元确定的所述谐波 幅度值, 确定所述调制器对应的相位延迟偏置点的检测值;
比较单元, 用于将所述检测值确定单元确定的检测值与设定的相位延 迟偏置点的目标值进行比较;
控制单元, 用于根据所述比较单元的比较结果控制所述调制器对应的 相位延迟偏置点的位置。
通过本发明实施例提供的上述至少一个技术方案, 根据调整器在不同 工作状态下输出的背光检测电流信号, 确定各自对应的谐波幅度值, 进而 根据确定的谐波幅度值确定相位延迟偏置点的检测值, 并通过检测值与设 定的相位延迟偏置点的目标值的比较控制调制器对应的相位延迟偏置点的 位置, 根据该技术方案, 一方面, 以调制器在实际工作状态下的输出值控 制偏置点位置, 考虑了各种外界因素的可能对调制器造成的干扰, 另一方 面, 可以灵活设置调制器的工作状态, 并结合多种工作状态下的输出值共 同确定相位延迟偏置点的测试值, 从而提高了控制调制器的相位延迟偏置 点位置的准确度, 提高了 DQPSK调制***的性能。
本发明的其它特征和优点将在随后的说明书中阐述, 并且, 部分地从 说明书中变得显而易见, 或者通过实施本发明而了解。 本发明的目的和其 他优点可通过在所写的说明书、 权利要求书、 以及附图中所特别指出的结
构来实现和获得。 附图说明
图 1为本发明实现控制调制器相位延迟偏置点的方法流程图; 图 2为本发明实现基于控制方式三控制调制器相位延迟偏置点的方法 流程图;
图 3为本发明实现确定背光检测电流信号的谐波幅度值的方法流程图; 图 4为本发明实现根据比较结果控制铌酸锂调制器的偏置点的方法流 程图;
图 5为本发明实现铌酸锂调制器的基本结构图;
图 6为本发明实现控制调制器相位延迟偏置点的优选方案;
图 7为本发明实现所加导频信号时序图;
图 8为本发明实现在 DSP内釆用的控制方法流程图;
图 9为本发明实现控制调制器相位延迟偏置点的装置示意图。 具体实施方式
为了给出提高控制调制器偏置点的精度的实现方案, 本发明提供了一 种控制调制器相位延迟偏置点的方法及装置, 其基本方案是: 釆集调制器 在不同工作状态下输出的背光检测电流信号, 并确定对应不同工作状态的 背光检测电流信号的谐波幅度值; 根据确定的所述谐波幅度值, 确定所述 调制器对应的相位延迟偏置点的检测值; 将所述检测值与设定的相位延迟 偏置点的目标值进行比较, 根据比较结果控制所述调制器对应的相位延迟 偏置点的位置。
以下结合说明书附图对本发明的优选实施例进行说明, 应当理解, 此 处所描述的优选实施例仅用于说明和解释本发明, 并不用于限定本发明。 并且在不冲突的情况下, 本申请中的实施例及实施例中的特征可以相互组
合。
图 1 为本发明实现控制调制器相位延迟偏置点的方法流程图, 如图 1 所示, 该方法包括以下步骤:
步骤 101、釆集调制器在不同工作状态下输出的背光检测电流信号, 并 确定对应不同工作状态的背光检测电流信号的谐波幅度值。
步骤 102、才艮据确定的对应不同工作状态的背光检测电流信号的谐波幅 度值, 确定该调制器对应的相位延迟偏置点的检测值。
步骤 103、 将确定的检测值与设定的相位延迟偏置点的目标值进行比 较, 根据比较结果控制该调制器对应的相位延迟偏置点的位置。
其中, 调制器的工作状态可以根据控制需要进行灵活设置, 本发明优 选实施例中, 调制器的不同工作状态可以为: 未向该调制器输入导频信号 的状态; 以及向该调制器分时叠加两种不同相移导频信号的状态。
并且, 较佳地, 向调制器叠加的导频信号中的一个可以选取相移为 0, 这样 可以减少计算量, 从而提高控制效率。 在实际应用中, 向调制器叠加导频 信号就是在该调制器 I、 Q两路偏置电压信号上叠加导频信号。
步骤 101 中, 确定对应不同工作状态的背光检测电流信号的谐波幅度 值, 包括: 确定经过滤波处理后对应不同工作状态的背光检测电流信号的 谐波幅度值。
具体地, 可通过如下公式确定对应不同工作状态的背光检测电流信号 的谐波幅度值:
+ Θ))]
其中:
vd I、 νπ1、 I ^分别表示调制器 I路的调制幅度、 电压以及偏置电压,
分别由***设定;
vd,e、 νπ,β、 e分别表示调制器 Q路的调制幅度、 电压以及偏置电 压, 分别由***设定;
当对应的工作状态为未向调制器输入导频信号的状态, 则& =0、 θ=0; 当对应的工作状态为向调制器叠加导频信号的状态, 则&≠0 , 0的值 可以根据实际需要进行设置, 两次向调制器叠加的导频信号釆用不同的 0 值。
步骤 102中, 根据步骤 101确定的谐波幅度值, 确定该调制器对应的 相位延迟偏置点的检测值, 包括: 联解由对应不同工作状态的背光检测电 流信号的谐波幅度值组成的方程组, 得到该调制器对应的相位延迟偏置点 的检测值 具体过程将在后续实施例中详细描述, 此处暂不描述。
步骤 103 中, 根据比较结果控制该调制器对应的相位延迟偏置点的位 置, 优选地可以通过如下任意一个控制方式:
控制方式一、 直接根据当前比较结果控制, 具体如下:
若根据当前比较结果确定检测值与目标值的差值小于设定阔值, 则控 制该调制器对应的相位延迟偏置点为调制器当前的相位延迟偏置点并锁 定; 若根据当前比较结果确定检测值与目标值的差值不小于设定阔值, 则 在该差值范围内调整该调制器对应的相位延迟偏置点。
控制方式二、 根据当前比较结果以及后续确定的比较结果控制, 具体 如下:
若根据当前比较结果确定检测值与目标值的差值小于设定阔值, 则控 制该调制器对应的相位延迟偏置点为调制器当前的相位延迟偏置点并锁 定; 若根据当前比较结果确定检测值与目标值的差值不小于设定阔值, 则 在该差值范围内调整该调制器对应的相位延迟偏置点; 并且调整调制器对 应的相位延迟偏置点后, 返回釆集调制器在不同工作状态下输出的背光检
测电流信号的步骤, 即返回步骤 101。
控制方式三、 根据历史比较结果以及当前比较结果控制, 具体如下: 在根据比较结果控制调制器对应的相位延迟偏置点的位置之前, 判断 是否保存有在确定本次检测值之前确定的检测值与设定的相位延迟偏置点 的目标值的比较结果, 若时, 则获取该历史比较结果, 并且确定保存的历 史比较结果与当前比较结果中差值小的一个比较结果用于控制调制器对应 的相位延迟偏置点的位置; 若否, 则根据当前比较结果控制。 根据历史比 较结果或当前比较结果控制调制器偏置点的具体控制过程与上述控制方式 一或控制方式二所述的基本原理一致, 此处不再赘述。
本发明提供的上述控制调制器相位延迟偏置点的方法, 尤其适用于
DQPSK调制***中的铌酸锂调制器, 一方面, 能够提高对于相位延迟偏置 点控制的准确度, 另一方面, 也具有较高的灵活度, 并且实现简单。 为了 更好地理解本发明实施例, 以下以铌酸锂调制器为例进行详细说明。
图 2为本发明实现基于控制方式三控制调制器相位延迟偏置点的方法 流程图, 如图 2所示, 该方法包括以下步骤:
步骤 201、在对铌酸锂调制器第一次叠加的导频信号的情况下, 根据该 第一次叠加的导频信号, 确定背光检测电流信号在第一釆样点的谐波幅度 值 Al。
步骤 202、在对铌酸锂调制器第二次叠加的导频信号的情况下, 根据第 二次叠加的导频信号, 确定背光检测电流信号在第二釆样点的谐波幅度值 A2。
步骤 203、在未对铌酸锂调制器叠加导频信号的情况下, 确定背光检测 电流信号在第三釆样点的谐波幅度值 A3。
步骤 204、 根据谐波幅度值 Al、 A2以及 A3 , 确定相位延迟偏置点的 检测值。
步骤 205、判断是否保存有本次之前确定的相位延迟偏置点的检测值与 设定的相位延迟偏置点的目标值的比较结果(历史比较结果), 若是, 执行 步骤 206, 若否, 返回步骤 201。
步骤 206、将当前确定的相位延迟偏置点的检测值与设定的相位延迟偏 置点的目标值进行比较得到当前比较结果。
步骤 207、根据当前比较结果与保存的比较结果, 调整铌酸锂调制器的 相位延迟偏置点并锁定。
上述流程中, 步骤 201、 步骤 202以及步骤 203之间并无具体的执行先 后次序, 上述限定仅为描述方便。 即步骤 201、 步骤 202以及步骤 203可以 釆用不同的执行顺序, 例如, 调整执行顺序为步骤 202、 步骤 201以及步骤 203 , 或调整执行顺序为步骤 203、 步骤 201 以及步骤 202, 此处不再—— 列举。
步骤 201中的具体过程为:
在 DQPSK调制***发送端铌酸锂调制器的 I、 Q两路偏置电压信号上 分别叠加导频信号, 4叚设第一次叠加的导频信号的输出频率为 ,相移为 0; 进一步地, 根据该第一次叠加的导频信号, 确定背光检测电流信号在 第一釆样点的谐波幅度值 A1 , 具体如图 3所示, 图 3为本发明实现确定背 光检测电流信号的谐波幅度值的方法流程图, 该方法包括如下步骤:
步骤 301、 釆集叠加导频信号后铌酸锂调制器输出的背光检测电流信 号。
步骤 302、 对釆集的背光检测电流信号进行滤波处理。
步骤 302 中, 对釆集的背光检测电流信号进行滤波处理可以釆用中心 频率等于叠加的导频信号的输出频率的窄带带通滤波器, 即以叠加的导频 信号的输出频率为中心点进行滤波处理, 根据本次输入的导频信号, 此处 釆用的的窄带带通滤波器的中心频率为&。
步骤 303、确定经过滤波处理后的背光检测电流信号在第一釆样点的谐 波幅度值 A1。
步骤 303 中, 检测导频信号, 背光检测电流信号在第一釆样点的谐波 幅度值即检测到的导频信号相移等于本次叠加的导频信号相移时对应的背 光检测电流信号的谐波幅度值 Al。 根据本次输入的导频信号, 即将检测到 导频信号相移等于 0 时对应的背光检测电流信号的谐波幅度值确定为最终 要获得的谐波幅度值 Al。
图 2所示流程中, 步骤 202的具体执行过程与上述步骤 201的具体执 行过程基本一致, 该步骤 202 中, 第二次输入的导频信号与第一次输入的 导频信号釆用的输出功率相同, 相移不同, 例如, 该第二次输入的导频信 号的相移为^ 且 0≠0。 并且, 根据第二次输入的导频信号, 背光检测电 流信号在第二釆样点的谐波幅度值即检测到导频信号相移等于 0时对应的 背光检测电流信号的谐波幅度值 A2。
应当理解, 本发明上述实施例中, 针对第一次叠加的导频信号的设置 以及针对第二次叠加的导频信号的设置仅为本发明优选实施例, 将两次叠 加的导频信号中的一个导频信号的相移设置为 0, 可以减少计算量。 实际应 用中, 只要保证两次叠加的导频信号釆用不同相移即可, 例如, 第一次叠 加的导频信号釆用的相移为 , 第二次叠加的导频信号釆用的相移为 , 其 中, 此处针对导频信号的设置不再赘述。
图 2所示流程中, 步骤 207的具体执行过程主要通过反馈控制算法完 成, 具体处理过程如图 4所示, 图 4为本发明实现根据比较结果控制铌酸 锂调制器的偏置点的方法流程图, 该方法包括如下步骤:
步骤 401、根据当前比较结果与保存的比较结果, 确定与设定的相位延 迟偏置点的目标值差值最小的比较结果对应的偏置点检测值。
该步骤中, 当前比较结果即当前确定的相位延迟偏置点的检测值 与
设定的相位延迟偏置点的目标值 的比较结果, 保存的比较结果即当前之 前确定的相位延迟偏置点的检测值 与设定的相位延迟偏置点的目标值 的比较结果。
步骤 402、 判断差值最小的比较结果是否满足预设的阔值要求, 若是, 执行步骤 403 , 若否, 执行步骤 404。
步骤 403、将铌酸锂调制器的相位延迟偏置点锁定在当前确定的相位延 迟偏置点的检测值位置。
步骤 404、 在差值范围内调整铌酸锂调制器的相位延迟偏置点。
执行完步骤 404后可进一步返回步骤 201。
以上对于本发明实施例中控制调制器相位延迟偏置点的基本原理进行 了详细描述, 以下结果具体的控制过程进行更为详细的描述。
公式
― 2 sm : ― sm ― cos 2φιη 1
厶 2V V π,Ι ^ 2VV n,Q 其中:
Vw、 νπ I ^分别表示 I路的调制幅度、 电压以及偏置电压; vd,e、 νπ,β、 e分别表示 Q路的调制幅度、 电压以及偏置电压。 对于 DQPSK调制,通过控制铌酸锂调制器相位延迟偏置点的位置, 以 使其满足设定条件:
^7 = ±^7 , vbJ = o ; ^e = ±^e , V Q = 0 公
式(2)
2 = 公式
(3) 对于 /、 e偏置点的控制可以釆用通用的方法进行, VdJ =±Vw , ^e=± e可以通过控制输入调制器的 RF信号幅度来满足。 本发明实施例 为了实现 。 = 的偏置点的控制, 首先在铌酸锂调制器的 I、 Q两路偏置电
4
压信号上分别叠加导频信号 ^cos^, 该导频信号在 I、 Q两臂间引入的附加 相位差为 ^cos = os (其中 =^),因此,叠加导频信号后上述公式( 1 )
νπ νπ 表示的输出光强为:
s OX)]
代入公式(2)得到: sm : : ~ = sm ― = 1
2 2
(4)
(6)
联解上述(4)、 (5)、 (6)式即可得出 的值, 即相位延迟偏置点的检 测值。
再将所述联解得到的 检测值与设定的目标值比较, 调节偏置点电压 便可以根据需要将调制器锁定在任一位置。 一般来讲, 对于 DQPSK, 可取 2^ = , 这时调制器便锁定在了正常的偏置点上。 为了实现上述的控制技术方案, 本发明实施例还结合具体实体给出如 下优选实施方案, 图 6为本发明实现控制调制器相位延迟偏置点的优选方 案, 如图 6所示:
从激光器 ( 100)发出的光信号经过一个 3dB耦合器( 101 )后分为 I 和 Q两路光, 然后 I路光经过 MZ调制器 1 ( 102A )后输出 Elout , MZ调制 器 1 ( 102A) 受 DATASTREAM1 (即数据流 1 ) 的调制, 其偏置点由外加 电压 DC BIAS1设置。同样的 Q路光经过 MZ调制器 2( 102B )后输出 EQout ,
MZ调制器 2 ( 102B )受 DATASTREAM2 (即数据流 2 )的调制 , 其偏置点 由外加电压 DC BIAS2设置。 (^与 分别经过(? ( 104A)和 -(pIQ( 104B ) 的相位延时后, 再由 3dB耦合器( 105 ) 以及 3dB耦合器( 106 )合成 E。Mi和 EoutTln , 其中, E。Mff/„在***中用于背光检测。
偏置点控制的主体是一数字处理芯片 DSP ( llO), 由它控制三个高精 度 DA ( 114 )输出两个频率为 & , 但相移不同 (可分别设为 0和 Γ )的导频 信号以及一个没有导频信号的直流信号, 三者之间可以用 DSP ( 110)控制 开关 (113 )进行自由地切换。
控制环路工作时首先将没有相移的导频信号加在 DQPSK铌酸锂调制 器的两个主臂之上,导频信号(相移为 0 )叠加后,利用高速高精度 AD( 109 ) 将该背光检测信号 (107 ) 经过窄带滤波器 (108 ) 滤波后的一次谐波分量 釆集入 DSP ( 110 ), 该信号的幅度值 A1可由上述公式(4 )表示。 然后切 换导频信号的相位,使其相移 Γ , 同样的将背光检测信号一次谐波分量釆集 入 DSP ( l lO ), 此时信号幅度 A2由公式(5 )表示。 最后不加导频信号, 同样的对背光检测信号进行釆集, 信号幅度 A3由公式(6 )表示。 在 DSP ( 110 ) 内联解方程(4 )、 (5 )、 ( 6 ), 便可得到此时的偏置点 2ζ¾ (即检测 值), 与设定的目标值相比较后, 就可通过 DA ( 111 )调整偏置点电压将其 调到根据比较结果确定的位置 (对于 DQPSK—般为 2 = )。 上述调整过程中所加导频信号为一个分时信号, 其时序可如图 7所示, 图 7为本发明实现所加导频信号时序图。
上述过程在 DSP内釆用的控制过程如图 8所示, 图 8为本发明实现在 DSP内釆用的控制方法流程图, 该方法包括如下步骤:
步骤 801、 由 DSP控制输出频率为&、 相移为 0的导频信号, 并从高 速高精度 AD釆入背光检测信号, 得到其幅度值 A1 ;
步骤 802、 由 DSP控制将导频信号的相位移位 并从高速高精度 AD 釆入背光检测信号, 得到其幅度值 Α2;
步骤 803、 由 DSP控制不再叠加导频信号, 并从高速高精度 AD釆入 背光检测信号, 得到其幅度值 A3;
步骤 804、联解幅度值 Al、 Α2、 A3的方程组,得到当前的偏置点 2 ; 步骤 805、 调整偏置电压, 锁定调制器位置;
步骤 806、 延时一段时间后, 重复步骤 801〜步骤 805 , 直至满足预设的 偏置点目标值。
为实现上述方法, 本发明还提供了一种控制调制器相位延迟偏置点的
装置, 图 9为本发明实现控制调制器相位延迟偏置点的装置示意图, 如图 9 所示, 该装置包括:
信号釆集单元 901、 谐波幅度值确定单元 902、 检测值确定单元 903、 比较单元 904以及控制单元 905;
其中:
信号釆集单元 901 ,用于釆集调制器在不同工作状态下输出的背光检测 电流信号;
谐波幅度值确定单元 902 ,用于确定信号釆集单元 901釆集的对应不同 工作状态的背光检测电流信号的谐波幅度值;
检测值确定单元 903 ,用于根据谐波幅度值确定单元 902确定的谐波幅 度值, 确定调制器对应的相位延迟偏置点的检测值;
比较单元 904,用于将检测值确定单元 903确定的检测值与设定的相位 延迟偏置点的目标值进行比较;
控制单元 905 ,用于根据比较单元 904的比较结果控制所述调制器对应 的相位延迟偏置点的位置。
本发明优选实施例中, 上述信号釆集单元 901 , 具体用于:
釆集在未向调制器输入导频信号的状态、 以及向调制器分时叠加两种 不同相移导频信号的状态下该调制器输出的背光检测电流信号。
本发明优选实施例中, 上述信号釆集单元 901 , 具体用于:
釆集在未向调制器输入导频信号的状态、 以及向调制器 I、 Q两路偏置 电压信号上分时叠加两种不同相移导频信号的状态下该调制器输出的背光 检测电流信号。
本发明优选实施例中, 上述谐波幅度值确定单元 902 , 具体用于: 确定经过滤波处理后对应不同工作状态的背光检测电流信号的谐波幅 度值。
本发明优选实施例中, 上述谐波幅度值确定单元 902, 具体用于: 通过如下公式确定对应不同工作状态的背光检测电流信号的谐波幅度
- 2 sin cos(2 。 + ^ cos(<¾i + θ))]
2 2V
其中:
V 、 V 、 I ^分别表示调制器 I路的调制幅度、 电压以及偏置电压, 分别由***设定;
vd,e、 νπ,β、 e分别表示调制器 Q路的调制幅度、 电压以及偏置电 压, 分别由***设定;
当对应的工作状态为未向所述调制器输入导频信号的状态, 则 & =0、 θ=0;
当对应的工作状态为向所述调制器叠加导频信号的状态, 则&≠0。 本发明优选实施例中, 上述检测值确定单元 903 , 具体用于:
联解由对应不同工作状态的背光检测电流信号的谐波幅度值组成的方 程组, 得到该调制器对应的相位延迟偏置点的检测值 2 。
本发明优选实施例中, 上述控制单元 905, 还用于:
根据比较结果控制调制器对应的相位延迟偏置点的位置之前, 获取保 存的在确定本次检测值之前确定的检测值与所述设定的相位延迟偏置点的 目标值的比较结果, 并且确定保存的所述比较结果与当前比较结果中差值 小的一个比较结果用于控制所述调制器对应的相位延迟偏置点的位置。
本发明优选实施例中, 上述控制单元 905, 具体用于:
在根据比较单元 904 的比较结果确定检测值与所述目标值的差值小于
设定阔值时, 控制该调制器对应的相位延迟偏置点为调制器当前的相位延 迟偏置点并锁定;
在根据比较单元 904 的比较结果确定检测值与所述目标值的差值不小 于设定阔值时, 在该差值范围内调整所述调制器对应的相位延迟偏置点。
本发明优选实施例中, 上述控制单元 905 , 还用于:
在调整该调制器对应的相位延迟偏置点后, 控制信号釆集单元 901 釆 集调整相位延迟偏置点后的调制器在不同工作状态下输出的背光检测电流 信号的步骤。
应当理解, 以上控制调制器相位延迟偏置点的装置包括的单元仅为根 据该装置实现的功能进行的逻辑划分, 实际应用中, 可以进行上述单元的 叠加或拆分。 并且该实施例提供的装置所实现的功能与上述实施例提供的 控制调制器相位延迟偏置点的方法流程——对应, 对于该装置所实现的更 为详细的处理流程, 在上述方法实施例中已#丈详细描述, 此处不再详细描 述。
结合实际 DQPSK***,本发明还提供了一种控制调制器相位延迟偏置 点的***, 该***包括以下组成部分:
中心频率为 ω的窄带带通滤波器, 用于滤波得到背光检测电流信号的 一次谐波幅度值;
高速高精度 AD,用于将背光检测信号的一次谐波幅度值釆集入数字算 法处理单元;
数字算法处理单元(如 DSP、 FPGA等), 用于导频信号的产生、 切换, 以及反馈控制算法的实施;
高速高精度 DA,用于将数字算法处理单元产生的数字导频信号转换为 模拟导频信号, 以及将数字算法处理单元的反馈量回馈给铌酸锂调制器。
数字控制切换开关, 用于对导频信号的分时切换。
通过本发明实施例提供的上述至少一个技术方案, 根据调整器在不同 工作状态下输出的背光检测电流信号, 确定各自对应的谐波幅度值, 进而 根据确定的谐波幅度值确定相位延迟偏置点的检测值, 并通过检测值与设 定的相位延迟偏置点的目标值的比较控制调制器对应的相位延迟偏置点的 位置, 根据该技术方案, 一方面, 以调制器在实际工作状态下的输出值控 制偏置点位置, 考虑了各种外界因素的可能对调制器造成的干扰, 另一方 面, 可以灵活设置调制器的工作状态, 并结合多种工作状态下的输出值共 同确定相位延迟偏置点的测试值, 从而提高了控制调制器的相位延迟偏置 点位置的准确度, 提高了 DQPSK调制***的性能。
进一步地, 本发明实施例中, 可以将 DQPSK铌酸锂调制器的相位延 迟偏置点锁定在正确的位置上, 相较于其它控制方法只能将偏置点锁定在 特定位置上, 本发明实施例提供的技术方案可以将偏置点锁定在任一值上, 在提高了控制精度的基础上, 能够更加方便灵活地控制偏置点位置, 适用 性高, 并且利于数字实现, 与其他***相比, 具有非常明显的成本优势, 而且控制方法也相对灵活简单。
进一步地, 本发明实施例提供的技术方案, 由于能够将 DQPSK铌酸锂 调制器锁定在正确的偏置点上同时又有较低的成本, 对 40G密集波分*** 有重要的意义。 本发明的精神和范围。 这样, 倘若本发明的这些修改和变型属于本发明权 利要求及其等同技术的范围之内, 则本发明也意图包含这些改动和变型在 内。
Claims
1、一种控制调制器相位延迟偏置点的方法,其特征在于,该方法包括: 釆集调制器在不同工作状态下输出的背光检测电流信号, 并确定对应 不同工作状态的背光检测电流信号的谐波幅度值;
根据确定的所述谐波幅度值, 确定所述调制器对应的相位延迟偏置点 的检测值;
将所述检测值与设定的相位延迟偏置点的目标值进行比较, 根据比较 结果控制所述调制器对应的相位延迟偏置点的位置。
2、如权利要求 1所述的方法,其特征在于, 所述不同工作状态分别为: 未向所述调制器输入导频信号的状态; 以及向所述调制器分时叠加两种不 同相移导频信号的状态;
确定对应不同工作状态的背光检测电流信号的谐波幅度值, 通过如下 公式:
其中:
V 、 V 、 I ^分别表示调制器 I路的调制幅度、 电压以及偏置电压, 分别由***设定;
vd,e、 νπ,β、 e分别表示调制器 Q路的调制幅度、 电压以及偏置电 压, 分别由***设定;
当对应的工作状态为未向所述调制器输入导频信号的状态, 则 ( =0、 θ=0;
当对应的工作状态为向所述调制器叠加导频信号的状态, 则&≠0。
3、 如权利要求 2所述的方法, 其特征在于, 所述根据确定的所述谐波 幅度值确定所述调制器对应的相位延迟偏置点的检测值, 包括:
根据由对应不同工作状态的背光检测电流信号的谐波幅度值分别对应 的公式, 确定所述调制器对应的相位延迟偏置点的检测值 2 。
4、 如权利要求 1所述的方法, 其特征在于, 所述根据比较结果控制所 述调制器对应的相位延迟偏置点的位置之前, 该方法还包括:
获取保存的在确定本次检测值之前确定的检测值与所述设定的相位延 迟偏置点的目标值的比较结果, 并且确定保存的所述比较结果与当前比较 结果中差值小的一个比较结果, 用于控制所述调制器对应的相位延迟偏置 点的位置。
5、如权利要求 1或 4所述的方法, 其特征在于, 所述根据比较结果控 制所述调制器对应的相位延迟偏置点的位置, 包括: 则控制所述调制器对应的相位延迟偏置点为调制器当前的相位延迟偏置点 并锁定; 值, 则在所述差值范围内调整所述调制器对应的相位延迟偏置点, 或在所 述差值范围内调整所述调制器对应的相位延迟偏置点并返回所述釆集调制 器在不同工作状态下输出的背光检测电流信号的步骤。
6、一种控制调制器相位延迟偏置点的装置,其特征在于,该装置包括: 信号釆集单元、 谐波幅度值确定单元、 检测值确定单元、 比较单元、 控制 单元; 其中,
信号釆集单元, 用于釆集调制器在不同工作状态下输出的背光检测电 流信号;
谐波幅度值确定单元, 用于确定所述信号釆集单元釆集的对应不同工 作状态的背光检测电流信号的谐波幅度值;
检测值确定单元, 用于根据所述谐波幅度值确定单元确定的所述谐波 幅度值, 确定所述调制器对应的相位延迟偏置点的检测值;
比较单元, 用于将所述检测值确定单元确定的检测值与设定的相位延 迟偏置点的目标值进行比较;
控制单元, 用于根据所述比较单元的比较结果控制所述调制器对应的 相位延迟偏置点的位置。
7、 如权利要求 6所述的装置, 其特征在于,
所述信号釆集单元, 具体用于: 釆集在未向所述调制器输入导频信号 的状态、 以及向所述调制器分时叠加两种不同相移导频信号的状态下所述 调制器输出的背光检测电流信号;
cos(2 。 + ^ cos(<¾i + θ))]
2 2V
其中:
V 、 V 、 I ^分别表示调制器 I路的调制幅度、 电压以及偏置电压, 分别由***设定;
vd,e、 νπ,β、 e分别表示调制器 Q路的调制幅度、 电压以及偏置电 压, 分别由***设定;
当对应的工作状态为未向所述调制器输入导频信号的状态, 则 ( =0、 θ=0;
当对应的工作状态为向所述调制器叠加导频信号的状态, 则&≠0。
8、 如权利要求 7所述的装置, 其特征在于, 所述检测值确定单元, 具体用于: 根据由对应不同工作状态的背光检 测电流信号的谐波幅度值分别对应的公式, 确定所述调制器对应的相位延 迟偏置点的检测值 2 。
9、 如权利要求 6所述的装置, 其特征在于, 所述控制单元, 还用于: 根据比较结果控制所述调制器对应的相位延迟偏置点的位置之前, 获 取保存的在确定本次检测值之前确定的检测值与所述设定的相位延迟偏置 点的目标值的比较结果, 并且确定保存的所述比较结果与当前比较结果中 差值小的一个比较结果用于控制所述调制器对应的相位延迟偏置点的位
10、如权利要求 6或 9所述的装置, 其特征在于, 所述控制单元, 具体 用于: 设定阔值时, 控制所述调制器对应的相位延迟偏置点为调制器当前的相位 延迟偏置点并锁定; 于设定阔值时, 在所述差值范围内调整所述调制器对应的相位延迟偏置点; 或在所述差值范围内调整所述调制器对应的相位延迟偏置点, 并在调整所 述调制器对应的相位延迟偏置点后, 控制所述信号釆集单元釆集调整相位 延迟偏置点后的调制器在不同工作状态下输出的背光检测电流信号的步
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CN103281137B (zh) * | 2013-05-03 | 2016-08-10 | 武汉电信器件有限公司 | Dqpsk模块延迟干涉仪控制装置及其控制方法 |
CN106936746B (zh) * | 2015-12-31 | 2020-01-31 | 海思光电子有限公司 | 一种dp-qpsk调制器的相位偏置点的锁定方法及装置 |
CN112543005B (zh) * | 2021-02-18 | 2021-06-04 | 广州慧智微电子有限公司 | 幅度调制对相位调制的补偿电路、射频功率放大器及设备 |
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