WO2011024742A1 - Semiconductor laser element and method for manufacturing same - Google Patents
Semiconductor laser element and method for manufacturing same Download PDFInfo
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- WO2011024742A1 WO2011024742A1 PCT/JP2010/064147 JP2010064147W WO2011024742A1 WO 2011024742 A1 WO2011024742 A1 WO 2011024742A1 JP 2010064147 W JP2010064147 W JP 2010064147W WO 2011024742 A1 WO2011024742 A1 WO 2011024742A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/2201—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure in a specific crystallographic orientation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/3202—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures grown on specifically orientated substrates, or using orientation dependent growth
- H01S5/320275—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures grown on specifically orientated substrates, or using orientation dependent growth semi-polar orientation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
- H01S5/32308—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
- H01S5/32341—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm blue laser based on GaN or GaP
Definitions
- the present invention relates to a semiconductor laser device and a method of manufacturing the same, and more particularly to a semiconductor laser device having a semiconductor laser device layer including a ridge and a method of manufacturing the same.
- a semiconductor laser device provided with a semiconductor laser device layer including a ridge is known in Japanese Patent Application Laid-Open Nos. 2002-204031 and 2007-266574.
- Japanese Patent Laid-Open No. 2002-204031 discloses a ridge-waveguide type semiconductor laser diode in which a convex ridge having a pair of side surfaces extending along the cavity direction is formed in a semiconductor layer on an active layer, and a method of manufacturing the same. Is disclosed.
- this semiconductor laser diode using ion beam etching, a ridge having a shape in which the width of the ridge on the root side near the active layer is the widest and the width of the ridge gradually narrows away from the active layer is formed. ing. That is, the cross section of the ridge in the width direction of the element (the direction along the resonator surface) has a shape that tapers upward from the active layer.
- the side surface of the ridge is farther from the root side closer to the active layer to the tip side of the ridge, the inclination angle with respect to the main surface of the active layer gradually increases.
- JP-A-2007-266574 discloses a ridge waveguide type nitride semiconductor laser in which a convex ridge having a pair of side surfaces extending along a cavity direction is formed in a semiconductor layer on an active layer.
- a device is disclosed.
- this semiconductor laser device while the width of the ridge on the root side near the active layer is the widest by using dry etching, a ridge having a shape in which the width narrows as it goes upward from the active layer is formed.
- one side of the ridge extends substantially perpendicularly to the main surface of the active layer, while the other side of the ridge extends upward at a substantially constant inclination angle to the main surface of the active layer. Therefore, the cross section of the ridge in the width direction of the device (the direction along the cavity plane) is monotonously tapered in the direction away from the active layer.
- the conventional ridge waveguide type semiconductor laser devices as disclosed in Japanese Patent Application Laid-Open Nos. 2002-204031 and 2007-266574 are formed to have a size of several hundred ⁇ m or more and several mm or less.
- a ridge having a width of about 1 ⁇ m or more and several ⁇ m or less is formed in the direction along the resonator surface with respect to the resonator length.
- the variation in the width of the ridge along the cavity direction tends to occur, the variation in the width of the ridge along the cavity direction forms the active layer in the lower portion of the ridge. And the propagation mode of light propagating in the optical waveguide is easily disturbed.
- one side surface of the ridge extends upward with a substantially constant inclination with respect to the main surface of the active layer.
- the cross section of the ridge tapers monotonously in the direction away from the active layer. Therefore, the contact area (contact width) between the semiconductor layer and the electrode layer formed on the top surface of the ridge decreases as the ridge extends upward, and the electrical characteristics of the device deteriorate.
- the present invention has been made to solve the above-described problems, and one object of the present invention is to suppress the occurrence of optical loss inside the ridge waveguide type semiconductor laser device. It is possible to provide a semiconductor laser device capable of improving the electrical characteristics of the device and a method of manufacturing the same.
- a semiconductor laser device includes a semiconductor laser device layer including an active layer and a convex ridge, the ridge having one side surface and the other side surface
- the one side has a first side provided on the tip side of the ridge and a second side provided on the root side of the ridge, and the first side has a first inclination with respect to the main surface of the active layer
- the second side faces extend at a second tilt angle smaller than the first tilt angle with respect to the main surface of the active layer, and the second side faces are made of crystal orientation planes of the semiconductor laser device layer.
- one side surface of the ridge has the second side surface consisting of the crystal orientation plane of the semiconductor laser device layer, whereby the second side surface consists of the crystal orientation plane
- the width of the ridge in the portion of the second side is prevented from being dispersed along the extending direction (resonator direction) of the ridge.
- the ridge is a ridge from the root side toward the tip side in the portion of the second side because one side of the ridge has the first side and the second side described above.
- the first side tapers, and extends toward the distal end at a first inclination angle larger than the second inclination angle of the second side at the first side portion.
- the width of the ridge is suppressed from being monotonously tapered at the second inclination angle from the root side to the tip side. That is, unlike the case where the electrode layer is formed on the upper surface of the tip which is extremely tapered only at the second inclination angle, the first side prevents the tip from being extremely tapered, so a predetermined width is obtained.
- An electrode layer can be formed at the tip.
- the contact area (contact width) between the semiconductor laser element layer and the electrode layer formed on the top surface of the ridge can be maintained at a constant size, so that the electrical characteristics of the semiconductor laser element can be improved. it can.
- the one side of the ridge has the above first side and the second side so that carrier confinement is performed in the upper region where the first side of the ridge is formed.
- the optical confinement of the laser light by the active layer can be performed in the lower region where the second side surface of the ridge is formed. That is, by controlling the widths of the upper and lower regions of the ridge, carrier confinement and laser light optical confinement can be controlled independently.
- the other side surface has a third side surface provided on the tip end side and a fourth side surface provided on the root side of the ridge, and the third side surface
- the fourth side extends at a third inclination angle smaller than the third inclination angle with respect to the main surface of the active layer, and the fourth side surface extends at a third inclination angle with respect to the main surface of the active layer. It consists of the crystal orientation plane of the semiconductor laser device layer.
- the fourth side surface formed of the crystal orientation plane has flatness on the other side surface of the ridge as well as on one side surface of the ridge, and therefore the ridge of the region sandwiched by the second side surface and the fourth side surface
- the variation in width along the direction of the resonator is further suppressed.
- the taper by the fourth side is suppressed at the portion of the third side, the tip of the ridge sandwiched by the first side and the third side can be easily formed with a width suitable for the formation of the electrode layer . That is, since the controllability of the width of the ridge is further improved, the occurrence of light loss inside the device can be further suppressed, and the electrical characteristics of the semiconductor laser device can be further improved.
- the other side surface has a fifth side surface provided from the tip side to the base side, and the fifth side surface has a fifth inclination with respect to the main surface of the active layer. It extends at an angle.
- one side (the first side and the second side) of the ridge and the other side (the fifth side) are different from each other, and the ridge has an asymmetric shape in the width direction.
- the effective refractive index with respect to the wavelength and the effective refractive index with respect to the oscillation wavelength on the second side can be made different.
- the upper limit dimension of the ridge width capable of suppressing the generation of high-order horizontal transverse mode is made large. can do.
- the ridge width can be formed large while suppressing the occurrence of kink (breaking of current-light output characteristics) due to the occurrence of the high-order horizontal transverse mode.
- the contact area between the semiconductor layer forming the ridge and the electrode layer formed on the ridge can be increased, so the contact resistance between the semiconductor layer and the electrode layer can be lowered. That is, the operating voltage of the device can be reduced while suppressing the occurrence of kinks. As a result, the operating voltage of the device can be reduced while obtaining good laser characteristics at the time of high output operation.
- the active layer has a main surface consisting of (H, K, -H-K, 0) planes (at least one of H and K is an integer other than 0). . According to this structure, it is possible to easily form each of the second side surface and the fourth side surface formed of the crystal orientation plane on the root side of both side surfaces of one side surface and the other side surface of the ridge.
- the active layer has a main surface inclined with respect to the (0001) plane. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of one side surface of the ridge.
- the semiconductor laser device according to the first aspect further comprises a substrate made of a nitride-based semiconductor, and a semiconductor laser device layer is formed on the main surface of the substrate. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
- the active layer is composed of (H, K, -H-K, L) planes (at least one of H and K is an integer other than 0 and L ⁇ 0). It has a major surface. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
- the ridge preferably extends in the [0001] direction. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
- the ridge preferably extends in the [1-101] direction. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
- the ridge preferably extends in the [H + 2K, -2H-K, H-K, 0] direction. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
- the first tilt angle is 85 ° or more. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
- a method of manufacturing a semiconductor laser device includes the step of forming a semiconductor laser device layer including an active layer and a convex ridge, wherein the step of forming the semiconductor laser device layer is a semiconductor laser device.
- the first side of the ridge extends toward the tip of the ridge at a first inclination angle with respect to the main surface of the active layer.
- a first side surface and a second side surface extending at a second inclination angle smaller than the first inclination angle with respect to the main surface of the active layer are formed on the root side of the ridge and the crystal orientation plane of the semiconductor laser device layer Including the steps.
- the step of forming the semiconductor laser device layer is performed by etching the surface of the semiconductor laser device layer toward the active layer.
- On the one side there is included the step of forming on the root side of the ridge a second side composed of a crystal orientation plane of the semiconductor laser device layer extending at a second inclination angle with respect to the main surface of the active layer.
- flatness is obtained on the second side surface formed of the crystal orientation plane, so that it is possible to form a ridge in which the width of the ridge in the second side surface portion is prevented from being dispersed along the cavity direction.
- the disturbance of the propagation mode of light due to the variation of the width of the ridge is not easily generated, and therefore, it is possible to obtain the semiconductor laser device in which the generation of the light loss inside the device is suppressed.
- the step of forming the semiconductor laser device layer is performed by etching from the surface of the semiconductor laser device layer toward the active layer to form a ridge on at least one side surface of the ridge. Forming a first side surface extending at a first inclination angle with respect to the main surface of the active layer on the tip side of the active layer, and a second side surface extending at a second inclination angle smaller than the first inclination angle on the root side of the ridge
- the ridge tapers in width from the root side to the tip side at the second side portion, while the first side has a first inclination angle larger than the second inclination angle at the second side.
- the first side can form a ridge in which the tip is restrained from being extremely tapered. That is, since a ridge having a contact area (contact width) with the electrode layer maintained at a constant size can be formed, a semiconductor laser device with improved electrical characteristics can be obtained.
- the active layer is mainly composed of (H, K, -H-K, 0) plane (an integer in which at least one of H and K is not 0). It has a surface. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of at least one side surface of the ridge.
- the active layer has a main surface inclined with respect to the (0001) plane. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of at least one side surface of the ridge.
- the ridge is preferably formed to extend in the [0001] direction. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of at least one side surface of the ridge.
- the ridge is preferably formed to extend in the [1-101] direction. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of at least one side surface of the ridge.
- the active layer is an integer having a (H, K, -H-K, L) plane (at least one of H and K is not 0 and L ⁇ 0).
- the ridge is formed to extend in the [H + 2 K, -2 H-K, H-K, 0] direction. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of at least one side surface of the ridge.
- FIG. 1 is a cross-sectional view for explaining a schematic configuration of a semiconductor laser device according to the present invention.
- FIG. 1 is a cross-sectional view for explaining a schematic configuration of a semiconductor laser device according to the present invention.
- FIG. 1 is a perspective view showing a structure of a semiconductor laser device according to a first embodiment of the present invention.
- FIG. 1 is a cross-sectional view showing a structure of a semiconductor laser device according to a first embodiment of the present invention.
- FIG. 7 is a cross-sectional view for illustrating the manufacturing process of the semiconductor laser device according to the first embodiment of the present invention.
- FIG. 7 is a cross-sectional view for illustrating the manufacturing process of the semiconductor laser device according to the first embodiment of the present invention.
- FIG. 1 is a cross-sectional view for illustrating the manufacturing process of the semiconductor laser device according to the first embodiment of the present invention.
- FIG. 7 is a cross-sectional view for illustrating the manufacturing process of the semiconductor laser device according to the first embodiment of the present invention.
- FIG. 7 is a cross-sectional view for illustrating the manufacturing process of the semiconductor laser device according to the first embodiment of the present invention.
- FIG. 7 is a cross-sectional view for illustrating the manufacturing process of the semiconductor laser device according to the first embodiment of the present invention.
- FIG. 5 is a cross-sectional view showing a structure of a semiconductor laser device according to a second embodiment of the present invention.
- FIG. 7 is a cross-sectional view showing a structure of a semiconductor laser device according to a third embodiment of the present invention.
- FIG. 7 is a cross-sectional view showing a structure of a semiconductor laser device according to a fourth embodiment of the present invention.
- FIG. 10 is a cross-sectional view showing a structure of a semiconductor laser device according to a fifth embodiment of the present invention.
- the semiconductor laser device 10 has a structure in which a first conductivity type semiconductor layer 1, an active layer 2, and a second conductivity type semiconductor layer 3 are sequentially stacked.
- the active layer 2 is formed of a single layer or single quantum well (SQW) structure or a multiple quantum well (MQW) structure.
- the active layer 2 may be undoped or doped.
- the first conductivity type semiconductor layer 1 is formed of a first conductivity type cladding layer or the like having a band gap larger than that of the active layer 2.
- an optical guide layer having a band gap between the band gap of the first conductive semiconductor layer 1 and the band gap of the active layer 2 is provided between the first conductive semiconductor layer 1 and the active layer 2.
- a carrier block layer having a band gap larger than that of the first conductive semiconductor layer 1 may be provided between the first conductive semiconductor layer 1 and the active layer 2.
- the first conductivity type contact layer may be provided on the side (the C1 direction side) opposite to the active layer 2 of the first conductivity type semiconductor layer 1.
- the first conductivity type cladding layer may also serve as the first conductivity type contact layer.
- the second conductivity type semiconductor layer 3 is formed of a second conductivity type cladding layer having a band gap larger than that of the active layer 2 or the like. Further, an optical guide layer having a band gap between the band gap of the second conductive type semiconductor layer 3 and the band gap of the active layer 2 is provided between the second conductive type semiconductor layer 3 and the active layer 2. May be In addition, a carrier block layer having a band gap larger than that of the second conductivity type semiconductor layer 3 may be provided between the second conductivity type semiconductor layer 3 and the active layer 2. In addition, a second conductivity type contact layer may be provided on the side (the C2 direction side) opposite to the active layer 2 of the second conductivity type semiconductor layer 3.
- the second conductivity type contact layer preferably has a smaller band gap than the second conductivity type semiconductor layer 3 (second conductivity type cladding layer).
- the second conductivity type cladding layer may also serve as the second conductivity type contact layer.
- the active layer 2 and the second conductivity type semiconductor layer 3 are examples of the “semiconductor laser element layer” in the present invention.
- Each semiconductor layer (first conductive type semiconductor layer 1, active layer 2 and second conductive type semiconductor layer 3) is made of AlGaAs, GaInAs, AlGaInP, AlGaInNAs, AlGaSb, GaInAsP, nitride semiconductors. , MgZnSSe-based and ZnO-based.
- GaN, AlN, InN, BN, TlN, or a mixed crystal thereof can be used as the nitride-based semiconductor.
- Flat portions 3b extending in directions (B (B1 and B2) directions) are formed.
- the ridges 3a extend in the form of stripes in the resonator direction (direction A).
- an optical waveguide is formed in the portion of the active layer 2 located below the ridge 3a.
- the side surface 3c and the side surface 3d are formed on the side surface of one side (B1 side) of the ridge 3a.
- the side surface 3c extends from the tip of the ridge 3a toward the root with an angle ⁇ 1 substantially perpendicular to the main surface of the active layer 2.
- the angle ⁇ 1 is preferably about 85 ° or more.
- the side surface 3d extends from the end on the C2 side of the side surface 3c toward the root of the ridge 3a with an angle ⁇ 2 smaller than the angle ⁇ 1.
- the side surface 3 d is configured such that the crystal orientation plane of the second conductivity type semiconductor layer 3 appears.
- the side surface 3c and the side surface 3d are examples of the “first side surface” and the “second side surface” in the present invention, respectively, and the angle ⁇ 1 and the angle ⁇ 2 are respectively the “first inclination angle” and It is an example of "2nd inclination angle.”
- a side surface 3e and a side surface 3f are formed on the other side (B2 side) of the ridge 3a.
- the side surface 3 e extends from the tip of the ridge 3 a toward the root at an angle ⁇ 3 substantially perpendicular to the main surface of the active layer 2.
- the side surface 3f extends from the end on the C2 side of the side surface 3e toward the root of the ridge 3a with an angle ⁇ 4 smaller than the angle ⁇ 3.
- the side surface 3 f is configured such that the crystal orientation plane of the second conductivity type semiconductor layer 3 appears.
- the side surface 3e and the side surface 3f are examples of the “third side surface” and the “fourth side surface” in the present invention, respectively, and the angle ⁇ 3 and the angle ⁇ 4 are respectively the “third inclination angle” and It is an example of "the 4th inclination angle.”
- the ridge 3 a is formed by etching the second conductive semiconductor layer 3 using a mask pattern (not shown) made of SiO 2 or the like formed on the surface of the second conductive semiconductor layer 3 as a mask.
- etching is performed in the C1 direction from the tip of the ridge 3a having the width ( ⁇ W2) of the mask pattern, whereby the side 3c and the side 3e are formed in the section L2 (tip side of the ridge 3a).
- etching is further continued to expose the crystal orientation plane of the second conductivity type semiconductor layer 3 extending at an inclination angle (angle ⁇ 2) different from the side surface 3c to the B1 side, and different from the side surface 3e to the B2 side.
- the side surface 3d and the side surface 3f are formed in the section L1 (the root side of the ridge 3a).
- L1 and L2 are examples of the "first height" and the "second height” in the present invention respectively.
- each semiconductor layer is a nitride-based semiconductor
- the plane orientation of the main surface of the active layer 2 is not a plane (a (11-20) plane) and an m plane (a (1-100) plane). It is possible to use a so-called semipolar plane or the like consisting of a polar plane, a (11-22) plane, and a plane inclined from the c-plane ((0001) plane) to the a-plane or m-plane.
- the active layer has a main surface consisting of (H, K, -HK, 0) planes (at least one of H and K is not 0), and the ridge in the c-axis direction ([0001] direction) If it is formed along, the "second side” and the “fourth side” of the present invention are respectively formed on both one side and the other side of the ridge.
- the main surface of the active layer 2 is an a-plane and the ridges 3a extend in a stripe shape in the c-axis direction, a side surface 3d formed of a (-12-10) plane in the section L1; And a ridge 3a having a side surface 3f formed of (1-10) surface.
- the section L1 is a side surface 3d formed of (0-110) plane, A ridge 3a having a side surface 3f of -10) is formed.
- the semiconductor laser element layer has as a main surface a surface inclined in a range of about 0 ° to about 32 ° or 58 ° to about 90 ° from the c-plane to the a-plane, the etching condition is controlled.
- the “second side surface” of the (11-22) plane on the root side of the ridge 3a (see FIG. 1) extending along the m-axis direction ([1-100] direction), and from the (-1-122) plane It is possible to form the "fourth side face".
- the semiconductor laser element layer has as a main surface a surface inclined in a range of about 0 ° to about 39 ° or about 51 ° to about 90 ° from the c-plane to the a-plane, control the etching conditions To form the “second side surface” of the (11-24) plane and the “fourth side surface” of the (-1-124) plane on the root side of the ridge 3a extending along the m-axis direction. It is possible.
- the etching conditions are controlled
- the "second side” consisting of the (10-11) plane and the "fourth side” consisting of the (-1011) plane on the root side of the ridge 3a extending along the a-axis direction. It is.
- the semiconductor laser element layer has as a main surface a surface inclined in the range of about 0 ° to about 43 ° or about 47 ° to about 90 ° from the c-plane to the m-plane, control the etching conditions
- the “second side surface” of the (10-12) plane and the “fourth side surface” of the (-1012) plane on the root side of the ridge 3a extending along the a-axis direction. is there.
- the width W1 of the ridge 3a in the section L1 on the flat portion 3b is gradually narrowed along the C2 direction by the side 3d and the side 3f, and in the section L2, the ridge 3a is substantially reduced by the side 3c and the side 3e. It has a constant width W2. Further, since the side surface 3 d and the side surface 3 f are respectively made of the crystal orientation plane of the second conductive type semiconductor layer 3, the width W 1 is formed in a substantially constant size along the cavity direction (direction A).
- the present invention it is also possible to form a semiconductor laser device 15 described below. That is, when the semiconductor layer is grown on the active layer whose main surface is inclined at a range of about 32 ° to about 58 ° from the c-plane to the a-plane, the ridge is formed along the m-axis direction
- the "second side surface" of the present invention is formed only on one side surface (one side surface) of the ridge.
- the ridge is formed in the a-axis direction ([11-20
- the “second side surface” of the present invention is formed only on one side surface (one side surface) of the ridge. For example, as shown in FIG.
- one side of the semiconductor laser device 15 when using a semipolar plane inclined in the range of about 32 ° to about 58 ° from the c-plane to the a-plane as the main surface of the active layer 2, one side of the semiconductor laser device 15 A ridge 3i having a side surface 3c and a side surface 3g formed of a (11-22) surface is formed in the second conductivity type semiconductor layer 3 only on the side surface on the same side as the side surface (B1 side).
- the side surface on the same side (B2 side) as the other side surface of the semiconductor laser device 15 is a side surface continuously formed at an angle ⁇ 3 with respect to the main surface of the active layer 2 from the tip to the root of the ridge 3i. It has 3h.
- the ridge 3i is gradually narrowed along the direction (C2 direction) in which the width W3 is separated from the active layer 2 by the side surface 3g in the section L3 on the flat portion 3b, and substantially in the section L4 by the side surface 3c and the side surface 3h. It has a constant width W4. Also in this case, since the side surface 3g is formed of the crystal orientation plane ((11-22) plane) of the second conductivity type semiconductor layer 3, the width W3 has a substantially constant size along the cavity direction (direction A). It is formed.
- the side surface 3 g is an example of the “second side surface” in the present invention
- the side surface 3 h is an example of the “fifth side surface” in the present invention.
- the angle ⁇ 3 is an example of the “fifth tilt angle” in the present invention.
- the active layer 2 is a nitride-based semiconductor
- at least one of (H, K, -H-K, L) planes (H and K) is not 0 as the plane orientation of the main surface of the active layer 2
- An integer and L ⁇ 0) can be used.
- the ridge 3a (3i) preferably extends in the [H + 2K, -2H-K, H-K, 0] direction.
- one side surface of the ridge 3a (3i) is composed of (H1, K1, -H1-K1, L1) surfaces (L1> 0), and the other side surface of the ridge 3a (3i) is (H2, K2, -H2 It is preferable to be composed of -K2, L2) plane (L2 ⁇ 0).
- the (H1, K1, -H1-K1, L1) plane and the (H2, K2, -H2-K2, L2) plane described above are in the [H + 2 K, -2 H-K, H-K, 0] direction Is included in the plane.
- the ridge 3a is formed along the a-axis direction, it is possible to expose the "second side surface” consisting of the (10-12) plane, and if the ridge 3a is formed along the m-axis direction, It is possible to expose the "second side surface” consisting of the (11-24) plane.
- the current blocking layer 4 is formed on the upper surface of the flat portion 3b of the second conductivity type semiconductor layer 3 and on both side surfaces of the ridge 3a (3i). Further, the first conductive side electrode 5 is formed on the lower surface of the first conductive type semiconductor layer 1, and the second conductive side electrode 6 is formed on the upper surfaces of the ridge 3a (3i) and the current block layer 4. Ru. In addition, the second conductive side electrode 6 may be formed in a partial region on the second conductive type semiconductor layer 3.
- the first conductive semiconductor layer 1 may be configured of a substrate or a semiconductor layer, or may be configured of both a substrate and a semiconductor layer.
- the substrate is the side opposite to the side on which the second conductivity type semiconductor layer 3 of the first conductivity type semiconductor layer 1 is formed. (The lower surface side of the first conductivity type semiconductor layer 1) is formed.
- the substrate may be a first conductivity-type nitride-based semiconductor substrate or a different substrate.
- a first conductivity type ⁇ -SiC substrate having a hexagonal crystal structure and a rhombohedral structure a first conductivity type GaAs substrate, a first conductivity type GaP substrate, a first conductivity type InP substrate, a first conductivity type Si substrate, etc.
- the first conductivity type semiconductor layer 1 may include a substrate. However, in order to obtain an AlGaInN-based semiconductor layer having the highest crystallinity, it is most preferable to use a nitride-based semiconductor substrate.
- a GaN substrate, a 4H-SiC substrate or 6H-SiC substrate as an ⁇ -SiC substrate having a hexagonal crystal structure or a rhombohedral structure, or a ZnO substrate can be used as the substrate.
- a nitride-based semiconductor layer is formed on the same main surface as the substrate on the GaN substrate and the ⁇ -SiC substrate.
- nitride-based semiconductor layers having an a-plane and an m-plane as main surfaces are formed on the a-plane and the m-plane of the ⁇ -SiC substrate, respectively.
- an r-plane sapphire substrate on which a nitride-based semiconductor having an a-plane as a main surface is formed may be used as the substrate.
- a LiAlO 2 substrate or a LiGaO 2 substrate on which a nitride-based semiconductor layer having an a plane and an m plane as main surfaces is formed can be used as a substrate.
- the plane orientation of the growth surface of the substrate is c-plane, nonpolar planes such as a-plane and m-plane, (11-22) plane, and c-plane.
- a surface sinipolar surface inclined in the a-axis direction or m-axis direction.
- the first conductivity type semiconductor layer 1 and the second conductivity type semiconductor layer 3 have different conductivity.
- the first conductive semiconductor layer 1 may be p-type and the second conductive semiconductor layer 3 may be n-type, or the first conductive semiconductor layer 1 may be n-type and the second conductive semiconductor layer 3 may be p It may be a type.
- a dielectric multilayer film with low reflectance is formed on the resonator surface on the laser light emission side of the semiconductor laser element 10 (15).
- a dielectric multilayer film with high reflectance is formed on the resonator surface on the laser light reflection side.
- dielectric multilayer films GaN, AlN, BN, Al 2 O 3 , SiO 2 , ZrO 2 , HfO 2 , Ta 2 O 5 , Nb 2 O 5 , La 2 O 3 , SiN, AlON and MgF 2 and can be used a multilayer film made of Ti 3 O 5 and Nb 2 O 3 is a different material of these hybrid ratio.
- the current blocking layer 4 is made of SiO 2 , Al 2 O 3 , ZrO 2 , TiO 2 , Ta 2 O 5 , La 2 O 3 , Si, AlN, AlGaN, SiN, or the like.
- the current blocking layer 4 may have a stacked structure using the above-described material.
- the ridge 3a (3i) is formed by the second conductivity type semiconductor layer 3, and the active layer 2 is formed below the ridge 3a (3i).
- the invention is not limited to this, and the active layer may constitute a part of the ridge. That is, by etching from the upper surface of the second conductivity type semiconductor layer 3 through the active layer 2 to the inside of the first conductivity type semiconductor layer 1, the “active layer” of the present invention is disposed in the ridge. It is also good.
- the side surface on the B1 side of the ridge 3a (3i) has the side surface 3d (3g) formed of the crystal orientation plane of the second conductivity type semiconductor layer 3, thereby forming the crystal side plane Since flatness is obtained in 3d (3g), it is suppressed that the width W1 (W3) of the ridge 3a (3h) in the side 3d (3g) part disperses along the cavity direction in which the ridge 3a (3i) extends. Be done. As a result, the disturbance of the light propagation mode due to the variation in the width of the ridge 3a (3i) is less likely to occur, so that it is possible to suppress the occurrence of the light loss inside the semiconductor laser element 10 (15).
- the side on the B1 side of the ridge 3a (3i) is provided on the tip side of the ridge 3a (3h) and extends at an angle ⁇ 1 (approximately 90 °) with respect to the main surface of the active layer 2 3c and a side surface 3d (3g) in which the width W1 (W3) of the ridge 3a (3h) extends from the tip side toward the root side by extending at an angle ⁇ 2 smaller than the angle ⁇ 1 with respect to the main surface of the active layer 2;
- the ridge 3a (3i) tapers the width W1 (W3) of the ridge 3a (3i) from the root side to the tip side at the side 3d (3g), while the angle at the side 3c Since the ridge 3a (3i) extends toward the tip at an angle ⁇ 1 (approximately 90 °) larger than ⁇ 2, the width of the ridge 3a (3i) is prevented from monotonously tapering at the angle ⁇ 2 from the root to the tip.
- the extreme taper of the tip is suppressed by the side surface 3c, so that the predetermined width W2 (W4
- the second conductive electrode 6 can be formed at the tip at which the second conductive electrode 6 is obtained.
- the contact area (contact width) between the second conductive type semiconductor layer 3 and the second conductive side electrode 6 formed on the upper surface of the ridge 3a (3i) can be maintained at a constant size.
- the electrical characteristics of the semiconductor laser device 10 (15) can be improved.
- carrier confinement can be performed in the upper region (region of section L2) in which the side surface 3c and the side surface 3e of the ridge 3a (3i) are formed.
- Optical confinement of the laser light by the layer 2 can be performed in the lower region (region of the section L1) in which the side surface 3d (3g) and the side surface 3f of the ridge 3a (3i) are formed. That is, by controlling the widths of the upper and lower regions of the ridge, carrier confinement and laser light optical confinement can be controlled independently.
- the ridge 3i is provided from the tip side to the root side and has a side surface 3h extending at an angle ⁇ 3 with respect to the main surface of the active layer 2, thereby providing one side surface of the ridge 3i (side surface 3c and Since the ridge 3i has an asymmetrical shape in the width direction (direction B) different from the side surface (side surface 3h) and the other side surface (side surface 3h), the effective refractive index for the oscillation wavelength of one side surface and the efficiency for the oscillation wavelength of the other side surface
- the refractive index can be made different.
- the upper limit dimension of the ridge width capable of suppressing the occurrence of the high-order horizontal transverse mode can be increased as compared with the case where the effective refractive indexes of both side surfaces are the same.
- the width W4 of the ridge 3i can be formed large while suppressing the occurrence of kink (breaking of current-light output characteristics) due to the occurrence of the high-order horizontal transverse mode.
- the contact area between the semiconductor layers 1 to 3 forming the ridge 3i and the second conductive side electrode 6 formed on the ridge 3i can be increased. Therefore, the semiconductor layers 1 to 3 and the second conductive side The contact resistance with the electrode 6 can be lowered. That is, the operating voltage of the semiconductor laser device 15 can be reduced while suppressing the occurrence of kinks. As a result, the operating voltage of the semiconductor laser device 15 can be reduced while obtaining good laser characteristics at the time of high output operation.
- the semiconductor laser device 20 has Al 0 on the surface of the n-type GaN substrate 21 whose main surface is a plane inclined approximately 18 ° from the c-plane to the a-plane. .01 Ga 0.99 N buffer layer 22 having a thickness of about 1.0 ⁇ m, and Ge doped n-type Al 0.07 Ga 0.93 N having an about 1.9 ⁇ m thickness A cladding layer 23, an n-side light guide layer 24 having a thickness of about 80 nm made of In 0.01 Ga 0.99 N, and a light emitting layer 25 are formed.
- the light emitting layer 25 has a thickness of about 2.5 nm, three quantum well layers of In x Ga 1 -x N, and three quantum of In y Ga 1 -y N having a thickness of about 20 nm. It consists of an MQW active layer in which barrier layers are alternately stacked.
- the light emitting layer 25 has a main surface inclined at about 18 ° from the c-plane to the a-plane.
- the n-type GaN substrate 21 is an example of the “substrate” in the present invention, and the light emitting layer 25 is an example of the “active layer” in the present invention.
- a p-side light guide layer 26 having a thickness of about 80 nm made of In 0.01 Ga 0.99 N and a thickness of about 20 nm made of Al 0.2 Ga 0.8 N
- a p-side carrier blocking layer 27 having a p-type cladding layer 28 having a thickness of about 0.5 ⁇ m made of Mg-doped Al 0.07 Ga 0.93 N, the in 0.07 Ga 0.93 N
- a p-side contact layer 29 having a thickness of about 3 nm.
- the buffer layer 22, the n-type cladding layer 23, the n-side light guide layer 24, the light emitting layer 25, the p-side light guide layer 26, the p-side carrier block layer 27, the p-type cladding layer 28 and the p-side contact layer 29 It is an example of the "semiconductor laser element layer" of this invention.
- a flat portion 28b is formed on both sides (direction B) from the root of the convex portion 28a.
- the p-side contact layer 29 is formed on the convex portion 28 a of the p-type cladding layer 28.
- a ridge 35 as an optical waveguide is formed by the convex portion 28 a of the p-type cladding layer 28 and the p-side contact layer 29.
- the ridges 35 extend in the m-axis direction (the direction perpendicular to the paper surface).
- directions (A direction, B direction, C direction, etc.) indicated by using the reference numerals mean the same directions as the directions described using the reference in the concept of the present invention described above.
- a side surface 35 a and a side surface 35 b are formed on the side surface of the ridge 35 on the B1 side.
- the side surface 35 b is configured to expose a crystal orientation plane formed of the (11-22) plane of the p-type cladding layer 28.
- the side surface on the B2 side of the ridge 35 has a side surface 35 c extending substantially perpendicularly to the main surface of the light emitting layer 25 from the tip to the root of the ridge 35.
- the side surface 35a and the side surface 35b are examples of the “first side surface” and the “second side surface” in the present invention, respectively, and the side surface 35c is an example of the "fifth side surface” in the present invention.
- the angles ⁇ 5 and ⁇ 6 are examples of the “first tilt angle” and the “second tilt angle” in the present invention respectively.
- the width W5 of the ridge 35 is gradually narrowed along the upper side (C2 direction) by the side surface 35b in the section L5 on the flat portion 28b (the root side of the ridge 35).
- the side surface 35a and the side surface 35c have a substantially constant width W6.
- L5 and L6 are examples of the "first height” and the "second height” in the present invention respectively.
- the width W5 since the side surface 35b is formed of the crystal orientation plane ((11-22) plane) of the p-type cladding layer 28, the width W5 has a substantially constant size along the cavity direction ([1-100] direction). It is formed.
- FIG. 4 shows that the connection between the side surface 35a and the side surface 35b is bent, in reality, the side surface 35a and the side surface 35b are smoothly connected to form the ridge 35.
- a p-side ohmic electrode 30 is formed on the p-side contact layer 29.
- a current blocking layer 31 having a thickness of about 0.2 ⁇ m made of SiO 2 is formed on the upper surface of the p-type cladding layer 28 and the side surfaces of the ridge 35 and the p-side ohmic electrode 30.
- the p-side pad electrode 32 is formed so as to cover the upper surface of the p-side ohmic electrode 30 and the upper surface of the current blocking layer 31.
- an n-side ohmic electrode 33 and an n-side pad electrode 34 are formed on the back surface of the n-type GaN substrate 21 sequentially from the n-type GaN substrate 21 side.
- a pair of cavity facets 20 a is formed at both ends of the semiconductor laser element 20 in the cavity direction (direction A). Further, on the resonator surface 20a, a dielectric multilayer film (not shown) having the function of reflectance control, which is made of an AlN film or an Al 2 O 3 film, is formed by end surface coating processing in the manufacturing process.
- Buffer layer 22, n-type cladding layer 23, n-side light guide layer 24, light emitting layer 25, p-side light guide layer 26, p-side carrier block layer 27, p-type cladding layer 28 and p-side contact layer 29 are sequentially grown Form a semiconductor element layer. Therefore, in the stacked semiconductor element layer, a main surface is formed which is a plane inclined approximately 18 ° from the c-plane to the a-plane.
- the mask pattern 36 is formed.
- FIG. 7 such as by inductively coupled plasma (ICP) etching using Cl 2 gas, the mask pattern 36 as a mask, a part of the p-side contact layer 29 and the p-type cladding layer 28 in the direction C1 Do the etching towards.
- the ICP etching is performed in a state adjusted to a bias power of about 200 W or more and about 300 W or less and an ICP power of about 30 W or more and about 50 W or less.
- a part of the p-side contact layer 29 and a part of the p-type cladding layer 28 are etched in the C1 direction along the width (the B direction) of the mask pattern 36.
- a side surface 35a and a side surface 35c having an angle ⁇ 5 substantially perpendicular to the main surface of the upper surface are formed by the depth of the section L6.
- the crystal orientation plane formed of the (11-22) plane of the p-type cladding layer 28 is exposed on the side surface 35 b formed by the etching.
- the side surface 35c is further formed by the depth of the section L5.
- the ridge 35 composed of the convex portion 28 a of the p-type cladding layer 28 and the p-side contact layer 29 is formed.
- the ridges 35 extend in parallel to the [1-100] direction (the direction perpendicular to the paper surface).
- the mask pattern 36 is removed, and the p-side ohmic electrode 30 is formed on the p-side contact layer 29 located on the top surface of the ridge 35.
- the current block layer 31 is formed to cover the upper surface of the p-type cladding layer 28 and the side surfaces of the ridge 35 and the p-side ohmic electrode 30 by plasma CVD.
- the p-side pad electrode 32 is formed to cover the upper surface of the p-side ohmic electrode 30 and the upper surface of the current blocking layer 31 by vacuum evaporation.
- n-type GaN substrate 21 is polished so that n-type GaN substrate 21 has a thickness of about 100 ⁇ m, and then a predetermined region on the lower surface of n-type GaN substrate 21 is formed using vacuum evaporation and photolithography.
- the n-side ohmic electrode 33 and the n-side pad electrode 34 are sequentially formed on the
- the wafer is cleaved into a bar shape to form a resonator surface 20a (see FIG. 3). Then, an end surface coating process is performed on the bar-shaped semiconductor laser element 20 to form a dielectric multilayer film (not shown) on the resonator surface 20a. Finally, the semiconductor laser element 20 in the bar state is element-divided (chipped) along the cavity direction (direction A). Thus, the chip of the semiconductor laser device 20 (see FIG. 3) according to the first embodiment is formed.
- the side surface on the B1 side of the ridge 35 has the side surface 35 b formed of the crystal orientation plane ((11-22) plane) of the p-type cladding layer 28.
- Flatness is obtained on the side surface 35b, so that the width W5 of the ridge 35 at the portion of the side surface 35b is suppressed from being dispersed along the cavity direction ([1-100] direction) in which the ridge 35 extends.
- the disturbance of the light propagation mode due to the variation in the width of the ridge 35 is less likely to occur, so that the occurrence of light loss inside the semiconductor laser device 20 can be suppressed.
- the width W5 of the ridge 35 tapers from the root side to the tip side at the portion of the side surface 35b, while the width 35 of the side surface 35a extends toward the tip at an angle ⁇ 5 larger than the angle ⁇ 6.
- the monotonous tapering at the angle ⁇ 6 from the root to the tip is suppressed. That is, unlike the case where the p-side ohmic electrode 30 is formed on the top surface of the tip extremely tapered only at the angle ⁇ 6, the tip 35 is prevented from being extremely tapered by the side surface 35a, so the predetermined width (W6) is The p-side ohmic electrode 30 can be formed at the obtained tip. As a result, the contact area (contact width) between the p-type cladding layer 28 and the p-side ohmic electrode 30 formed on the upper surface of the ridge 35 can be maintained at a constant size. Characteristics can be improved.
- the light emitting layer 25 has a main surface formed of a surface inclined at about 18 ° from the c-plane to the a-plane, whereby the (11-22) plane is at least near the root of the ridge 35 on the B1 side. It is possible to easily form the side surface 35b to which the crystal orientation plane made of
- the semiconductor laser device layer including the light emitting layer 25 is formed on the main surface of the n-type GaN substrate 21 (the main surface of the surface inclined about 18 ° from the c-plane to the a-plane). It is possible to easily form the semiconductor laser device 20 having the side surface 35b in which the crystal orientation plane of the (11-22) plane appears on the root side of the ridge 35.
- Second Embodiment A second embodiment will be described with reference to FIG.
- the semiconductor laser 40 is formed using an n-type GaN substrate 41 having an m-plane as a main surface
- the n-type GaN substrate 41 is an example of the “substrate” in the present invention.
- a semiconductor laser device layer having a laminated structure similar to that of the first embodiment is formed on the main surface of the n-type GaN substrate 41 consisting of m-planes. ing. That is, in the figure, the same reference numerals as in the first embodiment are given to the same components as in the first embodiment.
- the side surface 55 a and the side surface 55 b are formed on the side surface on the B 1 side of the ridge 55.
- the ridges 55 extend in a stripe shape in the c-axis direction.
- the side surface 55 b is configured to expose a crystal orientation plane formed of the (0-110) plane of the p-type cladding layer 28.
- the side surface 55a and the side surface 55b are examples of the “first side surface” and the “second side surface” in the present invention respectively.
- the angle ⁇ 7 and the angle ⁇ 8 are examples of the “first tilt angle” and the “second tilt angle” in the present invention respectively.
- directions (A direction, B direction, C direction, etc.) indicated by using the reference numerals mean the same directions as the directions described using the reference in the concept of the present invention described above.
- the side surface 55 d is configured to expose a crystal orientation plane formed of the (10-10) plane of the p-type cladding layer 28.
- the side surface 55 c and the side surface 55 d are examples of the “third side surface” and the “fourth side surface” in the present invention respectively.
- the angle ⁇ 9 and the angle ⁇ 10 are examples of the “third tilt angle” and the “fourth tilt angle” in the present invention respectively.
- the width 55 is gradually narrowed along the C2 direction by the side surface 55b and the side surface 55d in the section L7 on the flat portion 28b, and the side surface 55a and the side surface 55c in the section L8.
- the width W7 is formed in a substantially constant size along the cavity direction (c axis direction).
- the side surfaces 55a and 55c having the width W8 are After forming the upper region of the ridge 55 (portion L8 on the tip side of the ridge 55), the lower region of the ridge 55 consisting of the side surface 55b and the side surface 55d extending from the width W8 to the width W7 (section on the root side of the ridge 55 Form part L7).
- L7 and L8 are examples of the "first height" and the "second height" in the present invention respectively.
- the crystal orientation plane formed of the (0-110) plane of the p-type cladding layer 28 is exposed on the side surface 55b formed by etching, and the side surface 55d of the p-type cladding layer 28 (10-10 The crystal orientation plane consisting of planes is exposed.
- the ridge 55 is formed.
- the remaining structure and manufacturing process of the semiconductor laser 40 in the second embodiment are similar to those of the aforementioned first embodiment.
- the side surface on the B2 side of the ridge 55 has the side surface 55d formed of the crystal orientation plane ((10-10) plane) of the p-type cladding layer 28, thereby providing the B1 of the ridge 55.
- the side surface 55d formed of the crystal orientation plane has flatness on the side surface 55b formed of the (0-110) plane as well as the side surface on the B2 side, so the width of the ridge 55 in the region sandwiched by the side surface 55b and the side surface 55d. Dispersion of W7 along the resonator direction ([0001] direction) is further suppressed.
- the tip of the ridge 55 sandwiched by the side surface 55a and the side surface 55c can be easily formed with a width suitable for forming the p-side ohmic electrode 30 . That is, since the controllability of the width of the ridge 55 is further improved, the occurrence of light loss inside the device can be further suppressed, and the electrical characteristics of the semiconductor laser 40 can be further improved.
- the light emitting layer 25 has the main surface formed of the m plane, whereby the side surfaces 55b and 55d formed of the crystal orientation plane are formed on the root sides of the side surfaces of the ridge 55 in the B direction. It can be easily formed.
- the remaining effects of the second embodiment are similar to those of the aforementioned first embodiment.
- Third Embodiment A third embodiment will be described with reference to FIG.
- the semiconductor laser device 60 is formed using an n-type GaN substrate 61 having a c-plane as a main surface
- the n-type GaN substrate 61 is an example of the “substrate” in the present invention.
- a semiconductor laser device layer having a laminated structure similar to that of the first embodiment is formed on the main surface of the c-plane of the n-type GaN substrate 61. ing. That is, in the figure, the same reference numerals as in the first embodiment are given to the same components as in the first embodiment.
- the side surface 75 a and the side surface 75 b are formed on the side surface of the ridge 75 on the B 1 side.
- the side surface 75a has an angle ⁇ 11 substantially perpendicular to the main surface of the light emitting layer 25 from the tip to the root of the ridge 75, while the side surface 75b is from the end on the C2 side of the side surface 75a to the root of the ridge 75 Extend with an angle ⁇ 12 smaller than the angle ⁇ 11.
- the side surface 75 b is configured to expose a crystal orientation plane formed of the (11-22) plane of the p-type cladding layer 28.
- the side surface 75 a and the side surface 75 b are examples of the “first side surface” and the “second side surface” in the present invention, respectively.
- angles ⁇ 11 and ⁇ 12 are examples of the “first tilt angle” and the “second tilt angle” in the present invention respectively.
- directions (A direction, B direction, C direction, etc.) indicated by using the reference numerals mean the same directions as the directions described using the reference in the concept of the present invention described above.
- the side surface 75c and the side surface 75d are formed on the side surface of the ridge 75 on the B2 side. Further, the side surface 75c has an angle ⁇ 13 substantially perpendicular to the main surface of the light emitting layer 25 from the tip of the ridge 75 toward the root, while the side surface 75d is the root of the ridge 75 from the C2 side end of the side surface 75c. Extends with an angle ⁇ 14 smaller than the angle ⁇ 13.
- the side surface 75 d is configured to expose a crystal orientation plane formed of the (-1-122) plane of the p-type cladding layer 28.
- the side surface 75 c and the side surface 75 d are examples of the “third side surface” and the “fourth side surface” in the present invention, respectively.
- the angles ⁇ 13 and ⁇ 14 are examples of the “third inclination angle” and the “fourth inclination angle” in the present invention respectively.
- the width 75 is gradually narrowed along the C2 direction by the side surface 75b and the side surface 75d in the section L9 (the root side of the ridge 75) on the flat portion 28b.
- the side surface 75a and the side surface 75c have a substantially constant width W10.
- L9 and L10 are examples of the "first height" and the "second height” in the present invention respectively.
- the width W 9 is formed in a resonator direction (substantially constant in size along the m-axis direction).
- the remaining structure and manufacturing process of the semiconductor laser device 60 according to the third embodiment are similar to those of the aforementioned second embodiment.
- the effects of the third embodiment are also similar to those of the second embodiment.
- a fourth embodiment will be described with reference to FIG.
- the case where a semiconductor laser device 80 is formed using an n-type GaN substrate 81 whose main surface is the a-plane will be described.
- the n-type GaN substrate 81 is an example of the “substrate” in the present invention.
- a semiconductor laser device layer having a laminated structure similar to that of the third embodiment is formed on the main surface of the a-plane of the n-type GaN substrate 81. ing. That is, in the figure, the same reference numerals as in the third embodiment are given to the same components as in the third embodiment.
- the side surface 95 a and the side surface 95 b are formed on the side surface of the ridge 95 on the B 1 side.
- the side surface 95a has an angle ⁇ 15 substantially perpendicular to the main surface of the light emitting layer 25 from the tip to the root of the ridge 95, while the side surface 95b is from the end on the C2 side of the side surface 95a to the root of the ridge 95 Extend with an angle ⁇ 16 smaller than the angle ⁇ 15.
- the side face 95 b is configured to expose a crystal orientation plane formed of the (11-22) plane of the p-type cladding layer 28.
- the side surface 95 a and the side surface 95 b are examples of the “first side surface” and the “second side surface” in the present invention, respectively.
- the angle ⁇ 15 and the angle ⁇ 16 are examples of the “first tilt angle” and the “second tilt angle” in the present invention, respectively.
- directions (A direction, B direction, C direction, etc.) indicated by using the reference numerals mean the same directions as the directions described using the reference in the concept of the present invention described above.
- the side surface 95 c and the side surface 95 d are formed on the side surface of the ridge 95 on the B 2 side. Further, the side surface 95c has an angle ⁇ 17 substantially perpendicular to the main surface of the light emitting layer 25 from the tip to the root of the ridge 95, while the side surface 95d is from the end on the C2 side of the side surface 95c to the root of the ridge 95 Extends with an angle ⁇ 18 which is smaller than the angle ⁇ 17.
- the side face 95 d is configured to expose a crystal orientation plane formed of the (-1-122) plane of the p-type cladding layer 28.
- the side surface 95 c and the side surface 95 d are examples of the “third side surface” and the “fourth side surface” in the present invention, respectively.
- the angle ⁇ 17 and the angle ⁇ 18 are examples of the “third tilt angle” and the “fourth tilt angle” in the present invention respectively.
- the width W11 is gradually narrowed along the C2 direction by the side surface 95b and the side surface 95d in the section L11 (the root side of the ridge 95) on the flat portion 28b.
- the side surface 95a and the side surface 95c have a substantially constant width W12.
- L11 and L12 are examples of the “first height” and the “second height” in the present invention, respectively.
- the width W 9 is formed in a substantially constant size along the cavity direction (c axis direction).
- the remaining structure and manufacturing process of the semiconductor laser device 80 according to the fourth embodiment are similar to those of the aforementioned second embodiment.
- the effects of the fourth embodiment are also similar to those of the second embodiment.
- the fifth embodiment will be described with reference to FIG.
- the semiconductor laser device 100 is formed using the n-type GaN substrate 101 whose main surface is a plane inclined approximately 18 ° from the c-plane to the m-plane is described. Do.
- the n-type GaN substrate 101 As shown in FIG. 13, on the surface of the n-type GaN substrate 101, the main surface of which is inclined by about 18 ° from the c-plane to the m-plane, A semiconductor element layer is formed. That is, in the figure, the same reference numerals as in the first embodiment are given to the same components as in the first embodiment.
- the n-type GaN substrate 101 is an example of the “substrate” in the present invention.
- a side surface 115 a and a side surface 115 b are formed on the side surface of the ridge 115 on the B1 side.
- the side surface 115a extends from the tip of the ridge 115 toward the root at an angle ⁇ 19 substantially perpendicular to the main surface of the light emitting layer 25.
- the side surface 115b extends from the end on the C2 side of the side surface 115a It extends toward the root of 115 with an angle ⁇ 20 smaller than the angle ⁇ 19.
- the side surface 115 b is configured to expose a crystal orientation plane formed of the (10-11) plane of the p-type cladding layer 28.
- the side surface 115 a and the side surface 115 b are examples of the “first side surface” and the “second side surface” in the present invention, respectively. Further, the side surface on the B 2 side of the ridge 115 has a side surface 115 c extending substantially perpendicularly to the main surface of the light emitting layer 25 from the tip to the root of the ridge 115.
- the angle ⁇ 19 and the angle ⁇ 20 are examples of the “first tilt angle” and the “second tilt angle” in the present invention respectively.
- the side surface 115c is an example of the "fifth side surface" in the present invention.
- directions (A direction, B direction, C direction, etc.) indicated by using the reference numerals mean the same directions as the directions described using the reference in the concept of the present invention described above.
- the ridge 115 has the width W13 gradually narrowed along the C2 direction by the side surface 115b in the section L13 (the root side of the ridge 115) on the flat portion 28b, and the side surface in the section L14 (the tip side of the ridge 115) It has a substantially constant width W14 by 115a and the side surface 115c.
- L13 and L14 are examples of the "first height” and the "second height” in the present invention respectively.
- the side surface 115 b is made of the crystal orientation plane ((10-11) plane) of the p-type cladding layer 28, the width W 13 is formed to have a substantially constant size along the cavity direction (a-axis direction) There is.
- the remaining structure and manufacturing process of the semiconductor laser device 100 according to the fifth embodiment are similar to those of the aforementioned first embodiment.
- the effects of the fifth embodiment are also similar to those of the first embodiment.
- first and fifth embodiments described above an example in which the “first side surface” and the “second side surface” of the present invention having different inclination angles only on one side (B1 side in FIG. 4) of the ridge is shown.
- the present invention is not limited thereto, and by controlling the etching conditions at the time of ridge formation, the “first side surface” and “second side surface” and “third side surface” of the present invention can be provided on both side surfaces of the ridge. And the “fourth side surface” may be formed respectively.
- the ridge is formed on the semiconductor laser element layer formed on the surface of the n-type GaN substrate having the c-plane as the main surface under predetermined etching conditions.
- the side surface 75b consisting of the (11-22) plane and the side surface 75b consisting of the (-1-120) plane are formed on the root side.
- the present invention is not limited to this. Even if the (10-11) plane, the (10-12) plane, or the (11-24) plane is exposed as the "second side surface” of the present invention, the "second side surface” of the present invention can be formed. Good.
- the ridge is formed along the a-axis direction, it is possible to expose the "second side surface” consisting of the (10-11) plane and the (10-12) plane, respectively. If it is formed along, it is possible to expose the "second side surface” consisting of the (11-24) plane.
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Abstract
Disclosed is a semiconductor laser element wherein generation of light loss in the element is suppressed and the electrical characteristics of the element are improved. The semiconductor laser element (10) is provided with a semiconductor laser element layer, which includes an active layer (2) and a protruding ridge (3a). One side surface of the ridge (3a) has: a side surface (3c), which is provided on the leading end side of the ridge (3a), and extends at an angle (θ1) with respect to the main surface of the active layer (2); and a side surface (3d), which is provided on the base side of the ridge (3a), and extends at an angle (θ2), which is smaller than the angle (θ1), with respect to the main surface of the active layer (2). The side surface (3d) is composed of the crystal orientation plane of the semiconductor laser element layer.
Description
本発明は、半導体レーザ素子およびその製造方法に関し、特に、リッジを含む半導体レーザ素子層を備えた半導体レーザ素子およびその製造方法に関する。
The present invention relates to a semiconductor laser device and a method of manufacturing the same, and more particularly to a semiconductor laser device having a semiconductor laser device layer including a ridge and a method of manufacturing the same.
従来、リッジを含む半導体レーザ素子層を備えた半導体レーザ素子が特開2002-204031号公報や特開2007-266574号公報などに知られている。
Conventionally, a semiconductor laser device provided with a semiconductor laser device layer including a ridge is known in Japanese Patent Application Laid-Open Nos. 2002-204031 and 2007-266574.
特開2002-204031号公報には、活性層上の半導体層に、共振器方向に沿って延びる一対の側面を有する凸状のリッジが形成されたリッジ導波型の半導体レーザダイオードおよびその製造方法が開示されている。この半導体レーザダイオードでは、イオンビームエッチングを用いて、活性層に近い根元側のリッジの幅が最も広くなるとともに、活性層から上方に遠ざかるにつれてリッジの幅が徐々に狭まる形状を有するリッジが形成されている。すなわち、素子の幅方向(共振器面に沿った方向)におけるリッジの断面は、活性層から遠ざかる上方向に先細りする形状を有している。また、リッジの側面は、活性層に近い根元側からリッジの先端側に遠ざかるにつれて活性層の主表面に対する傾斜角度が徐々に大きくなっている。
Japanese Patent Laid-Open No. 2002-204031 discloses a ridge-waveguide type semiconductor laser diode in which a convex ridge having a pair of side surfaces extending along the cavity direction is formed in a semiconductor layer on an active layer, and a method of manufacturing the same. Is disclosed. In this semiconductor laser diode, using ion beam etching, a ridge having a shape in which the width of the ridge on the root side near the active layer is the widest and the width of the ridge gradually narrows away from the active layer is formed. ing. That is, the cross section of the ridge in the width direction of the element (the direction along the resonator surface) has a shape that tapers upward from the active layer. In addition, as the side surface of the ridge is farther from the root side closer to the active layer to the tip side of the ridge, the inclination angle with respect to the main surface of the active layer gradually increases.
また、特開2007-266574号公報には、活性層上の半導体層に、共振器方向に沿って延びる一対の側面を有する凸状のリッジが形成されたリッジ導波型の窒化物系半導体レーザ素子が開示されている。この半導体レーザ素子では、ドライエッチングを用いて、活性層に近い根元側のリッジの幅が最も広くなるとともに、活性層から上方に遠ざかるにつれてこの幅が狭まる形状を有するリッジが形成されている。また、リッジの一方の側面が活性層の主表面に対して略垂直に延びている一方、リッジの他方の側面が活性層の主表面に対して略一定の傾斜角度で上方に延びている。したがって、素子の幅方向(共振器面に沿った方向)におけるリッジの断面は、活性層から遠ざかる方向に単調に先細りしている。
JP-A-2007-266574 discloses a ridge waveguide type nitride semiconductor laser in which a convex ridge having a pair of side surfaces extending along a cavity direction is formed in a semiconductor layer on an active layer. A device is disclosed. In this semiconductor laser device, while the width of the ridge on the root side near the active layer is the widest by using dry etching, a ridge having a shape in which the width narrows as it goes upward from the active layer is formed. Also, one side of the ridge extends substantially perpendicularly to the main surface of the active layer, while the other side of the ridge extends upward at a substantially constant inclination angle to the main surface of the active layer. Therefore, the cross section of the ridge in the width direction of the device (the direction along the cavity plane) is monotonously tapered in the direction away from the active layer.
ここで、特開2002-204031号公報および特開2007-266574号公報に開示されたような従来のリッジ導波型の半導体レーザ素子では、数百μm以上数mm以下の大きさに形成される共振器長に対して、共振器面に沿った方向に約1μm以上数μm以下の幅を有するリッジが形成される場合が多い。そして、このようなレーザ素子では、共振器方向に沿ったリッジの幅のばらつきが生じやすいため、その共振器方向に沿ったリッジの幅のばらつきに起因して、リッジ下部の活性層内に形成される光導波路を伝播する光の伝播モードが乱れやすいという不都合がある。その結果、上記特開2002-204031号公報および特開2007-266574号公報に開示されたような従来のリッジ導波型の半導体レーザ素子では、リッジの幅のばらつきに起因して光の伝播モードが乱された場合、素子内部では光損失が生じやすくなるという問題点がある。特に、光記録装置などの光源として高出力化が求められるレーザ素子においては、共振器方向に沿ったリッジの幅のばらつきをより低減することが要求される。
Here, the conventional ridge waveguide type semiconductor laser devices as disclosed in Japanese Patent Application Laid-Open Nos. 2002-204031 and 2007-266574 are formed to have a size of several hundred μm or more and several mm or less. In many cases, a ridge having a width of about 1 μm or more and several μm or less is formed in the direction along the resonator surface with respect to the resonator length. And, in such a laser element, since the variation in the width of the ridge along the cavity direction tends to occur, the variation in the width of the ridge along the cavity direction forms the active layer in the lower portion of the ridge. And the propagation mode of light propagating in the optical waveguide is easily disturbed. As a result, in the conventional ridge waveguide type semiconductor laser devices as disclosed in the above-mentioned Japanese Patent Application Laid-Open Nos. 2002-204031 and 2007-266574, the propagation mode of light due to the variation of the width of the ridge. When this is disturbed, there is a problem that light loss is likely to occur inside the device. In particular, in a laser element which is required to have a high output as a light source such as an optical recording apparatus, it is required to further reduce the variation in the width of the ridge along the cavity direction.
また、特開2007-266574号公報に開示された半導体レーザ素子では、リッジの片方の側面が活性層の主表面に対して略一定の傾斜度を有して上方に延びるため、素子の幅方向(共振器面に沿った方向)におけるリッジの断面が、活性層から遠ざかる方向に単調に直線状に先細りしている。したがって、リッジが上方に延びて形成されるほど、半導体層とリッジ上面に形成される電極層との接触面積(接触幅)が小さくなるため、素子の電気特性が悪化するという問題点がある。
Further, in the semiconductor laser device disclosed in Japanese Patent Application Laid-Open No. 2007-266574, one side surface of the ridge extends upward with a substantially constant inclination with respect to the main surface of the active layer. The cross section of the ridge (in the direction along the resonator surface) tapers monotonously in the direction away from the active layer. Therefore, the contact area (contact width) between the semiconductor layer and the electrode layer formed on the top surface of the ridge decreases as the ridge extends upward, and the electrical characteristics of the device deteriorate.
この発明は、上記のような課題を解決するためになされたものであり、この発明の1つの目的は、リッジ導波型の半導体レーザ素子において、素子内部における光損失の発生を抑制することが可能であり、かつ、素子の電気特性を向上させることが可能な半導体レーザ素子およびその製造方法を提供することである。
The present invention has been made to solve the above-described problems, and one object of the present invention is to suppress the occurrence of optical loss inside the ridge waveguide type semiconductor laser device. It is possible to provide a semiconductor laser device capable of improving the electrical characteristics of the device and a method of manufacturing the same.
上記目的を達成するために、この発明の第1の局面による半導体レーザ素子は、活性層と、凸状のリッジとを含む半導体レーザ素子層を備え、リッジは、一方側面および他方側面を有し、一方側面は、リッジの先端側に設けられた第1側面と、リッジの根元側に設けられた第2側面とを有し、第1側面は、活性層の主表面に対して第1傾斜角度で延びており、第2側面は、活性層の主表面に対して第1傾斜角度よりも小さい第2傾斜角度で延びており、第2側面は、半導体レーザ素子層の結晶方位面からなる。
In order to achieve the above object, a semiconductor laser device according to a first aspect of the present invention includes a semiconductor laser device layer including an active layer and a convex ridge, the ridge having one side surface and the other side surface The one side has a first side provided on the tip side of the ridge and a second side provided on the root side of the ridge, and the first side has a first inclination with respect to the main surface of the active layer The second side faces extend at a second tilt angle smaller than the first tilt angle with respect to the main surface of the active layer, and the second side faces are made of crystal orientation planes of the semiconductor laser device layer. .
この発明の第1の局面による半導体レーザ素子では、上記のように、リッジの一方側面が、半導体レーザ素子層の結晶方位面からなる第2側面を有することによって、結晶方位面からなる第2側面には平坦性が得られるので、第2側面の部分におけるリッジの幅がリッジの延びる方向(共振器方向)に沿ってばらつくのが抑制される。これにより、リッジの幅のばらつきに起因した光の伝播モードの乱れが生じにくくなるので、半導体レーザ素子の内部における光損失の発生を抑制することができる。
In the semiconductor laser device according to the first aspect of the present invention, as described above, one side surface of the ridge has the second side surface consisting of the crystal orientation plane of the semiconductor laser device layer, whereby the second side surface consists of the crystal orientation plane In the second aspect, the width of the ridge in the portion of the second side is prevented from being dispersed along the extending direction (resonator direction) of the ridge. As a result, the disturbance of the light propagation mode due to the variation in the width of the ridge is less likely to occur, so that the occurrence of the light loss inside the semiconductor laser device can be suppressed.
また、第1の局面による半導体レーザ素子では、リッジの一方側面が上記の第1側面と第2側面とを有することによって、リッジは、第2側面の部分において根元側から先端側に向かってリッジの幅が先細りする一方、第1側面の部分では第2側面の第2傾斜角度よりも大きな第1傾斜角度で先端側に向かって延びる。これにより、リッジの幅が根元側から先端側に至るまで第2傾斜角度で単調に先細りするのが抑制される。すなわち、第2傾斜角度のみで極度に先細りした先端の上面上に電極層を形成する場合と異なり、第1側面によって先端が極度に先細りするのが抑制されるので、所定の幅が得られた先端に電極層を形成することができる。これにより、半導体レーザ素子層とリッジの上面上に形成される電極層との接触面積(接触幅)を一定の大きさに維持することができるので、半導体レーザ素子の電気特性を向上させることができる。
Further, in the semiconductor laser device according to the first aspect, the ridge is a ridge from the root side toward the tip side in the portion of the second side because one side of the ridge has the first side and the second side described above. Of the first side tapers, and extends toward the distal end at a first inclination angle larger than the second inclination angle of the second side at the first side portion. Thereby, the width of the ridge is suppressed from being monotonously tapered at the second inclination angle from the root side to the tip side. That is, unlike the case where the electrode layer is formed on the upper surface of the tip which is extremely tapered only at the second inclination angle, the first side prevents the tip from being extremely tapered, so a predetermined width is obtained. An electrode layer can be formed at the tip. As a result, the contact area (contact width) between the semiconductor laser element layer and the electrode layer formed on the top surface of the ridge can be maintained at a constant size, so that the electrical characteristics of the semiconductor laser element can be improved. it can.
また、第1の局面による半導体レーザ素子では、リッジの一方側面が上記の第1側面と第2側面とを有することによって、キャリアの閉じ込めをリッジの第1側面が形成された上部領域で行うことができるとともに、活性層によるレーザ光の光閉じ込めをリッジの第2側面が形成された下部領域で行うことができる。すなわち、リッジの上部領域および下部領域の幅を制御することにより、キャリアの閉じ込めとレーザ光の光閉じ込めとを独立して制御することができる。
Further, in the semiconductor laser device according to the first aspect, the one side of the ridge has the above first side and the second side so that carrier confinement is performed in the upper region where the first side of the ridge is formed. And the optical confinement of the laser light by the active layer can be performed in the lower region where the second side surface of the ridge is formed. That is, by controlling the widths of the upper and lower regions of the ridge, carrier confinement and laser light optical confinement can be controlled independently.
上記第1の局面による半導体レーザ素子において、好ましくは、他方側面は、先端側に設けられた第3側面と、リッジの根元側に設けられた第4側面とを有し、第3側面は、活性層の主表面に対して第3傾斜角度で延びており、第4側面は活性層の主表面に対して第3傾斜角度よりも小さい第4傾斜角度で延びており、第4側面は、半導体レーザ素子層の結晶方位面からなる。このように構成すれば、リッジの一方側面のみならずリッジの他方側面についても、結晶方位面からなる第4側面が平坦性を有するので、第2側面および第4側面によって挟まれる領域のリッジの幅が、共振器方向に沿ってばらつくのがより抑制される。また、第4側面による先細りが第3側面の部分で抑制されるので、第1側面および第3側面によって挟まれるリッジの先端を、電極層の形成に適した幅により容易に形成することができる。すなわち、リッジの幅の制御性がより向上されるので、素子内部における光損失の発生をより抑制することができるとともに、半導体レーザ素子の電気特性をより向上させることができる。
In the semiconductor laser device according to the first aspect, preferably, the other side surface has a third side surface provided on the tip end side and a fourth side surface provided on the root side of the ridge, and the third side surface The fourth side extends at a third inclination angle smaller than the third inclination angle with respect to the main surface of the active layer, and the fourth side surface extends at a third inclination angle with respect to the main surface of the active layer. It consists of the crystal orientation plane of the semiconductor laser device layer. According to this structure, the fourth side surface formed of the crystal orientation plane has flatness on the other side surface of the ridge as well as on one side surface of the ridge, and therefore the ridge of the region sandwiched by the second side surface and the fourth side surface The variation in width along the direction of the resonator is further suppressed. In addition, since the taper by the fourth side is suppressed at the portion of the third side, the tip of the ridge sandwiched by the first side and the third side can be easily formed with a width suitable for the formation of the electrode layer . That is, since the controllability of the width of the ridge is further improved, the occurrence of light loss inside the device can be further suppressed, and the electrical characteristics of the semiconductor laser device can be further improved.
上記第1の局面による半導体レーザ素子において、好ましくは、他方側面は、先端側から根元側にわたって設けられた第5側面を有し、第5側面は、活性層の主表面に対して第5傾斜角度で延びている。このように構成すれば、リッジの一方側面(第1側面および第2側面)と他方側面(第5側面)とが異なり、リッジが幅方向に非対称な形状となるので、第1側面側の発振波長に対する実効屈折率と、第2側面側の発振波長に対する実効屈折率とを異ならせることができる。すなわち、第1側面側の実効屈折率と第2側面側の実効屈折率とが同じである場合に比べて、高次水平横モードの発生を抑制することが可能なリッジ幅の上限寸法を大きくすることができる。これにより、高次水平横モードの発生に起因するキンク(電流-光出力特性の折れ曲がり)の発生を抑制しながら、リッジ幅を大きく形成することができる。この場合、リッジを構成する半導体層と、リッジ上に形成される電極層との接触面積を増大させることができるので、半導体層と電極層との間のコンタクト抵抗を低くすることができる。すなわち、キンクの発生を抑制しながら、素子の動作電圧を低減させることができる。この結果、高出力動作時に良好なレーザ特性を得ながら、素子の動作電圧を低減させることができる。
In the semiconductor laser device according to the first aspect, preferably, the other side surface has a fifth side surface provided from the tip side to the base side, and the fifth side surface has a fifth inclination with respect to the main surface of the active layer. It extends at an angle. According to this structure, one side (the first side and the second side) of the ridge and the other side (the fifth side) are different from each other, and the ridge has an asymmetric shape in the width direction. The effective refractive index with respect to the wavelength and the effective refractive index with respect to the oscillation wavelength on the second side can be made different. That is, compared with the case where the effective refractive index on the first side and the effective refractive index on the second side are the same, the upper limit dimension of the ridge width capable of suppressing the generation of high-order horizontal transverse mode is made large. can do. Thus, the ridge width can be formed large while suppressing the occurrence of kink (breaking of current-light output characteristics) due to the occurrence of the high-order horizontal transverse mode. In this case, the contact area between the semiconductor layer forming the ridge and the electrode layer formed on the ridge can be increased, so the contact resistance between the semiconductor layer and the electrode layer can be lowered. That is, the operating voltage of the device can be reduced while suppressing the occurrence of kinks. As a result, the operating voltage of the device can be reduced while obtaining good laser characteristics at the time of high output operation.
上記第1の局面による半導体レーザ素子において、好ましくは、活性層は、(H、K、-H-K、0)面(HおよびKの少なくとも一方が0ではない整数)からなる主表面を有する。このように構成すれば、リッジの一方側面および他方側面の両側面の根元側に、結晶方位面からなる第2側面および第4側面の各々を容易に形成することができる。
In the semiconductor laser device according to the first aspect, preferably, the active layer has a main surface consisting of (H, K, -H-K, 0) planes (at least one of H and K is an integer other than 0). . According to this structure, it is possible to easily form each of the second side surface and the fourth side surface formed of the crystal orientation plane on the root side of both side surfaces of one side surface and the other side surface of the ridge.
上記第1の局面による半導体レーザ素子において、好ましくは、活性層は、(0001)面に対して傾斜した主表面を有する。このように構成すれば、リッジの一方側面の根元側に、結晶方位面からなる第2側面を容易に形成することができる。
In the semiconductor laser device according to the first aspect, preferably, the active layer has a main surface inclined with respect to the (0001) plane. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of one side surface of the ridge.
上記第1の局面による半導体レーザ素子において、好ましくは、窒化物系半導体からなる基板をさらに備え、基板の主表面上に半導体レーザ素子層が形成されている。このように構成すれば、リッジの根元側に結晶方位面が現われた側面を有する半導体レーザ素子層を容易に形成することができる。
Preferably, the semiconductor laser device according to the first aspect further comprises a substrate made of a nitride-based semiconductor, and a semiconductor laser device layer is formed on the main surface of the substrate. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
上記第1の局面による半導体レーザ素子において、好ましくは、活性層は、(H、K、-H-K、L)面(HおよびKの少なくとも一方が0ではない整数かつL≠0)からなる主表面を有する。このように構成すれば、リッジの根元側に結晶方位面が現われた側面を有する半導体レーザ素子層を容易に形成することができる。
In the semiconductor laser device according to the first aspect, preferably, the active layer is composed of (H, K, -H-K, L) planes (at least one of H and K is an integer other than 0 and L ≠ 0). It has a major surface. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
上記第1の局面による半導体レーザ素子において、好ましくは、リッジは、[0001]方向に延びている。このように構成すれば、リッジの根元側に結晶方位面が現われた側面を有する半導体レーザ素子層を容易に形成することができる。
In the semiconductor laser device according to the first aspect, the ridge preferably extends in the [0001] direction. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
上記第1の局面による半導体レーザ素子において、好ましくは、リッジは、[1-101]方向に延びている。このように構成すれば、リッジの根元側に結晶方位面が現われた側面を有する半導体レーザ素子層を容易に形成することができる。
In the semiconductor laser device according to the first aspect, the ridge preferably extends in the [1-101] direction. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
上記第1の局面による半導体レーザ素子において、好ましくは、リッジは、[H+2K、-2H-K、H-K、0]方向に延びている。このように構成すれば、リッジの根元側に結晶方位面が現われた側面を有する半導体レーザ素子層を容易に形成することができる。
In the semiconductor laser device according to the first aspect, the ridge preferably extends in the [H + 2K, -2H-K, H-K, 0] direction. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
上記第1の局面による半導体レーザ素子において、好ましくは、第1傾斜角度は、85°以上である。このように構成すれば、リッジの根元側に結晶方位面が現われた側面を有する半導体レーザ素子層を容易に形成することができる。
In the semiconductor laser device according to the first aspect, preferably, the first tilt angle is 85 ° or more. According to this structure, it is possible to easily form the semiconductor laser device layer having the side surface on which the crystal orientation surface appears on the root side of the ridge.
この発明の第2の局面による半導体レーザ素子の製造方法は、活性層と凸状のリッジとを含む半導体レーザ素子層を形成する工程を備え、半導体レーザ素子層を形成する工程は、半導体レーザ素子層の表面の一部に半導体レーザ素子層の表面から活性層に向かってエッチングすることにより、リッジの一方側面において、リッジの先端側に、活性層の主表面に対して第1傾斜角度で延びる第1側面と、リッジの根元側に、活性層の主表面に対して第1傾斜角度よりも小さい第2傾斜角度で延びるとともに半導体レーザ素子層の結晶方位面からなる第2側面とを形成する工程を含む。
A method of manufacturing a semiconductor laser device according to a second aspect of the present invention includes the step of forming a semiconductor laser device layer including an active layer and a convex ridge, wherein the step of forming the semiconductor laser device layer is a semiconductor laser device. By etching from the surface of the semiconductor laser device layer to a part of the surface of the layer toward the active layer, the first side of the ridge extends toward the tip of the ridge at a first inclination angle with respect to the main surface of the active layer. A first side surface and a second side surface extending at a second inclination angle smaller than the first inclination angle with respect to the main surface of the active layer are formed on the root side of the ridge and the crystal orientation plane of the semiconductor laser device layer Including the steps.
この発明の第2の局面による半導体レーザ素子の製造方法では、上記のように、半導体レーザ素子層を形成する工程が、半導体レーザ素子層の表面から活性層に向かってエッチングすることにより、リッジの一方側面において、リッジの根元側に、活性層の主表面に対して第2傾斜角度で延びる半導体レーザ素子層の結晶方位面からなる第2側面を形成する工程を含んでいる。これにより、結晶方位面からなる第2側面には平坦性が得られるので、第2側面の部分においてリッジの幅が共振器方向に沿ってばらつくのが抑制されたリッジを形成することができる。これにより、リッジの幅のばらつきに起因した光の伝播モードの乱れが生じにくくなるので、素子内部における光損失の発生が抑制された半導体レーザ素子を得ることができる。
In the method of manufacturing a semiconductor laser device according to the second aspect of the present invention, as described above, the step of forming the semiconductor laser device layer is performed by etching the surface of the semiconductor laser device layer toward the active layer. On the one side, there is included the step of forming on the root side of the ridge a second side composed of a crystal orientation plane of the semiconductor laser device layer extending at a second inclination angle with respect to the main surface of the active layer. As a result, flatness is obtained on the second side surface formed of the crystal orientation plane, so that it is possible to form a ridge in which the width of the ridge in the second side surface portion is prevented from being dispersed along the cavity direction. Thereby, the disturbance of the propagation mode of light due to the variation of the width of the ridge is not easily generated, and therefore, it is possible to obtain the semiconductor laser device in which the generation of the light loss inside the device is suppressed.
また、第2の局面による半導体レーザ素子の製造方法では、半導体レーザ素子層を形成する工程が、半導体レーザ素子層の表面から活性層に向かってエッチングすることにより、リッジの少なくとも一方側面において、リッジの先端側に、活性層の主表面に対して第1傾斜角度で延びる第1側面を形成するとともに、リッジの根元側に、第1傾斜角度よりも小さい第2傾斜角度で延びる第2側面を形成することにより、リッジの幅が先端側から根元側に向かって広がるように形成する工程を含んでいる。これにより、リッジは、第2側面の部分において根元側から先端側に向かってリッジの幅が先細りする一方、第1側面の部分では第2側面の第2傾斜角度よりも大きな第1傾斜角度で先端に向かって延びるので、第1側面によって先端が極度に先細りするのが抑制されたリッジを形成することができる。すなわち、電極層との接触面積(接触幅)が一定の大きさに維持されたリッジを形成することができるので、電気特性が向上された半導体レーザ素子を得ることができる。
In the method of manufacturing a semiconductor laser device according to the second aspect, the step of forming the semiconductor laser device layer is performed by etching from the surface of the semiconductor laser device layer toward the active layer to form a ridge on at least one side surface of the ridge. Forming a first side surface extending at a first inclination angle with respect to the main surface of the active layer on the tip side of the active layer, and a second side surface extending at a second inclination angle smaller than the first inclination angle on the root side of the ridge By forming, the process of forming so that the width of a ridge may be spread from a tip side toward a root side is included. As a result, the ridge tapers in width from the root side to the tip side at the second side portion, while the first side has a first inclination angle larger than the second inclination angle at the second side. As it extends towards the tip, the first side can form a ridge in which the tip is restrained from being extremely tapered. That is, since a ridge having a contact area (contact width) with the electrode layer maintained at a constant size can be formed, a semiconductor laser device with improved electrical characteristics can be obtained.
上記第2の局面による半導体レーザ素子の製造方法において、好ましくは、活性層は、(H、K、-H-K、0)面(HおよびKの少なくとも一方が0ではない整数)からなる主表面を有する。このように構成すれば、リッジの少なくとも一方側面の根元側に、結晶方位面からなる第2側面を容易に形成することができる。
In the method of manufacturing a semiconductor laser device according to the second aspect, preferably, the active layer is mainly composed of (H, K, -H-K, 0) plane (an integer in which at least one of H and K is not 0). It has a surface. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of at least one side surface of the ridge.
上記第2の局面による半導体レーザ素子の製造方法において、好ましくは、活性層は、(0001)面に対して傾斜した主表面を有する。このように構成すれば、リッジの少なくとも一方側面の根元側に、結晶方位面からなる第2側面を容易に形成することができる。
In the method of manufacturing a semiconductor laser device according to the second aspect, preferably, the active layer has a main surface inclined with respect to the (0001) plane. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of at least one side surface of the ridge.
上記第2の局面による半導体レーザ素子の製造方法において、好ましくは、リッジは、[0001]方向に延びるように形成されている。このように構成すれば、リッジの少なくとも一方側面の根元側に、結晶方位面からなる第2側面を容易に形成することができる。
In the method of manufacturing a semiconductor laser device according to the second aspect, the ridge is preferably formed to extend in the [0001] direction. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of at least one side surface of the ridge.
上記第2の局面による半導体レーザ素子の製造方法において、好ましくは、リッジは、[1-101]方向に延びるように形成されている。このように構成すれば、リッジの少なくとも一方側面の根元側に、結晶方位面からなる第2側面を容易に形成することができる。
In the method of manufacturing a semiconductor laser device according to the second aspect, the ridge is preferably formed to extend in the [1-101] direction. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of at least one side surface of the ridge.
上記第2の局面による半導体レーザ素子の製造方法において、好ましくは、活性層は、(H、K、-H-K、L)面(HおよびKの少なくとも一方が0ではない整数かつL≠0)からなる主表面を有し、リッジは、[H+2K、-2H-K、H-K、0]方向に延びるように形成されている。このように構成すれば、リッジの少なくとも一方側面の根元側に、結晶方位面からなる第2側面を容易に形成することができる。
In the method of manufacturing a semiconductor laser device according to the second aspect, preferably, the active layer is an integer having a (H, K, -H-K, L) plane (at least one of H and K is not 0 and L ≠ 0). And the ridge is formed to extend in the [H + 2 K, -2 H-K, H-K, 0] direction. According to this structure, it is possible to easily form the second side surface formed of the crystal orientation plane on the root side of at least one side surface of the ridge.
以下、本発明の実施形態を図面に基づいて説明する。
Hereinafter, embodiments of the present invention will be described based on the drawings.
まず、図1および図2を参照して、本発明の具体的な実施形態を説明する前に、本発明による半導体レーザ素子の概略的な構成について、半導体レーザ素子10および15を例として説明する。
First, before describing a specific embodiment of the present invention with reference to FIGS. 1 and 2, a schematic configuration of a semiconductor laser device according to the present invention will be described by taking semiconductor laser devices 10 and 15 as an example. .
まず、本発明による半導体レーザ素子10は、図1に示すように、第1導電型半導体層1と、活性層2と、第2導電型半導体層3とを順次積層した構造を有する。また、活性層2は、単層あるいは単一量子井戸(SQW)構造または多重量子井戸(MQW)構造からなる。また、活性層2は、アンドープでもよく、ドーピングされていてもよい。
First, as shown in FIG. 1, the semiconductor laser device 10 according to the present invention has a structure in which a first conductivity type semiconductor layer 1, an active layer 2, and a second conductivity type semiconductor layer 3 are sequentially stacked. The active layer 2 is formed of a single layer or single quantum well (SQW) structure or a multiple quantum well (MQW) structure. The active layer 2 may be undoped or doped.
また、第1導電型半導体層1は、活性層2よりもバンドギャップの大きい第1導電型クラッド層などからなる。また、第1導電型半導体層1と活性層2との間に、第1導電型半導体層1のバンドギャップと活性層2のバンドギャップとの間のバンドギャップを有する光ガイド層を有していてもよい。また、第1導電型半導体層1と活性層2との間に、第1導電型半導体層1よりもバンドギャップの大きいキャリアブロック層を有していてもよい。また、第1導電型半導体層1の活性層2とは反対側(C1方向側)に、第1導電型コンタクト層を有していてもよい。また、第1導電型クラッド層が、第1導電型コンタクト層を兼ねていてもよい。
The first conductivity type semiconductor layer 1 is formed of a first conductivity type cladding layer or the like having a band gap larger than that of the active layer 2. In addition, an optical guide layer having a band gap between the band gap of the first conductive semiconductor layer 1 and the band gap of the active layer 2 is provided between the first conductive semiconductor layer 1 and the active layer 2. May be In addition, a carrier block layer having a band gap larger than that of the first conductive semiconductor layer 1 may be provided between the first conductive semiconductor layer 1 and the active layer 2. In addition, the first conductivity type contact layer may be provided on the side (the C1 direction side) opposite to the active layer 2 of the first conductivity type semiconductor layer 1. The first conductivity type cladding layer may also serve as the first conductivity type contact layer.
また、第2導電型半導体層3は、活性層2よりもバンドギャップの大きい第2導電型クラッド層などからなる。また、第2導電型半導体層3と活性層2との間に、第2導電型半導体層3のバンドギャップと活性層2のバンドギャップとの間のバンドギャップを有する光ガイド層を有していてもよい。また、第2導電型半導体層3と活性層2との間に、第2導電型半導体層3よりもバンドギャップの大きいキャリアブロック層を有していてもよい。また、第2導電型半導体層3の活性層2とは反対側(C2方向側)に、第2導電型コンタクト層を有していてもよい。この場合、第2導電型コンタクト層は、第2導電型半導体層3(第2導電型クラッド層)よりもバンドギャップが小さいことが好ましい。また、第2導電型クラッド層が、第2導電型コンタクト層を兼ねていてもよい。なお、活性層2および第2導電型半導体層3は、本発明の「半導体レーザ素子層」の一例である。
The second conductivity type semiconductor layer 3 is formed of a second conductivity type cladding layer having a band gap larger than that of the active layer 2 or the like. Further, an optical guide layer having a band gap between the band gap of the second conductive type semiconductor layer 3 and the band gap of the active layer 2 is provided between the second conductive type semiconductor layer 3 and the active layer 2. May be In addition, a carrier block layer having a band gap larger than that of the second conductivity type semiconductor layer 3 may be provided between the second conductivity type semiconductor layer 3 and the active layer 2. In addition, a second conductivity type contact layer may be provided on the side (the C2 direction side) opposite to the active layer 2 of the second conductivity type semiconductor layer 3. In this case, the second conductivity type contact layer preferably has a smaller band gap than the second conductivity type semiconductor layer 3 (second conductivity type cladding layer). The second conductivity type cladding layer may also serve as the second conductivity type contact layer. The active layer 2 and the second conductivity type semiconductor layer 3 are examples of the “semiconductor laser element layer” in the present invention.
また、各半導体層(第1導電型半導体層1、活性層2および第2導電型半導体層3)は、AlGaAs系、GaInAs系、AlGaInP系、AlGaInNAs系、AlGaSb系、GaInAsP系、窒化物系半導体、MgZnSSe系およびZnO系などからなる。また、窒化物系半導体としては、GaN、AlN、InN、BN、TlN、または、これらの混晶を用いることが可能である。
Each semiconductor layer (first conductive type semiconductor layer 1, active layer 2 and second conductive type semiconductor layer 3) is made of AlGaAs, GaInAs, AlGaInP, AlGaInNAs, AlGaSb, GaInAsP, nitride semiconductors. , MgZnSSe-based and ZnO-based. In addition, GaN, AlN, InN, BN, TlN, or a mixed crystal thereof can be used as the nitride-based semiconductor.
また、第2導電型半導体層3のC2側の上面には、活性層2から離れる方向(C2方向)に凸状に突出するリッジ3aと、リッジ3aの根元から半導体レーザ素子10の両方の側面方向(B(B1およびB2)方向)にそれぞれ延びる平坦部3bとが形成されている。またリッジ3aは、共振器方向(A方向)にストライプ状に延びている。これにより、リッジ3aの下部に位置する活性層2の部分に光導波路が形成される。
Also, on the upper surface on the C2 side of the second conductivity type semiconductor layer 3, a ridge 3a protruding in a convex shape in the direction away from the active layer 2 (direction C2) and both side surfaces of the semiconductor laser device 10 from the root of the ridge 3a Flat portions 3b extending in directions (B (B1 and B2) directions) are formed. The ridges 3a extend in the form of stripes in the resonator direction (direction A). As a result, an optical waveguide is formed in the portion of the active layer 2 located below the ridge 3a.
ここで、本発明では、図1に示すように、リッジ3aの一方(B1側)の側面には、側面3cと側面3dとが形成されている。側面3cは、リッジ3aの先端から根元に向かって活性層2の主表面に対して略垂直な角度θ1を有して延びる。なお、角度θ1は、約85°以上であるのが好ましい。また、側面3dは、側面3cのC2側の端部からリッジ3aの根元に向かって角度θ1よりも小さい角度θ2を有して延びる。また、側面3dは、第2導電型半導体層3の結晶方位面が現われるように構成されている。なお、側面3cおよび側面3dは、それぞれ、本発明の「第1側面」および「第2側面」の一例であり、角度θ1および角度θ2は、それぞれ、本発明の「第1傾斜角度」および「第2傾斜角度」の一例である。
Here, in the present invention, as shown in FIG. 1, the side surface 3c and the side surface 3d are formed on the side surface of one side (B1 side) of the ridge 3a. The side surface 3c extends from the tip of the ridge 3a toward the root with an angle θ1 substantially perpendicular to the main surface of the active layer 2. The angle θ1 is preferably about 85 ° or more. The side surface 3d extends from the end on the C2 side of the side surface 3c toward the root of the ridge 3a with an angle θ2 smaller than the angle θ1. Further, the side surface 3 d is configured such that the crystal orientation plane of the second conductivity type semiconductor layer 3 appears. The side surface 3c and the side surface 3d are examples of the "first side surface" and the "second side surface" in the present invention, respectively, and the angle θ1 and the angle θ2 are respectively the "first inclination angle" and It is an example of "2nd inclination angle."
また、図1に示すように、リッジ3aの他方(B2側)の側面には、側面3eと側面3fとが形成されている。側面3eは、リッジ3aの先端から根元に向かって活性層2の主表面に対して略垂直な角度θ3を有して延びる。また、側面3fは、側面3eのC2側の端部からリッジ3aの根元に向かって角度θ3よりも小さい角度θ4を有して延びる。また、側面3fは、第2導電型半導体層3の結晶方位面が現われるように構成されている。なお、側面3eおよび側面3fは、それぞれ、本発明の「第3側面」および「第4側面」の一例であり、角度θ3および角度θ4は、それぞれ、本発明の「第3傾斜角度」および「第4傾斜角度」の一例である。
Further, as shown in FIG. 1, a side surface 3e and a side surface 3f are formed on the other side (B2 side) of the ridge 3a. The side surface 3 e extends from the tip of the ridge 3 a toward the root at an angle θ 3 substantially perpendicular to the main surface of the active layer 2. Further, the side surface 3f extends from the end on the C2 side of the side surface 3e toward the root of the ridge 3a with an angle θ4 smaller than the angle θ3. The side surface 3 f is configured such that the crystal orientation plane of the second conductivity type semiconductor layer 3 appears. The side surface 3e and the side surface 3f are examples of the "third side surface" and the "fourth side surface" in the present invention, respectively, and the angle θ3 and the angle θ4 are respectively the "third inclination angle" and It is an example of "the 4th inclination angle."
ここで、リッジ3aは、第2導電型半導体層3の表面に形成されたSiO2などからなるマスクパターン(図示せず)をマスクとして第2導電型半導体層3をエッチングすることにより形成される。この際、まず、マスクパターンの幅(≒W2)を有するリッジ3aの先端からC1方向にエッチングを行うことにより、区間L2(リッジ3aの先端側)の部分に側面3cおよび側面3eが形成される。その後、さらにエッチングを継続することにより、B1側に側面3cとは異なる傾斜角度(角度θ2)で延びる第2導電型半導体層3の結晶方位面を露出させるとともに、B2側に側面3eとは異なる傾斜角度(角度θ4)で延びる第2導電型半導体層3の結晶方位面を露出させることにより、区間L1(リッジ3aの根元側)の部分に側面3dおよび側面3fが形成される。なお、リッジ3aは、側面3dおよび側面3fが形成される区間L1がリッジ3aの高さ(=L1+L2)の約25%以上約50%以下の範囲に形成されるのが好ましく、約25%以上約50%以下の範囲においてより低く設定されるのがより好ましい。なお、L1およびL2は、それぞれ、本発明の「第1高さ」および「第2高さ」の一例である。
Here, the ridge 3 a is formed by etching the second conductive semiconductor layer 3 using a mask pattern (not shown) made of SiO 2 or the like formed on the surface of the second conductive semiconductor layer 3 as a mask. . At this time, first, etching is performed in the C1 direction from the tip of the ridge 3a having the width (≒ W2) of the mask pattern, whereby the side 3c and the side 3e are formed in the section L2 (tip side of the ridge 3a). . Thereafter, etching is further continued to expose the crystal orientation plane of the second conductivity type semiconductor layer 3 extending at an inclination angle (angle θ2) different from the side surface 3c to the B1 side, and different from the side surface 3e to the B2 side. By exposing the crystal orientation plane of the second conductivity type semiconductor layer 3 extending at the inclination angle (angle θ4), the side surface 3d and the side surface 3f are formed in the section L1 (the root side of the ridge 3a). In the ridge 3a, the section L1 in which the side surface 3d and the side surface 3f are formed is preferably formed in a range of about 25% to about 50% of the height (= L1 + L2) of the ridge 3a, about 25% or more It is more preferable to set lower in the range of about 50% or less. L1 and L2 are examples of the "first height" and the "second height" in the present invention respectively.
ここで、各半導体層が窒化物系半導体である場合、活性層2の主表面の面方位は、a面((11-20)面)およびm面((1-100)面)などの非極性面や、(11-22)面、および、c面((0001)面)からa面またはm面に傾斜した面からなるいわゆる半極性面などを用いることができる。
Here, when each semiconductor layer is a nitride-based semiconductor, the plane orientation of the main surface of the active layer 2 is not a plane (a (11-20) plane) and an m plane (a (1-100) plane). It is possible to use a so-called semipolar plane or the like consisting of a polar plane, a (11-22) plane, and a plane inclined from the c-plane ((0001) plane) to the a-plane or m-plane.
一方、活性層が(H、K、-H-K、0)面(HおよびKの少なくとも一方が0ではない)からなる主表面を有し、リッジをc軸方向([0001]方向)に沿って形成すれば、リッジの一方側面および他方側面の両方に、本発明の「第2側面」および「第4側面」がそれぞれ形成される。
On the other hand, the active layer has a main surface consisting of (H, K, -HK, 0) planes (at least one of H and K is not 0), and the ridge in the c-axis direction ([0001] direction) If it is formed along, the "second side" and the "fourth side" of the present invention are respectively formed on both one side and the other side of the ridge.
たとえば、活性層2の主表面がa面であるとともに、リッジ3aがc軸方向にストライプ状に延びている場合、区間L1の部分に(-12-10)面からなる側面3dと、(2-1-10)面からなる側面3fとを有するリッジ3aが形成される。さらには、活性層2の主表面がm面であるとともに、リッジ3aがc軸方向にストライプ状に延びている場合、区間L1の部分に(0-110)面からなる側面3dと、(10-10)面からなる側面3fとを有するリッジ3aが形成される。
For example, when the main surface of the active layer 2 is an a-plane and the ridges 3a extend in a stripe shape in the c-axis direction, a side surface 3d formed of a (-12-10) plane in the section L1; And a ridge 3a having a side surface 3f formed of (1-10) surface. Furthermore, when the main surface of the active layer 2 is an m-plane and the ridges 3a extend in a stripe shape in the c-axis direction, the section L1 is a side surface 3d formed of (0-110) plane, A ridge 3a having a side surface 3f of -10) is formed.
また、c面からa面に約0°以上約32°以下または58°以上約90°以下の範囲で傾斜した面を主表面とする半導体レーザ素子層であれば、エッチング条件を制御することによって、m軸方向([1-100]方向)に沿って延びるリッジ3a(図1参照)の根元側に(11-22)面からなる「第2側面」と、(-1-122)面からなる「第4側面」とを形成することが可能である。あるいは、c面からa面に約0°以上約39°以下または約51°以上約90°以下の範囲で傾斜した面を主表面とする半導体レーザ素子層であれば、エッチング条件を制御することによって、m軸方向に沿って延びるリッジ3aの根元側に(11-24)面からなる「第2側面」と、(-1-124)面からなる「第4側面」とを形成することが可能である。さらには、c面からm面に約0°以上約28°以下または約62°以上約90°以下の範囲で傾斜した面を主表面とする半導体レーザ素子層であれば、エッチング条件を制御することによって、a軸方向に沿って延びるリッジ3aの根元側に(10-11)面からなる「第2側面」と、(-1011)面からなる「第4側面」とを形成することが可能である。あるいは、c面からm面に約0°以上約43°以下または約47°以上約90°以下の範囲で傾斜した面を主表面とする半導体レーザ素子層であれば、エッチング条件を制御することによって、a軸方向に沿って延びるリッジ3aの根元側に(10-12)面からなる「第2側面」と、(-1012)面からなる「第4側面」とを形成することが可能である。
In addition, if the semiconductor laser element layer has as a main surface a surface inclined in a range of about 0 ° to about 32 ° or 58 ° to about 90 ° from the c-plane to the a-plane, the etching condition is controlled. , The “second side surface” of the (11-22) plane on the root side of the ridge 3a (see FIG. 1) extending along the m-axis direction ([1-100] direction), and from the (-1-122) plane It is possible to form the "fourth side face". Alternatively, if the semiconductor laser element layer has as a main surface a surface inclined in a range of about 0 ° to about 39 ° or about 51 ° to about 90 ° from the c-plane to the a-plane, control the etching conditions To form the “second side surface” of the (11-24) plane and the “fourth side surface” of the (-1-124) plane on the root side of the ridge 3a extending along the m-axis direction. It is possible. Furthermore, if the semiconductor laser element layer whose main surface is a surface inclined in the range of about 0 ° to about 28 ° or about 62 ° to about 90 ° from the c-plane to the m-plane, the etching conditions are controlled Thus, it is possible to form the "second side" consisting of the (10-11) plane and the "fourth side" consisting of the (-1011) plane on the root side of the ridge 3a extending along the a-axis direction. It is. Alternatively, if the semiconductor laser element layer has as a main surface a surface inclined in the range of about 0 ° to about 43 ° or about 47 ° to about 90 ° from the c-plane to the m-plane, control the etching conditions Thus, it is possible to form the “second side surface” of the (10-12) plane and the “fourth side surface” of the (-1012) plane on the root side of the ridge 3a extending along the a-axis direction. is there.
これにより、本発明では、リッジ3aは、平坦部3b上の区間L1において側面3dおよび側面3fによって幅W1がC2方向に沿って徐々に狭められるとともに、区間L2では、側面3cおよび側面3eによって略一定の幅W2を有する。また、側面3dおよび側面3fがそれぞれ第2導電型半導体層3の結晶方位面からなるので、幅W1は、共振器方向(A方向)に沿って略一定の大きさに形成される。
Thereby, in the present invention, the width W1 of the ridge 3a in the section L1 on the flat portion 3b is gradually narrowed along the C2 direction by the side 3d and the side 3f, and in the section L2, the ridge 3a is substantially reduced by the side 3c and the side 3e. It has a constant width W2. Further, since the side surface 3 d and the side surface 3 f are respectively made of the crystal orientation plane of the second conductive type semiconductor layer 3, the width W 1 is formed in a substantially constant size along the cavity direction (direction A).
また、本発明では、以下に示す半導体レーザ素子15を形成することも可能である。すなわち、c面からa面に約32°以上約58°以下の範囲で傾斜した面を主表面とする活性層上に半導体層を成長させた場合に、リッジをm軸方向に沿って形成すれば、リッジの一方側面(片側の側面)にのみ本発明の「第2側面」が形成される。また、c面からm面に約28°以上約62°以下の範囲で傾斜した面を主表面とする活性層上に半導体層を成長させた場合に、リッジをa軸方向([11-20]方向)に沿って形成すれば、リッジの一方側面(片側の側面)にのみ本発明の「第2側面」が形成される。たとえば、図2に示すように、活性層2の主表面として、c面からa面に約32°以上約58°以下の範囲で傾斜した半極性面を用いた場合、半導体レーザ素子15の一方の側面と同じ側(B1側)の側面のみが、側面3cと(11-22)面からなる側面3gとを有するリッジ3iが第2導電型半導体層3に形成される。この場合、半導体レーザ素子15の他方の側面と同じ側(B2側)の側面は、リッジ3iの先端から根元まで活性層2の主表面に対して角度θ3をなして連続的に形成された側面3hを有する。これにより、リッジ3iは、平坦部3b上の区間L3において側面3gによって幅W3が活性層2から離れる方向(C2方向)に沿って徐々に狭められるとともに、区間L4では側面3cおよび側面3hによって略一定の幅W4を有する。この場合も、側面3gが第2導電型半導体層3の結晶方位面((11-22)面)からなるので、幅W3は、共振器方向(A方向)に沿って略一定の大きさに形成される。なお、側面3gは、本発明の「第2側面」の一例であり、側面3hは、本発明の「第5側面」の一例である。また、角度θ3は、本発明の「第5傾斜角度」の一例である。
In the present invention, it is also possible to form a semiconductor laser device 15 described below. That is, when the semiconductor layer is grown on the active layer whose main surface is inclined at a range of about 32 ° to about 58 ° from the c-plane to the a-plane, the ridge is formed along the m-axis direction For example, the "second side surface" of the present invention is formed only on one side surface (one side surface) of the ridge. When the semiconductor layer is grown on the active layer whose main surface is a plane inclined at an angle of about 28 ° or more and about 62 ° or less from the c-plane to the m-plane, the ridge is formed in the a-axis direction ([11-20 The “second side surface” of the present invention is formed only on one side surface (one side surface) of the ridge. For example, as shown in FIG. 2, when using a semipolar plane inclined in the range of about 32 ° to about 58 ° from the c-plane to the a-plane as the main surface of the active layer 2, one side of the semiconductor laser device 15 A ridge 3i having a side surface 3c and a side surface 3g formed of a (11-22) surface is formed in the second conductivity type semiconductor layer 3 only on the side surface on the same side as the side surface (B1 side). In this case, the side surface on the same side (B2 side) as the other side surface of the semiconductor laser device 15 is a side surface continuously formed at an angle θ3 with respect to the main surface of the active layer 2 from the tip to the root of the ridge 3i. It has 3h. Thereby, the ridge 3i is gradually narrowed along the direction (C2 direction) in which the width W3 is separated from the active layer 2 by the side surface 3g in the section L3 on the flat portion 3b, and substantially in the section L4 by the side surface 3c and the side surface 3h. It has a constant width W4. Also in this case, since the side surface 3g is formed of the crystal orientation plane ((11-22) plane) of the second conductivity type semiconductor layer 3, the width W3 has a substantially constant size along the cavity direction (direction A). It is formed. The side surface 3 g is an example of the “second side surface” in the present invention, and the side surface 3 h is an example of the “fifth side surface” in the present invention. The angle θ3 is an example of the “fifth tilt angle” in the present invention.
ここで、活性層2が窒化物系半導体である場合、活性層2の主表面の面方位として、(H、K、-H-K、L)面(HおよびKの少なくとも一方が0ではない整数かつL≠0)を用いることができる。この場合、リッジ3a(3i)は、[H+2K、-2H-K、H-K、0]方向に延びているのが好ましい。また、リッジ3a(3i)の一方側面は、(H1、K1、-H1-K1、L1)面(L1>0)からなり、リッジ3a(3i)の他方側面は、(H2、K2、-H2-K2、L2)面(L2<0)からなるのが好ましい。ここで、上記した(H1、K1、-H1-K1、L1)面と(H2、K2、-H2-K2、L2)面とは、[H+2K、-2H-K、H-K、0]方向を面内に含んでいる。
Here, when the active layer 2 is a nitride-based semiconductor, at least one of (H, K, -H-K, L) planes (H and K) is not 0 as the plane orientation of the main surface of the active layer 2 An integer and L ≠ 0) can be used. In this case, the ridge 3a (3i) preferably extends in the [H + 2K, -2H-K, H-K, 0] direction. Further, one side surface of the ridge 3a (3i) is composed of (H1, K1, -H1-K1, L1) surfaces (L1> 0), and the other side surface of the ridge 3a (3i) is (H2, K2, -H2 It is preferable to be composed of -K2, L2) plane (L2 <0). Here, the (H1, K1, -H1-K1, L1) plane and the (H2, K2, -H2-K2, L2) plane described above are in the [H + 2 K, -2 H-K, H-K, 0] direction Is included in the plane.
また、製造プロセスにおいて、リッジ3a(図1参照)形成時のエッチング条件を制御することによって、(10-12)面や(11-24)面を露出させて、本発明の「第2側面」を形成してもよい。なお、リッジ3aをa軸方向に沿って形成すれば、(10-12)面からなる「第2側面」を露出させることが可能であり、リッジ3aをm軸方向に沿って形成すれば、(11-24)面からなる「第2側面」を露出させることが可能である。
Further, in the manufacturing process, by controlling the etching conditions at the time of forming the ridge 3a (see FIG. 1), the (10-12) plane or the (11-24) plane is exposed, and the “second side face” of the present invention May be formed. Incidentally, if the ridge 3a is formed along the a-axis direction, it is possible to expose the "second side surface" consisting of the (10-12) plane, and if the ridge 3a is formed along the m-axis direction, It is possible to expose the "second side surface" consisting of the (11-24) plane.
また、図1および図2に示すように、第2導電型半導体層3の平坦部3bの上面とリッジ3a(3i)の両側面上に、電流ブロック層4が形成される。また、第1導電型半導体層1の下面上には、第1導電側電極5が形成されるとともに、リッジ3a(3i)および電流ブロック層4の上面上に第2導電側電極6が形成される。また、第2導電側電極6は、第2導電型半導体層3上の一部の領域に形成してもよい。
Further, as shown in FIGS. 1 and 2, the current blocking layer 4 is formed on the upper surface of the flat portion 3b of the second conductivity type semiconductor layer 3 and on both side surfaces of the ridge 3a (3i). Further, the first conductive side electrode 5 is formed on the lower surface of the first conductive type semiconductor layer 1, and the second conductive side electrode 6 is formed on the upper surfaces of the ridge 3a (3i) and the current block layer 4. Ru. In addition, the second conductive side electrode 6 may be formed in a partial region on the second conductive type semiconductor layer 3.
また、本発明において、第1導電型半導体層1は、基板または半導体層により構成されていてもよいし、基板と半導体層との両方により構成されていてもよい。また、第1導電型半導体層1が基板と半導体層との両方により構成される場合、基板は、第1導電型半導体層1の第2導電型半導体層3が形成される側とは反対側(第1導電型半導体層1の下面側)に形成される。各半導体層をウルツ鉱構造の窒化物系半導体により構成する場合、基板は、第1導電型窒化物系半導体基板または異種基板を用いてもよい。異種基板としては、六方晶構造および菱面体構造の第1導電型α-SiC基板、第1導電型GaAs基板、第1導電型GaP基板、第1導電型InP基板および第1導電型Si基板などを用いることができる。また、第1導電型半導体層1は基板を含んでいてもよい。ただし、最も結晶性のよいAlGaInN系半導体層を得るためには、窒化物系半導体基板を用いるのが最も好ましい。
Furthermore, in the present invention, the first conductive semiconductor layer 1 may be configured of a substrate or a semiconductor layer, or may be configured of both a substrate and a semiconductor layer. In addition, when the first conductivity type semiconductor layer 1 is configured by both the substrate and the semiconductor layer, the substrate is the side opposite to the side on which the second conductivity type semiconductor layer 3 of the first conductivity type semiconductor layer 1 is formed. (The lower surface side of the first conductivity type semiconductor layer 1) is formed. When each semiconductor layer is formed of a nitride-based semiconductor having a wurtzite structure, the substrate may be a first conductivity-type nitride-based semiconductor substrate or a different substrate. As different types of substrates, a first conductivity type α-SiC substrate having a hexagonal crystal structure and a rhombohedral structure, a first conductivity type GaAs substrate, a first conductivity type GaP substrate, a first conductivity type InP substrate, a first conductivity type Si substrate, etc. Can be used. The first conductivity type semiconductor layer 1 may include a substrate. However, in order to obtain an AlGaInN-based semiconductor layer having the highest crystallinity, it is most preferable to use a nitride-based semiconductor substrate.
また、基板は、GaN基板や、六方晶構造または菱面体構造を有するα-SiC基板としての4H-SiC基板または6H-SiC基板などや、ZnO基板などを用いることができる。GaN基板およびα-SiC基板上には、基板と同じ主表面を窒化物系半導体層が形成される。たとえば、α-SiC基板のa面およびm面上には、それぞれ、a面およびm面を主表面とする窒化物系半導体層が形成される。また、a面を主表面とする窒化物系半導体が形成されたr面サファイア基板を基板として用いてもよい。また、a面およびm面を主表面とする窒化物系半導体層が形成されたLiAlO2基板またはLiGaO2基板を基板として用いることができる。
Further, as the substrate, a GaN substrate, a 4H-SiC substrate or 6H-SiC substrate as an α-SiC substrate having a hexagonal crystal structure or a rhombohedral structure, or a ZnO substrate can be used. A nitride-based semiconductor layer is formed on the same main surface as the substrate on the GaN substrate and the α-SiC substrate. For example, nitride-based semiconductor layers having an a-plane and an m-plane as main surfaces are formed on the a-plane and the m-plane of the α-SiC substrate, respectively. Alternatively, an r-plane sapphire substrate on which a nitride-based semiconductor having an a-plane as a main surface is formed may be used as the substrate. In addition, a LiAlO 2 substrate or a LiGaO 2 substrate on which a nitride-based semiconductor layer having an a plane and an m plane as main surfaces is formed can be used as a substrate.
また、基板として窒化物系半導体基板を用いる場合、基板の成長面の面方位は、c面や、a面およびm面などの非極性面や、(11-22)面、および、c面に対してa軸方向またはm軸方向に傾斜した面(半極性面)を用いることができる。
When a nitride-based semiconductor substrate is used as the substrate, the plane orientation of the growth surface of the substrate is c-plane, nonpolar planes such as a-plane and m-plane, (11-22) plane, and c-plane. In contrast, it is possible to use a surface (semipolar surface) inclined in the a-axis direction or m-axis direction.
また、pn接合型の半導体レーザ素子10(15)では、第1導電型半導体層1と第2導電型半導体層3とは互いに異なる導電性を有する。第1導電型半導体層1がp型であり第2導電型半導体層3がn型であってもよいし、第1導電型半導体層1がn型であり第2導電型半導体層3がp型であってもよい。
In the pn junction type semiconductor laser device 10 (15), the first conductivity type semiconductor layer 1 and the second conductivity type semiconductor layer 3 have different conductivity. The first conductive semiconductor layer 1 may be p-type and the second conductive semiconductor layer 3 may be n-type, or the first conductive semiconductor layer 1 may be n-type and the second conductive semiconductor layer 3 may be p It may be a type.
また、半導体レーザ素子10(15)のレーザ光出射側の共振器面には、低反射率の誘電体多層膜が形成される。また、レーザ光反射側の共振器面には、高反射率の誘電体多層膜が形成される。ここで、誘電体多層膜としては、GaN,AlN、BN,Al2O3、SiO2、ZrO2、HfO2、Ta2O5、Nb2O5、La2O3、SiN、AlONおよびMgF2や、これらの混成比の異なる材料であるTi3O5やNb2O3などからなる多層膜を用いることができる。
In addition, a dielectric multilayer film with low reflectance is formed on the resonator surface on the laser light emission side of the semiconductor laser element 10 (15). Also, a dielectric multilayer film with high reflectance is formed on the resonator surface on the laser light reflection side. Here, as dielectric multilayer films, GaN, AlN, BN, Al 2 O 3 , SiO 2 , ZrO 2 , HfO 2 , Ta 2 O 5 , Nb 2 O 5 , La 2 O 3 , SiN, AlON and MgF 2 and can be used a multilayer film made of Ti 3 O 5 and Nb 2 O 3 is a different material of these hybrid ratio.
また、電流ブロック層4は、SiO2、Al2O3、ZrO2、TiO2、Ta2O5、La2O3、Si、AlN、AlGaNおよびSiNなどからなる。また、電流ブロック層4を、上記材料を用いた積層構造としてもよい。
The current blocking layer 4 is made of SiO 2 , Al 2 O 3 , ZrO 2 , TiO 2 , Ta 2 O 5 , La 2 O 3 , Si, AlN, AlGaN, SiN, or the like. In addition, the current blocking layer 4 may have a stacked structure using the above-described material.
なお、半導体レーザ素子10(15)では、リッジ3a(3i)が第2導電型半導体層3によって形成されるとともに、活性層2が、リッジ3a(3i)の下部に形成されているが、本発明はこれに限らず、活性層がリッジの一部を構成していてもよい。すなわち、第2導電型半導体層3の上面から活性層2を経て第1導電型半導体層1の内部までエッチングを行うことにより、リッジに、本発明の「活性層」が配置されるようにしてもよい。
In the semiconductor laser device 10 (15), the ridge 3a (3i) is formed by the second conductivity type semiconductor layer 3, and the active layer 2 is formed below the ridge 3a (3i). The invention is not limited to this, and the active layer may constitute a part of the ridge. That is, by etching from the upper surface of the second conductivity type semiconductor layer 3 through the active layer 2 to the inside of the first conductivity type semiconductor layer 1, the “active layer” of the present invention is disposed in the ridge. It is also good.
本発明では、上記のように、リッジ3a(3i)のB1側の側面が、第2導電型半導体層3の結晶方位面からなる側面3d(3g)を有することによって、結晶方位面からなる側面3d(3g)には平坦性が得られるので、側面3d(3g)の部分におけるリッジ3a(3h)の幅W1(W3)がリッジ3a(3i)の延びる共振器方向に沿ってばらつくのが抑制される。これにより、リッジ3a(3i)の幅のばらつきに起因した光の伝播モードの乱れが生じにくくなるので、半導体レーザ素子10(15)の内部における光損失の発生を抑制することができる。
In the present invention, as described above, the side surface on the B1 side of the ridge 3a (3i) has the side surface 3d (3g) formed of the crystal orientation plane of the second conductivity type semiconductor layer 3, thereby forming the crystal side plane Since flatness is obtained in 3d (3g), it is suppressed that the width W1 (W3) of the ridge 3a (3h) in the side 3d (3g) part disperses along the cavity direction in which the ridge 3a (3i) extends. Be done. As a result, the disturbance of the light propagation mode due to the variation in the width of the ridge 3a (3i) is less likely to occur, so that it is possible to suppress the occurrence of the light loss inside the semiconductor laser element 10 (15).
また、本発明では、リッジ3a(3i)の少なくともB1側の側面が、リッジ3a(3h)の先端側に設けられ、活性層2の主表面に対して角度θ1(略90°)で延びる側面3cと、活性層2の主表面に対して角度θ1よりも小さい角度θ2で延びることによりリッジ3a(3h)の幅W1(W3)が先端側から根元側に向かって広がる側面3d(3g)とを有することによって、リッジ3a(3i)は、側面3d(3g)の部分において根元側から先端側に向かってリッジ3a(3i)の幅W1(W3)が先細りする一方、側面3cの部分では角度θ2よりも大きな角度θ1(略90°)で先端に向かって延びるので、リッジ3a(3i)の幅が根元から先端に至るまで角度θ2で単調に先細りするのが抑制される。すなわち、角度θ2のみで極度に先細りした先端の上面上に第2導電側電極6を形成する場合と異なり、側面3cによって先端が極度に先細りするのが抑制されるので、所定の幅W2(W4)が得られた先端に第2導電側電極6を形成することができる。これにより、第2導電型半導体層3とリッジ3a(3i)の上面上に形成される第2導電側電極6との接触面積(接触幅)を一定の大きさに維持することができるので、半導体レーザ素子10(15)の電気特性を向上させることができる。
Further, in the present invention, at least the side on the B1 side of the ridge 3a (3i) is provided on the tip side of the ridge 3a (3h) and extends at an angle θ1 (approximately 90 °) with respect to the main surface of the active layer 2 3c and a side surface 3d (3g) in which the width W1 (W3) of the ridge 3a (3h) extends from the tip side toward the root side by extending at an angle θ2 smaller than the angle θ1 with respect to the main surface of the active layer 2; The ridge 3a (3i) tapers the width W1 (W3) of the ridge 3a (3i) from the root side to the tip side at the side 3d (3g), while the angle at the side 3c Since the ridge 3a (3i) extends toward the tip at an angle θ1 (approximately 90 °) larger than θ2, the width of the ridge 3a (3i) is prevented from monotonously tapering at the angle θ2 from the root to the tip. That is, unlike the case where the second conductive side electrode 6 is formed on the upper surface of the tip extremely tapered only at the angle θ2, the extreme taper of the tip is suppressed by the side surface 3c, so that the predetermined width W2 (W4 The second conductive electrode 6 can be formed at the tip at which the second conductive electrode 6 is obtained. Thereby, the contact area (contact width) between the second conductive type semiconductor layer 3 and the second conductive side electrode 6 formed on the upper surface of the ridge 3a (3i) can be maintained at a constant size. The electrical characteristics of the semiconductor laser device 10 (15) can be improved.
また、本発明では、上記のように構成することによって、キャリアの閉じ込めをリッジ3a(3i)の側面3cおよび側面3eが形成された上部領域(区間L2の領域)で行うことができるとともに、活性層2によるレーザ光の光閉じ込めをリッジ3a(3i)の側面3d(3g)および側面3fが形成された下部領域(区間L1の領域)で行うことができる。すなわち、リッジの上部領域および下部領域の幅を制御することにより、キャリアの閉じ込めとレーザ光の光閉じ込めとを、独立して制御することができる。
Further, in the present invention, by configuring as described above, carrier confinement can be performed in the upper region (region of section L2) in which the side surface 3c and the side surface 3e of the ridge 3a (3i) are formed. Optical confinement of the laser light by the layer 2 can be performed in the lower region (region of the section L1) in which the side surface 3d (3g) and the side surface 3f of the ridge 3a (3i) are formed. That is, by controlling the widths of the upper and lower regions of the ridge, carrier confinement and laser light optical confinement can be controlled independently.
また、本発明では、リッジ3iが、先端側から根元側にわたって設けられるとともに活性層2の主表面に対して角度θ3をなして延びる側面3hを有することによって、リッジ3iの一方側面(側面3cおよび3gからなる側面)と他方側面(側面3h)とが異なりリッジ3iが幅方向(B方向)に非対称な形状となるので、一方側面の発振波長に対する実効屈折率と、他方側面の発振波長に対する実効屈折率とを異ならせることができる。すなわち、両側面の実効屈折率が同じである場合に比べて、高次水平横モードの発生を抑制することが可能なリッジ幅の上限寸法を大きくすることができる。これにより、高次水平横モードの発生に起因するキンク(電流-光出力特性の折れ曲がり)の発生を抑制しながら、リッジ3iの幅W4を大きく形成することができる。この場合、リッジ3iを構成する半導体層1~3と、リッジ3i上に形成される第2導電側電極6との接触面積を増大させることができるので、半導体層1~3と第2導電側電極6との間のコンタクト抵抗を低くすることができる。すなわち、キンクの発生を抑制しながら、半導体レーザ素子15の動作電圧を低減させることができる。この結果、高出力動作時に良好なレーザ特性を得ながら、半導体レーザ素子15の動作電圧を低減させることができる。
Further, in the present invention, the ridge 3i is provided from the tip side to the root side and has a side surface 3h extending at an angle θ3 with respect to the main surface of the active layer 2, thereby providing one side surface of the ridge 3i (side surface 3c and Since the ridge 3i has an asymmetrical shape in the width direction (direction B) different from the side surface (side surface 3h) and the other side surface (side surface 3h), the effective refractive index for the oscillation wavelength of one side surface and the efficiency for the oscillation wavelength of the other side surface The refractive index can be made different. That is, the upper limit dimension of the ridge width capable of suppressing the occurrence of the high-order horizontal transverse mode can be increased as compared with the case where the effective refractive indexes of both side surfaces are the same. Thus, the width W4 of the ridge 3i can be formed large while suppressing the occurrence of kink (breaking of current-light output characteristics) due to the occurrence of the high-order horizontal transverse mode. In this case, the contact area between the semiconductor layers 1 to 3 forming the ridge 3i and the second conductive side electrode 6 formed on the ridge 3i can be increased. Therefore, the semiconductor layers 1 to 3 and the second conductive side The contact resistance with the electrode 6 can be lowered. That is, the operating voltage of the semiconductor laser device 15 can be reduced while suppressing the occurrence of kinks. As a result, the operating voltage of the semiconductor laser device 15 can be reduced while obtaining good laser characteristics at the time of high output operation.
以下、上記した本発明の概念を具体化した本発明の実施形態を図面に基づいて説明する。
Hereinafter, an embodiment of the present invention embodying the above-described concept of the present invention will be described based on the drawings.
(第1実施形態)
まず、図3および図4を参照して、第1実施形態による半導体レーザ素子20の構造について説明する。 First Embodiment
First, the structure of thesemiconductor laser device 20 according to the first embodiment will be described with reference to FIGS. 3 and 4.
まず、図3および図4を参照して、第1実施形態による半導体レーザ素子20の構造について説明する。 First Embodiment
First, the structure of the
本発明の第1実施形態による半導体レーザ素子20は、図3に示すように、c面からa面に約18°傾斜した面を主表面とするn型GaN基板21の表面上に、Al0.01Ga0.99Nからなる約1.0μmの厚みを有するバッファ層22と、Geがドープされたn型Al0.07Ga0.93Nからなる約1.9μmの厚みを有するn型クラッド層23と、In0.01Ga0.99Nからなる約80nmの厚みを有するn側光ガイド層24と、発光層25とが形成されている。また
、発光層25は、約2.5nmの厚みを有するとともに、InxGa1-xNからなる3つの量子井戸層と約20nmの厚みを有するInyGa1-yNからなる3つの量子障壁層とが交互に積層されたMQW活性層からなる。ここで、x>yであり、x=0.15、y=0.02である。また、発光層25は、c面からa面に約18°傾斜した主表面を有する。なお、n型GaN基板21は、本発明の「基板」の一例であり、発光層25は、本発明の「活性層」の一例である。 Thesemiconductor laser device 20 according to the first embodiment of the present invention, as shown in FIG. 3, has Al 0 on the surface of the n-type GaN substrate 21 whose main surface is a plane inclined approximately 18 ° from the c-plane to the a-plane. .01 Ga 0.99 N buffer layer 22 having a thickness of about 1.0 μm, and Ge doped n-type Al 0.07 Ga 0.93 N having an about 1.9 μm thickness A cladding layer 23, an n-side light guide layer 24 having a thickness of about 80 nm made of In 0.01 Ga 0.99 N, and a light emitting layer 25 are formed. In addition, the light emitting layer 25 has a thickness of about 2.5 nm, three quantum well layers of In x Ga 1 -x N, and three quantum of In y Ga 1 -y N having a thickness of about 20 nm. It consists of an MQW active layer in which barrier layers are alternately stacked. Here, x> y, x = 0.15, y = 0.02. In addition, the light emitting layer 25 has a main surface inclined at about 18 ° from the c-plane to the a-plane. The n-type GaN substrate 21 is an example of the “substrate” in the present invention, and the light emitting layer 25 is an example of the “active layer” in the present invention.
、発光層25は、約2.5nmの厚みを有するとともに、InxGa1-xNからなる3つの量子井戸層と約20nmの厚みを有するInyGa1-yNからなる3つの量子障壁層とが交互に積層されたMQW活性層からなる。ここで、x>yであり、x=0.15、y=0.02である。また、発光層25は、c面からa面に約18°傾斜した主表面を有する。なお、n型GaN基板21は、本発明の「基板」の一例であり、発光層25は、本発明の「活性層」の一例である。 The
また、発光層25上には、In0.01Ga0.99Nからなる約80nmの厚みを有するp側光ガイド層26と、Al0.2Ga0.8Nからなる約20nmの厚みを有するp側キャリアブロック層27と、MgがドープされたAl0.07Ga0.93Nからなる約0.5μmの厚みを有するp型クラッド層28と、In0.07Ga0.93Nからなる約3nmの厚みを有するp側コンタクト層29とが形成されている。なお、バッファ層22、n型クラッド層23、n側光ガイド層24、発光層25、p側光ガイド層26、p側キャリアブロック層27、p型クラッド層28およびp側コンタクト層29は、本発明の「半導体レーザ素子層」の一例である。
In addition, on the light emitting layer 25, a p-side light guide layer 26 having a thickness of about 80 nm made of In 0.01 Ga 0.99 N and a thickness of about 20 nm made of Al 0.2 Ga 0.8 N a p-side carrier blocking layer 27 having a p-type cladding layer 28 having a thickness of about 0.5μm made of Mg-doped Al 0.07 Ga 0.93 N, the in 0.07 Ga 0.93 N And a p-side contact layer 29 having a thickness of about 3 nm. The buffer layer 22, the n-type cladding layer 23, the n-side light guide layer 24, the light emitting layer 25, the p-side light guide layer 26, the p-side carrier block layer 27, the p-type cladding layer 28 and the p-side contact layer 29 It is an example of the "semiconductor laser element layer" of this invention.
ここで、第1実施形態では、図4に示すように、p型クラッド層28の上面には、約400nmの厚み(高さ)を有するとともに上方(C2方向)に凸状に突出する凸部28aと、凸部28aの根元から両側(B方向)に延びる平坦部28bとが形成されている。また、p側コンタクト層29は、p型クラッド層28の凸部28a上に形成されている。このp型クラッド層28の凸部28aとp側コンタクト層29とによって、光導波路としてのリッジ35が形成されている。また、リッジ35は、m軸方向(紙面に垂直な方向)に延びている。なお、第1実施形態において符号を用いて示す方向(A方向、B方向およびC方向など)は、上記した本発明の概念において符号を用いて記載した方向と同じ方向を意味する。
Here, in the first embodiment, as shown in FIG. 4, a convex portion having a thickness (height) of about 400 nm on the upper surface of the p-type cladding layer 28 and protruding upward (in the C2 direction) A flat portion 28b is formed on both sides (direction B) from the root of the convex portion 28a. Further, the p-side contact layer 29 is formed on the convex portion 28 a of the p-type cladding layer 28. A ridge 35 as an optical waveguide is formed by the convex portion 28 a of the p-type cladding layer 28 and the p-side contact layer 29. The ridges 35 extend in the m-axis direction (the direction perpendicular to the paper surface). In the first embodiment, directions (A direction, B direction, C direction, etc.) indicated by using the reference numerals mean the same directions as the directions described using the reference in the concept of the present invention described above.
また、第1実施形態では、図4に示すように、リッジ35のB1側の側面には、側面35aと側面35bとが形成されている。また、側面35aは、リッジ35の先端から根元に向かって発光層25の主表面に対して略垂直な角度θ5を有して延びるとともに、側面35bは、側面35aのC2側の端部からリッジ35の根元に向かって角度θ5よりも小さい角度θ6(=約42°)を有して延びている。また、側面35bは、p型クラッド層28の(11-22)面からなる結晶方位面が露出するように構成されている。また、リッジ35のB2側の側面は、リッジ35の先端から根元まで発光層25の主表面に対して略垂直に延びる側面35cを有している。なお、側面35aおよび側面35bは、それぞれ、本発明の「第1側面」および「第2側面」の一例であり、側面35cは、本発明の「第5側面」の一例である。また、角度θ5および角度θ6は、それぞれ、本発明の「第1傾斜角度」および「第2傾斜角度」の一例である。
Further, in the first embodiment, as shown in FIG. 4, a side surface 35 a and a side surface 35 b are formed on the side surface of the ridge 35 on the B1 side. Further, the side surface 35a extends from the tip of the ridge 35 toward the root at an angle θ5 substantially perpendicular to the main surface of the light emitting layer 25, and the side surface 35b extends from the end on the C2 side of the side surface 35a It extends toward the root of 35 with an angle θ 6 (= about 42 °) smaller than the angle θ 5. The side surface 35 b is configured to expose a crystal orientation plane formed of the (11-22) plane of the p-type cladding layer 28. Further, the side surface on the B2 side of the ridge 35 has a side surface 35 c extending substantially perpendicularly to the main surface of the light emitting layer 25 from the tip to the root of the ridge 35. The side surface 35a and the side surface 35b are examples of the "first side surface" and the "second side surface" in the present invention, respectively, and the side surface 35c is an example of the "fifth side surface" in the present invention. The angles θ5 and θ6 are examples of the “first tilt angle” and the “second tilt angle” in the present invention respectively.
これにより、リッジ35は、平坦部28b上の区間L5(リッジ35の根元側)において側面35bによって幅W5が上方(C2方向)に沿って徐々に狭められるとともに、区間L6(リッジ35の先端側)では側面35aおよび側面35cによって略一定の幅W6を有する。なお、L5およびL6は、それぞれ、本発明の「第1高さ」および「第2高さ」の一例である。また、側面35bがp型クラッド層28の結晶方位面((11-22)面)からなるので、幅W5は、共振器方向([1-100]方向)に沿って略一定の大きさに形成されている。なお、リッジ35は、側面35bが形成される区間L5がリッジ35の高さ(=L5+L6=約400nm)の約25%(=約100nm)以上約50%(=約200nm)以下の範囲に形成されるのが好ましい。なお、図4では、側面35aと側面35bとの接続部が折れ曲がるように表現されているが、実際には、側面35aと側面35bとは滑らかに接続されてリッジ35が形成されている。
Thereby, the width W5 of the ridge 35 is gradually narrowed along the upper side (C2 direction) by the side surface 35b in the section L5 on the flat portion 28b (the root side of the ridge 35). And the side surface 35a and the side surface 35c have a substantially constant width W6. L5 and L6 are examples of the "first height" and the "second height" in the present invention respectively. Further, since the side surface 35b is formed of the crystal orientation plane ((11-22) plane) of the p-type cladding layer 28, the width W5 has a substantially constant size along the cavity direction ([1-100] direction). It is formed. In the ridge 35, the section L5 in which the side surface 35b is formed is formed in a range of about 25% (= about 100 nm) to about 50% (= about 200 nm) of the height (= L5 + L6 = about 400 nm) of the ridge 35 Is preferred. Although FIG. 4 shows that the connection between the side surface 35a and the side surface 35b is bent, in reality, the side surface 35a and the side surface 35b are smoothly connected to form the ridge 35.
また、p側コンタクト層29上には、p側オーミック電極30が形成されている。また、p型クラッド層28の上面上と、リッジ35およびp側オーミック電極30の側面を覆うように、SiO2からなる約0.2μmの厚みを有する電流ブロック層31が形成されている。また、図3および図4に示すように、p側オーミック電極30の上面および電流ブロック層31の上面を覆うように、p側パッド電極32が形成されている。また、n型GaN基板21の裏面上には、n型GaN基板21側から順に、n側オーミック電極33と、n側パッド電極34とが形成されている。
In addition, a p-side ohmic electrode 30 is formed on the p-side contact layer 29. Further, a current blocking layer 31 having a thickness of about 0.2 μm made of SiO 2 is formed on the upper surface of the p-type cladding layer 28 and the side surfaces of the ridge 35 and the p-side ohmic electrode 30. Further, as shown in FIGS. 3 and 4, the p-side pad electrode 32 is formed so as to cover the upper surface of the p-side ohmic electrode 30 and the upper surface of the current blocking layer 31. Further, an n-side ohmic electrode 33 and an n-side pad electrode 34 are formed on the back surface of the n-type GaN substrate 21 sequentially from the n-type GaN substrate 21 side.
また、半導体レーザ素子20の共振器方向(A方向)の両端部には一対の共振器面20aが形成されている。また、共振器面20aには、製造プロセスにおける端面コート処理により、AlN膜やAl2O3膜などからなる反射率制御の機能を兼ねる誘電体多層膜(図示せず)が形成されている。
A pair of cavity facets 20 a is formed at both ends of the semiconductor laser element 20 in the cavity direction (direction A). Further, on the resonator surface 20a, a dielectric multilayer film (not shown) having the function of reflectance control, which is made of an AlN film or an Al 2 O 3 film, is formed by end surface coating processing in the manufacturing process.
次に、図3~図9を参照して、第1実施形態による半導体レーザ素子20の製造プロセスについて説明する。
Next, with reference to FIGS. 3 to 9, a manufacturing process of the semiconductor laser device 20 according to the first embodiment will be described.
まず、図5に示すように、有機金属気相成長(MOCVD)法を用いて、主表面がc面からa面に約18°傾斜して形成されたn型GaN基板21の上面上に、バッファ層22、n型クラッド層23、n側光ガイド層24、発光層25、p側光ガイド層26、p側キャリアブロック層27、p型クラッド層28およびp側コンタクト層29を順次成長させて半導体素子層を形成する。したがって、積層された半導体素子層には、c面からa面に約18°傾斜した面からなる主表面が形成される。
First, as shown in FIG. 5, on the upper surface of the n-type GaN substrate 21 formed with the main surface inclined about 18 ° from the c-plane to the a-plane by metal organic chemical vapor deposition (MOCVD) method, Buffer layer 22, n-type cladding layer 23, n-side light guide layer 24, light emitting layer 25, p-side light guide layer 26, p-side carrier block layer 27, p-type cladding layer 28 and p-side contact layer 29 are sequentially grown Form a semiconductor element layer. Therefore, in the stacked semiconductor element layer, a main surface is formed which is a plane inclined approximately 18 ° from the c-plane to the a-plane.
その後、図6に示すように、半導体素子層(p側コンタクト層29)の上面上に、[1-100]方向にストライプ状に延びるとともにB方向に所定の間隔を有するように、SiO2からなるマスクパターン36を形成する。そして、図7に示すように、Cl2ガスを用いた誘導結合プラズマ(ICP)エッチングなどにより、マスクパターン36をマスクとして、p側コンタクト層29およびp型クラッド層28の一部をC1方向に向かってエッチングを行う。なお、ICPエッチングは、約200W以上約300W以下のバイアス電力および約30W以上約50W以下のICP電力に調整された状態で行われる。
Thereafter, as shown in FIG. 6, from the SiO 2 so as to extend in a stripe shape in the [1-100] direction and to have a predetermined interval in the B direction on the upper surface of the semiconductor element layer (p-side contact layer 29). The mask pattern 36 is formed. Then, as shown in FIG. 7, such as by inductively coupled plasma (ICP) etching using Cl 2 gas, the mask pattern 36 as a mask, a part of the p-side contact layer 29 and the p-type cladding layer 28 in the direction C1 Do the etching towards. The ICP etching is performed in a state adjusted to a bias power of about 200 W or more and about 300 W or less and an ICP power of about 30 W or more and about 50 W or less.
この際、第1実施形態では、マスクパターン36の幅(B方向)に沿ってp側コンタクト層29およびp型クラッド層28の一部がC1方向にエッチングされることにより、まず、発光層25の主表面に対して略垂直な角度θ5を有する側面35aおよび側面35cが区間L6の深さだけ形成される。その後、エッチングを継続することにより、B1側の側面に側面35aとは異なる角度θ6(=約42°)で延びる側面35bが区間L5の深さだけ形成される。また、エッチングによって形成される側面35bには、p型クラッド層28の(11-22)面からなる結晶方位面が露出する。一方、B2側の側面は、側面35cが区間L5の深さだけさらに形成される。このようにして、p型クラッド層28の凸部28aとp側コンタクト層29とからなるリッジ35が形成される。また、リッジ35は、[1-100]方向(紙面に垂直な方向)に平行に延びている。
At this time, in the first embodiment, a part of the p-side contact layer 29 and a part of the p-type cladding layer 28 are etched in the C1 direction along the width (the B direction) of the mask pattern 36. A side surface 35a and a side surface 35c having an angle θ5 substantially perpendicular to the main surface of the upper surface are formed by the depth of the section L6. Thereafter, by continuing the etching, the side surface 35b extending at an angle θ6 (= about 42 °) different from the side surface 35a is formed on the side surface on the B1 side by the depth of the section L5. The crystal orientation plane formed of the (11-22) plane of the p-type cladding layer 28 is exposed on the side surface 35 b formed by the etching. On the other hand, in the side surface on the B2 side, the side surface 35c is further formed by the depth of the section L5. Thus, the ridge 35 composed of the convex portion 28 a of the p-type cladding layer 28 and the p-side contact layer 29 is formed. The ridges 35 extend in parallel to the [1-100] direction (the direction perpendicular to the paper surface).
その後、図8に示すように、マスクパターン36を除去するとともに、リッジ35の上面に位置するp側コンタクト層29上にp側オーミック電極30を形成する。そして、プラズマCVDを用いて、p型クラッド層28の上面上と、リッジ35およびp側オーミック電極30の側面を覆うように電流ブロック層31を形成する。その後、図9に示すように、真空蒸着法を用いて、p側オーミック電極30の上面および電流ブロック層31の上面を覆うように、p側パッド電極32を形成する。
Thereafter, as shown in FIG. 8, the mask pattern 36 is removed, and the p-side ohmic electrode 30 is formed on the p-side contact layer 29 located on the top surface of the ridge 35. Then, the current block layer 31 is formed to cover the upper surface of the p-type cladding layer 28 and the side surfaces of the ridge 35 and the p-side ohmic electrode 30 by plasma CVD. Thereafter, as shown in FIG. 9, the p-side pad electrode 32 is formed to cover the upper surface of the p-side ohmic electrode 30 and the upper surface of the current blocking layer 31 by vacuum evaporation.
その後、n型GaN基板21が約100μmの厚みを有するようにn型GaN基板21の下面を研磨した後、真空蒸着法およびフォトリソグラフィを用いて、n型GaN基板21の下面上の所定の領域にn側オーミック電極33およびn側パッド電極34を順次形成する。
Thereafter, the lower surface of n-type GaN substrate 21 is polished so that n-type GaN substrate 21 has a thickness of about 100 μm, and then a predetermined region on the lower surface of n-type GaN substrate 21 is formed using vacuum evaporation and photolithography. The n-side ohmic electrode 33 and the n-side pad electrode 34 are sequentially formed on the
その後、ウェハをバー状に劈開することにより共振器面20a(図3参照)を形成する。そして、バー状態の半導体レーザ素子20に対して端面コート処理を行うことにより、共振器面20aに誘電体多層膜(図示せず)が形成される。最後に、バー状態の半導体レーザ素子20を共振器方向(A方向)に沿って素子分割(チップ化)する。このようにして、第1実施形態による半導体レーザ素子20(図3参照)のチップが形成される。
Thereafter, the wafer is cleaved into a bar shape to form a resonator surface 20a (see FIG. 3). Then, an end surface coating process is performed on the bar-shaped semiconductor laser element 20 to form a dielectric multilayer film (not shown) on the resonator surface 20a. Finally, the semiconductor laser element 20 in the bar state is element-divided (chipped) along the cavity direction (direction A). Thus, the chip of the semiconductor laser device 20 (see FIG. 3) according to the first embodiment is formed.
第1実施形態では、上記のように、リッジ35のB1側の側面が、p型クラッド層28の結晶方位面((11-22)面)からなる側面35bを有することによって、結晶方位面の側面35bには平坦性が得られるので、側面35bの部分におけるリッジ35の幅W5がリッジ35の延びる共振器方向([1-100]方向)に沿ってばらつくのが抑制される。これにより、リッジ35の幅のばらつきに起因した光の伝播モードの乱れが生じにくくなるので、半導体レーザ素子20の内部における光損失の発生を抑制することができる。
In the first embodiment, as described above, the side surface on the B1 side of the ridge 35 has the side surface 35 b formed of the crystal orientation plane ((11-22) plane) of the p-type cladding layer 28. Flatness is obtained on the side surface 35b, so that the width W5 of the ridge 35 at the portion of the side surface 35b is suppressed from being dispersed along the cavity direction ([1-100] direction) in which the ridge 35 extends. As a result, the disturbance of the light propagation mode due to the variation in the width of the ridge 35 is less likely to occur, so that the occurrence of light loss inside the semiconductor laser device 20 can be suppressed.
また、第1実施形態では、リッジ35のB1側の側面が、リッジ35の先端側に設けられ、発光層25の主表面に対して角度θ5(=約90°)で延びる側面35aと、発光層25の主表面に対して角度θ5よりも小さい角度θ6(=約42°)で延びることによりリッジ35の幅W5が先端側から根元側に向かって広がる側面35bとを有することによって、リッジ35は、側面35bの部分において根元側から先端側に向かってリッジ35の幅W5が先細りする一方、側面35aの部分では角度θ6よりも大きな角度θ5で先端に向かって延びるので、リッジ35の幅が根元から先端に至るまで角度θ6で単調に先細りするのが抑制される。すなわち、角度θ6のみで極度に先細りした先端の上面上にp側オーミック電極30を形成する場合と異なり、側面35aによって先端が極度に先細りするのが抑制されるので、所定の幅(W6)が得られた先端にp側オーミック電極30を形成することができる。これにより、p型クラッド層28とリッジ35の上面上に形成されるp側オーミック電極30との接触面積(接触幅)を一定の大きさに維持することができるので、半導体レーザ素子20の電気特性を向上させることができる。
Further, in the first embodiment, the side surface on the B1 side of the ridge 35 is provided on the tip side of the ridge 35, and the side surface 35a extending at an angle θ5 (= about 90 °) with respect to the main surface of the light emitting layer 25; Ridge 35 has a side surface 35 b having a width W 5 extending from the tip side toward the root side by extending at an angle θ 6 (= about 42 °) smaller than angle θ 5 with respect to the main surface of layer 25. The width W5 of the ridge 35 tapers from the root side to the tip side at the portion of the side surface 35b, while the width 35 of the side surface 35a extends toward the tip at an angle θ5 larger than the angle θ6. The monotonous tapering at the angle θ6 from the root to the tip is suppressed. That is, unlike the case where the p-side ohmic electrode 30 is formed on the top surface of the tip extremely tapered only at the angle θ6, the tip 35 is prevented from being extremely tapered by the side surface 35a, so the predetermined width (W6) is The p-side ohmic electrode 30 can be formed at the obtained tip. As a result, the contact area (contact width) between the p-type cladding layer 28 and the p-side ohmic electrode 30 formed on the upper surface of the ridge 35 can be maintained at a constant size. Characteristics can be improved.
また、第1実施形態では、発光層25がc面からa面に約18°傾斜した面からなる主表面を有することによって、リッジ35の少なくともB1側の根元近傍に、(11-22)面からなる結晶方位面が露出する側面35bを容易に形成することができる。
In the first embodiment, the light emitting layer 25 has a main surface formed of a surface inclined at about 18 ° from the c-plane to the a-plane, whereby the (11-22) plane is at least near the root of the ridge 35 on the B1 side. It is possible to easily form the side surface 35b to which the crystal orientation plane made of
また、第1実施形態では、n型GaN基板21の主表面(c面からa面に約18°傾斜した面の主表面)上に発光層25を含む半導体レーザ素子層を形成することによって、リッジ35の根元側に(11-22)面からなる結晶方位面が現われた側面35bを有する半導体レーザ素子20を容易に形成することができる。
In the first embodiment, the semiconductor laser device layer including the light emitting layer 25 is formed on the main surface of the n-type GaN substrate 21 (the main surface of the surface inclined about 18 ° from the c-plane to the a-plane). It is possible to easily form the semiconductor laser device 20 having the side surface 35b in which the crystal orientation plane of the (11-22) plane appears on the root side of the ridge 35.
(第2実施形態)
図10を参照して、第2実施形態について説明する。この第2実施形態では、上記第1実施形態と異なり、m面を主表面とするn型GaN基板41を用いて半導体レーザ素子40を形成する場合について説明する。なお、n型GaN基板41は、本発明の「基板」の一例である。 Second Embodiment
A second embodiment will be described with reference to FIG. In the second embodiment, unlike the first embodiment, the case where thesemiconductor laser 40 is formed using an n-type GaN substrate 41 having an m-plane as a main surface will be described. The n-type GaN substrate 41 is an example of the “substrate” in the present invention.
図10を参照して、第2実施形態について説明する。この第2実施形態では、上記第1実施形態と異なり、m面を主表面とするn型GaN基板41を用いて半導体レーザ素子40を形成する場合について説明する。なお、n型GaN基板41は、本発明の「基板」の一例である。 Second Embodiment
A second embodiment will be described with reference to FIG. In the second embodiment, unlike the first embodiment, the case where the
本発明の第2実施形態では、図10に示すように、n型GaN基板41のm面からなる主表面上に、上記第1実施形態と同様の積層構造を有する半導体レーザ素子層が形成されている。すなわち、図中において、上記第1実施形態と同様の構成には、上記第1実施形態と同じ符号を付して図示している。
In the second embodiment of the present invention, as shown in FIG. 10, a semiconductor laser device layer having a laminated structure similar to that of the first embodiment is formed on the main surface of the n-type GaN substrate 41 consisting of m-planes. ing. That is, in the figure, the same reference numerals as in the first embodiment are given to the same components as in the first embodiment.
ここで、第2実施形態では、リッジ55のB1側の側面には、側面55aと側面55bとが形成されている。また、リッジ55は、c軸方向にストライプ状に延びている。また、側面55aは、リッジ55の先端から根元に向かって発光層25の主表面に対して略垂直な角度θ7を有する一方、側面55bは、側面55aのC2側の端部からリッジ55の根元に向かって角度θ7よりも小さい角度θ8(=約60°)を有して延びている。また、側面55bは、p型クラッド層28の(0-110)面からなる結晶方位面が露出するように構成されている。なお、側面55aおよび側面55bは、それぞれ、本発明の「第1側面」および「第2側面」の一例である。また、角度θ7および角度θ8は、それぞれ、本発明の「第1傾斜角度」および「第2傾斜角度」の一例である。なお、第2実施形態において符号を用いて示す方向(A方向、B方向およびC方向など)は、上記した本発明の概念において符号を用いて記載した方向と同じ方向を意味する。
Here, in the second embodiment, the side surface 55 a and the side surface 55 b are formed on the side surface on the B 1 side of the ridge 55. Also, the ridges 55 extend in a stripe shape in the c-axis direction. Further, the side surface 55a has an angle θ7 substantially perpendicular to the main surface of the light emitting layer 25 from the tip to the root of the ridge 55, while the side surface 55b is from the end on the C2 side of the side surface 55a to the root of the ridge 55 Extend with an angle θ8 (= about 60 °) smaller than the angle θ7. The side surface 55 b is configured to expose a crystal orientation plane formed of the (0-110) plane of the p-type cladding layer 28. The side surface 55a and the side surface 55b are examples of the "first side surface" and the "second side surface" in the present invention respectively. The angle θ7 and the angle θ8 are examples of the “first tilt angle” and the “second tilt angle” in the present invention respectively. In the second embodiment, directions (A direction, B direction, C direction, etc.) indicated by using the reference numerals mean the same directions as the directions described using the reference in the concept of the present invention described above.
また、第2実施形態では、リッジ55のB2側の側面には、側面55cと側面55dとが形成されている。また、側面55cは、リッジ55の先端から根元に向かって発光層25の主表面に対して略垂直な角度θ9を有する一方、側面55dは、側面55cのC2側の端部からリッジ55の根元に向かって角度θ9よりも小さい角度θ10(=約60°)を有して延びている。また、側面55dは、p型クラッド層28の(10-10)面からなる結晶方位面が露出するように構成されている。なお、側面55cおよび側面55dは、それぞれ、本発明の「第3側面」および「第4側面」の一例である。また、角度θ9および角度θ10は、それぞれ、本発明の「第3傾斜角度」および「第4傾斜角度」の一例である。
In the second embodiment, the side surface 55 c and the side surface 55 d are formed on the side surface of the ridge 55 on the B 2 side. Further, the side surface 55c has an angle θ9 substantially perpendicular to the main surface of the light emitting layer 25 from the tip to the root of the ridge 55, while the side surface 55d is from the end on the C2 side of the side surface 55c to the root of the ridge 55 Extend with an angle θ10 (= about 60 °) smaller than the angle θ9. The side surface 55 d is configured to expose a crystal orientation plane formed of the (10-10) plane of the p-type cladding layer 28. The side surface 55 c and the side surface 55 d are examples of the “third side surface” and the “fourth side surface” in the present invention respectively. The angle θ9 and the angle θ10 are examples of the “third tilt angle” and the “fourth tilt angle” in the present invention respectively.
これにより、第2実施形態では、リッジ55は、平坦部28b上の区間L7において側面55bおよび側面55dによって幅W7がC2方向に沿って徐々に狭められるとともに、区間L8では、側面55aおよび側面55cによって略一定の幅W8を有する。また、側面55bおよび側面55dがそれぞれp型クラッド層28の結晶方位面からなるので、幅W7は、共振器方向(c軸方向)に沿って略一定の大きさに形成されている。なお、図10では、側面55aと側面55bとの接続部、および、側面55cと側面55dとの接続部が共に折れ曲がるように表現されているが、実際には、側面55a(55c)と側面55b(55d)とは滑らかに接続されてリッジ55が形成されている。
Thus, in the second embodiment, the width 55 is gradually narrowed along the C2 direction by the side surface 55b and the side surface 55d in the section L7 on the flat portion 28b, and the side surface 55a and the side surface 55c in the section L8. Have a substantially constant width W8. Further, since the side surface 55b and the side surface 55d are respectively formed by the crystal orientation plane of the p-type cladding layer 28, the width W7 is formed in a substantially constant size along the cavity direction (c axis direction). In FIG. 10, although the connecting portion between the side surface 55a and the side surface 55b and the connecting portion between the side surface 55c and the side surface 55d are both bent, actually, the side surface 55a (55c) and the side surface 55b The ridge 55 is smoothly connected with (55d).
また、第2実施形態による半導体レーザ素子40の製造プロセスでは、p側コンタクト層29およびp型クラッド層28の一部をC1方向にエッチングする際、まず、幅W8を有する側面55aおよび側面55cからなるリッジ55の上部領域(リッジ55の先端側の区間L8の部分)を形成した後、幅W8から幅W7まで広がる側面55bおよび側面55dからなるリッジ55の下部領域(リッジ55の根元側の区間L7の部分)を形成する。なお、L7およびL8は、それぞれ、本発明の「第1高さ」および「第2高さ」の一例である。この際、エッチングによって形成される側面55bには、p型クラッド層28の(0-110)面からなる結晶方位面が露出するとともに、側面55dには、p型クラッド層28の(10-10)面からなる結晶方位面が露出する。このようにして、リッジ55が形成される。
Further, in the manufacturing process of the semiconductor laser 40 according to the second embodiment, when the p-side contact layer 29 and the p-type cladding layer 28 are partially etched in the C1 direction, first, the side surfaces 55a and 55c having the width W8 are After forming the upper region of the ridge 55 (portion L8 on the tip side of the ridge 55), the lower region of the ridge 55 consisting of the side surface 55b and the side surface 55d extending from the width W8 to the width W7 (section on the root side of the ridge 55 Form part L7). L7 and L8 are examples of the "first height" and the "second height" in the present invention respectively. At this time, the crystal orientation plane formed of the (0-110) plane of the p-type cladding layer 28 is exposed on the side surface 55b formed by etching, and the side surface 55d of the p-type cladding layer 28 (10-10 The crystal orientation plane consisting of planes is exposed. Thus, the ridge 55 is formed.
なお、第2実施形態における半導体レーザ素子40のその他の構成および製造プロセスは、上記第1実施形態と同様である。
The remaining structure and manufacturing process of the semiconductor laser 40 in the second embodiment are similar to those of the aforementioned first embodiment.
第2実施形態では、上記のように、リッジ55のB2側の側面が、p型クラッド層28の結晶方位面((10-10)面)からなる側面55dを有することによって、リッジ55のB1側の(0-110)面からなる側面55bのみならずB2側の側面についても、結晶方位面からなる側面55dが平坦性を有するので、側面55bおよび側面55dによって挟まれる領域のリッジ55の幅W7が、共振器方向([0001]方向)に沿ってばらつくのがより抑制される。また、側面55dによる先細りが側面55cの部分で抑制されるので、側面55aおよび側面55cによって挟まれるリッジ55の先端を、p側オーミック電極30の形成に適した幅により容易に形成することができる。すなわち、リッジ55の幅の制御性がより向上されるので、素子内部における光損失の発生をより抑制することができるとともに、半導体レーザ素子40の電気特性をより向上させることができる。
In the second embodiment, as described above, the side surface on the B2 side of the ridge 55 has the side surface 55d formed of the crystal orientation plane ((10-10) plane) of the p-type cladding layer 28, thereby providing the B1 of the ridge 55. The side surface 55d formed of the crystal orientation plane has flatness on the side surface 55b formed of the (0-110) plane as well as the side surface on the B2 side, so the width of the ridge 55 in the region sandwiched by the side surface 55b and the side surface 55d. Dispersion of W7 along the resonator direction ([0001] direction) is further suppressed. Further, since the taper by the side surface 55d is suppressed at the side surface 55c, the tip of the ridge 55 sandwiched by the side surface 55a and the side surface 55c can be easily formed with a width suitable for forming the p-side ohmic electrode 30 . That is, since the controllability of the width of the ridge 55 is further improved, the occurrence of light loss inside the device can be further suppressed, and the electrical characteristics of the semiconductor laser 40 can be further improved.
また、第2実施形態では、発光層25が、m面からなる主表面を有することによって、リッジ55のB方向の両側面の根元側に、結晶方位面からなる側面55bおよび側面55dの各々を容易に形成することができる。なお、第2実施形態のその他の効果については、上記第1実施形態と同様である。
Further, in the second embodiment, the light emitting layer 25 has the main surface formed of the m plane, whereby the side surfaces 55b and 55d formed of the crystal orientation plane are formed on the root sides of the side surfaces of the ridge 55 in the B direction. It can be easily formed. The remaining effects of the second embodiment are similar to those of the aforementioned first embodiment.
(第3実施形態)
図11を参照して、第3実施形態について説明する。この第3実施形態では、上記第1実施形態と異なり、c面を主表面とするn型GaN基板61を用いて半導体レーザ素子60を形成する場合について説明する。なお、n型GaN基板61は、本発明の「基板」の一例である。 Third Embodiment
A third embodiment will be described with reference to FIG. In the third embodiment, unlike the first embodiment, the case where thesemiconductor laser device 60 is formed using an n-type GaN substrate 61 having a c-plane as a main surface will be described. The n-type GaN substrate 61 is an example of the “substrate” in the present invention.
図11を参照して、第3実施形態について説明する。この第3実施形態では、上記第1実施形態と異なり、c面を主表面とするn型GaN基板61を用いて半導体レーザ素子60を形成する場合について説明する。なお、n型GaN基板61は、本発明の「基板」の一例である。 Third Embodiment
A third embodiment will be described with reference to FIG. In the third embodiment, unlike the first embodiment, the case where the
本発明の第3実施形態では、図11に示すように、n型GaN基板61のc面からなる主表面上に、上記第1実施形態と同様の積層構造を有する半導体レーザ素子層が形成されている。すなわち、図中において、上記第1実施形態と同様の構成には、上記第1実施形態と同じ符号を付して図示している。
In the third embodiment of the present invention, as shown in FIG. 11, a semiconductor laser device layer having a laminated structure similar to that of the first embodiment is formed on the main surface of the c-plane of the n-type GaN substrate 61. ing. That is, in the figure, the same reference numerals as in the first embodiment are given to the same components as in the first embodiment.
ここで、第3実施形態では、リッジ75のB1側の側面には、側面75aと側面75bとが形成されている。また、側面75aは、リッジ75の先端から根元に向かって発光層25の主表面に対して略垂直な角度θ11を有する一方、側面75bは、側面75aのC2側の端部からリッジ75の根元に向かって角度θ11よりも小さい角度θ12を有して延びている。また、側面75bは、p型クラッド層28の(11-22)面からなる結晶方位面が露出するように構成されている。なお、側面75aおよび側面75bは、それぞれ、本発明の「第1側面」および「第2側面」の一例である。また、角度θ11および角度θ12は、それぞれ、本発明の「第1傾斜角度」および「第2傾斜角度」の一例である。なお、第3実施形態において符号を用いて示す方向(A方向、B方向およびC方向など)は、上記した本発明の概念において符号を用いて記載した方向と同じ方向を意味する。
Here, in the third embodiment, the side surface 75 a and the side surface 75 b are formed on the side surface of the ridge 75 on the B 1 side. The side surface 75a has an angle θ11 substantially perpendicular to the main surface of the light emitting layer 25 from the tip to the root of the ridge 75, while the side surface 75b is from the end on the C2 side of the side surface 75a to the root of the ridge 75 Extend with an angle θ12 smaller than the angle θ11. The side surface 75 b is configured to expose a crystal orientation plane formed of the (11-22) plane of the p-type cladding layer 28. The side surface 75 a and the side surface 75 b are examples of the “first side surface” and the “second side surface” in the present invention, respectively. The angles θ11 and θ12 are examples of the “first tilt angle” and the “second tilt angle” in the present invention respectively. In the third embodiment, directions (A direction, B direction, C direction, etc.) indicated by using the reference numerals mean the same directions as the directions described using the reference in the concept of the present invention described above.
また、第3実施形態では、リッジ75のB2側の側面には、側面75cと側面75dとが形成されている。また、側面75cは、リッジ75の先端から根元に向かって発光層25の主表面に対して略垂直な角度θ13を有する一方、側面75dは、側面75cのC2側の端部からリッジ75の根元に向かって角度θ13よりも小さい角度θ14を有して延びている。また、側面75dは、p型クラッド層28の(-1-122)面からなる結晶方位面が露出するように構成されている。なお、側面75cおよび側面75dは、それぞれ、本発明の「第3側面」および「第4側面」の一例である。また、角度θ13および角度θ14は、それぞれ、本発明の「第3傾斜角度」および「第4傾斜角度」の一例である。
In the third embodiment, the side surface 75c and the side surface 75d are formed on the side surface of the ridge 75 on the B2 side. Further, the side surface 75c has an angle θ13 substantially perpendicular to the main surface of the light emitting layer 25 from the tip of the ridge 75 toward the root, while the side surface 75d is the root of the ridge 75 from the C2 side end of the side surface 75c. Extends with an angle θ14 smaller than the angle θ13. The side surface 75 d is configured to expose a crystal orientation plane formed of the (-1-122) plane of the p-type cladding layer 28. The side surface 75 c and the side surface 75 d are examples of the “third side surface” and the “fourth side surface” in the present invention, respectively. The angles θ13 and θ14 are examples of the “third inclination angle” and the “fourth inclination angle” in the present invention respectively.
これにより、第3実施形態では、リッジ75は、平坦部28b上の区間L9(リッジ75の根元側)において側面75bおよび側面75dによって幅W9がC2方向に沿って徐々に狭められるとともに、区間L10(リッジ75の先端側)では、側面75aおよび側面75cによって略一定の幅W10を有する。なお、L9およびL10は、それぞれ、本発明の「第1高さ」および「第2高さ」の一例である。また、側面75bおよび側面75dがそれぞれp型クラッド層28の結晶方位面からなるので、幅W9は、共振器方向(m軸方向に沿って略一定の大きさに形成されている。
Thereby, in the third embodiment, the width 75 is gradually narrowed along the C2 direction by the side surface 75b and the side surface 75d in the section L9 (the root side of the ridge 75) on the flat portion 28b. At the tip end side of the ridge 75, the side surface 75a and the side surface 75c have a substantially constant width W10. L9 and L10 are examples of the "first height" and the "second height" in the present invention respectively. In addition, since the side surface 75 b and the side surface 75 d are respectively formed by the crystal orientation plane of the p-type cladding layer 28, the width W 9 is formed in a resonator direction (substantially constant in size along the m-axis direction).
なお、第3実施形態における半導体レーザ素子60のその他の構成および製造プロセスは、上記第2実施形態と同様である。また、第3実施形態の効果についても、上記第2実施形態と同様である。
The remaining structure and manufacturing process of the semiconductor laser device 60 according to the third embodiment are similar to those of the aforementioned second embodiment. The effects of the third embodiment are also similar to those of the second embodiment.
(第4実施形態)
図12を参照して、第4実施形態について説明する。この第4実施形態では、上記第3実施形態と異なり、a面を主表面とするn型GaN基板81を用いて半導体レーザ素子80を形成する場合について説明する。なお、n型GaN基板81は、本発明の「基板」の一例である。 Fourth Embodiment
A fourth embodiment will be described with reference to FIG. In the fourth embodiment, unlike the third embodiment, the case where asemiconductor laser device 80 is formed using an n-type GaN substrate 81 whose main surface is the a-plane will be described. The n-type GaN substrate 81 is an example of the “substrate” in the present invention.
図12を参照して、第4実施形態について説明する。この第4実施形態では、上記第3実施形態と異なり、a面を主表面とするn型GaN基板81を用いて半導体レーザ素子80を形成する場合について説明する。なお、n型GaN基板81は、本発明の「基板」の一例である。 Fourth Embodiment
A fourth embodiment will be described with reference to FIG. In the fourth embodiment, unlike the third embodiment, the case where a
本発明の第4実施形態では、図12に示すように、n型GaN基板81のa面からなる主表面上に、上記第3実施形態と同様の積層構造を有する半導体レーザ素子層が形成されている。すなわち、図中において、上記第3実施形態と同様の構成には、上記第3実施形態と同じ符号を付して図示している。
In the fourth embodiment of the present invention, as shown in FIG. 12, a semiconductor laser device layer having a laminated structure similar to that of the third embodiment is formed on the main surface of the a-plane of the n-type GaN substrate 81. ing. That is, in the figure, the same reference numerals as in the third embodiment are given to the same components as in the third embodiment.
ここで、第4実施形態では、リッジ95のB1側の側面には、側面95aと側面95bとが形成されている。また、側面95aは、リッジ95の先端から根元に向かって発光層25の主表面に対して略垂直な角度θ15を有する一方、側面95bは、側面95aのC2側の端部からリッジ95の根元に向かって角度θ15よりも小さい角度θ16を有して延びている。また、側面95bは、p型クラッド層28の(11-22)面からなる結晶方位面が露出するように構成されている。なお、側面95aおよび側面95bは、それぞれ、本発明の「第1側面」および「第2側面」の一例である。また、角度θ15および角度θ16は、それぞれ、本発明の「第1傾斜角度」および「第2傾斜角度」の一例である。なお、第4実施形態において符号を用いて示す方向(A方向、B方向およびC方向など)は、上記した本発明の概念において符号を用いて記載した方向と同じ方向を意味する。
Here, in the fourth embodiment, the side surface 95 a and the side surface 95 b are formed on the side surface of the ridge 95 on the B 1 side. The side surface 95a has an angle θ15 substantially perpendicular to the main surface of the light emitting layer 25 from the tip to the root of the ridge 95, while the side surface 95b is from the end on the C2 side of the side surface 95a to the root of the ridge 95 Extend with an angle θ16 smaller than the angle θ15. The side face 95 b is configured to expose a crystal orientation plane formed of the (11-22) plane of the p-type cladding layer 28. The side surface 95 a and the side surface 95 b are examples of the “first side surface” and the “second side surface” in the present invention, respectively. The angle θ15 and the angle θ16 are examples of the “first tilt angle” and the “second tilt angle” in the present invention, respectively. In the fourth embodiment, directions (A direction, B direction, C direction, etc.) indicated by using the reference numerals mean the same directions as the directions described using the reference in the concept of the present invention described above.
また、第4実施形態では、リッジ95のB2側の側面には、側面95cと側面95dとが形成されている。また、側面95cは、リッジ95の先端から根元に向かって発光層25の主表面に対して略垂直な角度θ17を有する一方、側面95dは、側面95cのC2側の端部からリッジ95の根元に向かって角度θ17よりも小さい角度θ18を有して延びている。また、側面95dは、p型クラッド層28の(-1-122)面からなる結晶方位面が露出するように構成されている。なお、側面95cおよび側面95dは、それぞれ、本発明の「第3側面」および「第4側面」の一例である。また、角度θ17および角度θ18は、それぞれ、本発明の「第3傾斜角度」および「第4傾斜角度」の一例である。
In the fourth embodiment, the side surface 95 c and the side surface 95 d are formed on the side surface of the ridge 95 on the B 2 side. Further, the side surface 95c has an angle θ17 substantially perpendicular to the main surface of the light emitting layer 25 from the tip to the root of the ridge 95, while the side surface 95d is from the end on the C2 side of the side surface 95c to the root of the ridge 95 Extends with an angle θ 18 which is smaller than the angle θ 17. The side face 95 d is configured to expose a crystal orientation plane formed of the (-1-122) plane of the p-type cladding layer 28. The side surface 95 c and the side surface 95 d are examples of the “third side surface” and the “fourth side surface” in the present invention, respectively. The angle θ17 and the angle θ18 are examples of the “third tilt angle” and the “fourth tilt angle” in the present invention respectively.
これにより、第4実施形態では、リッジ95は、平坦部28b上の区間L11(リッジ95の根元側)において側面95bおよび側面95dによって幅W11がC2方向に沿って徐々に狭められるとともに、区間L12(リッジ95の先端側)では、側面95aおよび側面95cによって略一定の幅W12を有する。なお、L11およびL12は、それぞれ、本発明の「第1高さ」および「第2高さ」の一例である。また、側面95bおよび側面95dがそれぞれp型クラッド層28の結晶方位面からなるので、幅W9は、共振器方向(c軸方向)に沿って略一定の大きさに形成されている。
Thus, in the fourth embodiment, the width W11 is gradually narrowed along the C2 direction by the side surface 95b and the side surface 95d in the section L11 (the root side of the ridge 95) on the flat portion 28b. At the tip end of the ridge 95, the side surface 95a and the side surface 95c have a substantially constant width W12. L11 and L12 are examples of the “first height” and the “second height” in the present invention, respectively. Further, since the side surface 95 b and the side surface 95 d are respectively formed by the crystal orientation plane of the p-type cladding layer 28, the width W 9 is formed in a substantially constant size along the cavity direction (c axis direction).
なお、第4実施形態における半導体レーザ素子80のその他の構成および製造プロセスは、上記第2実施形態と同様である。また、第4実施形態の効果についても、上記第2実施形態と同様である。
The remaining structure and manufacturing process of the semiconductor laser device 80 according to the fourth embodiment are similar to those of the aforementioned second embodiment. The effects of the fourth embodiment are also similar to those of the second embodiment.
(第5実施形態)
図13を参照して、第5実施形態について説明する。この第5実施形態では、上記第1実施形態と異なり、c面からm面に約18°傾斜した面を主表面とするn型GaN基板101を用いて半導体レーザ素子100を形成する場合について説明する。 Fifth Embodiment
The fifth embodiment will be described with reference to FIG. In the fifth embodiment, unlike the first embodiment, the case where thesemiconductor laser device 100 is formed using the n-type GaN substrate 101 whose main surface is a plane inclined approximately 18 ° from the c-plane to the m-plane is described. Do.
図13を参照して、第5実施形態について説明する。この第5実施形態では、上記第1実施形態と異なり、c面からm面に約18°傾斜した面を主表面とするn型GaN基板101を用いて半導体レーザ素子100を形成する場合について説明する。 Fifth Embodiment
The fifth embodiment will be described with reference to FIG. In the fifth embodiment, unlike the first embodiment, the case where the
本発明の第5実施形態では、図13に示すように、主表面がc面からm面に約18°傾斜したn型GaN基板101の表面上に、上記第1実施形態と同様の積層構造を有する半導体素子層が形成されている。すなわち、図中において、上記第1実施形態と同様の構成には、上記第1実施形態と同じ符号を付して図示している。なお、n型GaN基板101は、本発明の「基板」の一例である。
In the fifth embodiment of the present invention, as shown in FIG. 13, on the surface of the n-type GaN substrate 101, the main surface of which is inclined by about 18 ° from the c-plane to the m-plane, A semiconductor element layer is formed. That is, in the figure, the same reference numerals as in the first embodiment are given to the same components as in the first embodiment. The n-type GaN substrate 101 is an example of the “substrate” in the present invention.
ここで、第5実施形態では、図13に示すように、リッジ115のB1側の側面には、側面115aと側面115bとが形成されている。また、側面115aは、リッジ115の先端から根元に向かって発光層25の主表面に対して略垂直な角度θ19を有して延びるとともに、側面115bは、側面115aのC2側の端部からリッジ115の根元に向かって角度θ19よりも小さい角度θ20を有して延びている。また、側面115bは、p型クラッド層28の(10-11)面からなる結晶方位面が露出するように構成されている。なお、側面115aおよび側面115bは、それぞれ、本発明の「第1側面」および「第2側面」の一例である。また、リッジ115のB2側の側面は、リッジ115の先端から根元まで発光層25の主表面に対して略垂直に延びる側面115cを有している。なお、角度θ19および角度θ20は、それぞれ、本発明の「第1傾斜角度」および「第2傾斜角度」の一例である。また、側面115cは、本発明の「第5側面」の一例である。なお、第5実施形態において符号を用いて示す方向(A方向、B方向およびC方向など)は、上記した本発明の概念において符号を用いて記載した方向と同じ方向を意味する。
Here, in the fifth embodiment, as shown in FIG. 13, a side surface 115 a and a side surface 115 b are formed on the side surface of the ridge 115 on the B1 side. The side surface 115a extends from the tip of the ridge 115 toward the root at an angle θ 19 substantially perpendicular to the main surface of the light emitting layer 25. The side surface 115b extends from the end on the C2 side of the side surface 115a It extends toward the root of 115 with an angle θ 20 smaller than the angle θ 19. The side surface 115 b is configured to expose a crystal orientation plane formed of the (10-11) plane of the p-type cladding layer 28. The side surface 115 a and the side surface 115 b are examples of the “first side surface” and the “second side surface” in the present invention, respectively. Further, the side surface on the B 2 side of the ridge 115 has a side surface 115 c extending substantially perpendicularly to the main surface of the light emitting layer 25 from the tip to the root of the ridge 115. The angle θ19 and the angle θ20 are examples of the “first tilt angle” and the “second tilt angle” in the present invention respectively. The side surface 115c is an example of the "fifth side surface" in the present invention. In the fifth embodiment, directions (A direction, B direction, C direction, etc.) indicated by using the reference numerals mean the same directions as the directions described using the reference in the concept of the present invention described above.
これにより、リッジ115は、平坦部28b上の区間L13(リッジ115の根元側)において側面115bによって幅W13がC2方向に沿って徐々に狭められるとともに、区間L14(リッジ115の先端側)では側面115aおよび側面115cによって略一定の幅W14を有する。なお、L13およびL14は、それぞれ、本発明の「第1高さ」および「第2高さ」の一例である。また、側面115bがp型クラッド層28の結晶方位面((10-11)面)からなるので、幅W13は、共振器方向(a軸方向)に沿って略一定の大きさに形成されている。
Thus, the ridge 115 has the width W13 gradually narrowed along the C2 direction by the side surface 115b in the section L13 (the root side of the ridge 115) on the flat portion 28b, and the side surface in the section L14 (the tip side of the ridge 115) It has a substantially constant width W14 by 115a and the side surface 115c. L13 and L14 are examples of the "first height" and the "second height" in the present invention respectively. Further, since the side surface 115 b is made of the crystal orientation plane ((10-11) plane) of the p-type cladding layer 28, the width W 13 is formed to have a substantially constant size along the cavity direction (a-axis direction) There is.
なお、第5実施形態における半導体レーザ素子100のその他の構成および製造プロセスは、上記第1実施形態と同様である。また、第5実施形態の効果についても、上記第1実施形態と同様である。
The remaining structure and manufacturing process of the semiconductor laser device 100 according to the fifth embodiment are similar to those of the aforementioned first embodiment. The effects of the fifth embodiment are also similar to those of the first embodiment.
なお、今回開示された実施形態は、すべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は、上記した実施形態の説明ではなく特許請求の範囲によって示され、さらに特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれる。
It should be understood that the embodiments disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is indicated not by the description of the embodiments described above but by the claims, and further includes all modifications within the meaning and scope equivalent to the claims.
また、上記第1および第5実施形態では、リッジの片側(図4のB1側)にのみ異なる傾斜角度を有する本発明の「第1側面」および「第2側面」を形成した例について示したが、本発明はこれに限らず、リッジ形成時のエッチング条件を制御することによって、リッジの両側の側面に、本発明の「第1側面」および「第2側面」、および、「第3側面」および「第4側面」をそれぞれ形成するようにしてもよい。
Further, in the first and fifth embodiments described above, an example in which the “first side surface” and the “second side surface” of the present invention having different inclination angles only on one side (B1 side in FIG. 4) of the ridge is shown. However, the present invention is not limited thereto, and by controlling the etching conditions at the time of ridge formation, the “first side surface” and “second side surface” and “third side surface” of the present invention can be provided on both side surfaces of the ridge. And the “fourth side surface” may be formed respectively.
また、上記第3実施形態では、c面を主表面とするn型GaN基板の表面上に形成された半導体レーザ素子層に対して、所定のエッチング条件下でリッジを形成することにより、リッジの根元側に(11-22)面からなる側面75bおよび(-1-120)面からなる側面75bを形成した例について示したが、本発明はこれに限らず、エッチング条件を制御することによって、本発明の「第2側面」として、(10-11)面や、(10-12)面や、(11-24)面を露出させて、本発明の「第2側面」を形成してもよい。なお、リッジをa軸方向に沿って形成すれば、(10-11)面や(10-12)面からなる「第2側面」をそれぞれ露出させることが可能であり、リッジをm軸方向に沿って形成すれば、(11-24)面からなる「第2側面」を露出させることが可能である。
In the third embodiment, the ridge is formed on the semiconductor laser element layer formed on the surface of the n-type GaN substrate having the c-plane as the main surface under predetermined etching conditions. Although an example in which the side surface 75b consisting of the (11-22) plane and the side surface 75b consisting of the (-1-120) plane are formed on the root side is shown, the present invention is not limited to this. Even if the (10-11) plane, the (10-12) plane, or the (11-24) plane is exposed as the "second side surface" of the present invention, the "second side surface" of the present invention can be formed. Good. If the ridge is formed along the a-axis direction, it is possible to expose the "second side surface" consisting of the (10-11) plane and the (10-12) plane, respectively. If it is formed along, it is possible to expose the "second side surface" consisting of the (11-24) plane.
2 活性層(半導体レーザ素子層)
3 第2導電型半導体層(半導体レーザ素子層)
3a、3i、35、55、75、95、115 リッジ
3c、35a、55a、75a、95a、115a 側面(第1側面)
3d、3g、35b、55b、75b、95b、115b 側面(第2側面)
3e、55c、75c、95c 側面(第3側面)
3f、55d、75d、95d 側面(第4側面)
3h、35c、115c 側面(第5側面)
21、41、61、81、101 n型GaN基板(基板)
22 バッファ層(半導体レーザ素子層)
23 n型クラッド層(半導体レーザ素子層)
24 n側光ガイド層(半導体レーザ素子層)
25 発光層(活性層、半導体レーザ素子層)
26 p側光ガイド層(半導体レーザ素子層)
27 p側キャリアブロック層(半導体レーザ素子層)
28 p型クラッド層(半導体レーザ素子層)
29 p側コンタクト層(半導体レーザ素子層) 2 Active layer (semiconductor laser device layer)
3 Second conductivity type semiconductor layer (semiconductor laser device layer)
3a, 3i, 35, 55, 75, 95, 115 ridge 3c, 35a, 55a, 75a, 95a, 115a side surface (first side surface)
3d, 3g, 35b, 55b, 75b, 95b, 115b side surface (second side surface)
3e, 55c, 75c, 95c side (third side)
3f, 55d, 75d, 95d side surface (fourth side surface)
3h, 35c, 115c side (fifth side)
21, 41, 61, 81, 101 n-type GaN substrate (substrate)
22 Buffer layer (semiconductor laser device layer)
23 n-type cladding layer (semiconductor laser device layer)
24 n-side light guide layer (semiconductor laser device layer)
25 Light emitting layer (active layer, semiconductor laser device layer)
26 p-side light guide layer (semiconductor laser device layer)
27 p-side carrier block layer (semiconductor laser device layer)
28 p-type cladding layer (semiconductor laser device layer)
29 p-side contact layer (semiconductor laser device layer)
3 第2導電型半導体層(半導体レーザ素子層)
3a、3i、35、55、75、95、115 リッジ
3c、35a、55a、75a、95a、115a 側面(第1側面)
3d、3g、35b、55b、75b、95b、115b 側面(第2側面)
3e、55c、75c、95c 側面(第3側面)
3f、55d、75d、95d 側面(第4側面)
3h、35c、115c 側面(第5側面)
21、41、61、81、101 n型GaN基板(基板)
22 バッファ層(半導体レーザ素子層)
23 n型クラッド層(半導体レーザ素子層)
24 n側光ガイド層(半導体レーザ素子層)
25 発光層(活性層、半導体レーザ素子層)
26 p側光ガイド層(半導体レーザ素子層)
27 p側キャリアブロック層(半導体レーザ素子層)
28 p型クラッド層(半導体レーザ素子層)
29 p側コンタクト層(半導体レーザ素子層) 2 Active layer (semiconductor laser device layer)
3 Second conductivity type semiconductor layer (semiconductor laser device layer)
3a, 3i, 35, 55, 75, 95, 115
3d, 3g, 35b, 55b, 75b, 95b, 115b side surface (second side surface)
3e, 55c, 75c, 95c side (third side)
3f, 55d, 75d, 95d side surface (fourth side surface)
3h, 35c, 115c side (fifth side)
21, 41, 61, 81, 101 n-type GaN substrate (substrate)
22 Buffer layer (semiconductor laser device layer)
23 n-type cladding layer (semiconductor laser device layer)
24 n-side light guide layer (semiconductor laser device layer)
25 Light emitting layer (active layer, semiconductor laser device layer)
26 p-side light guide layer (semiconductor laser device layer)
27 p-side carrier block layer (semiconductor laser device layer)
28 p-type cladding layer (semiconductor laser device layer)
29 p-side contact layer (semiconductor laser device layer)
Claims (20)
- 活性層と、凸状のリッジとを含む半導体レーザ素子層を備え、
前記リッジは、一方側面および他方側面を有し、
前記一方側面は、前記リッジの先端側に設けられた第1側面と、前記リッジの根元側に設けられた第2側面とを有し、
前記第1側面は、前記活性層の主表面に対して第1傾斜角度で延びており、
前記第2側面は、前記活性層の主表面に対して前記第1傾斜角度よりも小さい第2傾斜角度で延びており、
前記第2側面は、前記半導体レーザ素子層の結晶方位面からなる、半導体レーザ素子。 A semiconductor laser device layer including an active layer and a convex ridge;
The ridge has one side and the other side,
The one side surface has a first side surface provided on the tip end side of the ridge and a second side surface provided on the root side of the ridge,
The first side surface extends at a first inclination angle with respect to the main surface of the active layer,
The second side surface extends at a second inclination angle smaller than the first inclination angle with respect to the main surface of the active layer,
The semiconductor laser device, wherein the second side surface comprises a crystal orientation plane of the semiconductor laser device layer. - 前記他方側面は、前記先端側に設けられた第3側面と、前記リッジの前記根元側に設けられた第4側面とを有し、
前記第3側面は、前記活性層の主表面に対して第3傾斜角度で延びており、
前記第4側面は前記活性層の主表面に対して前記第3傾斜角度よりも小さい第4傾斜角度で延びており、
前記第4側面は、前記半導体レーザ素子層の結晶方位面からなる、請求項1に記載の半導体レーザ素子。 The other side surface has a third side surface provided on the tip end side and a fourth side surface provided on the root side of the ridge,
The third side extends at a third inclination angle with respect to the main surface of the active layer,
The fourth side surface extends at a fourth inclination angle smaller than the third inclination angle with respect to the main surface of the active layer,
The semiconductor laser device according to claim 1, wherein the fourth side surface comprises a crystal orientation plane of the semiconductor laser device layer. - 前記他方側面は、前記先端側から前記根元側にわたって設けられた第5側面を有し、
前記第5側面は、前記活性層の主表面に対して第5傾斜角度で延びている、請求項1に記載の半導体レーザ素子。 The other side surface has a fifth side surface provided from the tip side to the root side,
The semiconductor laser device according to claim 1, wherein the fifth side surface extends at a fifth inclination angle with respect to the main surface of the active layer. - 前記活性層は、(H、K、-H-K、0)面(HおよびKの少なくとも一方が0ではない整数)からなる主表面を有する、請求項1に記載の半導体レーザ素子。 The semiconductor laser device according to claim 1, wherein the active layer has a main surface composed of (H, K, −H−K, 0) planes (at least one of H and K is an integer not 0).
- 前記活性層は、(0001)面に対して傾斜した主表面を有する、請求項1に記載の半導体レーザ素子。 The semiconductor laser device according to claim 1, wherein the active layer has a main surface inclined with respect to a (0001) plane.
- 窒化物系半導体からなる基板をさらに備え、
前記基板の主表面上に前記半導体レーザ素子層が形成されている、請求項1に記載の半導体レーザ素子。 And a substrate made of a nitride semiconductor,
The semiconductor laser device according to claim 1, wherein the semiconductor laser device layer is formed on a main surface of the substrate. - 前記活性層は、(H、K、-H-K、L)面(HおよびKの少なくとも一方が0ではない整数かつL≠0)からなる主表面を有する、請求項1に記載の半導体レーザ素子。 The semiconductor laser according to claim 1, wherein said active layer has a main surface consisting of (H, K, -H-K, L) planes (at least one of H and K is an integer other than 0 and L ≠ 0). element.
- 前記リッジは、[0001]方向に延びている、請求項4に記載の半導体レーザ素子。 The semiconductor laser device according to claim 4, wherein the ridge extends in the [0001] direction.
- 前記リッジは、[1-101]方向に延びている、請求項5に記載の半導体レーザ素子。 The semiconductor laser device according to claim 5, wherein the ridge extends in the [1-101] direction.
- 前記リッジは、[H+2K、-2H-K、H-K、0]方向に延びている、請求項7に記載の半導体レーザ素子。 The semiconductor laser device according to claim 7, wherein the ridge extends in the [H + 2 K, -2 H-K, H-K, 0] direction.
- 前記第1傾斜角度は、85°以上である、請求項1に記載の半導体レーザ素子。 The semiconductor laser device according to claim 1, wherein the first tilt angle is 85 ° or more.
- 前記リッジの前記第1側面を有する部分は、第1高さを有し、
前記リッジの前記第2側面を有する部分は、第2高さを有し、
前記第2高さは、前記第1高さおよび前記第2高さの合計の約25%以上約50%以下の範囲である、請求項1に記載の半導体レーザ素子。 The portion of the ridge having the first side has a first height,
The portion of the ridge having the second side has a second height,
The semiconductor laser device according to claim 1, wherein the second height is in a range of about 25% to about 50% of a sum of the first height and the second height. - 前記活性層上にクラッド層を有し、
前記クラッド層の上面に、前記リッジと前記リッジの両側に延びる平坦部を有する、請求項1に記載の半導体レーザ素子。 Having a cladding layer on the active layer,
The semiconductor laser device according to claim 1, further comprising: a flat portion extending on both sides of the ridge and the ridge on an upper surface of the cladding layer. - 活性層と凸状のリッジとを含む半導体レーザ素子層を形成する工程を備え、
前記半導体レーザ素子層を形成する工程は、
前記半導体レーザ素子層の表面の一部に前記半導体レーザ素子層の表面から前記活性層に向かってエッチングすることにより、前記リッジの一方側面において、前記リッジの先端側に、前記活性層の主表面に対して第1傾斜角度で延びる第1側面と、前記リッジの根元側に、前記活性層の主表面に対して前記第1傾斜角度よりも小さい第2傾斜角度で延びるとともに前記半導体レーザ素子層の結晶方位面からなる第2側面とを形成する工程を含む、半導体レーザ素子の製造方法。 Forming a semiconductor laser device layer including an active layer and a convex ridge;
In the step of forming the semiconductor laser device layer,
The main surface of the active layer is formed on the tip side of the ridge on one side of the ridge by etching the surface of the semiconductor laser layer toward the active layer from part of the surface of the semiconductor laser layer. The semiconductor laser device layer extends on a first side surface extending at a first inclination angle with respect to the second surface and on a root side of the ridge at a second inclination angle smaller than the first inclination angle with respect to the main surface of the active layer A method of manufacturing a semiconductor laser device, comprising the steps of: forming a second side surface comprising a crystal orientation plane of - 前記活性層は、(H、K、-H-K、0)面(HおよびKの少なくとも一方が0ではない整数)からなる主表面を有する、請求項14に記載の半導体レーザ素子の製造方法。 The method of manufacturing a semiconductor laser device according to claim 14, wherein the active layer has a main surface consisting of (H, K, -H-K, 0) planes (at least one of H and K is an integer not 0). .
- 前記活性層は、(0001)面に対して傾斜した主表面を有する、請求項14に記載の半導体レーザ素子の製造方法。 The method for manufacturing a semiconductor laser device according to claim 14, wherein the active layer has a main surface inclined with respect to a (0001) plane.
- 前記リッジは、[0001]方向に延びるように形成されている、請求項15に記載の半導体レーザ素子の製造方法。 The method of manufacturing a semiconductor laser device according to claim 15, wherein the ridge is formed to extend in the [0001] direction.
- 前記リッジは、[1-101]方向に延びるように形成されている、請求項16に記載の半導体レーザ素子の製造方法。 The method of manufacturing a semiconductor laser device according to claim 16, wherein the ridge is formed to extend in the [1-101] direction.
- 前記活性層は、(H、K、-H-K、L)面(HおよびKの少なくとも一方が0ではない整数かつL≠0)からなる主表面を有し、
前記リッジは、[H+2K、-2H-K、H-K、0]方向に延びるように形成されている、請求項14に記載の半導体レーザ素子の製造方法。 The active layer has a main surface consisting of (H, K, -H-K, L) planes (at least one of H and K is not 0 and L ≠ 0),
The method for manufacturing a semiconductor laser device according to claim 14, wherein the ridge is formed to extend in the [H + 2 K, -2 H-K, H-K, 0] direction. - 前記活性層上にクラッド層を有し、
前記クラッド層の上面に、前記リッジと前記リッジの両側に延びる平坦部を有する、請求項14に記載の半導体レーザ素子の製造方法。 Having a cladding layer on the active layer,
15. The method for manufacturing a semiconductor laser device according to claim 14, further comprising flat portions extending on both sides of the ridge and the ridge on the upper surface of the cladding layer.
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