WO2011006310A1 - Device and method for power supplying control - Google Patents

Device and method for power supplying control Download PDF

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Publication number
WO2011006310A1
WO2011006310A1 PCT/CN2009/073319 CN2009073319W WO2011006310A1 WO 2011006310 A1 WO2011006310 A1 WO 2011006310A1 CN 2009073319 W CN2009073319 W CN 2009073319W WO 2011006310 A1 WO2011006310 A1 WO 2011006310A1
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Prior art keywords
self
power
cpu
logic
gate
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PCT/CN2009/073319
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French (fr)
Chinese (zh)
Inventor
陈虹宇
李树宏
梁永胜
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中兴通讯股份有限公司
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Publication of WO2011006310A1 publication Critical patent/WO2011006310A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/263Arrangements for using multiple switchable power supplies, e.g. battery and AC
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken

Definitions

  • the present invention relates to the field of wireless access technologies, and more particularly to a power supply control device and method for reducing 3G wireless access terminals and reducing standby power consumption. Background technique
  • the 3G wireless access terminal generally uses dual embedded microprocessors to support the 10/100M Ethernet interface connected to the PC, and supports the wireless broadband access node (WIFI AP, Wireless Fidelity Access Point) function, and supports the basic RJ11 telephone interface. Call function, support for 3G wireless data card using USB port. Users can connect to HSDPA high-speed Internet via Ethernet interface or Wireless Local Area Networks (WLAN) or basic call service through RJ11 telephone interface.
  • the 3G wireless access terminal combines with the wireless data card function to enable wireless 3G Internet access within the coverage of the WLAN wireless local area network.
  • the functions are diversified, it also brings about a problem of high energy consumption.
  • the main object of the present invention is to provide a power supply control device and method for realizing minimum power consumption in a standby state by using a 3G wireless access terminal to enhance green environmental protection, thereby enhancing the market of 3G wireless access terminals. Competing.
  • a power supply control device comprising:
  • a self-powered circuit that is configured to remain isolated from the secondary power module of the device
  • the self-starting and self-closing control circuit is configured to control the turning on or off of the secondary power module of the device that supplies power to the CPU according to the Power button signal and the CPU common GPIO pin, wherein the self-starting and self-closing control circuit is Said to supply power from the power supply circuit.
  • the self-powered circuit is further configured to perform a conversion of a primary power supply voltage of the external power adapter to a secondary power supply small voltage.
  • the self-powered circuit is a Low Dropout Regulator (LDO).
  • LDO Low Dropout Regulator
  • the self-starting and self-closing control circuit includes: a power button switch and a logic OR gate, wherein
  • the Power button switches are respectively connected to one input of the logic OR gate and the universal input GPI08 pin of the CPU;
  • An input of the logic OR gate is connected to the Power button switch for receiving a Power button signal
  • the other input of the logic OR gate is connected to the general-purpose output GPI01 pin of the CPU for receiving the CPU lock power signal;
  • the output terminal C of the logic OR gate is set to output a switching power according to two input ends of the logic OR gate
  • the source enable signal (Enabling Signals) controls the turning on and off of the secondary power module of the device that supplies power to the CPU.
  • the device is further configured to: when the button duration of the Power button switch exceeds the set time, the GPI08 pin continuously detects that the high level exceeds the set time, and the CPU resumes the wide setting state.
  • a power supply control method comprising:
  • the self-powered circuit that is isolated from the secondary power module of the device supplies power to the self-starting and self-closing control circuits;
  • the self-starting and self-closing control circuit controls the turning on or off of the secondary power module of the device that supplies power to the CPU according to the Power button signal and the CPU general GPIO pin.
  • the step of supplying power to the self-starting and self-closing control circuit includes: completing a conversion of the primary power supply large voltage of the external power adapter to the secondary power supply small voltage, and providing the small voltage for the self-starting and self-closing control circuits.
  • the steps of turning on or off the secondary power module of the device that supplies power to the CPU according to the Power button signal and the CPU general GPIO pin control include:
  • the Power button switch is pressed again, the one input of the logic OR gate is changed from a low level signal to a high level signal, and the GPI08 pin is set to a high level, when the button duration is within a set time, After the Power button switch is released, the output of the logic OR gate immediately outputs a low-level switching power supply enable signal, and the secondary power supply module of the device is turned off normally, and the CPU is powered down.
  • the general-purpose output GPI01 pin of the CPU connected to the other input end of the logic OR gate is set to a high level, and the power button switch After being released, the output of the logic OR gate immediately outputs a high-level switching power supply enable signal, and the secondary power supply module of the device continues to supply power to the CPU.
  • the method further includes: the GPI08 pin continuously detects that the high level exceeds the set time, and the CPU restores the factory setting state.
  • the invention provides a power supply control device and method for reducing standby power consumption, which is applied to a 3G wireless access terminal, and has the advantages that: only one Power button switch can be used to enable the 3G wireless access terminal to self-start and self-start Three function modes of shutting down and restoring the factory settings; and the power supply control device has few components and consumes very little current, which can ensure the power consumption is less than 0.3W, which enhances the green environmental protection and market competitiveness of the 3G wireless access terminal. BRIEF abstract
  • FIG. 1 is a schematic view showing the composition of a power supply control device according to the present invention.
  • FIG. 2 is a schematic diagram of the composition of a self-powered circuit in the present invention.
  • FIG. 3 is a schematic diagram of a self-powered circuit design according to the present invention.
  • FIG. 4 is a schematic diagram showing the composition of a self-starting and self-closing control circuit in the present invention
  • FIG. 5 is a schematic diagram of the design of the self-starting and self-closing control circuit in the present invention. Preferred embodiment of the invention
  • the present invention provides a power supply control device for reducing standby power consumption in a 3G wireless access terminal, the device comprising: a self-power supply circuit and a self-starting and self-closing control circuit, as shown in FIG.
  • the power supply control device is directly connected to the external power adapter. After the external power adapter is connected to the mains, the power supply control device can work normally, wherein the self-power supply circuit is isolated from the secondary power supply module of the device, and is only self-starting and Power is supplied from the shutdown control circuit.
  • the power supply control device is composed of a self-power supply circuit and a self-starting and self-closing control circuit, wherein the self-power supply circuit is isolated from the secondary power supply module of the device, and is used for powering the self-starting and self-closing control circuits, that is, It only supplies power to the logic or gate of the self-starting and self-closing control circuit, so the circuit consumes less current and consumes less power, which can guarantee the power consumption is less than 0.3W.
  • the output of the self-starting and self-closing control circuit is sampled by the Power button signal and CPU.
  • the signal and CPU lock power signal control, and the output is used as a switching power supply enable signal to control the secondary power module of the device to be turned on or off.
  • the self-powered circuit is implemented by a low dropout regulator (LDO, Low Dropout Regulator), which performs the primary to secondary power conversion.
  • LDO Low Dropout Regulator
  • the schematic diagram of the self-powered circuit design is shown in Figure 3.
  • the low-dropout linear regulator LDO is implemented by one chip and will be externally powered.
  • the source adapter is inserted into the 12V VDD output after the mains 220V is used as the input of the LDO.
  • the voltage conversion is realized by operating the transistor in the linear amplification region, and the VDD-12 of the large voltage 12V output from the power adapter is converted into the VDD_SW of the secondary power supply with a small voltage of 3.6V, which is only self-starting and The logic or gate of the self-closing control circuit is powered. Since the self-powered circuit has only one chip to work, the power consumption of the circuit is very small, and the power consumption can be guaranteed to be less than 0.3W.
  • the self-starting and self-closing control circuit is mainly composed of a Power button switch and a logic OR gate.
  • the logic or gate cooperates with the CPU general GPIO pin to control the opening and closing of the secondary power module of the device, thereby controlling Power on and off the CPU.
  • the OR gate is powered by a 3.6V VDD-SW from the output of the self-powered circuit.
  • the schematic diagram of the self-starting and self-closing control circuit design is shown in Figure 5.
  • the input terminal A of the logic OR gate and the universal input GPI08 pin of the CPU are connected to the Power button switch for receiving the Power button signal, and the logic or gate Input A is connected to ground, and is set low by default;
  • the input terminal B of the logic OR gate is connected to the general-purpose output GPI01 pin of the CPU to receive the CPU lock power signal;
  • the output terminal C of the logic OR gate is used according to the logic OR gate
  • the two input terminals output a switching power supply enable signal, and the high and low levels can control the turning on and off of the secondary power module of the device, thereby controlling the CPU to power on and off.
  • the self-powered circuit works normally.
  • the logic OR gate input terminal A receives a high level signal VDD_SW for a short period of several tens of milliseconds, and the logic OR gate output terminal C immediately outputs a high level signal.
  • SWITCH_OUT so that the switching power supply enable signal output from the output terminal C of the logic OR gate is set to a high level, and the secondary power supply module of the device is turned on, and the general-purpose input GPI08 pin of the CPU detects a high level, so that the CPU sample signal is high.
  • the flat state causes the CPU to power up.
  • the general-purpose output GPI01 pin is set to the default high state in the short time of initial configuration, and the high-level signal is transmitted to the input terminal B of the directly connected logic OR gate, so that the input logic or gate input is made.
  • the CPU lock power signal of terminal B is high, thereby locking the output terminal C of the logic OR gate to keep it high.
  • the switching power supply enable signal is at a high level, which ensures the continuous normal operation of the secondary power module of the device, and the CPU can continue to be powered up normally, and the 3G wireless access terminal completes the "self-starting" process.
  • the input terminal A of the logic OR gate will change from the low level signal to the high level signal VDD_SW again, because the input terminal A of the logic OR gate is connected to the general input GPI08 pin of the CPU.
  • GPI08 is also set to a high level VDD_SW, after the CPU collects the state change of the signal through the GPI08 pin, a counter is started by the interrupt program, and the counting time can be a demarcation value of 10 seconds.
  • the general-purpose output GPI01 pin of the CPU is set to a low level, and the low-level signal is transmitted to the input terminal B of the directly connected logic OR gate; after manually opening the Power button switch, the logic The input terminal A of the OR gate is restored to the default low state.
  • the two inputs A and B of the logic OR gate are both low, then the output terminal C of the logic OR gate outputs a low level, thereby switching The power enable signal is low, the secondary power module of the device is turned off, the CPU is powered off, and the 3G wireless access terminal completes the "self-shutdown" process.
  • the self-powered circuit is working, the current consumption is extremely small, and the power consumption is extremely small, and the power consumption can be guaranteed to be less than 0.3W.
  • the CPU In the normal operation of the 3G wireless access terminal, if the system is set incorrectly, the CPU needs to be restored to the factory setting state. At this time, the user can manually press the Power button switch for a long time.
  • the button duration exceeds 10 seconds, that is, the high level of the input terminal A of the logic OR gate lasts for more than 10 seconds.
  • the CPU's general-purpose input GPI08 pin continuously detects the high level for more than 10 seconds. Restore the factory settings to achieve the "one button and three use" function.
  • the invention also provides a power supply control method for reducing standby power consumption.
  • the basic idea of the method is that after the external power adapter is connected to the mains, the power supply control device can work, and the power button is manually pressed to open the device 2 Secondary power module, CPU power on, 3G wireless access terminal self-start; When the 3G wireless access terminal works in standby Standby state mode, manually press the Power button again, turn off the secondary power module of the device, power off the CPU, 3G wireless The access terminal is self-shutdown. At this time, only the self-power supply circuit is working, and the power consumption can be guaranteed to be less than 0.3W. In the normal operation of the 3G wireless access terminal, if the system is set incorrectly, the user can also press the same Power. Press the button for more than 10 seconds to reset the CPU to the factory settings and complete the "one button and three use" function.
  • Step 1 Manually press the Power button switch.
  • the input terminal A of the logic OR gate receives a high level signal VDD_SW
  • the output terminal C of the logic OR gate immediately outputs a high level signal SWITCH_OUT, so that the switching power supply enable signal is set. High level, causing the device secondary power module to be positive
  • the CPU's general-purpose input GPI08 pin detects a high level, so that the CPU sampling signal is in a high state, causing the CPU to power up;
  • Step 2 After the CPU is powered on, the general-purpose output GPI01 pin is set to the default high state in the short time of the initial configuration, and the high-level signal is transmitted to the input terminal B of the directly connected logic OR gate, thereby locking The output C of the logic or gate is high;
  • Step 3 Manually release the Power button switch, the logic A gate input A returns to the default low state, because the logic or gate input B is set high, so the logic or gate output C is still locked.
  • the high level state, and thus the switching power supply enable signal is high, ensuring the continuous normal operation of the secondary power module of the device, the CPU can continue to be powered up normally, and the 3G wireless access terminal completes the "self-starting" process.
  • Step 4 After the CPU works normally, when the 3G wireless access terminal works in the standby Standby state mode, the user manually presses the Power button again, and the input terminal A of the logic OR gate will change from the low level signal to the high level signal again.
  • VDD_SW the GPI08 pin directly connected to the A terminal is also set to a high level VDD_SW;
  • Step 5 After the CPU collects the status change of the signal through the GPI08 pin, it determines that the current Power button is pressed, and a counter is started by the interrupt program, and it is determined whether the button duration is greater than 10 seconds, and the button duration is less than 10 seconds. After the CPU performs the system logout operation, the general-purpose output GPI01 pin of the CPU is set to a low level, and the input terminal B of the logic or gate directly connected to GPI01 is also set to a low level;
  • Step 6 After manually releasing the Power button switch, the input terminal A of the logic OR gate is restored to the default low state. At this time, the two inputs A and B of the logic OR gate are both low, then the logical OR The output terminal C of the gate outputs a low level, so that the switching power supply enable signal is low, the secondary power supply module of the device is turned off, the CPU is powered off, and the 3G wireless access terminal completes the "self-shutdown" process.
  • the 3G wireless access terminal After the 3G wireless access terminal is turned off, only the self-powered circuit is working, the current consumption is extremely small, and the power consumption is extremely small, and the power consumption can be guaranteed to be less than 0.3W.
  • Step 7 In the normal operation of the 3G wireless access terminal, if the system settings are incorrect, you need The CPU is restored to the factory setting state.
  • the user can manually press the Power button for more than 10 seconds, that is, the input level of the input logic A of the logic or gate is continuously high for more than 10 seconds.
  • the CPU inputs the GPI08 pin. The high level is continuously detected for more than 10 seconds, and the CPU is restored to the factory setting state to realize the "one button and three use" function.
  • the above 3G wireless access terminal may be a 3G router.
  • the above is only a 3G wireless access terminal as an example to describe the specific implementation of the present invention. In practical applications, the solution of the present invention is applicable to any broadband wireless communication device having a CPU.
  • the invention provides a power supply control device and method for reducing standby power consumption, which is applied to a 3G wireless access terminal, and has the advantages that: only one Power button switch can be used to enable the 3G wireless access terminal to self-start and self-start Turn off and restore the three function modes of the wide setting; and the power supply control device has fewer components and consumes less current, which can ensure the power consumption is less than 0.3W, which enhances the green environmental protection and market competitiveness of the 3G wireless access terminal.

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Abstract

A power supplying control device and method for reducing the standby power consumption which are applied to a third generation (3G) wireless access terminal, are provided by the present invention. Said device includes a self power supplying circuit(6) and a self-starting and self-closing control circuit(7), wherein, said self power supplying circuit(6) is isolated from a secondary power supply module(4), and only supplies power for self-starting and self-closing control circuit(7); the self-starting and self-closing control circuit(7) controls the secondary power supply module(4) of the device to be started or closed by output a switch power supply enabling signal(8) based on a power key-press signal(10) cooperating with a common General Purpose Input/Output (GPIO) pin of the central process unit (CPU). The power supplying control device and method provided by the present invention enable the 3G wireless access terminal to realize a three functional modes of self-starting, self-closing and being reset to the factory settings only with one power key-press switch; and the power supplying device has less components, a small current consumption, and ensures the power consumption less than 0.3W and improves the green environment protection effect and the market competitiveness of the 3G wireless access terminal.

Description

一种供电控制装置及方法  Power supply control device and method
技术领域 Technical field
本发明涉及无线接入技术领域, 尤其是一种应用于 3G无线接入终端、 减少待机功耗的供电控制装置及方法。 背景技术  The present invention relates to the field of wireless access technologies, and more particularly to a power supply control device and method for reducing 3G wireless access terminals and reducing standby power consumption. Background technique
随着国际上第三代移动通信技术(3G ) 的发展和普及, 特别是宽带码分 多址 /高速下行分组接入 ( WCDMA/HSDPA, Wideband CDMA/High Speed Downlink Packet Access ) 网络商用化进程的加快、 3G业务的迅猛发展, 运 营商能提供多种类型的高质量多媒体业务, 从而带来终端多样化需求, 包括 无线数据卡、 移动终端以及 3G无线接入终端。  With the development and popularization of the third generation of mobile communication technology (3G) in the world, especially the commercialization process of Wideband CDMA/High Speed Downlink Packet Access (WCDMA/HSDPA) network Accelerating the rapid development of 3G services, operators can provide multiple types of high-quality multimedia services, resulting in diverse terminal needs, including wireless data cards, mobile terminals and 3G wireless access terminals.
其中 3G无线接入终端一般釆用双嵌入式微处理器,可支持与 PC机连接 的 10/100M以太网接口, 支持无线宽带访问节点( WIFI AP, Wireless Fidelity Access Point )功能, 支持 RJ11电话接口基本通话功能, 支持使用 USB端口 的 3G 无线数据卡。 用户可以通过以太网接口或无线局域网絡(WLAN, Wireless Local Area Networks )连接实现 HSDPA高速上网, 或通过 RJ11电 话接口实现基本通话业务。 3G无线接入终端与无线数据卡功能结合, 能够在 WLAN无线局域网絡覆盖范围内实现无线 3G上网。 但是, 在功能多样化的 同时, 也带来了能耗大的问题。  The 3G wireless access terminal generally uses dual embedded microprocessors to support the 10/100M Ethernet interface connected to the PC, and supports the wireless broadband access node (WIFI AP, Wireless Fidelity Access Point) function, and supports the basic RJ11 telephone interface. Call function, support for 3G wireless data card using USB port. Users can connect to HSDPA high-speed Internet via Ethernet interface or Wireless Local Area Networks (WLAN) or basic call service through RJ11 telephone interface. The 3G wireless access terminal combines with the wireless data card function to enable wireless 3G Internet access within the coverage of the WLAN wireless local area network. However, while the functions are diversified, it also brings about a problem of high energy consumption.
欧盟于 2004年 11月发布的 "Code of Conduct on Energy Efficiency of External Power Supplies" 规范中明确指出在无负载情况下, 使外置电源适配 器功耗最小化到 0.3W, 并于 2008年 11月发布的 "Code of Conduct on Energy Consumption of Broadband Equipment"规范中明确定义宽带无线通信类设备的 功耗限制。 这里的宽带无线通信类设备即包含前面所说的 3G无线接入终端。  The "Code of Conduct on Energy Efficiency of External Power Supplies" specification issued by the European Union in November 2004 clearly states that the power consumption of the external power adapter is minimized to 0.3W under no load and was released in November 2008. The "Code of Conduct on Energy Consumption of Broadband Equipment" specification clearly defines the power consumption limits of broadband wireless communication devices. The broadband wireless communication device here includes the aforementioned 3G wireless access terminal.
但是, 目前市场上很多 3G无线接入终端在用户待机的情况下依然维持 ***高速或全速运行, 功耗很大, 而且需要外置电源适配器供电, 用户只能 插拔电源适配器接插头来实现 3G无线接入终端的启动和关断。 如果想使 3G 无线接入终端的 CPU (以下筒称 CPU )恢复出厂设置功能, 就必须按下专为 恢复出厂设置而设置的一个按钮, 而增加一个按钮的同时也带来了成本的增 加和 CPU管脚资源的浪費, 也增加了结构件的复杂度, 不符合欧盟可持续、 有竟争力和能源安全的欧洲战略。 发明内容 However, many 3G wireless access terminals on the market still maintain high-speed or full-speed operation when the user is in standby mode. The power consumption is very large, and the external power adapter is required to supply power. The user can only plug and unplug the power adapter to implement 3G. The wireless access terminal is turned on and off. If you want to make 3G When the CPU of the wireless access terminal (hereinafter referred to as the CPU) is restored to the factory setting function, it is necessary to press a button set for the factory reset, and adding a button also brings about an increase in cost and CPU pin resources. The waste also increases the complexity of the structural components and does not meet the European strategy of sustainability, competitiveness and energy security in the European Union. Summary of the invention
有鉴于此, 本发明的主要目的在于提供一种应用于 3G无线接入终端、 待机状态下实现最小功耗的供电控制装置及方法, 以增强绿色环保性, 从而 增强 3G无线接入终端的市场竟争力。  In view of this, the main object of the present invention is to provide a power supply control device and method for realizing minimum power consumption in a standby state by using a 3G wireless access terminal to enhance green environmental protection, thereby enhancing the market of 3G wireless access terminals. Competing.
为达到上述目的, 本发明的技术方案是这样实现的:  In order to achieve the above object, the technical solution of the present invention is achieved as follows:
一种供电控制装置, 该装置包括:  A power supply control device, the device comprising:
自供电电路, 其设置成与设备二次电源模块保持隔离; 以及  a self-powered circuit that is configured to remain isolated from the secondary power module of the device;
自启动和自关闭控制电路, 其设置成根据 Power按键信号、 并配合 CPU 通用 GPIO管脚, 控制为 CPU供电的设备二次电源模块的开启或关闭, 所述 自启动和自关闭控制电路由所述自供电电路供电。  The self-starting and self-closing control circuit is configured to control the turning on or off of the secondary power module of the device that supplies power to the CPU according to the Power button signal and the CPU common GPIO pin, wherein the self-starting and self-closing control circuit is Said to supply power from the power supply circuit.
所述自供电电路还设置成完成外置电源适配器的一次电源大电压到二次 电源小电压的转换。  The self-powered circuit is further configured to perform a conversion of a primary power supply voltage of the external power adapter to a secondary power supply small voltage.
所述自供电电路为低压差线性稳压器 (LDO, Low Dropout Regulator ) 。 所述自启动和自关闭控制电路, 其包括: Power按键开关和逻辑或门, 其中,  The self-powered circuit is a Low Dropout Regulator (LDO). The self-starting and self-closing control circuit includes: a power button switch and a logic OR gate, wherein
所述 Power按键开关分别与逻辑或门的一个输入端及 CPU的通用输入 GPI08管脚相连;  The Power button switches are respectively connected to one input of the logic OR gate and the universal input GPI08 pin of the CPU;
所述逻辑或门的一个输入端与 Power按键开关相连 , 用来接收 Power按 键信号;  An input of the logic OR gate is connected to the Power button switch for receiving a Power button signal;
所述逻辑或门的另一个输入端与 CPU的通用输出 GPI01管脚相连, 用 来接收 CPU锁电源信号; 以及,  The other input of the logic OR gate is connected to the general-purpose output GPI01 pin of the CPU for receiving the CPU lock power signal;
所述逻辑或门的输出端 C设置成根据逻辑或门的两个输入端输出开关电 源使能信号 ( Enabling Signals ) , 控制为 CPU供电的设备二次电源模块的开 启与关闭。 The output terminal C of the logic OR gate is set to output a switching power according to two input ends of the logic OR gate The source enable signal (Enabling Signals) controls the turning on and off of the secondary power module of the device that supplies power to the CPU.
所述装置还设置成当 Power按键开关的按键持续时间超过设定时间时, 所述 GPI08管脚持续检测到高电平超过设定时间, CPU恢复出广设置状态。  The device is further configured to: when the button duration of the Power button switch exceeds the set time, the GPI08 pin continuously detects that the high level exceeds the set time, and the CPU resumes the wide setting state.
一种供电控制方法, 该方法包括:  A power supply control method, the method comprising:
与设备二次电源模块保持隔离的自供电电路为自启动和自关闭控制电路 供电; 以及,  The self-powered circuit that is isolated from the secondary power module of the device supplies power to the self-starting and self-closing control circuits;
自启动和自关闭控制电路根据 Power按键信号、 并配合 CPU通用 GPIO 管脚, 控制为 CPU供电的设备二次电源模块的开启或关闭。  The self-starting and self-closing control circuit controls the turning on or off of the secondary power module of the device that supplies power to the CPU according to the Power button signal and the CPU general GPIO pin.
所述为自启动和自关闭控制电路供电的步骤包括: 完成外置电源适配器 的一次电源大电压到二次电源小电压的转换, 为自启动和自关闭控制电路提 供所述小电压。  The step of supplying power to the self-starting and self-closing control circuit includes: completing a conversion of the primary power supply large voltage of the external power adapter to the secondary power supply small voltage, and providing the small voltage for the self-starting and self-closing control circuits.
所述根据 Power按键信号、 并配合 CPU通用 GPIO管脚控制为 CPU供 电的设备二次电源模块的开启或关闭的步骤包括:  The steps of turning on or off the secondary power module of the device that supplies power to the CPU according to the Power button signal and the CPU general GPIO pin control include:
Power按键开关按下, 自启动和自关闭控制电路的逻辑或门的一个输入 端收到高电平信号, 则逻辑或门的输出端立即输出高电平的开关电源使能信 号, 开启设备二次电源模块正常工作, CPU的通用输入 GPI08管脚检测到高 电平, CPU上电; 以及,  When the Power button switch is pressed, a high level signal is received from an input terminal of the logic or gate of the self-starting and self-closing control circuit, and the output of the logic OR gate immediately outputs a high level switching power supply enable signal, and the device 2 is turned on. The secondary power module works normally, the CPU's general-purpose input GPI08 pin detects a high level, and the CPU is powered on;
Power按键开关再次按下, 逻辑或门的所述一个输入端由低电平信号变 为高电平信号, 且所述 GPI08管脚置为高电平, 当按键持续时间在设定时间 内, Power按键开关松开后, 逻辑或门的输出端立即输出低电平的开关电源 使能信号, 关闭设备二次电源模块正常工作, CPU掉电。  The Power button switch is pressed again, the one input of the logic OR gate is changed from a low level signal to a high level signal, and the GPI08 pin is set to a high level, when the button duration is within a set time, After the Power button switch is released, the output of the logic OR gate immediately outputs a low-level switching power supply enable signal, and the secondary power supply module of the device is turned off normally, and the CPU is powered down.
所述 CPU上电之后、 Power按键开关再次按下之前,其还包括以下步骤: 与所述逻辑或门的另一输入端相连的 CPU的通用输出 GPI01 管脚置为 高电平, Power按键开关松开后, 逻辑或门的输出端立即输出高电平的开关 电源使能信号, 设备二次电源模块继续为 CPU供电。  After the CPU is powered on, before the Power button switch is pressed again, it further includes the following steps: The general-purpose output GPI01 pin of the CPU connected to the other input end of the logic OR gate is set to a high level, and the power button switch After being released, the output of the logic OR gate immediately outputs a high-level switching power supply enable signal, and the secondary power supply module of the device continues to supply power to the CPU.
所述按键持续时间超过设定时间时, 该方法进一步包括: 所述 GPI08管 脚持续检测到高电平超过设定时间, CPU恢复出厂设置状态。 本发明提供了一种应用于 3G无线接入终端、 用于减少待机功耗的供电 控制装置及方法, 其优点在于: 只运用一个 Power按键开关, 可以使 3G无 线接入终端实现自启动、 自关断和恢复出厂设置三种功能模式; 并且供电控 制装置元件少, 消耗电流极小, 可以保证功耗小于 0.3W, 增强了 3G无线接 入终端的绿色环保性和市场竟争力。 附图概述 When the duration of the button exceeds the set time, the method further includes: the GPI08 pin continuously detects that the high level exceeds the set time, and the CPU restores the factory setting state. The invention provides a power supply control device and method for reducing standby power consumption, which is applied to a 3G wireless access terminal, and has the advantages that: only one Power button switch can be used to enable the 3G wireless access terminal to self-start and self-start Three function modes of shutting down and restoring the factory settings; and the power supply control device has few components and consumes very little current, which can ensure the power consumption is less than 0.3W, which enhances the green environmental protection and market competitiveness of the 3G wireless access terminal. BRIEF abstract
图 1为本发明中供电控制装置组成示意图;  1 is a schematic view showing the composition of a power supply control device according to the present invention;
图 2为本发明中自供电电路组成示意图;  2 is a schematic diagram of the composition of a self-powered circuit in the present invention;
图 3为本发明中自供电电路设计原理图;  3 is a schematic diagram of a self-powered circuit design according to the present invention;
图 4为本发明中自启动和自关闭控制电路组成示意图; 以及  4 is a schematic diagram showing the composition of a self-starting and self-closing control circuit in the present invention;
图 5为本发明中自启动和自关闭控制电路设计原理图。 本发明的较佳实施方式  FIG. 5 is a schematic diagram of the design of the self-starting and self-closing control circuit in the present invention. Preferred embodiment of the invention
本发明提供了一种 3G无线接入终端中, 用以减少待机功耗的供电控制 装置,该装置包括: 自供电电路以及自启动和自关闭控制电路,如图 1所示。该 供电控制装置直接与外置电源适配器连接, 在外置电源适配器接入市电后, 该供电控制装置即可正常工作, 其中自供电电路与设备二次电源模块保持隔 离, 且仅为自启动和自关闭控制电路供电。  The present invention provides a power supply control device for reducing standby power consumption in a 3G wireless access terminal, the device comprising: a self-power supply circuit and a self-starting and self-closing control circuit, as shown in FIG. The power supply control device is directly connected to the external power adapter. After the external power adapter is connected to the mains, the power supply control device can work normally, wherein the self-power supply circuit is isolated from the secondary power supply module of the device, and is only self-starting and Power is supplied from the shutdown control circuit.
如图 1所示, 供电控制装置由自供电电路以及自启动和自关闭控制电路 组成, 其中, 自供电电路与设备二次电源模块保持隔离, 用于为自启动和自 关闭控制电路供电, 即仅为自启动和自关闭控制电路的逻辑或门供电, 所以 电路消耗电流小, 功耗极小, 可以保证功耗小于 0.3W; 自启动和自关闭控制 电路的输出由 Power按键信号、 CPU采样信号和 CPU锁电源信号控制, 并将 该输出作为开关电源使能信号控制设备二次电源模块的开启或关闭。  As shown in FIG. 1, the power supply control device is composed of a self-power supply circuit and a self-starting and self-closing control circuit, wherein the self-power supply circuit is isolated from the secondary power supply module of the device, and is used for powering the self-starting and self-closing control circuits, that is, It only supplies power to the logic or gate of the self-starting and self-closing control circuit, so the circuit consumes less current and consumes less power, which can guarantee the power consumption is less than 0.3W. The output of the self-starting and self-closing control circuit is sampled by the Power button signal and CPU. The signal and CPU lock power signal control, and the output is used as a switching power supply enable signal to control the secondary power module of the device to be turned on or off.
如图 2所示, 自供电电路通过一个低压差线性稳压器( LDO, Low Dropout Regulator ) 来实现, LDO主要完成一次电源到二次电源的转换。 自供电电路 设计原理图如图 3所示, 低压差线性稳压器 LDO由一个芯片实现, 将外置电 源适配器***市电 220V后输出的 12V的 VDD作为 LDO的输入。在 LDO内 部, 通过使晶体管工作在线性放大区来实现电压转换, 将电源适配器输出的 大电压 12V的 VDD— 12转化为二次电源的小电压 3.6V的 VDD_SW, 该小电 压只为自启动和自关闭控制电路的逻辑或门供电。 因自供电电路只有一个芯 片工作, 所以该电路功耗十分小, 可以保证功耗小于 0.3W。 As shown in Figure 2, the self-powered circuit is implemented by a low dropout regulator (LDO, Low Dropout Regulator), which performs the primary to secondary power conversion. The schematic diagram of the self-powered circuit design is shown in Figure 3. The low-dropout linear regulator LDO is implemented by one chip and will be externally powered. The source adapter is inserted into the 12V VDD output after the mains 220V is used as the input of the LDO. Inside the LDO, the voltage conversion is realized by operating the transistor in the linear amplification region, and the VDD-12 of the large voltage 12V output from the power adapter is converted into the VDD_SW of the secondary power supply with a small voltage of 3.6V, which is only self-starting and The logic or gate of the self-closing control circuit is powered. Since the self-powered circuit has only one chip to work, the power consumption of the circuit is very small, and the power consumption can be guaranteed to be less than 0.3W.
如图 4所示, 自启动和自关闭控制电路主要由一个 Power按键开关和一 个逻辑或门组成 , 通过逻辑或门配合 CPU通用 GPIO管脚来控制设备二次电 源模块的开启与关闭, 从而控制 CPU的上下电。 逻辑或门由自供电电路输出 端提供的 3.6V的 VDD— SW来供电。 自启动和自关闭控制电路电路设计原理 图如图 5所示, 逻辑或门的输入端 A和 CPU的通用输入 GPI08管脚均连接 Power按键开关, 用来接收 Power按键信号, 且逻辑或门的输入端 A与地相 连, 默认置低电平; 逻辑或门的输入端 B连接 CPU的通用输出 GPI01管脚, 用来接收 CPU锁电源信号;逻辑或门的输出端 C用来根据逻辑或门的两个输 入端输出开关电源使能信号, 其高低电平可控制设备二次电源模块的开启与 关闭, 从而控制 CPU的上下电。  As shown in Figure 4, the self-starting and self-closing control circuit is mainly composed of a Power button switch and a logic OR gate. The logic or gate cooperates with the CPU general GPIO pin to control the opening and closing of the secondary power module of the device, thereby controlling Power on and off the CPU. The OR gate is powered by a 3.6V VDD-SW from the output of the self-powered circuit. The schematic diagram of the self-starting and self-closing control circuit design is shown in Figure 5. The input terminal A of the logic OR gate and the universal input GPI08 pin of the CPU are connected to the Power button switch for receiving the Power button signal, and the logic or gate Input A is connected to ground, and is set low by default; the input terminal B of the logic OR gate is connected to the general-purpose output GPI01 pin of the CPU to receive the CPU lock power signal; the output terminal C of the logic OR gate is used according to the logic OR gate The two input terminals output a switching power supply enable signal, and the high and low levels can control the turning on and off of the secondary power module of the device, thereby controlling the CPU to power on and off.
外置电源适配器通入市电后, 自供电电路即正常工作。 用户手动按下 Power按键开关 , 在短暂的几十毫秒时间内 , 逻辑或门的输入端 A收到一个 高电平信号 VDD— SW, 则逻辑或门的输出端 C 立即输出一个高电平信号 SWITCH_OUT, 从而逻辑或门的输出端 C 输出的开关电源使能信号置高电 平, 开启设备二次电源模块, CPU的通用输入 GPI08管脚检测到高电平, 从 而 CPU釆样信号为高电平状态, 促使 CPU上电。 CPU上电后, 在初始化配 置的短时间内即将通用输出 GPI01管脚置默认高电平状态, 将高电平信号传 递给直连的逻辑或门的输入端 B ,使输入逻辑或门的输入端 B的 CPU锁电源 信号为高电平, 从而锁住逻辑或门的输出端 C, 使其保持高电平。 短暂的几 十毫秒时间后, 手动松开 Power按键开关, 即使逻辑或门的输入端 A恢复为 默认的低电平状态也不会影响逻辑或门的输出端 C的高电平状态, 进而锁住 开关电源使能信号为高电平,保证了设备二次电源模块的持续正常工作, CPU 得以持续正常上电, 3G无线接入终端完成 "自启动" 过程。  After the external power adapter is connected to the mains, the self-powered circuit works normally. When the user manually presses the Power button switch, the logic OR gate input terminal A receives a high level signal VDD_SW for a short period of several tens of milliseconds, and the logic OR gate output terminal C immediately outputs a high level signal. SWITCH_OUT, so that the switching power supply enable signal output from the output terminal C of the logic OR gate is set to a high level, and the secondary power supply module of the device is turned on, and the general-purpose input GPI08 pin of the CPU detects a high level, so that the CPU sample signal is high. The flat state causes the CPU to power up. After the CPU is powered on, the general-purpose output GPI01 pin is set to the default high state in the short time of initial configuration, and the high-level signal is transmitted to the input terminal B of the directly connected logic OR gate, so that the input logic or gate input is made. The CPU lock power signal of terminal B is high, thereby locking the output terminal C of the logic OR gate to keep it high. After a short tens of milliseconds, manually release the Power button switch, even if the logic A gate input A returns to the default low state, it will not affect the high state of the logic gate output C, and thus lock The switching power supply enable signal is at a high level, which ensures the continuous normal operation of the secondary power module of the device, and the CPU can continue to be powered up normally, and the 3G wireless access terminal completes the "self-starting" process.
CPU正常上电后, 3G无线接入终端工作于待机 Standby state模式时, 当 用户再次手动按下 Power按键开关, 逻辑或门的输入端 A将再次由低电平信 号变为高电平信号 VDD— SW, 因逻辑或门的输入端 A与 CPU 的通用输入 GPI08管脚相连, 则 GPI08也置为高电平 VDD_SW, CPU通过 GPI08管脚 采集到该信号的状态变化后, 由中断程序启动一个计数器, 计数时间可以 10 秒为分界值, 当按键持续时间不足 10秒时, CPU进行***注销动作后, 置 CPU的通用输出 GPI01管脚为低电平,并将该低电平信号传递给直连的逻辑 或门的输入端 B; 手动^^开 Power按键开关后 , 逻辑或门的输入端 A重新恢 复为默认的低电平状态 , 此时逻辑或门的两个输入端 A和 B都为低电平, 则 逻辑或门的输出端 C输出低电平, 从而开关电源使能信号为低电平, 关闭设 备二次电源模块, CPU下电, 3G无线接入终端完成 "自关断" 过程。 此时仅 有自供电电路在工作, 消耗电流极小, 功耗极小, 可以保证功耗小于 0.3W。 After the CPU is powered on normally, when the 3G wireless access terminal works in the standby Standby state mode, When the user manually presses the Power button again, the input terminal A of the logic OR gate will change from the low level signal to the high level signal VDD_SW again, because the input terminal A of the logic OR gate is connected to the general input GPI08 pin of the CPU. , GPI08 is also set to a high level VDD_SW, after the CPU collects the state change of the signal through the GPI08 pin, a counter is started by the interrupt program, and the counting time can be a demarcation value of 10 seconds. When the button duration is less than 10 seconds, After the CPU performs the system logout operation, the general-purpose output GPI01 pin of the CPU is set to a low level, and the low-level signal is transmitted to the input terminal B of the directly connected logic OR gate; after manually opening the Power button switch, the logic The input terminal A of the OR gate is restored to the default low state. At this time, the two inputs A and B of the logic OR gate are both low, then the output terminal C of the logic OR gate outputs a low level, thereby switching The power enable signal is low, the secondary power module of the device is turned off, the CPU is powered off, and the 3G wireless access terminal completes the "self-shutdown" process. At this time, only the self-powered circuit is working, the current consumption is extremely small, and the power consumption is extremely small, and the power consumption can be guaranteed to be less than 0.3W.
在 3G无线接入终端正常工作情况下, 如果***设置有误, 需要 CPU恢 复出厂设置状态,此时用户可通过长时间地手动按下 Power按键开关来实现。 按键持续时间超过 10 秒时, 即逻辑或门的输入端 A的高电平持续时间超过 10秒, 计数器计数 10秒以后, CPU的通用输入 GPI08管脚持续检测到高电 平超过 10秒, CPU恢复出厂设置状态, 实现 "一键三用" 功能。  In the normal operation of the 3G wireless access terminal, if the system is set incorrectly, the CPU needs to be restored to the factory setting state. At this time, the user can manually press the Power button switch for a long time. When the button duration exceeds 10 seconds, that is, the high level of the input terminal A of the logic OR gate lasts for more than 10 seconds. After the counter counts for 10 seconds, the CPU's general-purpose input GPI08 pin continuously detects the high level for more than 10 seconds. Restore the factory settings to achieve the "one button and three use" function.
本发明还提供了一种用以减少待机功耗的供电控制方法, 该方法的基本 思想是:外置电源适配器通入市电后,供电控制装置即可工作,手动按下 Power 按键, 开启设备二次电源模块, CPU上电, 3G无线接入终端自启动; 当 3G 无线接入终端工作于待机 Standby state模式时, 再次手动按下 Power按键, 关闭设备二次电源模块, CPU下电, 3G无线接入终端自关断, 此时仅有自供 电电路在工作, 可以保证功耗小于 0.3W; 在 3G无线接入终端正常工作情况 下, 如果***设置有误, 用户还可以通过长按同一 Power按键达 10秒以上, 使 CPU恢复出厂设置状态, 完成 "一键三用" 功能。  The invention also provides a power supply control method for reducing standby power consumption. The basic idea of the method is that after the external power adapter is connected to the mains, the power supply control device can work, and the power button is manually pressed to open the device 2 Secondary power module, CPU power on, 3G wireless access terminal self-start; When the 3G wireless access terminal works in standby Standby state mode, manually press the Power button again, turn off the secondary power module of the device, power off the CPU, 3G wireless The access terminal is self-shutdown. At this time, only the self-power supply circuit is working, and the power consumption can be guaranteed to be less than 0.3W. In the normal operation of the 3G wireless access terminal, if the system is set incorrectly, the user can also press the same Power. Press the button for more than 10 seconds to reset the CPU to the factory settings and complete the "one button and three use" function.
基于上述装置, 本发明所述的方法其具体实现步骤如下:  Based on the above device, the specific implementation steps of the method of the present invention are as follows:
(一) "自启动" 功能的实现:  (1) Implementation of the "self-starting" function:
步骤 1: 手动按下 Power按键开关, 逻辑或门的输入端 A收到一个高电 平信号 VDD_SW , 则逻辑或门的输出端 C 立即输出一个高电平信号 SWITCH_OUT, 从而开关电源使能信号置高电平, 促使设备二次电源模块正 常工作, CPU的通用输入 GPI08管脚检测到高电平, 从而 CPU采样信号为 高电平状态, 促使 CPU上电; Step 1: Manually press the Power button switch. When the input terminal A of the logic OR gate receives a high level signal VDD_SW, the output terminal C of the logic OR gate immediately outputs a high level signal SWITCH_OUT, so that the switching power supply enable signal is set. High level, causing the device secondary power module to be positive Normally, the CPU's general-purpose input GPI08 pin detects a high level, so that the CPU sampling signal is in a high state, causing the CPU to power up;
步骤 2: CPU上电后, 在初始化配置的短时间内即将通用输出 GPI01管 脚置默认高电平状态, 并将该高电平信号传递给直连的逻辑或门的输入端 B, 从而锁住逻辑或门的输出端 C为高电平;  Step 2: After the CPU is powered on, the general-purpose output GPI01 pin is set to the default high state in the short time of the initial configuration, and the high-level signal is transmitted to the input terminal B of the directly connected logic OR gate, thereby locking The output C of the logic or gate is high;
步骤 3: 手动松开 Power按键开关, 逻辑或门的输入端 A恢复为默认的 低电平状态, 因逻辑或门的输入端 B置高电平, 所以锁住逻辑或门的输出端 C 仍为高电平状态, 进而锁住开关电源使能信号为高电平, 保证了设备二次 电源模块的持续正常工作, CPU得以持续正常上电, 3G无线接入终端完成"自 启动" 过程。  Step 3: Manually release the Power button switch, the logic A gate input A returns to the default low state, because the logic or gate input B is set high, so the logic or gate output C is still locked. The high level state, and thus the switching power supply enable signal is high, ensuring the continuous normal operation of the secondary power module of the device, the CPU can continue to be powered up normally, and the 3G wireless access terminal completes the "self-starting" process.
(二) "自关断" 功能的实现:  (2) The realization of the "self-shutdown" function:
步骤 4: CPU正常工作后, 3G无线接入终端工作于待机 Standby state模 式时, 用户再次手动按下 Power按键开关, 逻辑或门的输入端 A将再次由低 电平信号变为高电平信号 VDD_SW, 与 A端直连的 GPI08管脚也置为高电 平 VDD— SW;  Step 4: After the CPU works normally, when the 3G wireless access terminal works in the standby Standby state mode, the user manually presses the Power button again, and the input terminal A of the logic OR gate will change from the low level signal to the high level signal again. VDD_SW, the GPI08 pin directly connected to the A terminal is also set to a high level VDD_SW;
步骤 5: CPU通过 GPI08 管脚采集到该信号的状态变化后, 确定当前 Power按键按下, 由中断程序启动一个计数器, 并判断按键持续时间是否大 于 10秒, 按键持续时间不足 10秒钟时, CPU进行***注销动作后, 置 CPU 的通用输出 GPI01 管脚为低电平, 则与 GPI01 直连的逻辑或门的输入端 B 也置为低电平;  Step 5: After the CPU collects the status change of the signal through the GPI08 pin, it determines that the current Power button is pressed, and a counter is started by the interrupt program, and it is determined whether the button duration is greater than 10 seconds, and the button duration is less than 10 seconds. After the CPU performs the system logout operation, the general-purpose output GPI01 pin of the CPU is set to a low level, and the input terminal B of the logic or gate directly connected to GPI01 is also set to a low level;
步骤 6: 手动松开 Power按键开关后, 逻辑或门的输入端 A重新恢复为 默认的低电平状态, 此时逻辑或门的两个输入端 A和 B都为低电平, 则逻辑 或门的输出端 C输出低电平, 从而开关电源使能信号为低电平, 设备二次电 源模块关闭, CPU下电, 3G无线接入终端完成 "自关断" 过程。  Step 6: After manually releasing the Power button switch, the input terminal A of the logic OR gate is restored to the default low state. At this time, the two inputs A and B of the logic OR gate are both low, then the logical OR The output terminal C of the gate outputs a low level, so that the switching power supply enable signal is low, the secondary power supply module of the device is turned off, the CPU is powered off, and the 3G wireless access terminal completes the "self-shutdown" process.
3G无线接入终端自关断以后, 仅有自供电电路在工作, 消耗电流极小, 功耗极小, 可以保证功耗小于 0.3W。  After the 3G wireless access terminal is turned off, only the self-powered circuit is working, the current consumption is extremely small, and the power consumption is extremely small, and the power consumption can be guaranteed to be less than 0.3W.
(三) "恢复出厂设置" 功能的实现:  (3) Implementation of the "Restore Factory Settings" function:
步骤 7: 在 3G无线接入终端正常工作情况下, 如果***设置有误, 需要 CPU恢复出厂设置状态, 用户可持续手动按下 Power按键开关超过 10秒, 即持续输入逻辑或门的输入端 A的高电平超过 10秒,计数器计数 10秒以后, CPU的通用输入 GPI08管脚持续检测到高电平超过 10秒, CPU恢复出厂设 置状态, 实现 "一键三用" 功能。 Step 7: In the normal operation of the 3G wireless access terminal, if the system settings are incorrect, you need The CPU is restored to the factory setting state. The user can manually press the Power button for more than 10 seconds, that is, the input level of the input logic A of the logic or gate is continuously high for more than 10 seconds. After the counter counts for 10 seconds, the CPU inputs the GPI08 pin. The high level is continuously detected for more than 10 seconds, and the CPU is restored to the factory setting state to realize the "one button and three use" function.
以上所述 3G无线接入终端可以是 3G路由器。 以上仅是以 3G无线接入 终端为例, 描述本发明的具体实现。 实际应用中, 本发明方案适用于任何具 有 CPU的宽带无线通信类设备。  The above 3G wireless access terminal may be a 3G router. The above is only a 3G wireless access terminal as an example to describe the specific implementation of the present invention. In practical applications, the solution of the present invention is applicable to any broadband wireless communication device having a CPU.
以上所述, 仅为本发明的较佳实施例而已, 并非用于限定本发明的保护 范围, 凡在本发明的精神和原则之内所作的任何修改、 等同替换和改进等, 均应包含在本发明的保护范围之内。  The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included. Within the scope of protection of the present invention.
工业实用性 Industrial applicability
本发明提供了一种应用于 3G无线接入终端、 用于减少待机功耗的供电 控制装置及方法, 其优点在于: 只运用一个 Power按键开关, 可以使 3G无 线接入终端实现自启动、 自关断和恢复出广设置三种功能模式; 并且供电控 制装置元件少, 消耗电流小, 可以保证功耗小于 0.3W, 增强了 3G无线接入 终端的绿色环保性和市场竟争力。  The invention provides a power supply control device and method for reducing standby power consumption, which is applied to a 3G wireless access terminal, and has the advantages that: only one Power button switch can be used to enable the 3G wireless access terminal to self-start and self-start Turn off and restore the three function modes of the wide setting; and the power supply control device has fewer components and consumes less current, which can ensure the power consumption is less than 0.3W, which enhances the green environmental protection and market competitiveness of the 3G wireless access terminal.

Claims

权 利 要 求 书 Claim
1、 一种供电控制装置, 所述装置包括:  1. A power supply control device, the device comprising:
自供电电路, 其设置成与设备二次电源模块保持隔离; 以及  a self-powered circuit that is configured to remain isolated from the secondary power module of the device;
自启动和自关闭控制电路, 其设置成根据 Power按键信号、 并配合 CPU 通用 GPIO管脚, 控制为 CPU供电的所述设备二次电源模块的开启或关闭, 所述自启动和自关闭控制电路由所述自供电电路供电。  The self-starting and self-closing control circuit is configured to control the turning on or off of the secondary power module of the device that supplies power to the CPU according to the Power button signal and in conjunction with the CPU general GPIO pin, the self-starting and self-closing control circuit Powered by the self-powered circuit.
2、 根据权利要求 1所述的装置, 其中, 所述自供电电路还设置成完成外 置电源适配器的一次电源大电压到二次电源小电压的转换。  2. The apparatus according to claim 1, wherein the self-power supply circuit is further configured to perform conversion of a primary power supply large voltage of the external power adapter to a secondary power supply small voltage.
3、 根据权利要求 1或 2所述的装置, 其中, 所述自供电电路为低压差线 性稳压器。  3. Apparatus according to claim 1 or 2, wherein said self-powered circuit is a low dropout linear regulator.
4、 根据权利要求 1或 2所述的装置, 其中, 所述自启动和自关闭控制电 路包括: Power按键开关和逻辑或门, 其中,  The device according to claim 1 or 2, wherein the self-starting and self-closing control circuit comprises: a power button switch and a logic OR gate, wherein
所述 Power按键开关分别与所述逻辑或门的一个输入端及 CPU的通用输 入 GPI08管脚相连;  The Power button switches are respectively connected to an input of the logic OR gate and a general-purpose input GPI08 pin of the CPU;
所述逻辑或门的一个输入端与所述 Power按键开关相连,用来接收 Power 按键信号;  An input of the logic OR gate is connected to the Power button switch for receiving a Power button signal;
所述逻辑或门的另一个输入端与所述 CPU的通用输出 GPI01管脚相连, 用来接收 CPU锁电源信号; 以及,  The other input of the logic OR gate is connected to the general-purpose output GPI01 pin of the CPU for receiving a CPU lock power signal;
所述逻辑或门的输出端 C设置成根据所述逻辑或门的两个输入端输出开 关电源使能信号,控制为所述 CPU供电的所述设备二次电源模块的开启与关 闭。  The output terminal C of the logic OR gate is arranged to output a switching power supply enable signal according to the two input terminals of the logic OR gate to control the opening and closing of the secondary power supply module of the device that supplies power to the CPU.
5、 根据权利要求 4所述的装置, 其中, 所述装置还设置成当所述 Power 按键开关的按键持续时间超过设定时间时, 所述 GPI08管脚持续检测到高电 平超过所述设定时间, 所述 CPU恢复出厂设置状态。  The device according to claim 4, wherein the device is further configured to continuously detect that the GPI08 pin exceeds the setting when the button duration of the Power button switch exceeds a set time At a fixed time, the CPU is restored to the factory setting state.
6、 一种供电控制方法, 所述方法包括:  6. A power supply control method, the method comprising:
与设备二次电源模块保持隔离的自供电电路为自启动和自关闭控制电路 供电; 以及, 所述自启动和自关闭控制电路根据 Power按键信号、 并配合 CPU通用 GPIO管脚, 控制为 CPU供电的所述设备二次电源模块的开启或关闭。 The self-powered circuit that is isolated from the secondary power module of the device supplies power to the self-starting and self-closing control circuits; The self-starting and self-closing control circuit controls the turning on or off of the secondary power module of the device that supplies power to the CPU according to the Power button signal and the CPU general GPIO pin.
7、 根据权利要求 6所述的方法, 其中, 所述为自启动和自关闭控制电路 供电的步骤包括: 完成外置电源适配器的一次电源大电压到二次电源小电压 的转换, 为所述自启动和自关闭控制电路提供所述小电压。  7. The method according to claim 6, wherein the step of supplying power to the self-starting and self-closing control circuit comprises: completing conversion of a primary power supply large voltage of the external power adapter to a secondary power supply small voltage, The small voltage is provided by a self-starting and self-closing control circuit.
8、 根据权利要求 6或 7所述的方法, 其中, 所述根据 Power按键信号、 并配合 CPU通用 GPIO管脚控制为所述 CPU供电的设备二次电源模块的开启 或关闭的步骤包括:  8. The method according to claim 6 or 7, wherein the step of turning on or off the secondary power module of the device that supplies power to the CPU according to the Power button signal and the CPU general GPIO pin control comprises:
Power按键开关按下, 所述自启动和自关闭控制电路的逻辑或门的一个 输入端收到高电平信号, 则所述逻辑或门的输出端立即输出高电平的开关电 源使能信号, 开启所述设备二次电源模块正常工作 , CPU的通用输入 GPI08 管脚检测到高电平, 所述 CPU上电; 以及,  When the power button switch is pressed, an input of the logic OR gate of the self-starting and self-closing control circuit receives a high level signal, and the output of the logic OR gate immediately outputs a high level switching power supply enable signal. Turning on the normal operation of the secondary power module of the device, the CPU's universal input GPI08 pin detects a high level, and the CPU is powered on;
所述 Power按键开关再次按下, 所述逻辑或门的所述一个输入端由低电 平信号变为高电平信号, 且所述 GPI08管脚置为高电平, 当按键持续时间在 设定时间内时, 所述 Power按键开关松开后, 所述逻辑或门的输出端立即输 出低电平的开关电源使能信号, 关闭所述设备二次电源模块的正常工作, 所 述 CPU掉电。  The power button switch is pressed again, the one input end of the logic OR gate is changed from a low level signal to a high level signal, and the GPI08 pin is set to a high level, when the button duration is set After the Power button switch is released, the output of the logic OR gate immediately outputs a low-level switching power supply enable signal to turn off the normal operation of the secondary power module of the device, and the CPU is off. Electricity.
9、 根据权利要求 8所述的方法, 其中, 所述 CPU上电之后、 所述 Power 按键开关再次按下之前, 还包括以下步骤:  9. The method according to claim 8, wherein after the CPU is powered on, before the power button switch is pressed again, the method further includes the following steps:
与所述逻辑或门的另一输入端相连的 CPU的通用输出 GPI01 管脚置为 高电平, 所述 Power按键开关松开后, 所述逻辑或门的输出端立即输出高电 平的开关电源使能信号, 所述设备二次电源模块继续为所述 CPU供电。  The general-purpose output GPI01 pin of the CPU connected to the other input end of the logic or gate is set to a high level, and after the power button switch is released, the output of the logic OR gate immediately outputs a high-level switch A power enable signal, the device secondary power module continues to supply power to the CPU.
10、 根据权利要求 8所述的方法, 其中, 所述 Power按键持续时间超过 设定时间时, 所述方法进一步包括: 所述 GPI08管脚持续检测到高电平超过 所述设定时间, 所述 CPU恢复出厂设置状态。  The method according to claim 8, wherein, when the power button duration exceeds a set time, the method further includes: the GPI08 pin continuously detecting that the high level exceeds the set time, The CPU is restored to the factory settings.
PCT/CN2009/073319 2009-07-13 2009-08-18 Device and method for power supplying control WO2011006310A1 (en)

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