WO2011003341A1 - 一种降低手机射频功耗的电路及方法 - Google Patents

一种降低手机射频功耗的电路及方法 Download PDF

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Publication number
WO2011003341A1
WO2011003341A1 PCT/CN2010/074985 CN2010074985W WO2011003341A1 WO 2011003341 A1 WO2011003341 A1 WO 2011003341A1 CN 2010074985 W CN2010074985 W CN 2010074985W WO 2011003341 A1 WO2011003341 A1 WO 2011003341A1
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Prior art keywords
radio frequency
power amplifier
output
processing chip
baseband processing
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PCT/CN2010/074985
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English (en)
French (fr)
Inventor
陈寿炎
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中兴通讯股份有限公司
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Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Priority to US13/380,867 priority Critical patent/US8548414B2/en
Priority to EP20100796718 priority patent/EP2439987A4/en
Publication of WO2011003341A1 publication Critical patent/WO2011003341A1/zh

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0244—Stepped control
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3036—Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers
    • H03G3/3042—Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers in modulators, frequency-changers, transmitters or power amplifiers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0251—Power saving arrangements in terminal devices using monitoring of local events, e.g. events related to user activity
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0261—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/15—Indexing scheme relating to amplifiers the supply or bias voltage or current at the drain side of a FET being continuously controlled by a controlling signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/18—Indexing scheme relating to amplifiers the bias of the gate of a FET being controlled by a control signal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • the present invention relates to mobile communication technologies, and in particular, to a circuit and method for reducing radio frequency power consumption of a mobile phone. Background technique
  • CDMA Code Division Multiple Access
  • WCDMA Wideband Code Division Multiple Access
  • ACPR electrically regulated radio frequency
  • Figure 1 shows the CDMA/WCDMA system.
  • the RF power amplifier requires two supply voltages V ref and V ⁇ , where V ref provides a bias for the base of the power amplifier, 1 ⁇ 4.
  • the main object of the present invention is to provide a circuit and method for reducing radio frequency power consumption of a mobile phone, which can save battery energy and alleviate the problem of heat generation of the mobile phone.
  • a circuit for reducing radio frequency power consumption of a mobile phone comprising: a baseband processing chip, a driver amplifier, and an RF power amplifier, wherein
  • the baseband processing chip is configured to output a base reference voltage to a driving amplifier according to a radio frequency output power of the radio frequency power amplifier;
  • the driving amplifier is configured to configure a gain of a base reference voltage outputted by the baseband processing chip, and output the signal to a base of the RF power amplifier;
  • the RF power amplifier is configured to amplify and output the RF input.
  • a circuit for reducing radio frequency power consumption of a mobile phone comprising: a battery, a baseband processing chip, a DC-DC module, and a radio frequency power amplifier, wherein
  • the battery is configured to supply power to the DC-DC module
  • the baseband processing chip is configured to output a collector voltage size control signal to the DC-DC module according to the radio frequency output power of the radio frequency power amplifier;
  • the DC-DC module is configured to perform a DC-DC step-down conversion according to a collector voltage control signal from a baseband processing chip, and output the same to a collector of the RF power amplifier;
  • the RF power amplifier is configured to amplify and output the RF input.
  • the baseband processing chip is further configured to output a high power control signal to the DC-DC module; the DC-DC module is further configured to directly output the voltage provided by the battery to the collector of the RF power amplifier according to the high power control signal .
  • a circuit for reducing radio frequency power consumption of a mobile phone comprising: a baseband processing chip, a driver amplifier, a battery, a DC-DC module, and a radio frequency power amplifier, wherein
  • the baseband processing chip is configured to drive according to a radio frequency output power of a radio frequency power amplifier Amplifier output base reference voltage, and according to the RF output power of the RF power amplifier
  • the DC-DC module outputs a collector voltage size control signal
  • the driving amplifier is configured to configure a gain of a base reference voltage outputted by the baseband processing chip, and output the signal to a base of the RF power amplifier;
  • the battery is configured to supply power to the DC-DC module
  • the DC-DC module is configured to perform a DC-DC step-down conversion on the battery voltage according to a collector voltage control signal from the baseband processing chip, and output the current to the collector of the RF power amplifier;
  • the RF power amplifier is configured to amplify and output the RF input.
  • the baseband processing chip is further configured to output a high power control signal to the DC-DC module; the DC-DC module is further configured to directly output the voltage provided by the battery to the collector of the RF power amplifier according to the high power control signal .
  • a method for reducing radio frequency power consumption of a mobile phone comprising: a baseband processing chip adjusting a base bias voltage and/or a collector bias voltage of the radio frequency power amplifier according to an RF output power of the radio frequency power amplifier.
  • the baseband processing chip adjusts the base bias voltage of the RF power amplifier according to the RF output power of the RF power amplifier:
  • the baseband processing chip outputs a base reference voltage to the driver amplifier according to the RF output power of the RF power amplifier;
  • the driver amplifier configures the gain of the base reference voltage output from the baseband processing chip and outputs it to the base of the RF power amplifier.
  • the baseband processing chip adjusts the collector bias voltage of the RF power amplifier according to the RF output power of the RF power amplifier:
  • the baseband processing chip outputs a collector voltage size control signal to the DC-DC module according to the RF output power of the RF power amplifier;
  • the DC-DC module outputs a DC-DC step-down conversion of the battery voltage based on the collector voltage control signal from the baseband processing chip, and outputs it to the collector of the RF power amplifier.
  • the method further includes: the baseband processing chip performs high power control on the RF power amplifier, specifically:
  • the baseband processing chip When the battery voltage is lower than the high power control threshold, the baseband processing chip outputs a high power control signal to the DC-DC module;
  • the DC-DC module directly outputs the voltage provided by the battery to the collector of the RF power amplifier according to the high power control signal.
  • the invention reduces the circuit and method for the radio frequency power consumption of the mobile phone, and adjusts the base bias voltage and/or the collector bias voltage of the radio frequency power amplifier of the mobile phone in real time according to the radio frequency output power of the radio frequency power amplifier, thereby reducing the power consumption of the radio frequency power amplifier. Since the present invention ensures the normal communication between the mobile phone and the base station and the linearity index and ACPR of the radio frequency power amplifier meet the specification requirements, the radio frequency of the radio frequency power amplifier is reduced by appropriately lowering the base bias voltage and/or the collector bias voltage. The output power can improve the efficiency of the RF power amplifier, save battery energy, and alleviate the problem of mobile phone heating. DRAWINGS
  • Figure 1 is a schematic diagram of a typical RF power amplifier for a mobile phone in a CDMA/WCDMA system
  • FIG. 2 is a schematic structural diagram of a circuit for reducing radio frequency power consumption of a mobile phone according to the present invention
  • FIG. 3 is a schematic structural diagram of another circuit for reducing radio frequency power consumption of a mobile phone according to the present invention.
  • FIG. 4 is a schematic structural diagram of a circuit for reducing radio frequency power consumption of a mobile phone according to another embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a processing flow corresponding to the circuit for reducing radio frequency power consumption of the mobile phone shown in FIG. 2.
  • FIG. 6 is a schematic diagram of a processing flow corresponding to the circuit for reducing radio frequency power consumption of the mobile phone shown in FIG. detailed description
  • the basic idea of the invention is to: adjust the base bias voltage and/or the collector bias voltage of the RF power amplifier of the mobile phone in real time according to the RF output power of the RF power amplifier to reduce the power consumption of the RF power amplifier.
  • the RF output power of the RF power amplifier is not always kept at a maximum.
  • each handset needs to control its RF output power so that the base station can The phone remains the same effective connection
  • the average RF output power of the CDMA/WCDMA handset in the suburb is +10dBm, and the average RF output power in the urban area is +5dBm. Therefore, the goal of improving the efficiency of the RF power amplifier should be set at +5dBm to +10dBm instead of the maximum RF output power.
  • V ref 3.0V
  • V CC 3.4V
  • the RF power amplifier itself consumes 100mA. If V ref is reduced from 3.0V to 2.9V, the quiescent current will be reduced by 20mA. It can be seen that the quiescent current of the RF power amplifier can be effectively reduced by reducing V ref .
  • a circuit for reducing radio frequency power consumption of a mobile phone includes: a baseband processing chip 21, a driving amplifier 22, and a radio frequency power amplifier 23; among them,
  • the baseband processing chip 21 is configured to output a base reference voltage to the driving amplifier according to the RF output power of the RF power amplifier 23;
  • the driving amplifier 22 is configured to configure a gain to the base reference voltage output from the baseband processing chip 21, and then output to the base of the RF power amplifier 23;
  • the RF power amplifier 23 is configured to amplify and output the RF input.
  • the V cc of the RF power amplifier is directly from a single section of Li+
  • the battery is supplied, therefore, the V cc operating voltage ranges from 3.2V to 4.2V.
  • CDMA/WCDMA RF power amplifiers operate at +5dBm to +10dBm RF output power most of the time. At this power level, RF can be reduced without reducing the linearity of the RF power amplifier.
  • the collector bias voltage V cc of the power amplifier is used for the purpose of reducing power consumption.
  • FIG. 3 is a schematic structural diagram of another circuit for reducing radio frequency power consumption of a mobile phone according to the present invention.
  • another circuit for reducing radio frequency power consumption of a mobile phone includes: a battery 31, a baseband processing chip 32, and a DC-DC module. 33 and a radio frequency power amplifier 34; wherein
  • the baseband processing chip 32 is configured to output a collector voltage size control signal to the DC-DC module 33 according to the RF output power of the RF power amplifier 34;
  • the DC-DC module 33 is configured to perform a DC-DC step-down conversion on the voltage of the battery 31 according to the collector voltage control signal from the baseband processing chip 32, and output the voltage to the collector of the RF power amplifier 34;
  • the DC-DC module 33 generally includes: a differential amplifier 331, a pulse width modulation (PWM) module 332, and a P-channel metal-oxide-semiconductor-field effect transistor directly connected to the PWM module (P- FET) 333, an N-channel metal-oxide layer directly connected to the PWM module - a semiconductor-field effect transistor (N-FET) 334, a storage inductor 335, a voltage stabilizing filter capacitor 336, a resistor 337 and a resistor 338;
  • the processing chip 32 specifically outputs the collector reference voltage to the non-inverting input terminal of the differential amplifier 331, the output of the differential amplifier 331 is connected to the PWM module 332, and the PWM module 332 is connected to the gates of the P-FET 333 and the N-FET 334, and the P-FET 333
  • the source is connected to the battery 31, the drain is connected to one end of the storage inductor 335, the drain of the N-FET 334 is connected to
  • the filter capacitor 336 One end of the filter capacitor 336 is connected, the other end of the voltage stabilizing filter capacitor 336 is grounded, the resistor 337 and the resistor 338 are connected in series and are at both ends of the voltage stabilizing filter capacitor 336, the voltage output between the resistor 337 and the resistor 338 is poor.
  • the inverting input of the sub-amplifier 331 The buck conversion principle of the DC-DC module is prior art and will not be described in detail herein.
  • the RF power amplifier 3 4 is used to amplify the RF input and output it.
  • the baseband processing chip 31 is further configured to output a high power control signal to the DC-DC module 33.
  • the DC-DC module 33 is further configured to directly output the voltage provided by the battery to the collector of the RF power amplifier 34 according to the high power control signal. .
  • the DC-DC module further includes a P-FET 339 having a gate connected to the baseband processing chip 32 and a source connected to the battery 31.
  • the high power control threshold is generally set on the mobile phone.
  • the baseband processing chip 32 When the battery 31 voltage is lower than the high power control threshold, the baseband processing chip 32 outputs a high power control signal to the P-FET 339, and the P-FET 339 is turned on, thereby directly The voltage supplied from the battery is output to the collector of the RF power amplifier 34.
  • the baseband processing chip 31 does not output a high power control signal to the P-FET 339, and the P-FET 339 is turned off.
  • the voltage supplied from the battery 31 is outputted to the collector of the RF power amplifier 34 after being step-down converted.
  • the base bias voltage and the collector bias voltage can also be adjusted simultaneously to reduce the RF output power to a greater extent.
  • FIG. 4 is a schematic structural diagram of a circuit for reducing radio frequency power consumption of a mobile phone according to another embodiment of the present invention.
  • another circuit for reducing radio frequency power consumption of a mobile phone includes: a baseband processing chip 41, a driving amplifier 42, a battery 43, a DC-DC module 44 and a radio frequency power amplifier 45;
  • the baseband processing chip 41 is configured to output a base reference voltage to the driving amplifier 42 according to the radio frequency output power of the radio frequency power amplifier 45, and output a collector voltage size control signal to the DC-DC module 44 according to the radio frequency output power of the radio frequency power amplifier 45;
  • the driving amplifier 42 is configured to configure a gain to the base reference voltage output from the baseband processing chip 41, and then output to the base of the RF power amplifier 45;
  • the DC-DC module 44 is configured to perform DC-DC step-down conversion on the battery voltage according to the collector voltage magnitude control signal from the baseband processing chip 41, and output the same to the collector of the RF power amplifier 45;
  • the DC-DC module 44 generally includes: a differential amplifier 441, a pulse width modulation (PWM) module 442, and a P-channel metal-oxide-semiconductor-field effect transistor (P-FET) directly connected to the PWM module. 443.
  • PWM pulse width modulation
  • P-FET P-channel metal-oxide-semiconductor-field effect transistor
  • An N-channel metal-oxide layer directly connected to the PWM module - a semiconductor-field effect transistor (N-FET) 444, a storage inductor 445, a voltage stabilizing filter capacitor 446, a resistor 447, and a resistor 448.
  • N-FET semiconductor-field effect transistor
  • the baseband processing chip 41 specifically outputs a collector reference voltage to the non-inverting input terminal of the differential amplifier 441, the output of the differential amplifier 441 is connected to the PWM module 442, and the PWM module 442 is connected to the gates of the P-FET 443 and the N-FET 444, P
  • the source of the FET 443 is connected to the battery 43, the drain is connected to one end of the storage inductor 445, the drain of the N-FET 444 is connected to the drain of the P-FET 443, the source is grounded, and the other end of the storage inductor 445 is connected.
  • the resistor 447 and the resistor 448 are connected in series and at both ends of the voltage stabilizing filter capacitor 446, and the voltage between the resistor 447 and the resistor 448 is output to the difference.
  • the buck conversion principle of the DC-DC module is prior art and will not be described in detail herein.
  • the baseband processing chip 41 is also used to output a high power control signal to the DC-DC module 44;
  • the DC-DC module 44 is also operative to directly output the voltage provided by the battery 43 to the collector of the RF power amplifier 45 in accordance with the high power control signal.
  • the DC-DC module further includes a P-FET 449 having a gate connected to the baseband processing chip and a source connected to the battery 43.
  • the high power control threshold is generally set on the mobile phone.
  • the baseband processing chip 41 When the voltage of the battery 43 is lower than the high power control threshold, the baseband processing chip 41 outputs a high power control signal to the P-FET 449, and the P-FET 449 is turned on, thereby directly The voltage supplied from the battery is output to the collector of the RF power amplifier 45.
  • the baseband processing chip 41 When the voltage of the battery 43 is not lower than the high power control threshold, the baseband processing chip 41 does not output a high power control signal to the P-FET 449, P-FET 449 The cutoff is such that the voltage supplied from the battery 43 is output through the step-down conversion to the collector of the RF power amplifier 45.
  • FIG. 5 is a schematic diagram of a processing flow corresponding to the circuit for reducing the radio frequency power consumption of the mobile phone shown in FIG. 2. As shown in FIG. 5, the processing flow of the circuit for reducing the radio frequency power consumption of the mobile phone shown in FIG. 2 is:
  • Step 51 The baseband processing chip outputs a base reference voltage to the driving amplifier according to the RF output power of the RF power amplifier.
  • the baseband processing chip generally adjusts Vref through a digital to analog converter (DAC) therein.
  • DAC digital to analog converter
  • the minimum V ref voltage supporting the RF output power of each stage can be given according to the test data through multiple tests.
  • the V ref is not less than
  • the baseband processing chip of the RF power amplifier can be used to dynamically control V ref , and another simpler method, that is, a hierarchical control structure can be obtained.
  • the low power mode corresponding to the RF output power is less than 10 dBm
  • the high power mode corresponds to the RF output power greater than 10 dBm.
  • the low power mode and the high power mode respectively correspond.
  • the respective base bias reference voltages are used to control the RF output power of the RF power amplifier when it is in the corresponding mode.
  • Step 52 The driver amplifier configures the gain of the base reference voltage output from the baseband processing chip.
  • Step 53 The driver amplifier outputs the configured gain voltage to the base of the RF power amplifier.
  • FIG. 6 is a schematic diagram of a processing flow corresponding to the circuit for reducing the radio frequency power consumption of the mobile phone shown in FIG. 3. As shown in FIG. 6, the processing flow of the circuit for reducing the radio frequency power consumption of the mobile phone shown in FIG. 3 is:
  • Step 61 The baseband processing chip outputs a collector voltage size control signal to the DC-DC module according to the RF output power of the RF power amplifier.
  • test data shows that the mobile phone can always maintain normal communication with the base station while reducing the RF power amplifier collector bias (as low as 0.6V), so it can keep the phone and While communicating between the base stations and the linearity of the RF power amplifier and ACPR meet the specifications, a specially designed high efficiency DC-DC module is used to provide a varying bias voltage for the collector of the RF power amplifier.
  • Step 62 The DC-DC module performs DC-DC buck conversion on the battery voltage according to the collector voltage control signal from the baseband processing chip.
  • the DC-DC module when the DC-DC module performs DC-DC step-down conversion of the battery voltage, it must be able to quickly respond to the control signal to control the collector voltage of the RF power amplifier. Generally, the output voltage of the DC-DC module should reach 90% of its target voltage within 30ms.
  • the DC-DC module generally works at a higher switch following the analog control voltage of the baseband processing chip, that is, the change of the collector voltage control signal. Frequency to reduce the physical size of the inductor.
  • Step 63 The DC-DC module outputs the step-down converted voltage to the collector of the RF power amplifier.
  • the base bias voltage and the collector bias voltage can be adjusted simultaneously to reduce the RF output power of the RF power amplifier, and the order of adjusting the base bias voltage and the collector bias voltage is not limited.
  • the RF power amplifier manufacturer recommends a minimum voltage of 3.4V for V cc .
  • a collector current of RF power amplifier up to 530mA is required.
  • the DC-DC module requires a certain margin between the input and output voltages, if the p-channel MOSFET (P-FET) inside the DC-DC module is connected to the pulse width modulation module. )
  • the on-resistance is 0.4 ⁇
  • the inductor resistance is 0.1 ⁇ .
  • the collector of the power amplifier is shorted directly to the battery to take full advantage of the energy of the Li+ battery.
  • a bypass P-FET is connected in parallel between the energy storage inductor and the P-FET connected to the pulse width modulation module inside the DC-DC module.
  • This bypass P-FET (internal or external) directly connects the battery voltage to the collector of the RF power amplifier in high power mode. This bypass is necessary to address high RF output power and low battery voltage. .
  • the best solution for optimizing PAE is to continuously adjust the collector bias of the RF power amplifier.
  • This solution requires factory calibration and debugging software to ensure good linearity and ACPR specifications for the RF power amplifier when the collector bias is continuously changing.
  • Another compromise is to set the bias voltage in several levels, typically level 2 or level 4.
  • the V cc voltage may be set to: Vbatt (battery voltage), 1.5V, 1.0V, and 0.6V.
  • Vbatt battery voltage
  • 1.5V battery voltage
  • 1.0V 1.0V
  • 0.6V The overall efficiency of the system is close to the system efficiency of continuously controlling the collector bias of the RF power amplifier.
  • the inductor only needs to support peak currents below 150 mA.

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  • Computer Networks & Wireless Communication (AREA)
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  • Amplifiers (AREA)

Description

一种降低手机射频功耗的电路及方法 技术领域
本发明涉及移动通信技术， 尤其涉及一种降低手机射频功耗的电路及 方法。 背景技术
码分多址（CDMA ) /宽带码分多址（WCDMA )是第三代通讯标准， 满足了高速数据传输， 在 CDMA/WCDMA***中， 手机完全靠手机电池供 电， 为了满足 IS95/3GPP扩频标准中规定的严格的线性和邻信道功率抑制 比 （ACPR )指标， 手机需要釆用高线性度的 A类或 AB类射频 （RF ) 功 率放大器 （射频功率放大器）， 图 1为 CDMA/WCDMA***中， 手机的一 种典型射频功率放大器示意图， 如图 1 所示， 射频功率放大器需要两路电 源电压 Vref和 V∞, 其中， Vref为功率放大器的基极提供偏置， ¼。为功率放 大器的集电极提供偏置， 且基极偏置电压 Vref和集电极偏置电压 V∞均为恒 定值，在最大射频输出功率 Po = 28dBm时，这类射频功率放大器的功效（射 频功率放大器 E )只有 35%, 射频输出功率较低时功效更低， 实际应用中， 在语音模式下， 射频功率放大器并非工作在连续模式， 这是由于用户没有 通话时， 手机工作时间为 50%或 1/8, 所以， 在语音模式下无需考虑手机发 热问题， 然而， 在数据模式下， 射频功率放大器 在数据传输结束之前始终 保持连续工作状态， 较低的射频功率放大器效率和连续的射频功率放大器 工作状态会大量消耗电池能量， 且消耗电池电量所产生的内部功耗会导致 手机过热。 发明内容
有鉴于此， 本发明的主要目的在于提供一种降低手机射频功耗的电路 及方法， 能够节省电池能量、 緩解手机发热问题。
为达到上述目的， 本发明的技术方案是这样实现的：
一种降低手机射频功耗的电路， 包括： 基带处理芯片、 驱动放大器和 射频功率放大器， 其中，
所述基带处理芯片， 用于根据射频功率放大器的射频输出功率向驱动 放大器输出基极参考电压；
所述驱动放大器， 用于对基带处理芯片输出的基极参考电压配置增益 后， 输出至射频功率放大器的基极；
所述射频功率放大器， 用于对射频输入进行放大后输出。
一种降低手机射频功耗的电路， 包括： 电池、 基带处理芯片、 DC-DC 模块和射频功率放大器， 其中，
所述电池， 用于为 DC-DC模块供电；
所述基带处理芯片， 用于根据射频功率放大器的射频输出功率向 DC-DC模块输出集电极电压大小控制信号；
所述 DC-DC模块，用于根据来自基带处理芯片的集电极电压大小控制 信号进行 DC-DC降压转换后， 输出至射频功率放大器的集电极；
所述射频功率放大器， 用于对射频输入进行放大后输出。
所述基带处理芯片还用于向 DC-DC模块输出高功率控制信号； 所述 DC-DC模块还用于根据所述高功率控制信号， 直接将电池提供的 电压输出至射频功率放大器的集电极。
一种降低手机射频功耗的电路， 包括： 基带处理芯片、 驱动放大器、 电池、 DC-DC模块和射频功率放大器， 其中，
所述基带处理芯片， 用于根据射频功率放大器的射频输出功率向驱动 放大器输出基极参考电压， 以及根据射频功率放大器的射频输出功率向
DC-DC模块输出集电极电压大小控制信号；
所述驱动放大器， 用于对基带处理芯片输出的基极参考电压配置增益 后， 输出至射频功率放大器的基极；
所述电池， 用于为 DC-DC模块供电；
所述 DC-DC模块，用于根据来自基带处理芯片的集电极电压大小控制 信号， 对电池电压进行 DC-DC降压转换后， 输出至射频功率放大器的集电 极；
所述射频功率放大器， 用于对射频输入进行放大后输出。
所述基带处理芯片还用于向 DC-DC模块输出高功率控制信号； 所述 DC-DC模块还用于根据所述高功率控制信号， 直接将电池提供的 电压输出至射频功率放大器的集电极。
一种降低手机射频功耗的方法， 包括： 基带处理芯片根据射频功率放 大器的射频输出功率， 调整射频功率放大器的基极偏置电压和 /或集电极偏 置电压。
所述基带处理芯片根据射频功率放大器的射频输出功率， 调整射频功 率放大器的基极偏置电压为：
基带处理芯片根据射频功率放大器的射频输出功率向驱动放大器输出 基极参考电压；
驱动放大器对基带处理芯片输出的基极参考电压配置增益后， 输出至 射频功率放大器的基极。
所述基带处理芯片根据射频功率放大器的射频输出功率， 调整射频功 率放大器的集电极偏置电压为：
基带处理芯片根据射频功率放大器的射频输出功率向 DC-DC模块输出 集电极电压大小控制信号； DC-DC模块根据来自基带处理芯片的集电极电压大小控制信号， 对电 池电压进行 DC-DC降压转换后， 输出至射频功率放大器的集电极。
设置高功率控制阔值， 该方法还包括： 基带处理芯片对射频功率放大 器进行高功率控制， 具体为：
电池电压低于高功率控制阔值时，基带处理芯片向 DC-DC模块输出高 功率控制信号；
DC-DC模块根据所述高功率控制信号， 直接将电池提供的电压输出至 射频功率放大器的集电极。
本发明降低手机射频功耗的电路及方法， 根据射频功率放大器射频输 出功率实时调整手机射频功率放大器的基极偏置电压和 /或集电极偏置电 压， 降低射频功率放大器功耗。 由于本发明在保证手机与基站之间正常通 信且其射频功率放大器的线性指标和 ACPR满足规范要求的同时， 通过适 当降低基极偏置电压和 /或集电极偏置电压降低射频功率放大器的射频输出 功率， 从而能够提高射频功率放大器功效、 节省电池能量、 且能緩解手机 发热问题。 附图说明
图 1为 CDMA/WCDMA***中，手机的一种典型射频功率放大器示意 图；
图 2为本发明一种降低手机射频功耗的电路结构示意图；
图 3为本发明另一种降低手机射频功耗的电路结构示意图；
图 4为本发明再一种降低手机射频功耗的电路结构示意图；
图 5为对应于图 2所示降低手机射频功耗的电路的处理流程示意图； 图 6为对应于图 3所示降低手机射频功耗的电路的处理流程示意图。 具体实施方式
本发明的基本思想是： 根据射频功率放大器射频输出功率实时调整手 机射频功率放大器的基极偏置电压和 /或集电极偏置电压， 降低射频功率放 大器功耗。
下面结合附图对技术方案的实施作进一步的详细描述。
在 CDMA/WCDMA***中，射频功率放大器的射频输出功率并非始终 保持在最大值， 为了优化蜂窝容量， 即基站能够同时处理的传输量， 每部 手机需要控制其射频输出功率， 以便基站对于每部手机保持相同的有效接
CDMA/WCDMA 手机在郊区的平均射频输出功率为 +10dBm, 在市区内的 平均射频输出功率为 +5dBm。 因此， 改善射频功率放大器效率的目标应该 定位于 +5dBm至 +10dBm, 而不是最大射频输出功率。
现有技术中，当射频输出功率为零时， Vref和 Vcc的典型值为： Vref= 3.0V、 VCC = 3.4V,射频功率放大器本身消耗电流为 100mA。如果将 Vref 从 3.0V 降 至 2.9V, 静态电流将降低 20mA。 由此可见， 通过减小 Vref可有效降低射频 功率放大器的静态电流。
图 2为本发明一种降低手机射频功耗的电路结构示意图， 如图 2所示， 本发明一种降低手机射频功耗的电路包括： 基带处理芯片 21、 驱动放大器 22和射频功率放大器 23; 其中，
基带处理芯片 21 ,用于根据射频功率放大器 23的射频输出功率向驱动 放大器输出基极参考电压；
驱动放大器 22,用于对基带处理芯片 21输出的基极参考电压配置增益 后， 输出至射频功率放大器 23的基极；
射频功率放大器 23, 用于对射频输入进行放大后输出。
另外， 在典型的手机设计中， 射频功率放大器的 Vcc 直接由单节 Li+ 电池提供， 因此， Vcc 工作电压的范围为 3.2V至 4.2V。
如上所述， 概率统计表明 CDMA/WCDMA的射频功率放大器大多数 时间工作在 +5dBm至 +10dBm 的射频输出功率， 在这样的功率等级下， 可 以在不降低射频功率放大器线性指标的前提下降低射频功率放大器的集电 极偏置电压 Vcc , 以达到降低功耗的目的。
图 3为本发明另一种降低手机射频功耗的电路结构示意图， 如图 3所 示， 本发明另一种降低手机射频功耗的电路包括： 电池 31、 基带处理芯片 32、 DC-DC模块 33和射频功率放大器 34; 其中，
电池 31 , 用于为 DC-DC模块供电；
基带处理芯片 32 , 用于根据射频功率放大器 34 的射频输出功率向 DC-DC模块 33输出集电极电压大小控制信号；
DC-DC模块 33 , 用于根据来自基带处理芯片 32的集电极电压大小控 制信号， 对电池 31电压进行 DC-DC降压转换后， 输出至射频功率放大器 34的集电极；
如图 3所示， DC-DC模块 33—般包括： 差分放大器 331、 脉冲宽度调 制（ PWM )模块 332、 与 PWM模块直接相连的 P沟道金属-氧化层-半导体 -场效晶体管 （P-FET ) 333、 与 PWM模块直接相连的 N沟道金属 -氧化层- 半导体 -场效晶体管 （N-FET ) 334、 储能电感 335、 稳压滤波电容 336、 电 阻 337和电阻 338; 其中， 基带处理芯片 32具体输出集电极参考电压至差 分放大器 331的同相输入端，差分放大器 331的输出端连接 PWM模块 332, PWM模块 332连接 P-FET 333和 N-FET 334的栅极， P-FET 333的源极与 电池 31相连、漏极与储能电感 335的一端相连， N-FET 334的漏极与 P-FET 333的漏极相连、 源极接地，储能电感 335的另一端与稳压滤波电容 336的 一端相连， 稳压滤波电容 336的另一端接地， 电阻 337和电阻 338 串联后 并在稳压滤波电容 336的两端， 电阻 337和电阻 338之间的电压输出至差 分放大器 331的反相输入端。 DC-DC模块的降压转换原理为现有技术， 在 此不作详细描述。
射频功率放大器 34, 用于对射频输入进行放大后输出。
基带处理芯片 31还用于向 DC-DC模块 33输出高功率控制信号； DC-DC模块 33还用于根据所述高功率控制信号，直接将电池提供的电 压输出至射频功率放大器 34的集电极。
如图 3所示， 除 P-FET 333外， DC-DC模块还包括一 P-FET 339 , 其 栅极与基带处理芯片 32相连， 源极与电池 31相连。 手机上一般设置有高 功率控制阔值， 当电池 31 电压低于高功率控制阔值时， 基带处理芯片 32 会向 P-FET 339输出高功率控制信号， P-FET 339导通， 从而直接将电池提 供的电压输出至射频功率放大器 34的集电极， 电池 31 电压不低于高功率 控制阔值时，基带处理芯片 31不向 P-FET 339输出高功率控制信号， P-FET 339截止， 从而电池 31提供的电压经过降压转换后输出至射频功率放大器 34的集电极。
当然， 也可以同时调整基极偏置电压和集电极偏置电压， 以更大程度 地减小射频输出功率。
图 4为本发明再一种降低手机射频功耗的电路结构示意图， 如图 4所 示， 本发明再一种降低手机射频功耗的电路包括： 基带处理芯片 41、 驱动 放大器 42、 电池 43、 DC-DC模块 44和射频功率放大器 45; 其中，
基带处理芯片 41 ,用于根据射频功率放大器 45的射频输出功率向驱动 放大器 42输出基极参考电压， 以及根据射频功率放大器 45的射频输出功 率向 DC-DC模块 44输出集电极电压大小控制信号；
驱动放大器 42,用于对基带处理芯片 41输出的基极参考电压配置增益 后， 输出至射频功率放大器 45的基极；
电池 43 , 用于为 DC-DC模块 44供电； DC-DC模块 44, 用于根据来自基带处理芯片 41的集电极电压大小控 制信号， 对电池电压进行 DC-DC降压转换后， 输出至射频功率放大器 45 的集电极；
如图 4所示， DC-DC模块 44一般包括： 差分放大器 441、 脉冲宽度调 制（ PWM )模块 442、 与 PWM模块直接相连的 P沟道金属-氧化层-半导体 -场效晶体管 （P-FET ) 443、 与 PWM模块直接相连的 N沟道金属 -氧化层- 半导体 -场效晶体管 （N-FET ) 444、 储能电感 445、 稳压滤波电容 446、 电 阻 447和电阻 448。 其中， 基带处理芯片 41具体输出集电极参考电压至差 分放大器 441的同相输入端，差分放大器 441的输出端连接 PWM模块 442, PWM模块 442连接 P-FET 443和 N-FET 444的栅极， P-FET 443的源极与 电池 43相连、漏极与储能电感 445的一端相连， N-FET 444的漏极与 P-FET 443的漏极相连、 源极接地，储能电感 445的另一端与稳压滤波电容 446的 一端相连， 稳压滤波电容 446的另一端接地， 电阻 447和电阻 448 串联后 并在稳压滤波电容 446的两端， 电阻 447和电阻 448之间的电压输出至差 分放大器 441的反相输入端。 DC-DC模块的降压转换原理为现有技术， 在 此不作详细描述。
基带处理芯片 41还用于向 DC-DC模块 44输出高功率控制信号；
DC-DC模块 44还用于根据所述高功率控制信号， 直接将电池 43提供 的电压输出至射频功率放大器 45的集电极。
如图 4所示， 除 P-FET 443夕卜， DC-DC模块还包括一 P-FET 449 , 其 栅极与基带处理芯片相连， 源极与电池 43相连。 手机上一般设置有高功率 控制阔值， 当电池 43电压低于高功率控制阔值时， 基带处理芯片 41会向 P—FET 449输出高功率控制信号， P-FET 449导通， 从而直接将电池提供的 电压输出至射频功率放大器 45的集电极， 电池 43电压不低于高功率控制 阔值时，基带处理芯片 41不向 P-FET 449输出高功率控制信号， P-FET 449 截止， 从而电池 43提供的电压经过降压转换后输出至射频功率放大器 45 的集电极。
图 5为对应于图 2所示降低手机射频功耗的电路的处理流程示意图， 如图 5所示， 图 2所示降低手机射频功耗的电路的处理流程为：
步骤 51: 基带处理芯片根据射频功率放大器的射频输出功率向驱动放 大器输出基极参考电压。
这里， 基带处理芯片一般通过其中的数模转换器（DAC )调节 Vref。 在 调节时， 要保证射频功率放大器的线性指标和 ACPR 满足规范要求， 实际 应用中， 可以通过多次试验， 根据试验数据给出支持每级射频输出功率的 最小 Vref 电压， 在 Vref不小于给出的支持每级射频输出功率的最小 Vref 电 压的前提下， 可利用射频功率放大器的基带处理芯片动态控制 Vref, 另外， 还可以釆取较简单的另一种方式， 即分级控制结构， 例如， 简单地釆用两 级 Vref控制结构时， 可以设置低功率模式对应射频输出功率小于 lOdBm的 情况， 高功率模式对应射频输出功率大于 lOdBm的情况， 低功率模式和高 功率模式分别对应各自的基极偏置参考电压， 以供射频功率放大器处于相 应的模式时对其射频输出功率进行控制。
步骤 52: 驱动放大器对基带处理芯片输出的基极参考电压配置增益。 步骤 53: 驱动放大器将配置增益后的电压输出至射频功率放大器的基 极。
图 6为对应于图 3所示降低手机射频功耗的电路的处理流程示意图， 如图 6所示， 图 3所示降低手机射频功耗的电路的处理流程为：
步骤 61:基带处理芯片根据射频功率放大器的射频输出功率向 DC-DC 模块输出集电极电压大小控制信号。
试验数据表明， 在降低射频功率放大器集电极偏置（低至 0.6V)的情况 下， 手机可以始终保持与基站之间的正常通信， 所以， 可以在保持手机与 基站之间通信且其射频功率放大器的线性指标和 ACPR满足规范要求的同 时，釆用专门设计的高效 DC-DC模块为射频功率放大器集电极提供变化的 偏置电压。
步骤 62: DC-DC模块根据来自基带处理芯片的集电极电压大小控制信 号， 对电池电压进行 DC-DC降压转换。
这里， DC-DC模块对电池电压进行 DC-DC降压转换时， 必须能够快 速响应控制信号，对射频功率放大器的集电极电压进行控制。通常， DC-DC 模块的输出电压应该在 30ms内达到其目标电压的 90% ,跟随基带处理芯片 模拟控制电压、 即集电极电压大小控制信号的变化， DC-DC模块一般工作 在较高的开关频率， 以减小电感的物理尺寸。
步骤 63: DC-DC模块将降压转换后的电压输出至射频功率放大器的集 电极。
当然， 也可以同时调整基极偏置电压和集电极偏置电压以降低射频功 率放大器的射频输出功率， 对调整基极偏置电压和集电极偏置电压的先后 顺序不作限制。
为了在低电池电压下保证大功率输出， 即为了在保证射频功率放大器 线性指标的前提下提供 28dBm的射频输出功率， 射频功率放大器制造商建 议 Vcc的最小电压为 3.4V。 为了在 3.4V 电压下保持 35%的 PAE, 还需要高 达 530mA 的射频功率放大器集电极电流， 数据获取原理如下：
28dBm射频输出功率： 102 8mW = 631mW
所需射频功率放大器功率 (Vcc X Ice)为： 631mW/(PAE/100) = 1803mW 3.4V Vcc时所需的 Icc为： Ice = 1803mW/3.4V = 530mA
要保证 3.4V的 Vcc和 530mA的 ICC, DC-DC模块要求输入和输出电压 之间有一定的裕量， 如果 DC-DC模块内部与脉冲宽度调制模块相连的 p沟 道 MOSFET ( P-FET)的导通电阻为 0.4Ω, 电感电阻为 0.1Ω, 则元件串联后 将产生的压差为： （0.4Ω+0.1Ω) χ530ηιΑ = 265ιην, 当电池电压降至 3.665V 以下时， DC-DC转换器将无法支持 3.4V 的输出， 这种情况下， 最好将射频 功率放大器的集电极直接与电池短路， 以便充分利用 Li+电池的能量。
通常，在储能电感和 DC-DC模块内部与脉冲宽度调制模块相连的 P-FET 的两端并联一个旁路 P-FET。 这个旁路 P-FET (内置或外置)在大功率模式下 直接将电池电压接到射频功率放大器的集电极， 为了解决高射频输出功率 和低电池电压问题， 这种旁路措施是必需的。
优化 PAE 的最佳方案是连续调节射频功率放大器的集电极偏置， 这种 方案需要工厂校准和调试软件， 以确保集电极偏置连续变化时射频功率放 大器具有良好的线性度和 ACPR指标。 另一个折衷方案是按照若干等级设 置偏置电压，通常为 2 级或 4 级。例如，一个 4 级的偏置设置***， Vcc 电 压可能设置为： Vbatt (电池电压）、 1.5V、 1.0V 和 0.6V。 该***的整体效 率接近连续控制射频功率放大器集电极偏置的***效率， 对于低功率和中 等功率模式， 电感只需要支持低于 150mA的峰值电流。
以上所述， 仅为本发明的较佳实施例而已， 并非用于限定本发明的保 护范围。

Claims

权利要求书
1、 一种降低手机射频功耗的电路， 其特征在于， 该电路包括： 基带处 理芯片、 驱动放大器和射频功率放大器； 其中，
所述基带处理芯片， 用于根据射频功率放大器的射频输出功率向驱动 放大器输出基极参考电压；
所述驱动放大器， 用于对基带处理芯片输出的基极参考电压配置增益 后， 输出至射频功率放大器的基极；
所述射频功率放大器， 用于对射频输入进行放大后输出。
2、 一种降低手机射频功耗的电路， 其特征在于， 该电路包括： 电池、 基带处理芯片、 DC-DC模块和射频功率放大器； 其中，
所述电池， 用于为 DC-DC模块供电；
所述基带处理芯片， 用于根据射频功率放大器的射频输出功率向 DC-DC模块输出集电极电压大小控制信号；
所述 DC-DC模块，用于根据来自基带处理芯片的集电极电压大小控制 信号进行 DC-DC降压转换后， 输出至射频功率放大器的集电极；
所述射频功率放大器， 用于对射频输入进行放大后输出。
3、 根据权利要求 2所述的电路， 其特征在于， 所述基带处理芯片还用 于向 DC-DC模块输出高功率控制信号；
所述 DC-DC模块还用于根据所述高功率控制信号， 直接将电池提供的 电压输出至射频功率放大器的集电极。
4、 一种降低手机射频功耗的电路， 其特征在于， 该电路包括： 基带处 理芯片、 驱动放大器、 电池、 DC-DC模块和射频功率放大器； 其中，
所述基带处理芯片， 用于根据射频功率放大器的射频输出功率向驱动 放大器输出基极参考电压， 以及根据射频功率放大器的射频输出功率向 DC-DC模块输出集电极电压大小控制信号； 所述驱动放大器， 用于对基带处理芯片输出的基极参考电压配置增益 后， 输出至射频功率放大器的基极；
所述电池， 用于为 DC-DC模块供电；
所述 DC-DC模块，用于根据来自基带处理芯片的集电极电压大小控制 信号， 对电池电压进行 DC-DC降压转换后， 输出至射频功率放大器的集电 极；
所述射频功率放大器， 用于对射频输入进行放大后输出。
5、 根据权利要求 4所述的电路， 其特征在于， 所述基带处理芯片还用 于向 DC-DC模块输出高功率控制信号；
所述 DC-DC模块还用于根据所述高功率控制信号， 直接将电池提供的 电压输出至射频功率放大器的集电极。
6、 一种降低手机射频功耗的方法， 其特征在于， 该方法包括： 基带处 理芯片根据射频功率放大器的射频输出功率， 调整射频功率放大器的基极 偏置电压和 /或集电极偏置电压。
7、 根据权利要求 6所述的降低手机射频功耗的方法， 其特征在于， 所 述基带处理芯片根据射频功率放大器的射频输出功率， 调整射频功率放大 器的基极偏置电压为：
基带处理芯片根据射频功率放大器的射频输出功率向驱动放大器输出 基极参考电压；
驱动放大器对基带处理芯片输出的基极参考电压配置增益后， 输出至 射频功率放大器的基极。
8、 根据权利要求 6所述的降低手机射频功耗的方法， 其特征在于， 所 述基带处理芯片根据射频功率放大器的射频输出功率， 调整射频功率放大 器的集电极偏置电压为：
基带处理芯片根据射频功率放大器的射频输出功率向 DC-DC模块输出 集电极电压大小控制信号；
DC-DC模块根据来自基带处理芯片的集电极电压大小控制信号， 对电 池电压进行 DC-DC降压转换后， 输出至射频功率放大器的集电极。
9、 根据权利要求 6所述的降低手机射频功耗的方法， 其特征在于， 该 方法还包括： 设置高功率控制阔值， 基带处理芯片对射频功率放大器进行 高功率控制， 具体为：
电池电压低于高功率控制阔值时，基带处理芯片向 DC-DC模块输出高 功率控制信号；
DC-DC模块根据所述高功率控制信号， 直接将电池提供的电压输出至 射频功率放大器的集电极。
PCT/CN2010/074985 2009-07-09 2010-07-05 一种降低手机射频功耗的电路及方法 WO2011003341A1 (zh)

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