WO2010149294A2 - Procédé de fabrication d'une cellule solaire ewt - Google Patents

Procédé de fabrication d'une cellule solaire ewt Download PDF

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Publication number
WO2010149294A2
WO2010149294A2 PCT/EP2010/003583 EP2010003583W WO2010149294A2 WO 2010149294 A2 WO2010149294 A2 WO 2010149294A2 EP 2010003583 W EP2010003583 W EP 2010003583W WO 2010149294 A2 WO2010149294 A2 WO 2010149294A2
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WO
WIPO (PCT)
Prior art keywords
emitter
semiconductor substrate
doping
front side
layer
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PCT/EP2010/003583
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German (de)
English (en)
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WO2010149294A3 (fr
Inventor
Nicola Mingirulli
Daniel Biro
Ralf Preu
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Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
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Publication of WO2010149294A2 publication Critical patent/WO2010149294A2/fr
Publication of WO2010149294A3 publication Critical patent/WO2010149294A3/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
    • H01L31/022458—Electrode arrangements specially adapted for back-contact solar cells for emitter wrap-through [EWT] type solar cells, e.g. interdigitated emitter-base back-contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to a method for producing an EWT solar cell from a semiconductor substrate.
  • EWT solar cell emitter-wrap-through solar cell
  • semiconductor solar cell which has emitter regions both on the front side, which is designed for coupling in light, and on the rear side.
  • An EWT solar cell consists of a semiconductor substrate having a plurality of recesses, which extend from the front to the back side of the semiconductor substrate and are usually approximately cylindrical in shape, the cylinder axes being approximately perpendicular to the front side.
  • the regions not covered by emitters are doped opposite to the emitter regions, so that pn junctions form at the boundaries of the emitter regions.
  • a full-surface emitter is formed on the front side, and the rear side is also covered by partial or partial regions, at least at the regions of the rear side penetrated by a hole, by one or more emitter regions.
  • emitter regions are formed on the hole walls, so that an e- electrically conductive connection from the front emitter via the emitter to the hole walls to the back emitter.
  • EWT solar cells belong to the family of back-contact solar cells, d. H. Both the electrical contacting of the emitter, as well as the oppositely doped base region takes place on the back of the solar cell. Typically, charge carriers are removed by means of metallic contact structures. Rear-side contact solar cells therefore have the advantage that shadowing by metallization structures does not take place on the front side formed for coupling in the light.
  • the majority of the generation of electron and hole pairs occur near the front when illuminated. Therefore, a large number of highly doped junction emitters are required for charge carrier transport between the front and rear emitters in order to minimize series resistance losses. Furthermore, the back emitter must be contactable by the respective contact technology with low contact resistance, which requires a high doping concentration at the surface of the back emitter regions. On the other hand, the front-side emitter should have the lowest possible charge carrier recombination in the emitter region, in conjunction with the passivation layer or layers typically applied to the front side.
  • the invention is therefore based on the object to provide a method for producing an EWT solar cell, can be produced in the emitter regions with different doping concentrations by a simplified process. Furthermore, the method should be distinguished by industrial applicability.
  • the method according to the invention thus serves for producing an EWT solar cell from a semiconductor substrate having a front side and a rear side.
  • the semiconductor substrate is doped with a first doping type and has a plurality of recesses, which extend in each case from the front to the back side of the semiconductor substrate. These are typically the initially mentioned approximately cylindrical holes. Likewise, however, other embodiments of the recesses are within the scope of the invention.
  • the method according to the invention comprises a method step A in which at least the following emitter regions of a second doping type opposite to the first doping type are generated in the semiconductor substrate: A front emitter at least partially covering the front side of the semiconductor substrate, a back emitter partially covering the back surface of the semiconductor substrate, and a plurality of connection emitters each at least partially covering the wall of a recess so that the front emitter is electrically conductively connected through the connection emitters connected to the back emitter.
  • Doping types here are the n-doping and the p-doping opposite thereto.
  • pn junctions are formed between the emitter regions and the oppositely doped adjacent regions of the semiconductor substrate.
  • the front emitter covers the front over the entire surface, but also is the partial coverage of the front by one or more front emitter within the scope of the invention.
  • each rear-side emitter is electrically conductively connected to a front-side emitter via a plurality of connection emitters.
  • a method step B at least one base contacting structure and at least one emitter contacting structure are respectively applied to the rear side of the semiconductor substrate, possibly via further intermediate layers.
  • the base-contacting structure is electrically conductively connected to at least one region of the semiconductor substrate not covered by emitters and the emitter-contacting structure to the backside emitter.
  • the EWT solar cell can thus be electrically connected to an external circuit or further solar cells.
  • a front side layer structure is applied to the front side of the semiconductor substrate.
  • the front side layer structure may hereby be made consist of only one or more superimposed layers.
  • the front side layer structure comprises at least one diffusion barrier layer which inhibits the passage of dopants and which contains no dopant of the second doping type and / or at least one front side doped layer which contains the dopant of the second doping type.
  • diffusion barrier layer here means that in a diffusion from the gas phase, although dopants penetrate through the diffusion barrier layer in the semiconductor substrate, but to a lesser extent than would be the case without diffusion barrier layer.
  • a diffusion is carried out by means of at least one dopant of the second doping type from the gas phase to produce at least the backside emitter and the connection emitter and this diffusion from the gas phase and the production of the front side emitter takes place in situ in a diffusion furnace ie without that as an intermediate step, a discharge from the process chamber of the diffusion furnace.
  • the doping profile of the front-side emitter is additionally selectable by the configuration of the front-side layer structure applied to the front side.
  • the front side layer structure comprises both a diffusion barrier layer and a front side doping layer.
  • the front-side layer structure comprises at least one diffusion barrier layer but no front-side doping layer.
  • the diffusion of the front side emitter thus takes place by means of dopants, which penetrate the diffusion barrier layer and dope the semiconductor substrate on the front side.
  • the lower doping of the front-side emitter is thus achieved in that the diffusion barrier layer inhibits the penetration of dopants into the front side of the semiconductor substrate, but does not completely suppress it. This results in a front side emitter which is less doped than the rear side emitter and the connection emitters.
  • the front side layer structure comprises a front side doping layer and intrusion of dopants from the gas phase through the front side layer structure into the semiconductor substrate is completely or substantially prevented.
  • the diffusion of the front side emitter is thus exclusively or substantially due to the dopants contained in the front side doping layer.
  • the inhibition of the penetration of the front side layer structure of dopants from the gas phase preferably takes place in such a way that the front side layer structure comprises at least one diffusion barrier layer applied to the front side doping layer, optionally via further intermediate layers, preventing the passage of dopants out of the gas phase.
  • the composition and thickness of the front-end doping layer can also be selected such that the front-end doping layer itself is a diffusion barrier layer for the gaseous-phase dopants.
  • the doping profile of the front side emitter is essentially predetermined by the choice of the front side doping layer, so that also
  • the doping profiles of rear side emitter and the connection emitters on the one hand and the front side emitter on the other hand can be specified essentially independently of one another and a front side emitter with a lower doping compared to the rear side emitter and the connection emitters is produced.
  • the method according to the invention is preferably used for the production of EWT solar cells from a silicon semiconductor substrate, in particular a p-doped silicon semiconductor substrate. Likewise, however, the production of EWT solar cells from other semiconductor substrates lies within the scope of this invention.
  • the front side layer structure is preferably applied by means of CVD (Chemical Vacuum Deposition), in particular preferably by means of PECVD (Plasma Enhanced Chemical Vapor Deposition).
  • CVD Chemical Vacuum Deposition
  • PECVD Plasma Enhanced Chemical Vapor Deposition
  • the layers of the front-side layer structure in particular the front-side doping layer or the diffusion barrier layer, have thicknesses in the range between 20 nm and 100 nm.
  • the method according to the invention is formed in accordance with the second variant, in which the front-side layer structure comprises at least one front-side doping layer and a diffusion barrier layer optionally applied thereon via further intermediate layers.
  • the doping source on the front side is thus such that, with the same temperature-time profile for the diffusion process, a doping profile is formed on the front side, which differs from the doping profile of the rear side and the walls of the recesses.
  • the dopant content of the front doping layer and the process conditions in the diffusion from the gas phase into the diffusion furnace are selected such that depletion of the dopant of the front end dopant layer is achieved.
  • the front-end doping layer it is advantageous for the front-end doping layer to constitute a so-called "finite source” for the doping of the front side.
  • the doping concentration of the front-side emitter is thus essentially predetermined by the dopant content of the front-end dopant layer and is approximately independent of the process duration in the diffusion from the gas phase
  • diffusion from the gas phase provides sufficient dopant so that there is a substantially “infinite source” with respect to the back emitter and the compound emitter.
  • the second variant of the method according to the invention thus has the advantage of a particularly strong decoupling of the generation of the front side emitter on the one hand and the back side emitter and the connection emitter on the other hand, in particular using only one high-temperature step.
  • High-temperature step here means a process step at a temperature greater than 660 0 C, preferably greater than 800 0 C.
  • the production of a p-type EWT solar cell is advantageous, ie that the first doping type is a p-type doping and the second doping type is an n-type doping.
  • Investigations by the Applicant have shown that, in particular, a phosphorus-doped silicon oxide layer is suitable as a front side doping layer and a dopant-free silicon oxide layer as a diffusion barrier layer.
  • Silicon oxide layers are often applied in the production of solar cells for different uses, so that here, too, can be used on known methods and process equipment.
  • the term silicon oxide layer in this case comprises layers which, in addition to silicon and oxygen, may also contain further substances.
  • it is essential that the front side doping layer contains phosphorus and that the diffusion barrier layer contains no dopant, in particular no phosphorus. holds.
  • the front doping layer and the diffusion barrier layer are deposited by means of PECVD and the precursor liquid is TEOS (tetraethyl orthosilicate) or the gas silane is used as the oxide source.
  • the Verwednung the gas monophosphine (phosphine) is advantageous as a gaseous phosphorus source.
  • the combination with the precursor liquid TMPi listed below is also advantageous in order to allow less dangerous process control.
  • precursor liquid here refers to a liquid through which a carrier gas, preferably argon, is passed, which is preferably carried out by passing the carrier gas through the precursor liquid in a cooled evaporator unit.
  • a carrier gas preferably argon
  • TCTS Tetramethyltetracyclotetrasyloxan
  • TMPi 1 P OCH 3
  • These precursor liquids have the advantage that the use of liquids is easier to control and thus less dangerous than the usual use of silane or phosphine gas.
  • the front-side front-end doping layer is preferably 8% to 10% phosphorus, 5% to 10% carbon, 60% to 65% oxygen, and 15% to 20% silicon.
  • the diffusion barrier layer advantageously consists of 5% to 10% carbon, 60% to 65% oxygen and 25% to 35% silicon.
  • the front-end dopant layer has a thickness of less than 50 nm.
  • Layer thicknesses smaller than 50 nm have the advantage that, during the diffusion of the front side emitter from the front side doping layer, a depletion of the dopant occurs due to the small thickness and thus a lowly doped front side emitter is produced.
  • the dopant content in the front doping layer may be selected such that depletion occurs during diffusion.
  • a combination of the aforementioned advantageous composition of the front side doping layer with a layer thickness of less than 50 nm is advantageous for achieving the depletion.
  • the diffusion barrier layer is a silicon dioxide layer.
  • the silicon oxide layer formed as a diffusion barrier layer is preferably between 50 nm and 200 nm.
  • the diffusion barrier layer is advantageously applied by means of PECVD, silane (SiH 4 ) being used as the precursor gas and the diffusion barrier layer having a refractive index of 1.46 at 632 nm.
  • a diffusion barrier layer with the aforementioned property in the production of an EWT solar cell from a silicon semiconductor substrate has an optimal inhibiting effect of the passage of dopants, so that on the one hand when carrying out the diffusion from the gas phase sufficiently highly doped connection emitter and back emitter On the other hand, on the other hand, a lower doped front emitter with optimum doping profile is generated.
  • the doping concentration of the front-side emitter can be selected via the thickness of the diffusion barrier layer: a greater thickness leads to a greater inhibition of the passage of dopants and, in contrast, to a lower-doped front-side emitter.
  • the thickness of the diffusion barrier layer is preferably between 10 nm and 100 nm, advantageously between 27 nm and 35 nm, for layers applied by means of PECVD.
  • the recesses in the semiconductor structure are produced before method step A and before the front side layer structure is applied, wherein the recesses have no cylindrical shape but have a smaller opening area on the front side of the semiconductor substrate than on the front side Rear side of the semiconductor substrate.
  • the choice of the side of the semiconductor substrate as the front side, which has the smaller area of the recesses, has the advantage of the lower risk that one or more layers of the front side layer structure enter into the recesses.
  • the recesses are produced by melting and / or evaporating the semiconductor substrate by a laser beam, the recesses are preferably produced in such a way that they have an approximately conical shape.
  • the side with the smaller opening surfaces of the recesses is then used as the front side for the further manufacturing process of the EWT solar cell.
  • the silicon wafers typically used for the production of EWT solar cells have thicknesses in the range of 50 ⁇ m to 250 ⁇ m.
  • the recesses produced typically have radii at the front in the range between 10 ⁇ m and 50 ⁇ m, at the rear in the range between 20 ⁇ m and 100 ⁇ m.
  • the distance between two recesses is preferably in the range between 100 .mu.m and 1000 .mu.m.
  • the semiconductor substrate is preferably applied to a support semiconductor substrate without recesses when the front side layer structure is applied.
  • the back side of the semiconductor substrate thus lies flat over the entire surface of the support semiconductor substrate.
  • this avoids that undesired substances, in particular plasma-dissociated, layer-forming reactants, pass through the holes during the application of the front-side layer structure. This additionally reduces the risk that one or more layers of the front side layer structure enter the recesses.
  • the emitters produced by the method according to the invention preferably have the following layer resistances and / or doping concentrations at the surface of the semiconductor substrate:
  • the front-side emitter has a sheet resistance between 50 ⁇ / o and 200 ⁇ / o and / or a surface doping concentration between 1x10 19 cm “3 and 5x10 20 cm “ 3 , and / or
  • the back emitter has a sheet resistance between 5 ⁇ / o and 50 ⁇ / D and / or a surface doping concentration between 1x10 20 cm “3 and 1 ⁇ 10 21 cm “ 3
  • / or the plurality of compound emitters have a sheet resistance between 5 ⁇ / ⁇ and 50 ⁇ / D and / or a surface doping concentration between 1 ⁇ 10 20 cm -3 and 1 ⁇ 10 21 cm -3 .
  • Figure 1 shows an embodiment of the method according to the invention according to the second variant
  • Figure 2 shows an embodiment of the method according to the invention according to the first variant.
  • FIGS. 1 and 2 each show partial cross-sections through a semiconductor substrate in a schematic representation at different stages of the production process. Shown in each case is a semiconductor substrate 1 designed as a monocrystalline silicon wafer, which is penetrated by approximately cylindrical recesses 2, 2 ', 2 ", wherein the cylinder axes are perpendicular to a front side 1 a of the semiconductor substrate 1.
  • the semiconductor substrate 1 is homogeneously p-doped.
  • masking layers 3 are initially applied to a back side 1 b of the semiconductor substrate 1 applied.
  • the masking layer 3 defines the areas where the backside 1b will not be covered by a backside emitter.
  • a front side layer structure is applied to the front side 1 a of the semiconductor substrate 1, which consists of a front side doping layer 4, which is formed as a silicon oxide layer containing phosphorus.
  • a diffusion barrier layer 5 is applied, which is formed as a dopant-free silicon oxide layer.
  • Front side doping layer 4 and diffusion barrier layer 5 are respectively applied over the whole area to the front side 1 of the semiconductor substrate. Both layers are deposited by means of PECVD, wherein TMCTS and TMPi are used as precursor liquids in the front side doping layer 4 and TMCTS as precursor liquid in the case of the diffusion barrier layer 5.
  • front-end dopant layer 4 about 180 sccm of oxygen, 20 sccm of TMCTS-saturated argon, and ⁇ sccmTMPi-saturated argon are introduced into the process chamber.
  • the precursor liquid TMCS is also used and the process condition differs from the aforementioned essentially in that the phosphorus content is reduced to 0%.
  • the resulting layer structure is shown in FIG. 1 b.
  • backside emitter areas 8a are also generated in this embodiment. These arise due to openings of the masking layer 3, which serve for subsequent contacting of the semiconductor substrate by means of a metallization structure. In this contacting, the emitter region 8a is overcompensated, so that after contacting there is a region of the first doping type, ie a p-doped base region.
  • so-called phosphor glass is formed on the surface of the semiconductor substrate in the areas of the connection emitter and back emitter.
  • This process status is shown in FIG. 1 c.
  • etching was carried out using 10% hydrofluoric acid (HF) for a period of 1 minute.
  • HF hydrofluoric acid
  • FIG. 2 shows an exemplary embodiment of the first variant of the method according to the invention.
  • Figure 2a represents the same starting situation, as already described for Figure 1 a.
  • a diffusion barrier layer 9 is applied over the entire area on the front side 1 a of the semiconductor substrate 1, wherein the diffusion barrier layer 9 is formed as a silicon dioxide layer.
  • the diffusion barrier layer 9 was also deposited by PECVD using silane as the precursor gas. The process parameters were chosen such the layer has a refractive index of 1.46 at 632 nm. The layer thickness of the diffusion barrier layer is about 30 nm.
  • a diffusion out of the gas phase is carried out.
  • the doping of the front-side emitter 6 likewise takes place from the gas phase, the entry of dopant into the semiconductor substrate 1 on the front side 1 a, however, being inhibited by the diffusion barrier layer 9.
  • the front side layer structure and the phosphor glass are also removed in this variant, so that a result according to FIG. 2 d results analogously to FIG. 1 d, wherein the characteristic of the doping profiles of the front side emitter lies between varies the two variants. In both cases, however, the front emitter is less doped compared to the back emitter and junction emitter.
  • the emitter diffusions in both embodiments were carried out in a tube diffusion furnace. It is essential that the production of all E mitter Schemee takes place in situ, d. H. without semiconductor substrate having to be removed from the oven and then reinserted.

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Abstract

L'invention concerne un procédé de fabrication d'une cellule solaire EWT à partir d'un substrat semi-conducteur (1) d'un premier type de dopage et comportant une face avant, une face arrière et une pluralité d'évidements s'étendant chacun de la face avant vers la face arrière du substrat semi-conducteur, le procédé comportant les étapes suivantes: A créer au moins les zones d'émission suivantes, d'un deuxième type de dopage opposé au premier, dans le substrat semi-conducteur (1): un émetteur face avant qui couvre au moins partiellement la face avant du substrat semi-conducteur, un émetteur face arrière qui couvre partiellement la face arrière du substrat semi-conducteur, et une pluralité d'émetteurs de liaison couvrant chacun au moins partiellement la paroi d'un évidement, de sorte que l'émetteur face avant soit relié de manière électriquement conductrice avec l'émetteur face arrière par l'intermédiaire des émetteurs de liaison, les zones d'émission formant chacune une transition pn vers le substrat semi-conducteur (1); B appliquer au moins une structure de contact de base et au moins une structure de contact d'émission respectivement sur la face arrière du substrat semi-conducteur, éventuellement après l'application d'autres couches intermédiaires, la structure de contact de base étant reliée de manière électriquement conductrice avec au moins une zone du substrat semi-conducteur non couverte par un émetteur et la structure de contact d'émission étant reliée de manière électriquement conductrice avec l'émetteur face arrière. L'invention est caractérisée en ce qu'avant l'étape A, une structure de couche de face avant est appliquée sur la face avant du substrat semi-conducteur, cette structure de couche de face avant comportant au moins une couche barrière de diffusion qui empêche la pénétration de dopants, ne contient pas de dopant du deuxième type de dopage et/ou comporte au moins une couche de dopage de face avant contenant le dopant du deuxième type de dopage, et en ce que, lors de l'étape A, une diffusion est réalisée au moyen d'au moins un dopant du deuxième type de dopage à partir de la phase gazeuse pour générer au moins l'émetteur face arrière et la pluralité d'émetteurs de liaison, la diffusion à partir de la phase gazeuse et la génération de l'émetteur face avant étant réalisées sur place dans un four à diffusion.
PCT/EP2010/003583 2009-06-22 2010-06-15 Procédé de fabrication d'une cellule solaire ewt WO2010149294A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102009030096A DE102009030096A1 (de) 2009-06-22 2009-06-22 Verfahren zur Herstellung einer EWT-Solarzelle
DE102009030096.1 2009-06-22

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4104091A (en) 1977-05-20 1978-08-01 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Application of semiconductor diffusants to solar cells by screen printing
US4514440A (en) 1983-12-12 1985-04-30 Allied Corporation Spin-on dopant method
US7135350B1 (en) 2003-10-03 2006-11-14 Sunpower Corporation Use of doped silicon dioxide in the fabrication of solar cells

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0881694A1 (fr) * 1997-05-30 1998-12-02 Interuniversitair Micro-Elektronica Centrum Vzw Cellule solaire et méthode de fabrication
JP2002134488A (ja) * 2000-10-25 2002-05-10 Sony Corp 成膜方法およびプラズマ化学気相成長装置
JP2003209271A (ja) * 2002-01-16 2003-07-25 Hitachi Ltd 太陽電池およびその製造方法
US20090126786A1 (en) * 2007-11-13 2009-05-21 Advent Solar, Inc. Selective Emitter and Texture Processes for Back Contact Solar Cells

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4104091A (en) 1977-05-20 1978-08-01 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Application of semiconductor diffusants to solar cells by screen printing
US4514440A (en) 1983-12-12 1985-04-30 Allied Corporation Spin-on dopant method
US7135350B1 (en) 2003-10-03 2006-11-14 Sunpower Corporation Use of doped silicon dioxide in the fabrication of solar cells

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
J.M. GEE; W. K. SCHUBERT; P. A. BASORE: "Emitter wrap-through solar cell", PROCEEDINGS OF THE 23RD IEEE PHOTOVOLTAIC SPECIALISTS CONFERENCE, 1993, pages 265 - 270
N. MINGIRULLI; S. TRITTLER; M. BUI; A. GROHE; D. BIRO; R. PREU; S. W. GLUNZ: "Passivation of laser-drilled via holes for emitter-wrap-through-cells", PROCEEDINGS OF THE 23RD EUROPEAN PHOTOVOLTAIC SOLAR ENERGY CONFERENCE, 2008, pages 996 - 999

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