WO2010058445A1 - Plasma display panel - Google Patents

Plasma display panel Download PDF

Info

Publication number
WO2010058445A1
WO2010058445A1 PCT/JP2008/003417 JP2008003417W WO2010058445A1 WO 2010058445 A1 WO2010058445 A1 WO 2010058445A1 JP 2008003417 W JP2008003417 W JP 2008003417W WO 2010058445 A1 WO2010058445 A1 WO 2010058445A1
Authority
WO
WIPO (PCT)
Prior art keywords
dielectric layer
electrode
thickness
discharge
display panel
Prior art date
Application number
PCT/JP2008/003417
Other languages
French (fr)
Japanese (ja)
Inventor
池田大助
平原英明
木舩素成
Original Assignee
日立プラズマディスプレイ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立プラズマディスプレイ株式会社 filed Critical 日立プラズマディスプレイ株式会社
Priority to PCT/JP2008/003417 priority Critical patent/WO2010058445A1/en
Publication of WO2010058445A1 publication Critical patent/WO2010058445A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/20—Constructional details
    • H01J11/34—Vessels, containers or parts thereof, e.g. substrates
    • H01J11/38—Dielectric or insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/10—AC-PDPs with at least one main electrode being out of contact with the plasma
    • H01J11/12—AC-PDPs with at least one main electrode being out of contact with the plasma with main electrodes provided on both sides of the discharge space
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/20—Constructional details
    • H01J11/22—Electrodes, e.g. special shape, material or configuration
    • H01J11/24—Sustain electrodes or scan electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
    • H01J9/02—Manufacture of electrodes or electrode systems
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2211/00—Plasma display panels with alternate current induction of the discharge, e.g. AC-PDPs
    • H01J2211/20—Constructional details
    • H01J2211/22—Electrodes
    • H01J2211/225—Material of electrodes

Definitions

  • the present invention relates to a display device, and more particularly to a plasma display panel that takes measures against a phenomenon in which a discharge electrode formed of a transparent electrode is colored.
  • the PDP display device includes a plasma display panel, a front panel disposed on the front surface of the plasma display panel, a drive circuit disposed on the back surface of the plasma display panel, and a frame that accommodates these.
  • the front panel has a role of an antireflection film, emission of electromagnetic waves, a color filter for adjusting the color tone of an image, and the like, and is generally formed of glass.
  • a pair of scanning electrodes and discharge sustaining electrodes, a front substrate on which a dielectric layer covering the electrode pair is formed, and a rear substrate on which address electrodes, phosphor layers, etc. are formed are overlapped. Configured.
  • the scan electrode extends from the left end of the front substrate to the display area
  • the sustain electrode extends from the right side of the front substrate to the display area in parallel with the scan electrode.
  • the address electrode extends in a direction perpendicular to the scan electrode and the discharge sustain electrode. Scan electrodes and display electrodes are called cells, and cells are formed at intersections between sustain electrodes and address electrodes. Since cells are formed in a matrix in the display area, an image can be formed.
  • Patent Document 1 describes a configuration that counters the phenomenon that the dielectric layer is colored when silver is used for the scan electrode and the sustain electrode. That is, “Patent Document 1” has a configuration in which bismuth oxide (Bi 2 O 3 ) is contained in the dielectric layer in order to suppress the phenomenon that silver oxide is deposited on the dielectric layer and colors the dielectric layer. Are listed. In order to more effectively do this, the dielectric layer is divided into a first layer and a second layer, the thickness of the first layer is in the range of 1 to 3 times the thickness of the scan electrode or sustain electrode, and A configuration is described in which the thickness of the first layer is made thinner than the thickness of the second layer. In addition, a configuration is described in which the concentration of Bi 2 O 3 is smaller in the second layer than in the first layer so that bubbles in the dielectric can be easily removed.
  • Bi 2 O 3 bismuth oxide
  • dielectric layers not containing lead have been used for environmental measures.
  • the dielectric layer melts.
  • the dielectric layer does not contain lead, when the dielectric layer melts, the fluidity becomes insufficient and the dielectric layer It is difficult for bubbles generated in In order to ensure fluidity of the dielectric layer when melted, it is necessary to melt and sinter the dielectric layer at a higher temperature.
  • the reaction between the scan electrode or the sustain electrode and the glass material constituting the dielectric layer becomes a problem.
  • Patent Document 1 describes a configuration for preventing the dielectric layer from being colored when silver is used for the scan electrode or the sustain electrode.
  • silver is excellent in conductivity but expensive.
  • bismuth used for suppressing the reaction between silver and the glass constituting the dielectric layer is also a heavy metal and still causes an environmental burden.
  • An object of the present invention is to take measures against a red discoloration phenomenon that occurs in the vicinity of a scan electrode or a sustain electrode, which occurs when copper is used for the scan electrode or the electrode. Another object of the present invention is to prevent such red discoloration without using a heavy metal such as bismuth.
  • the present invention solves the above-described problems, and specific means are as follows.
  • the discharge electrode is formed of ITO
  • the bus electrode is formed by stacking chromium or chromium oxide, copper, and chromium
  • the dielectric layer includes a first dielectric layer and a second dielectric layer.
  • a dielectric layer is formed by laminating, and the first dielectric layer and the second dielectric layer are substantially formed of low melting point glass that does not contain lead and contains zinc oxide as the most component,
  • the thickness of the display electrode composed of the discharge electrode and the bus electrode is d1
  • the thickness of the lower first dielectric layer in contact with the display electrode is d2
  • the thickness of the upper second dielectric layer is When d3 is d3, d2 is the front d1 is twice to four times, a plasma display panel wherein d3 may be greater than the d2.
  • a display electrode comprising a transparent discharge electrode and a metal bus electrode is formed on a front substrate of a pair of substrates forming a discharge space, the display is covered with a dielectric layer, and the discharge
  • the electrode is formed of ITO
  • the bus electrode is a method of manufacturing a plasma display panel formed by laminating chromium or chromium oxide, copper, and chromium
  • the dielectric layer includes a first dielectric layer and A second dielectric layer is formed by laminating, and the first dielectric layer and the second dielectric layer are formed of low melting point glass that does not substantially contain lead and contains zinc oxide as the most component.
  • the first dielectric layer is applied and fired on the substrate on which the display electrode is formed so as to cover the display electrode, and the second dielectric is covered by covering the first dielectric layer.
  • the first dielectric layer Method of manufacturing a plasma display panel, characterized by higher than the firing temperature of the formation temperature the second dielectric layer.
  • the first dielectric has a discharge electrode formed of ITO and a bus electrode in which chromium or chromium oxide, copper, and chromium are laminated, and does not contain lead so as to cover the discharge electrode and the bus electrode.
  • the layer is applied and fired, and the second dielectric layer is applied and fired on the first dielectric layer, and the thickness of the first dielectric layer is the sum of the thickness of the discharge electrode and the bus electrode. Therefore, it is possible to suppress the absolute amount of the reaction between the bus electrode and the first dielectric and to prevent the ITO from being reddish by the copper deposited from the bus electrode.
  • the thickness of the first dielectric layer is set to be twice or more the total thickness of the display electrode composed of the discharge electrode and the bus electrode, the surface of the first dielectric layer is made smooth. And withstand voltage can be maintained.
  • the thickness of the first dielectric layer is made thinner than the thickness of the second dielectric layer, bubbles generated in the first dielectric layer can easily escape to the outside. Furthermore, since the second dielectric layer can be made as thick as necessary, wall charges for AC driving can be accumulated, and between the X discharge electrode and the Y discharge electrode. It is possible to prevent dielectric breakdown or dielectric breakdown between the X bus electrode and the Y bus electrode.
  • FIG. 7 is an exploded perspective view of the display area of the plasma display panel.
  • the plasma display panel is composed of two glass substrates, a front substrate 1 and a rear substrate 2 that are arranged to face each other via a discharge space.
  • a scanning electrode 20 hereinafter also referred to as a Y electrode 20
  • a sustaining electrode 10 hereinafter also referred to as an X electrode 10.
  • the scanning electrode 20 includes a discharge electrode 21 formed of ITO (Indium Tin Oxide) serving as a discharge portion, and a bus electrode 22 formed of metal that supplies a voltage from a terminal portion.
  • ITO Indium Tin Oxide
  • the bus electrode of the scan electrode is referred to as a scan bus electrode or Y bus electrode 22
  • the discharge electrode is referred to as a scan discharge electrode or Y discharge electrode 21.
  • the Y electrode 20 includes the Y bus electrode 22 and the Y discharge electrode 21.
  • the sustain electrode 10 includes a discharge electrode 11 formed of ITO (Indium Tin Oxide) serving as a discharge portion, and a bus electrode 12 that supplies a voltage from the terminal portion.
  • the bus electrode of the sustain electrode is referred to as a sustain bus electrode or X bus electrode 12
  • the discharge electrode is referred to as a sustain discharge electrode or X discharge electrode.
  • the X electrode 10 includes the X bus electrode 12 and the X discharge electrode 11.
  • the X bus electrode 12 and the Y bus electrode 22 both have a metal laminated structure, and have a laminated structure of chromium, copper, and chromium from the front substrate 1 side.
  • Chromium formed on the ITO of the front substrate 1 has excellent adhesion to ITO and has a black surface, so that it has an effect of improving contrast. Copper is used to reduce the resistance of the bus electrode.
  • the chromium is further coated on the copper, but this chromium prevents the resistance of the copper surface from being changed due to oxidation.
  • the chromium on the front substrate side may further have a laminated structure of chromium oxide and chromium. Since the chromium oxide is black and has a smaller reflectance than the chromium, the contrast of the image can be further improved. Chromium oxide also has excellent adhesion with ITO. Moreover, since the contact surface with copper is chromium, copper is not oxidized.
  • the discharge electrode uses ITO, which is a transparent conductive film
  • the bus electrode uses a metal laminated film with low resistance. This is because when the transparent conductive film is used, more light emitted from the phosphor 8 can be extracted outside.
  • the discharge electrode may be formed of the same metal as the bus electrode. In this case, the process is completed once and the manufacturing cost is greatly reduced.
  • the dielectric layer 5 is formed so as to cover the X electrode 10 and the Y electrode 20.
  • a low-melting glass having a softening point of about 500 ° C. is used for the dielectric layer 5.
  • the dielectric layer 5 is divided into two layers and the film thickness of each layer is defined to prevent the X discharge electrode 11 or the Y discharge electrode 21 from turning red. The bubbles can easily escape from the dielectric layer 5.
  • a protective film 6 is formed on the dielectric layer 5.
  • the protective film 6 is mainly made of magnesium oxide (MgO) and is formed by sputtering or vapor deposition.
  • a black belt may be formed. Since the black belt improves the contrast, it needs to be black.
  • a metal laminated film having the same structure as that of the X electrode 10 or the Y electrode 20 is used. Therefore, the black belt and the X electrode 10 or the Y electrode 20 can be formed simultaneously.
  • the metal in contact with the ITO on the front substrate 1 made of glass is black because it is Cr or CrO, and the contrast can be improved.
  • An address electrode 30 (hereinafter also referred to as an A electrode) is formed on the rear substrate 2 so as to be orthogonal to the display electrode of the X electrode 10 and the Y electrode 20 and the pole 22.
  • the structure of the address electrode 30 is the same as that of the X bus electrode 12 or the Y bus electrode 22, and is a laminated structure of chromium, copper, and chromium.
  • the dielectric layer 5 covers the address electrode 30. Generally, the same material as that of the dielectric layer 5 formed on the front substrate 1 is used for the dielectric layer 5 formed on the rear substrate 2.
  • the partition wall 7 is formed to extend in the same direction as the address electrode 30 so as to sandwich the address electrode 30.
  • horizontal barrier ribs 71 are formed in a direction perpendicular to the address electrodes 30, and subpixels (subpixels are also referred to as cells) are formed in a region surrounded by the barrier ribs 7 and the horizontal barrier ribs 71.
  • subpixels are also referred to as cells
  • three color phosphors 8 are applied in different colors.
  • the phosphor 8 has one color so that the red, green, and blue phosphors 8 have the same color in the respective cells arranged in the column direction in the direction in which the partition walls 7 in FIG. 7 extend, and along the extending direction of the display electrodes. They are applied in parallel.
  • a space corresponding to the cell surrounded by the front substrate 1, the rear substrate 2, the partition walls 7, and the horizontal partition walls 71 is a discharge space for enclosing a discharge gas.
  • three subpixels form one pixel (pixel) corresponding to each of the three primary colors (R, B, G).
  • the light emission principle of the plasma display panel is as follows. First, a voltage (discharge start voltage) of about 200 V is applied between the address electrode 30 corresponding to the cell desired to emit light during the address period and the scan electrode 20 corresponding to the cell. Since the address electrode 30 and the scan electrode 20 are orthogonal to each other, a single cell at the intersection can be selected. An address discharge is generated in the selected cell, and charges (wall charges) are accumulated in the dielectric layer 5 corresponding to the cell on the front substrate 1 side by this discharge.
  • a voltage (discharge start voltage) of about 200 V is applied between the address electrode 30 corresponding to the cell desired to emit light during the address period and the scan electrode 20 corresponding to the cell. Since the address electrode 30 and the scan electrode 20 are orthogonal to each other, a single cell at the intersection can be selected. An address discharge is generated in the selected cell, and charges (wall charges) are accumulated in the dielectric layer 5 corresponding to the cell on the front substrate 1 side by this discharge.
  • the sustain discharge is performed only in the cells in which wall charges are accumulated according to the previous address. Will occur.
  • Ultraviolet rays are generated by the sustain discharge, and the phosphor 8 emits light by the ultraviolet rays. Visible light emitted from the phosphor 8 is emitted from the front substrate 1 and is visually recognized by a human. Since the phosphor 8 emits light only in the cells in which charges are accumulated in the address period, an image is formed.
  • FIG. 1 is a sectional view of a front substrate 1 according to the present invention.
  • a sustain discharge electrode (X discharge electrode 11) and a scan discharge electrode (Y discharge electrode 21) are formed on a front substrate 1 made of glass by ITO (Indium Tin Oxide) which is a transparent conductive film.
  • ITO Indium Tin Oxide
  • a metal bus electrode (X bus electrode 12) is formed on the X discharge electrode 11 made of ITO, and the Y discharge electrode 21 is also made of ITO.
  • a bus electrode (Y bus electrode 22) made of metal is formed on the substrate.
  • a combination of the X discharge electrode 11 and the X bus electrode 12 is called an X electrode 10
  • a combination of the Y discharge electrode 21 and the Y bus electrode 22 is called a Y electrode 20.
  • the X bus electrode 12 and the Y bus electrode 22 have a three-layer structure of chromium, copper and chromium as shown in FIG.
  • the role of power supply is mainly played by copper.
  • Lower chrome and upper chrome prevent copper from being oxidized, and lower chrome improves adhesion to ITO.
  • the dielectric layer 5 that covers the X electrode 10 and the Y electrode 20 is formed of low melting point glass that does not substantially contain lead, and its components are, for example, ZnO: 40 to 50 wt% (40 mol%), B 2 O 3 : 25 ⁇ 35wt% (31mol% ), SiO 2: 10 ⁇ 15wt% (15mol%), Na 2 O: 5.9wt% (7mol%), K 2 O: a 9.1wt% (7mol%).
  • the dielectric layer 5 used in this embodiment does not contain lead or other heavy metals. Since the fluidity when the dielectric layer 5 is melted when the low melting point glass constituting the dielectric layer 5 is fired due to the absence of lead, the sintering temperature of the dielectric layer 5 is reduced. It needs to be higher than before. By raising the sintering temperature of the dielectric layer, a chemical reaction between the dielectric layer 5 and the X electrode 10 or the Y electrode 20, which has not been a problem in the past, becomes a problem. This chemical reaction will be described later.
  • the dielectric layer 5 is formed in two steps to form a two-layer structure.
  • the first lower dielectric layer 51 formed first is sintered at a high temperature of 620 ° C. so that it can be sufficiently degassed during sintering. By sintering at such a high temperature, fluidity can be secured when the first dielectric layer 51 is melted, so that bubbles generated in the first dielectric layer 51 can be discharged to the outside. I can do it.
  • the chemical reaction between the X electrode 10 or the Y electrode 20 and the first dielectric layer 51 becomes a problem. By this chemical reaction, bubbles are generated or a reducing action on copper oxide is generated.
  • the chemical reaction between the X electrode 10 or the Y electrode 20 and the first dielectric layer 51 is proportional to the amount of the first dielectric layer 51.
  • the thickness of the first dielectric layer 51 is set to a range of 4 times or less the thickness of the X electrode 10 or the Y electrode 20.
  • the chemical reaction between the X electrode 10 or the Y electrode 20 and the first dielectric layer 51 can be suppressed to a predetermined amount or less. Further, by defining the thickness of the first dielectric layer 51 as described above, bubbles generated in the first dielectric layer 51 can be easily defoamed.
  • the thickness d2 of the first dielectric layer 51 is set to be twice or more the thickness d1 of the X electrode 10 or the Y electrode 20. Therefore, the thickness of the first dielectric layer 51 is set to a value 2 to 4 times the thickness d1 of the X electrode 10 or the Y electrode 20.
  • the specific thickness is about 6 ⁇ m to 12 ⁇ m.
  • a second dielectric layer 52 is formed on the first dielectric layer 51. Since the upper second dielectric layer 52 does not come into contact with the X electrode 10 and the Y electrode 20, a chemical reaction between these electrodes and the second dielectric layer 52 does not occur. Accordingly, since bubbles are rarely generated, there is no need to increase fluidity and facilitate defoaming when the second dielectric layer 52 is sintered. Therefore, the sintering temperature of the second dielectric layer 52 can be sintered at about 560 ° C., which is equivalent to the sintering temperature of the dielectric layer 5 made of conventional low-melting glass containing lead.
  • the thickness can be set to a necessary thickness in order to improve the insulation characteristics between the X electrode 10 and the Y electrode 20. That is, the second dielectric layer 52 can have a thickness d3 larger than that of the first dielectric layer 51. Specifically, for example, when the thickness d2 of the first dielectric layer 51 is 8 ⁇ m, the thickness d3 of the second dielectric layer 52 is 13 ⁇ m, and the total thickness of the dielectric layer 5 is about 21 ⁇ m. I can do it.
  • the protective film 6 has a role of protecting the dielectric from discharge when discharging occurs and emitting secondary electrons to lower the discharge voltage.
  • the film thickness d4 of the protective film 6 is about 1 ⁇ m.
  • FIG. 2 is a process diagram showing a manufacturing process of the front substrate 1 of the plasma display panel according to the present invention.
  • an ITO thin film is formed on a glass substrate serving as a front substrate 1 by a sputtering method, and this is etched into a predetermined shape by a photolithography technique to obtain an X discharge electrode 11 and A Y discharge electrode 21 is formed.
  • a metal thin film is formed and patterned by sputtering and photolithography in the same manner as ITO to form bus electrodes 104.
  • copper is used as the metal thin film, and chromium thin films are formed on and under the copper as an anti-oxidation film of copper and an adhesion layer with ITO.
  • a low melting point glass paste which is a material of the first dielectric layer 51, is applied by a slot coating method or screen printing.
  • the low-melting glass component contains Zn as a main component and does not use lead or other heavy metals.
  • the front substrate 1 coated with the first dielectric layer (low melting point glass paste layer) 51 is baked at 620 ° C. 620 ° C. is higher than the temperature at which the conventional lead-containing dielectric layer 5 is sintered.
  • the first dielectric layer 51 Sintering the first dielectric layer 51 at a high temperature causes a chemical reaction between the X electrode 10 or the Y electrode 20 and the first dielectric layer 51 to generate bubbles. Further, as will be described later, copper oxide is deposited in the first dielectric layer 51, and this copper oxide is reduced by the carbon remaining in the first dielectric layer 51, so that copper is deposited on the ITO film. As a result, the ITO film turns red.
  • the first dielectric layer 51 is set to be 2 to 4 times the thickness of the X electrode 10 or the Y electrode 20, thereby causing a chemical reaction between the X electrode 10 or the Y electrode 20 and the dielectric layer 5.
  • the generated bubbles can easily escape to the outside.
  • the chemical reaction between the X electrode 10 or the Y electrode 20 and the first dielectric layer 51 can be prevented.
  • the amount is limited. This limits the amount of copper deposited on the ITO film and prevents the ITO film from turning red.
  • a low-melting glass paste which is a material of the second dielectric layer 52, is applied on the sintered first dielectric layer 51 by slot coating or screen printing.
  • the thickness of the second dielectric layer 52 is set to an amount sufficient to form wall charges for AC driving and to maintain the withstand voltage between the X electrode 10 and the Y electrode 20. Therefore, the film thickness of the second dielectric layer 52 is made larger than the film thickness of the first dielectric layer 51.
  • the sintering temperature of the second dielectric layer 52 may be lower than the sintering temperature of the first dielectric layer 51 and may be about 560 ° C., which is the same as the sintering temperature of the conventional lead-containing dielectric layer 5. Since the second dielectric layer 52 is not in contact with the X electrode 10 or the Y electrode 20, a chemical reaction with these electrodes does not occur, so that bubbles are not generated. Therefore, when the second dielectric layer 52 is sintered, it is not necessary to ensure fluidity for defoaming when the second dielectric layer 52 is melted. Thereafter, by forming MgO as the protective film 6 by sputtering or the like, the configuration of the front substrate 1 having a two-layer dielectric layer structure as shown in FIG. 1 can be obtained.
  • the components of the first dielectric layer 51 and the second dielectric layer 52 are the same material mainly composed of Zn described above. Therefore, it is easy to manage the material of the dielectric layer 5 and the coating process.
  • FIG. 3 is a detailed sectional view showing the X electrode 10 and the first dielectric layer 51.
  • an X discharge electrode 11 made of ITO is patterned on a front substrate 1 made of glass.
  • the thickness dT of the X discharge electrode 11 is 100 nm to 200 nm.
  • An X bus electrode 12 is formed on the X discharge electrode 11.
  • the X bus electrode 12 is formed of three layers of chromium, copper, and chromium.
  • the role of supplying voltage to the electrodes is mainly copper.
  • the copper thickness dC is 3 ⁇ m. Copper is easily oxidized and has poor adhesion to ITO, so chromium is formed on the lower and upper sides of copper.
  • the thickness of chromium on the lower side of copper, that is, on the front substrate side is 50 nm
  • the thickness of chromium on the upper side of copper, that is, on the discharge space side is 100 nm. Since chrome looks black, the lower chrome also serves as a black matrix, contributing to an improvement in image contrast.
  • chromium oxide CrO is formed instead of lower layer chromium. CrO is superior to Cr in terms of black, and the effect of improving contrast is more excellent. Similar to Cr, CrO has excellent adhesion to glass or ITO. In the case of CrO, the film thickness is about 50 nm as in the case of Cr.
  • a first dielectric layer 51 is formed so as to cover the X electrode 10.
  • the thickness d2 of the first dielectric layer 51 is set to be 2 to 4 times the thickness d1 of the X electrode 10.
  • FIG. 3 illustrates the X electrode 10, but the same applies to the Y electrode 20.
  • FIG. 4 to 6 are diagrams for explaining the mechanism of reddening of ITO.
  • FIG. 4 is a detailed cross-sectional view around the X electrode 10.
  • an X bus electrode 12 is formed on an X discharge electrode 11 formed of ITO.
  • Copper which is the main part of the X bus electrode 12, is covered with chromium above and below the copper in order to prevent oxidation.
  • the copper sides cannot be covered with chrome. This is because the X bus electrode 12 is formed by etching, and the side portions cannot be covered.
  • FIG. 4 shows a state in which the first dielectric layer (low-melting glass paste layer not containing lead) 51 is applied to the X bus electrode 12 in such a state.
  • the first dielectric layer 51 is heated to a high temperature of about 620 ° C. in order to sinter.
  • the first dielectric layer 51 in the present invention is a low-melting glass not containing lead. Therefore, when the first dielectric layer 51 is melted, at the conventional sintering temperature, Since the fluidity of the dielectric layer 51 cannot be ensured sufficiently, defoaming cannot be performed sufficiently. If defoaming is not sufficient, the dielectric strength is adversely affected, so sintering is performed at a high temperature such as 620 ° C.
  • CuxO dissolved in the first dielectric layer 51 at a high temperature is also subjected to a reducing action by the carbon existing in the first dielectric layer 51. That is, the carbon in the first dielectric layer 51 takes oxygen from CuxO. This is shown in FIG.
  • copper deprived of oxygen is deposited on the ITO surface, for example. Since copper is red, when there is a lot of copper deposited on the ITO, ITO that is originally colorless and transparent appears to be colored red. This is the cause of redness.
  • the cause of redness is caused by the fact that CuxO dissolved in the first dielectric layer 51 is reduced by carbon, so that copper is deposited on the ITO surface, but is deposited on the ITO surface. If the amount of copper to be used is small, ITO is not colored. How much copper is deposited on the ITO surface depends on the amount of reduction reaction. The amount of the reduction reaction is proportional to the amount of carbon remaining in the first dielectric layer 51. On the other hand, the amount of carbon is proportional to the amount of the first dielectric layer 51.
  • the dielectric layer 5 is formed of two layers of the first dielectric layer 51 and the second dielectric layer 52, and the thickness of the first dielectric layer 51 in the lower layer in contact with the X electrode 10 or the Y electrode 20 is set.
  • the amount of carbon that reacts with CuxO is limited by setting it to a predetermined thickness or less, and the amount of copper deposited on the ITO surface is limited by limiting the amount of CuxO that is reduced.
  • CO 2 or CO generated by reducing CuxO or the like is melted at a high temperature by setting the thickness of the first dielectric layer 51 to 4 times or less the thickness of the X electrode 10 or the Y electrode 20. Combined with the influence of this, it can be easily released to the outside.
  • the thickness of the first dielectric layer 51 is set to be twice or more the thickness of the X electrode 10 or the Y electrode 20 by slot coating or coating with a low melting point glass paste for front panel medical treatment of the first dielectric layer 51. This is because when the film is formed by a method such as screen printing, such a film thickness is required to make the surface of the first dielectric layer 51 smooth.
  • the thickness of the first dielectric layer 51 in the range of 2 to 4 times the thickness of the X electrode 10 or the Y electrode 20, redness due to copper deposition can be prevented. In addition, it is possible to prevent bubbles from remaining in the first dielectric layer 51 and degrading the withstand voltage between the X electrode 10 and the Y electrode 20.
  • the sintering temperature is the sintering temperature of the first dielectric layer 51. Lower than about 560 ° C.
  • the sintering temperature of the second dielectric layer 52 by suppressing the sintering temperature of the second dielectric layer 52 to 560 ° C., a chemical reaction between the first dielectric layer 51 and the X electrode 10 or the Y electrode 20 occurs, so that the first dielectric layer 51 is newly added. It is possible to suppress such a phenomenon that a large bubble is generated or copper is newly deposited on the first dielectric layer 51.
  • FIG. 3 is a cross-sectional view of a front substrate of a plasma display panel according to the present invention. 3 is a process for manufacturing a front substrate of a plasma display panel according to the present invention.
  • FIG. 3 is a detailed cross-sectional view of an X electrode and a first dielectric layer according to the present invention. It is a 1st figure explaining the mechanism of reddening of ITO. It is a 2nd figure explaining the mechanism of reddening of ITO. It is a 3rd figure explaining the mechanism of reddening of ITO. It is a disassembled perspective view of a plasma display panel.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Gas-Filled Discharge Tubes (AREA)

Abstract

An X-discharge electrode (11) and a Y-discharge electrode (21) which are made of ITO are formed on a front substrate (1) and an X-bus electrode (12) and a Y-bus electrode (22) which are made of a Cr-Cu-Cr stacked structure are formed thereon. A first dielectric layer (51) is formed to cover the X-bus electrode (12) and the like and a second dielectric layer (52) is formed to cover the first dielectric layer (51). When the total thickness of the X-discharge electrode (11) and the X-bus electrode (12) is denoted by d1, the thickness of the first dielectric layer (51) is denoted by d2 and the thickness of the second dielectric layer (52) is denoted by d3, if the thickness d2 is set to be twice through four times the thickness d1 and if the thickness d3 is set to be larger than the thickness d2, red discoloration of the discharge electrodes (11) and (21) made of ITO can be prevented, the removal of bubbles from the first dielectric layer (51) is made possible, and their insulation characteristics can be maintained.

Description

プラズマディスプレイパネルPlasma display panel
　本発明は表示装置に係り、透明電極で形成された放電電極が着色する現象を対策したプラズマディスプレイパネルに関する。 The present invention relates to a display device, and more particularly to a plasma display panel that takes measures against a phenomenon in which a discharge electrode formed of a transparent electrode is colored.
　プラズマディスプレイパネル（ＰＤＰ）を用いたＰＤＰ表示装置は、薄型で特に大画面の表示が可能なディスプレイとして需要が拡大している。ＰＤＰ表示装置は、プラズマディスプレイパネル、プラズマディスプレイパネルの前面に配置された前面パネル、プラズマディスプレイパネルの背面に配置された駆動回路、およびこれらを収容するフレーム等から構成されている。 Demand for plasma display panels (PDPs) using a plasma display panel (PDP) is growing as a thin display capable of displaying a particularly large screen. The PDP display device includes a plasma display panel, a front panel disposed on the front surface of the plasma display panel, a drive circuit disposed on the back surface of the plasma display panel, and a frame that accommodates these.
　前面パネルは、反射防止膜、電磁波の放出、画像の色調を調整するための色フィルタ等の役割を有しており、一般にはガラスで形成される。プラズマディスプレイパネルは対をなす走査電極と放電維持電極、その電極対を被覆する誘電体層等が形成された前面基板と、アドレス電極、蛍光体層等が形成された背面基板とが重ねあわされて構成されている。 The front panel has a role of an antireflection film, emission of electromagnetic waves, a color filter for adjusting the color tone of an image, and the like, and is generally formed of glass. In the plasma display panel, a pair of scanning electrodes and discharge sustaining electrodes, a front substrate on which a dielectric layer covering the electrode pair is formed, and a rear substrate on which address electrodes, phosphor layers, etc. are formed are overlapped. Configured.
　走査電極は前面基板の例えば左側の端部から表示領域に延在し、維持電極は走査電極と平行に前面基板の例えば、右側から表示領域に延在している。アドレス電極は走査電極および放電維持電極と直角方向に延在している。走査電極およびは表示電極とよばれており、維持電極とアドレス電極との交点にセルが形成される。表示領域にはセルがマトリクス状に形成されているので、画像を形成することが出来る。 The scan electrode extends from the left end of the front substrate to the display area, and the sustain electrode extends from the right side of the front substrate to the display area in parallel with the scan electrode. The address electrode extends in a direction perpendicular to the scan electrode and the discharge sustain electrode. Scan electrodes and display electrodes are called cells, and cells are formed at intersections between sustain electrodes and address electrodes. Since cells are formed in a matrix in the display area, an image can be formed.
　「特許文献１」には、走査電極および維持電極に銀を使用した場合に誘電体層が着色する現象を対策する構成が記載されている。すなわち、「特許文献１」には、酸化銀が誘電体層に析出して、誘電体層を着色する現象を抑えるために、誘電体層に酸化ビスマス（Ｂｉ２Ｏ３）を含有させる構成が記載されている。さらにこれをより効果的に行うために、誘電体層を第１層と第２層に分け、第１層の膜厚を走査電極あるいは維持電極の厚さの１乃至３倍の範囲とし、かつ第1層の厚さを第２層の厚さよりも薄くする構成が記載されている。また、誘電体中の気泡を容易に脱泡出来るように、Ｂｉ２Ｏ３の濃度を第２層において第１層よりも小さくする構成が記載されている。 “Patent Document 1” describes a configuration that counters the phenomenon that the dielectric layer is colored when silver is used for the scan electrode and the sustain electrode. That is, “Patent Document 1” has a configuration in which bismuth oxide (Bi 2 O 3 ) is contained in the dielectric layer in order to suppress the phenomenon that silver oxide is deposited on the dielectric layer and colors the dielectric layer. Are listed. In order to more effectively do this, the dielectric layer is divided into a first layer and a second layer, the thickness of the first layer is in the range of 1 to 3 times the thickness of the scan electrode or sustain electrode, and A configuration is described in which the thickness of the first layer is made thinner than the thickness of the second layer. In addition, a configuration is described in which the concentration of Bi 2 O 3 is smaller in the second layer than in the first layer so that bubbles in the dielectric can be easily removed.
特開２００７－２２０３２９号公報JP 2007-220329 A
　近年、環境対策から、鉛を含まない誘電体層が使用されている。誘電体層を高温で焼結する際に、誘電体層が溶融するが、誘電体層に鉛を含ませないと、誘電体層が溶融した時に、流動性が十分でなくなり、誘電体層内に発生した気泡が抜けにくくなる。溶融した場合の誘電体層の流動性を確保するためには、より高温で誘電体層を溶融、焼結する必要がある。しかし、誘電体層をより高温で焼結すると、走査電極あるいは維持電極と誘電体層を構成するガラス材料との反応が問題となる。 In recent years, dielectric layers not containing lead have been used for environmental measures. When the dielectric layer is sintered at a high temperature, the dielectric layer melts. However, if the dielectric layer does not contain lead, when the dielectric layer melts, the fluidity becomes insufficient and the dielectric layer It is difficult for bubbles generated in In order to ensure fluidity of the dielectric layer when melted, it is necessary to melt and sinter the dielectric layer at a higher temperature. However, when the dielectric layer is sintered at a higher temperature, the reaction between the scan electrode or the sustain electrode and the glass material constituting the dielectric layer becomes a problem.
　「特許文献１」においては、走査電極あるいは維持電極に銀を使用した場合に誘電体層が着色することを防止する構成が記載されている。ところで、銀は導電性が優れるが、高価である。また、銀と誘電体層を構成するガラスとの反応を抑えるために使用されるビスマスも重金属であり、依然として環境負荷要因となる。 “Patent Document 1” describes a configuration for preventing the dielectric layer from being colored when silver is used for the scan electrode or the sustain electrode. By the way, silver is excellent in conductivity but expensive. Further, bismuth used for suppressing the reaction between silver and the glass constituting the dielectric layer is also a heavy metal and still causes an environmental burden.
　一方、走査電極および維持電極に銅（Ｃｕ）を用いる構成が存在する。この場合は、銅の酸化を防止するために、銅をクロム（Ｃｒ）によってサンドイッチする構成がとられる。銅を用いた場合にも、走査電極あるいは維持電極と誘電体層の付近で赤色に着色する現象が生ずる。この着色の現象は走査電極あるは放電維持電極に銀を用いた場合とは、全く異なるメカニズムによって生じている。 On the other hand, there is a configuration using copper (Cu) for the scan electrode and the sustain electrode. In this case, in order to prevent oxidation of copper, a configuration is adopted in which copper is sandwiched between chromium (Cr). Even when copper is used, a phenomenon of red coloring occurs in the vicinity of the scan electrode or the sustain electrode and the dielectric layer. This coloring phenomenon is caused by a completely different mechanism from the case where silver is used for the scan electrode or the discharge sustain electrode.
　本発明の課題は、走査電極あるいは、電極に銅を用いた場合に生ずる、走査電極あるいは維持電極付近に生ずる、赤変現象を対策することである。また、本発明の他の目的は、ビスマス等の重金属を用いずに、このような赤変を防止することである。 An object of the present invention is to take measures against a red discoloration phenomenon that occurs in the vicinity of a scan electrode or a sustain electrode, which occurs when copper is used for the scan electrode or the electrode. Another object of the present invention is to prevent such red discoloration without using a heavy metal such as bismuth.
　本発明は以上述べたような課題を解決するものであり、具体的な手段は次のとおりである。 The present invention solves the above-described problems, and specific means are as follows.
　（１）放電空間を形成する一対の基板のうちの前面側の基板上に、透明な放電電極と金属のバス電極からなる表示電極を形成し、前記表示を誘電体層で被覆した構成のプラズマディスプレイパネルであって、前記放電電極はＩＴＯによって形成され、前記バス電極はクロムまたは酸化クロムと、銅と、クロムが積層されて形成され、前記誘電体層は、第１誘電体層と第２誘電体層が積層されて形成され、前記第１の誘電体層及び前記第２の誘電体層は、実質的に鉛を含まず、酸化亜鉛を最も多い成分として含む低融点ガラスから形成され、前記放電電極と、前記バス電極からなる表示電極の厚さをｄ１とし、前記表示電極と接する下層の第１の誘電体層の厚さをｄ２とし、上層の前記第２の誘電体層の厚さをｄ３としたとき、前記ｄ２は前記ｄ１の２倍～４倍であり、前記ｄ３は前記ｄ２よりも大きいことを特徴とするプラズマディスプレイパネル。 (1) Plasma having a structure in which a display electrode including a transparent discharge electrode and a metal bus electrode is formed on a front substrate of a pair of substrates forming a discharge space, and the display is covered with a dielectric layer. In the display panel, the discharge electrode is formed of ITO, the bus electrode is formed by stacking chromium or chromium oxide, copper, and chromium, and the dielectric layer includes a first dielectric layer and a second dielectric layer. A dielectric layer is formed by laminating, and the first dielectric layer and the second dielectric layer are substantially formed of low melting point glass that does not contain lead and contains zinc oxide as the most component, The thickness of the display electrode composed of the discharge electrode and the bus electrode is d1, the thickness of the lower first dielectric layer in contact with the display electrode is d2, and the thickness of the upper second dielectric layer is When d3 is d3, d2 is the front d1 is twice to four times, a plasma display panel wherein d3 may be greater than the d2.
　（２）前記第１の誘電体層の厚さは６μｍ～１２μｍであることを特徴とする（１）に記載のプラズマディスプレイパネル。 (2) The plasma display panel according to (1), wherein the thickness of the first dielectric layer is 6 μm to 12 μm.
　（３）前記第１の誘電体層及び前記第２の誘電体層は重金属を含有しないことを特徴とする（１）に記載のプラズマディスプレイパネル。 (3) The plasma display panel according to (1), wherein the first dielectric layer and the second dielectric layer do not contain heavy metal.
　（４）前記第１の誘電体層と前記第２の誘電体層は同じ材料によって形成されていることを特徴とする（１）に記載のプラズマディスプレイパネル。 (4) The plasma display panel according to (1), wherein the first dielectric layer and the second dielectric layer are made of the same material.
　（５）放電空間を形成する一対の基板のうちの前面側の基板上に、透明な放電電極と金属のバス電極からなる表示電極を形成し、前記表示を誘電体層で被覆し、前記放電電極はＩＴＯによって形成され、前記バス電極はクロムまたは酸化クロムと、銅と、クロムが積層されて形成されたプラズマディスプレイパネルの製造方法であって、前記誘電体層は、第１誘電体層と第２誘電体層が積層して形成し、前記第１の誘電体層及び前記第２の誘電体層は、実質的に鉛を含まず、酸化亜鉛を最も多い成分として含む低融点ガラスによって形成し、前記表示電極が形成された基板上に前記表示電極を覆うように前記第１の誘電体層を塗付して焼成し、前記第１の誘電体層を覆って前記第２の誘電体層を塗付して焼成する際、前記第１の誘電体層の焼成温度を前記第２の誘電体層の焼成温度よりも高くすることを特徴とするプラズマディスプレイパネルの製造方法。 (5) A display electrode comprising a transparent discharge electrode and a metal bus electrode is formed on a front substrate of a pair of substrates forming a discharge space, the display is covered with a dielectric layer, and the discharge The electrode is formed of ITO, and the bus electrode is a method of manufacturing a plasma display panel formed by laminating chromium or chromium oxide, copper, and chromium, and the dielectric layer includes a first dielectric layer and A second dielectric layer is formed by laminating, and the first dielectric layer and the second dielectric layer are formed of low melting point glass that does not substantially contain lead and contains zinc oxide as the most component. Then, the first dielectric layer is applied and fired on the substrate on which the display electrode is formed so as to cover the display electrode, and the second dielectric is covered by covering the first dielectric layer. When the layer is applied and fired, the first dielectric layer Method of manufacturing a plasma display panel, characterized by higher than the firing temperature of the formation temperature the second dielectric layer.
　本発明によれば、ＩＴＯで形成された放電電極と、クロムまたは酸化クロムと銅とクロムが積層されたバス電極を有し、放電電極およびバス電極を覆って鉛を含有しない第１の誘電体層を塗布して焼成し、第１の誘電体層の上に第２の誘電体層を塗布して焼成し、第１の誘電体層の厚さを放電電極とバス電極の厚さの合計の４倍以下に設定するので、バス電極と第１の誘電体の反応の絶対量を抑え、バス電極から析出した銅によってＩＴＯが赤変することを防止することが出来る。 According to the present invention, the first dielectric has a discharge electrode formed of ITO and a bus electrode in which chromium or chromium oxide, copper, and chromium are laminated, and does not contain lead so as to cover the discharge electrode and the bus electrode. The layer is applied and fired, and the second dielectric layer is applied and fired on the first dielectric layer, and the thickness of the first dielectric layer is the sum of the thickness of the discharge electrode and the bus electrode. Therefore, it is possible to suppress the absolute amount of the reaction between the bus electrode and the first dielectric and to prevent the ITO from being reddish by the copper deposited from the bus electrode.
　また、第１の誘電体層の厚さを放電電極とバス電極からなる表示電極の厚さの合計の２倍以上に設定するので、第１の誘電体層の表面を滑らかな面とすることが出来、絶縁耐圧を維持することが出来る。 Further, since the thickness of the first dielectric layer is set to be twice or more the total thickness of the display electrode composed of the discharge electrode and the bus electrode, the surface of the first dielectric layer is made smooth. And withstand voltage can be maintained.
　一方、第１の誘電体層の厚さを第２の誘電体層の厚さよりも薄くするので、第１の誘電体層に発生した気泡が外部に抜けやすくすることが出来る。さらに、第２の誘電体層の厚さを必要なだけ十分に取ることが出来るので、ＡＣ駆動のための壁電荷を蓄積することが出来、また、Ｘ放電電極とＹ放電電極との間の絶縁破壊、あるいはＸバス電極とＹバス電極との間の絶縁破壊を防止することが出来る。 On the other hand, since the thickness of the first dielectric layer is made thinner than the thickness of the second dielectric layer, bubbles generated in the first dielectric layer can easily escape to the outside. Furthermore, since the second dielectric layer can be made as thick as necessary, wall charges for AC driving can be accumulated, and between the X discharge electrode and the Y discharge electrode. It is possible to prevent dielectric breakdown or dielectric breakdown between the X bus electrode and the Y bus electrode.
　本発明の具体的な実施例を説明する前に、本発明が適用される一般的なプラズマディスプレイパネルの構造を説明する。図７は、プラズマディスプレイパネルの表示領域の分解斜視図である。プラズマディスプレイパネルは，放電空間を介して対向配置した前面基板１と背面基板２の２枚のガラス基板から構成されている。前面基板１には、画像形成のための放電を生じさせる走査電極２０（以後Ｙ電極２０ともいう）と維持電極１０（以後Ｘ電極１０ともいう）が平行に配置されている。 Before describing specific embodiments of the present invention, the structure of a general plasma display panel to which the present invention is applied will be described. FIG. 7 is an exploded perspective view of the display area of the plasma display panel. The plasma display panel is composed of two glass substrates, a front substrate 1 and a rear substrate 2 that are arranged to face each other via a discharge space. On the front substrate 1, a scanning electrode 20 (hereinafter also referred to as a Y electrode 20) and a sustaining electrode 10 (hereinafter also referred to as an X electrode 10) that cause discharge for image formation are arranged in parallel.
　走査電極２０は、放電部となるＩＴＯ（Ｉｎｄｉｕｍ　Ｔｉｎ　Ｏｘｉｄｅ）によって形成された放電電極２１と、端子部から電圧を供給する、金属によって形成されたバス電極２２から構成される。以後、説明の便宜上、走査電極のバス電極を走査バス電極またはＹバス電極２２と呼び、放電電極を走査放電電極またはＹ放電電極２１と呼ぶ。また、Ｙ電極２０という場合は、Ｙバス電極２２とＹ放電電極２１を含むものとする。 The scanning electrode 20 includes a discharge electrode 21 formed of ITO (Indium Tin Oxide) serving as a discharge portion, and a bus electrode 22 formed of metal that supplies a voltage from a terminal portion. Hereinafter, for convenience of explanation, the bus electrode of the scan electrode is referred to as a scan bus electrode or Y bus electrode 22, and the discharge electrode is referred to as a scan discharge electrode or Y discharge electrode 21. The Y electrode 20 includes the Y bus electrode 22 and the Y discharge electrode 21.
　維持電極１０は、放電部となるＩＴＯ（Ｉｎｄｉｕｍ　Ｔｉｎ　Ｏｘｉｄｅ）によって形成された放電電極１１と、端子部から電圧を供給するバス電極１２から構成される。以後、説明の便宜上、維持電極のバス電極を維持バス電極またはＸバス電極１２と呼び、放電電極を維持放電電極またはＸ放電電極と呼ぶ。また、Ｘ電極１０という場合は、Ｘバス電極１２とＸ放電電極１１を含むものとする。 The sustain electrode 10 includes a discharge electrode 11 formed of ITO (Indium Tin Oxide) serving as a discharge portion, and a bus electrode 12 that supplies a voltage from the terminal portion. Hereinafter, for convenience of explanation, the bus electrode of the sustain electrode is referred to as a sustain bus electrode or X bus electrode 12, and the discharge electrode is referred to as a sustain discharge electrode or X discharge electrode. The X electrode 10 includes the X bus electrode 12 and the X discharge electrode 11.
　Ｘバス電極１２、Ｙバス電極２２はいずれも金属の積層構造となっており、前面基板１の側からクロム、銅、クロムの積層構造となっている。前面基板１のＩＴＯ上に形成されたクロムは、ＩＴＯとの接着性が優れており、かつ、クロムの表面が黒いので、コントラストの向上のための効果を有する。銅はバス電極の抵抗を小さくするために使用される。銅の上をさらにクロムが被覆しているが、このクロムは、銅の表面が酸化されて抵抗が変化することを防止するためである。 The X bus electrode 12 and the Y bus electrode 22 both have a metal laminated structure, and have a laminated structure of chromium, copper, and chromium from the front substrate 1 side. Chromium formed on the ITO of the front substrate 1 has excellent adhesion to ITO and has a black surface, so that it has an effect of improving contrast. Copper is used to reduce the resistance of the bus electrode. The chromium is further coated on the copper, but this chromium prevents the resistance of the copper surface from being changed due to oxidation.
　前面基板側のクロムはさらに、酸化クロムとクロムの積層構造となる場合もある。酸化クロムは黒色で、反射率がクロムよりも小さいので、画像のコントラストをさらに向上させることが出来る。酸化クロムもＩＴＯとの接着性は優れている。また、銅との接触面はクロムなので、銅が酸化されることも無い。 The chromium on the front substrate side may further have a laminated structure of chromium oxide and chromium. Since the chromium oxide is black and has a smaller reflectance than the chromium, the contrast of the image can be further improved. Chromium oxide also has excellent adhesion with ITO. Moreover, since the contact surface with copper is chromium, copper is not oxidized.
　図７においては、放電電極は透明導電膜であるＩＴＯを使用し、バス電極には抵抗の小さい金属積層膜を使用している。透明導電膜を使用すると、蛍光体８からの発光を外部により多く取り出すことが出来るからである。一方、放電電極をバス電極と同じ金属によって形成する場合もある。この場合は、プロセスが一回で済み、製造コストの大幅な低減になる。 In FIG. 7, the discharge electrode uses ITO, which is a transparent conductive film, and the bus electrode uses a metal laminated film with low resistance. This is because when the transparent conductive film is used, more light emitted from the phosphor 8 can be extracted outside. On the other hand, the discharge electrode may be formed of the same metal as the bus electrode. In this case, the process is completed once and the manufacturing cost is greatly reduced.
　Ｘ電極１０およびＹ電極２０を覆うように誘電体層５が形成される。誘電体層５には軟化点が５００℃程度の低融点ガラスが使用される。本発明においては、後で説明するように、誘電体層５を２層に分け、各層の膜厚を規定することによって、Ｘ放電電極１１あるいはＹ放電電極２１が赤変することを防止するとともに、気泡が誘電体層５から容易に抜け出ることが出来るようにしている。誘電体層５の上に保護膜６が形成される。保護膜６としては，酸化マグネシウム（ＭｇＯ）が主に使用され，スパッタ法または蒸着法によって形成される。 The dielectric layer 5 is formed so as to cover the X electrode 10 and the Y electrode 20. For the dielectric layer 5, a low-melting glass having a softening point of about 500 ° C. is used. In the present invention, as will be described later, the dielectric layer 5 is divided into two layers and the film thickness of each layer is defined to prevent the X discharge electrode 11 or the Y discharge electrode 21 from turning red. The bubbles can easily escape from the dielectric layer 5. A protective film 6 is formed on the dielectric layer 5. The protective film 6 is mainly made of magnesium oxide (MgO) and is formed by sputtering or vapor deposition.
　なお、図６においては、省略されているが、放電を発生する電極対であるＸ電極１０とＹ電極２０の放電ギャップとは反対側の非放電領域には、画像のコントラストを向上させるために黒帯が形成される場合もある。黒帯はコントラストを向上させるものであるから、黒色である必要がある。黒帯はＸ電極１０あるいはＹ電極２０と同じ構造の金属の積層膜が使用される。したがって、黒帯とＸ電極１０あるいはＹ電極２０は同時に形成することが出来る。ガラスで形成された前面基板１の上のＩＴＯと接する金属はＣｒあるいはＣｒＯであるから黒色であり、コントラストの向上を図ることが出来る。 Although omitted in FIG. 6, in order to improve the contrast of the image in the non-discharge region opposite to the discharge gap between the X electrode 10 and the Y electrode 20, which are a pair of electrodes that generate discharge, A black belt may be formed. Since the black belt improves the contrast, it needs to be black. For the black belt, a metal laminated film having the same structure as that of the X electrode 10 or the Y electrode 20 is used. Therefore, the black belt and the X electrode 10 or the Y electrode 20 can be formed simultaneously. The metal in contact with the ITO on the front substrate 1 made of glass is black because it is Cr or CrO, and the contrast can be improved.
　背面基板２には，アドレス電極３０（以後Ａ電極ともいう）が，Ｘ電極１０及びＹ電２０の表示電極と極２２と直交して形成される。アドレス電極３０の構造もＸバス電極１２あるいはＹバス電極２２と同様の構造であり、クロム、銅、クロムの積層構造となっている。アドレス電極３０の上を誘電体層５が被覆している。一般的には背面基板２に形成された誘電体層５も前面基板１に形成された誘電体層５と同じ材料が使用される。 An address electrode 30 (hereinafter also referred to as an A electrode) is formed on the rear substrate 2 so as to be orthogonal to the display electrode of the X electrode 10 and the Y electrode 20 and the pole 22. The structure of the address electrode 30 is the same as that of the X bus electrode 12 or the Y bus electrode 22, and is a laminated structure of chromium, copper, and chromium. The dielectric layer 5 covers the address electrode 30. Generally, the same material as that of the dielectric layer 5 formed on the front substrate 1 is used for the dielectric layer 5 formed on the rear substrate 2.
　背面基板２の誘電体層５の上には、隔壁７がアドレス電極３０を挟むように、アドレス電極３０と同じ方向に延在させて形成されている。図７において、アドレス電極３０と直角方向に横隔壁７１が形成されており、隔壁７と横隔壁７１とで囲まれた領域においてサブピクセル（サブピクセルをセルとも呼ぶ）が形成される。各セル内には３色の蛍光体８が色分けして塗布されている。蛍光体８は、赤、緑、青の蛍光体８が図７の隔壁７が延長する方向の列方向に並ぶ各セルにおいて同色となるように、かつ、表示電極の延長方向に沿って１色ずつ並列して塗付されている。 On the dielectric layer 5 of the rear substrate 2, the partition wall 7 is formed to extend in the same direction as the address electrode 30 so as to sandwich the address electrode 30. In FIG. 7, horizontal barrier ribs 71 are formed in a direction perpendicular to the address electrodes 30, and subpixels (subpixels are also referred to as cells) are formed in a region surrounded by the barrier ribs 7 and the horizontal barrier ribs 71. In each cell, three color phosphors 8 are applied in different colors. The phosphor 8 has one color so that the red, green, and blue phosphors 8 have the same color in the respective cells arranged in the column direction in the direction in which the partition walls 7 in FIG. 7 extend, and along the extending direction of the display electrodes. They are applied in parallel.
　前面基板１と背面基板２と隔壁７と横隔壁７１に囲まれたセル対応の空間が放電ガスを封入する放電空間となっている。カラー表示の場合、３つのサブピクセルがおのおの３原色（Ｒ，Ｂ，Ｇ）に対応してひとつの画素（ピクセル）を形成する。 A space corresponding to the cell surrounded by the front substrate 1, the rear substrate 2, the partition walls 7, and the horizontal partition walls 71 is a discharge space for enclosing a discharge gas. In the case of color display, three subpixels form one pixel (pixel) corresponding to each of the three primary colors (R, B, G).
　プラズマディスプレイパネルの発光の原理は以下のようになっている。まず，アドレス期間に発光させたいセルに対応するアドレス電極３０と，同じく当該セルに対応する走査電極２０との間に２００Ｖ程度の電圧（放電開始電圧）をかける。アドレス電極３０と走査電極２０は直交しているため，その交点にある単独のセルを選択することができる。選択されたセルではアドレス放電が発生し，この放電によって前面基板１側のセル対応の誘電体層５に電荷（壁電荷）が蓄積される。 The light emission principle of the plasma display panel is as follows. First, a voltage (discharge start voltage) of about 200 V is applied between the address electrode 30 corresponding to the cell desired to emit light during the address period and the scan electrode 20 corresponding to the cell. Since the address electrode 30 and the scan electrode 20 are orthogonal to each other, a single cell at the intersection can be selected. An address discharge is generated in the selected cell, and charges (wall charges) are accumulated in the dielectric layer 5 corresponding to the cell on the front substrate 1 side by this discharge.
　続いて、放電維持期間（サステイン期間）において、全てのＸ電極１０とＹ電極２０との間に交互にサステイン電圧パルスを印加すると、先のアドレスによって壁電荷が蓄積されているセルのみでサステイン放電が発生する。このサステイン放電によって紫外線が発生し、この紫外線によって蛍光体８が発光する。蛍光体８から放射された可視光は前面基板１から放出され、人間が視認する。アドレス期間に電荷が蓄積されたセルのみで蛍光体８が発光するので、画像が形成されることになる。 Subsequently, when a sustain voltage pulse is alternately applied between all the X electrodes 10 and the Y electrodes 20 in the discharge sustain period (sustain period), the sustain discharge is performed only in the cells in which wall charges are accumulated according to the previous address. Will occur. Ultraviolet rays are generated by the sustain discharge, and the phosphor 8 emits light by the ultraviolet rays. Visible light emitted from the phosphor 8 is emitted from the front substrate 1 and is visually recognized by a human. Since the phosphor 8 emits light only in the cells in which charges are accumulated in the address period, an image is formed.
　図１は本発明による前面基板１の断面図である。図１において、ガラスで形成された前面基板１の上に、維持放電電極（Ｘ放電電極１１）および走査放電電極（Ｙ放電電極２１）が透明導電膜であるＩＴＯ（Ｉｎｄｉｕｍ　Ｔｉｎ　Ｏｘｉｄｅ）によって形成されている。ＩＴＯは電気抵抗が大きいので、端子部から電圧を供給するために、ＩＴＯからなるＸ放電電極１１の上に金属からなるバス電極（Ｘバス電極１２）、同じくＩＴＯからなるＹ放電電極２１の上に金属からなるバス電極（Ｙバス電極２２）が形成されている。なお、Ｘ放電電極１１とＸバス電極１２の組み合わせをＸ電極１０と呼び、Ｙ放電電極２１とＹバス電極２２の組み合わせをＹ電極２０と呼ぶ。 FIG. 1 is a sectional view of a front substrate 1 according to the present invention. In FIG. 1, a sustain discharge electrode (X discharge electrode 11) and a scan discharge electrode (Y discharge electrode 21) are formed on a front substrate 1 made of glass by ITO (Indium Tin Oxide) which is a transparent conductive film. ing. Since ITO has a large electric resistance, in order to supply a voltage from the terminal portion, a metal bus electrode (X bus electrode 12) is formed on the X discharge electrode 11 made of ITO, and the Y discharge electrode 21 is also made of ITO. A bus electrode (Y bus electrode 22) made of metal is formed on the substrate. A combination of the X discharge electrode 11 and the X bus electrode 12 is called an X electrode 10, and a combination of the Y discharge electrode 21 and the Y bus electrode 22 is called a Y electrode 20.
　Ｘバス電極１２おおびＹバス電極２２は図３に示すように、クロム、銅、クロムの３層構造となっている。給電の役割は主として銅が担う。下層のクロム、上層のクロムは銅が酸化されるのを防止し、また、下層のクロムはＩＴＯとの接着性を改善する。 The X bus electrode 12 and the Y bus electrode 22 have a three-layer structure of chromium, copper and chromium as shown in FIG. The role of power supply is mainly played by copper. Lower chrome and upper chrome prevent copper from being oxidized, and lower chrome improves adhesion to ITO.
　Ｘ電極１０及びＹ電極２０を被覆する誘電体層５は、鉛を実質的に含まない低融点ガラスによって形成され、その成分は例えば、ＺｎＯ：４０～５０ｗｔ％（４０ｍｏｌ％）、Ｂ２Ｏ３：２５～３５ｗｔ％（３１ｍｏｌ％）、ＳｉＯ２：１０～１５ｗｔ％（１５ｍｏｌ％）、Ｎａ２Ｏ：５．９ｗｔ％（７ｍｏｌ％）、Ｋ２Ｏ：９．１ｗｔ％（７ｍｏｌ％）である。 The dielectric layer 5 that covers the X electrode 10 and the Y electrode 20 is formed of low melting point glass that does not substantially contain lead, and its components are, for example, ZnO: 40 to 50 wt% (40 mol%), B 2 O 3 : 25 ~ 35wt% (31mol% ), SiO 2: 10 ~ 15wt% (15mol%), Na 2 O: 5.9wt% (7mol%), K 2 O: a 9.1wt% (7mol%).
　このように、本実施例で用いる誘電体層５には鉛あるいはその他の重金属は含まれていない。鉛が含まれていないことによって誘電体層５を構成する低融点ガラスを焼成するときに誘電体層５が溶融した際の流動性が十分でなくなるために、誘電体層５の焼結温度を従来よりも高くする必要がある。誘電体層の焼結温度を高くしたことによって、従来は問題とならなかった、誘電体層５とＸ電極１０あるいはＹ電極２０との化学反応が問題となる。この化学反応については後で説明する。 Thus, the dielectric layer 5 used in this embodiment does not contain lead or other heavy metals. Since the fluidity when the dielectric layer 5 is melted when the low melting point glass constituting the dielectric layer 5 is fired due to the absence of lead, the sintering temperature of the dielectric layer 5 is reduced. It needs to be higher than before. By raising the sintering temperature of the dielectric layer, a chemical reaction between the dielectric layer 5 and the X electrode 10 or the Y electrode 20, which has not been a problem in the past, becomes a problem. This chemical reaction will be described later.
　この化学反応の量を小さくするために、本発明においては、誘電体層５を２回に分けて形成して２層構造としている。最初に形成する下層の第１誘電体層５１は焼結する際に十分に脱泡できるように、６２０℃の高温で焼結する。このような高温で焼結することによって、第１誘電体層５１が溶融した時に、流動性を確保することが出来るので、第１誘電体層５１内に発生した気泡を外に放出することが出来る。 In order to reduce the amount of this chemical reaction, in the present invention, the dielectric layer 5 is formed in two steps to form a two-layer structure. The first lower dielectric layer 51 formed first is sintered at a high temperature of 620 ° C. so that it can be sufficiently degassed during sintering. By sintering at such a high temperature, fluidity can be secured when the first dielectric layer 51 is melted, so that bubbles generated in the first dielectric layer 51 can be discharged to the outside. I can do it.
　一方、焼結温度を高温とすることによってＸ電極１０あるいはＹ電極２０と、第１誘電体層５１との化学反応が問題となる。この化学反応によって、気泡が発生したり、酸化銅に対する還元作用が生じたりする。このようなＸ電極１０あるいはＹ電極２０と、第１誘電体層５１との化学反応は、第１誘電体層５１の量に比例することになる。本発明では、第１誘電体層５１の厚さをＸ電極１０あるいはＹ電極２０の厚さの４倍以下の範囲に設定する。このように、設定することによってＸ電極１０あるいはＹ電極２０と、第１誘電体層５１との化学反応を所定の量以下に抑えることが出来る。また、このように、第１誘電体層５１の厚さを規定することによって、第１誘電体層５１に生じた気泡を容易に脱泡することが出来る。 On the other hand, when the sintering temperature is increased, the chemical reaction between the X electrode 10 or the Y electrode 20 and the first dielectric layer 51 becomes a problem. By this chemical reaction, bubbles are generated or a reducing action on copper oxide is generated. The chemical reaction between the X electrode 10 or the Y electrode 20 and the first dielectric layer 51 is proportional to the amount of the first dielectric layer 51. In the present invention, the thickness of the first dielectric layer 51 is set to a range of 4 times or less the thickness of the X electrode 10 or the Y electrode 20. Thus, by setting, the chemical reaction between the X electrode 10 or the Y electrode 20 and the first dielectric layer 51 can be suppressed to a predetermined amount or less. Further, by defining the thickness of the first dielectric layer 51 as described above, bubbles generated in the first dielectric layer 51 can be easily defoamed.
　一方、第１誘電体層５１の厚さが所定の値以上でないと、第１誘電体層５１表面が平滑にならず、光透過性を損ない、また、Ｘ電極１０とＹ電極２０との絶縁を十分に保つことが出来ない。本発明では、第１誘電体層５１の厚さｄ２をＸ電極１０またはＹ電極２０の厚さｄ１の２倍以上としている。したがって、第１誘電体層５１の厚さはＸ電極１０あるいはＹ電極２０の厚さｄ１の２倍～４倍の値とする。具体的な厚さは、６μｍ以上で１２μｍ以下程度となる。 On the other hand, if the thickness of the first dielectric layer 51 is not equal to or greater than a predetermined value, the surface of the first dielectric layer 51 is not smooth, the light transmission is impaired, and the X electrode 10 and the Y electrode 20 are insulated. Cannot be kept sufficiently. In the present invention, the thickness d2 of the first dielectric layer 51 is set to be twice or more the thickness d1 of the X electrode 10 or the Y electrode 20. Therefore, the thickness of the first dielectric layer 51 is set to a value 2 to 4 times the thickness d1 of the X electrode 10 or the Y electrode 20. The specific thickness is about 6 μm to 12 μm.
　第１誘電体層５１の上には第２誘電体層５２が形成される。上層の第２誘電体層５２においては、Ｘ電極１０およびＹ電極２０と接触しないので、これらの電極と第２誘電体層５２との化学反応が生ずることはない。したがって、気泡が発生することも少ないので、第２誘電体層５２を焼結するときに、流動性を大きくして、脱泡をしやすくするという必要も無い。そこで、第２誘電体層５２の焼結温度は従来の鉛を含んだ低融点ガラスからなる誘電体層５の焼結温度と同等の、５６０℃程度で焼結することが出来る。 A second dielectric layer 52 is formed on the first dielectric layer 51. Since the upper second dielectric layer 52 does not come into contact with the X electrode 10 and the Y electrode 20, a chemical reaction between these electrodes and the second dielectric layer 52 does not occur. Accordingly, since bubbles are rarely generated, there is no need to increase fluidity and facilitate defoaming when the second dielectric layer 52 is sintered. Therefore, the sintering temperature of the second dielectric layer 52 can be sintered at about 560 ° C., which is equivalent to the sintering temperature of the dielectric layer 5 made of conventional low-melting glass containing lead.
　また、第２誘電体層５２においては、気泡の発生を考慮しなくとも良いので、Ｘ電極１０とＹ電極２０との絶縁特性を向上させるために、必要な厚さとすることが出来る。すなわち、第２誘電体層５２は第１誘電体層５１よりも膜厚ｄ３を大きくすることが出来る。具体的には、例えば、第１誘電体層５１の厚さｄ２を８μｍとした場合、第２誘電体層５２の厚さｄ３を１３μｍとし、誘電体層５全体の厚さを２１μｍ程度とすることが出来る。 Further, in the second dielectric layer 52, since it is not necessary to consider the generation of bubbles, the thickness can be set to a necessary thickness in order to improve the insulation characteristics between the X electrode 10 and the Y electrode 20. That is, the second dielectric layer 52 can have a thickness d3 larger than that of the first dielectric layer 51. Specifically, for example, when the thickness d2 of the first dielectric layer 51 is 8 μm, the thickness d3 of the second dielectric layer 52 is 13 μm, and the total thickness of the dielectric layer 5 is about 21 μm. I can do it.
　第２誘電体層５２の上には、保護膜６としての、ＭｇＯをスパッタリングによって形成する。保護膜６は、放電が生じた際に、誘電体を放電から保護するとともに、２次電子を放出して、放電電圧を低下させる等の役割を持つ。保護膜６の膜厚ｄ４は１μｍ程度である。 On the second dielectric layer 52, MgO as the protective film 6 is formed by sputtering. The protective film 6 has a role of protecting the dielectric from discharge when discharging occurs and emitting secondary electrons to lower the discharge voltage. The film thickness d4 of the protective film 6 is about 1 μm.
　図２は，本発明によるプラズマディスプレイパネルの前面基板１の製造工程を示した工程図である。まず図１（ａ）に示すように、前面基板１となるガラス基板上にＩＴＯの薄膜をスパッタ法により成膜し，これをフォトリソグラフィの手法により所定の形状にエッチングしてＸ放電電極１１およびＹ放電電極２１を形成する。 FIG. 2 is a process diagram showing a manufacturing process of the front substrate 1 of the plasma display panel according to the present invention. First, as shown in FIG. 1A, an ITO thin film is formed on a glass substrate serving as a front substrate 1 by a sputtering method, and this is etched into a predetermined shape by a photolithography technique to obtain an X discharge electrode 11 and A Y discharge electrode 21 is formed.
　続いて図１（ｂ）に示すように、金属薄膜を，ＩＴＯと同様に，スパッタ法とフォトリソグラフィ法により成膜とパターン形成を行い，バス電極１０４を形成する。本実施例では金属薄膜として銅を用い，銅の酸化防止膜およびＩＴＯとの接着層としてクロム薄膜を銅の上下に成膜している。 Subsequently, as shown in FIG. 1B, a metal thin film is formed and patterned by sputtering and photolithography in the same manner as ITO to form bus electrodes 104. In this embodiment, copper is used as the metal thin film, and chromium thin films are formed on and under the copper as an anti-oxidation film of copper and an adhesion layer with ITO.
　次に図１（ｃ）に示すように、第１誘電体層５１の材料である低融点ガラスペーストをスロットコーティング法あるいはスクリーン印刷によって塗布する。この低融点ガラスの成分は先に述べたように、Ｚｎを主成分としており、鉛、あるいは、その他の重金属は使用していない。その後、第１誘電体層（低融点ガラスペースト層）５１が塗布された前面基板１を６２０℃にて焼成する。６２０℃は従来の鉛入りの誘電体層５を焼結するときの温度よりも高い。 Next, as shown in FIG. 1C, a low melting point glass paste, which is a material of the first dielectric layer 51, is applied by a slot coating method or screen printing. As described above, the low-melting glass component contains Zn as a main component and does not use lead or other heavy metals. Thereafter, the front substrate 1 coated with the first dielectric layer (low melting point glass paste layer) 51 is baked at 620 ° C. 620 ° C. is higher than the temperature at which the conventional lead-containing dielectric layer 5 is sintered.
　第１誘電体層５１を高温で焼結することによって、Ｘ電極１０またはＹ電極２０と、第１誘電体層５１との化学反応が生じ、気泡が発生する。さらに、後で述べるように、第１誘電体層５１中に酸化銅が析出し、この酸化銅が第１誘電体層５１中に残留している炭素によって還元されて銅がＩＴＯ膜上に析出し、ＩＴＯ膜が赤変する現象が生ずる。 Sintering the first dielectric layer 51 at a high temperature causes a chemical reaction between the X electrode 10 or the Y electrode 20 and the first dielectric layer 51 to generate bubbles. Further, as will be described later, copper oxide is deposited in the first dielectric layer 51, and this copper oxide is reduced by the carbon remaining in the first dielectric layer 51, so that copper is deposited on the ITO film. As a result, the ITO film turns red.
　本発明では、第１誘電体層５１をＸ電極１０またはＹ電極２０の厚さの２倍～４倍に設定することによって、Ｘ電極１０またはＹ電極２０と誘電体層５との化学反応によって生じた気泡が容易に外部に抜けることが出来るようにした。さらに、第１誘電体層５１をＸ電極１０またはＹ電極２０の厚さの２倍～４倍に設定することによって、Ｘ電極１０またはＹ電極２０と第１誘電体層５１との化学反応の量を限定的なものとしている。これによって、ＩＴＯ膜上に析出する銅の量を制限し、ＩＴＯ膜が赤変することを防止している。 In the present invention, the first dielectric layer 51 is set to be 2 to 4 times the thickness of the X electrode 10 or the Y electrode 20, thereby causing a chemical reaction between the X electrode 10 or the Y electrode 20 and the dielectric layer 5. The generated bubbles can easily escape to the outside. Further, by setting the first dielectric layer 51 to 2 to 4 times the thickness of the X electrode 10 or the Y electrode 20, the chemical reaction between the X electrode 10 or the Y electrode 20 and the first dielectric layer 51 can be prevented. The amount is limited. This limits the amount of copper deposited on the ITO film and prevents the ITO film from turning red.
　次ぎに図２（ｄ）に示すように、焼結された第１誘電体層５１の上にスロットコーティングあるいはスクリーン印刷等によって第２誘電体層５２の材料である低融点ガラスペーストを塗布する。第２誘電体層５２の厚さはＡＣ駆動のための壁電荷を形成するため、および、Ｘ電極１０とＹ電極２０との絶縁耐圧を保つに十分な量とする。このために、第２誘電体層５２の膜厚は第１誘電体層５１の膜厚よりも大きくする。 Next, as shown in FIG. 2D, a low-melting glass paste, which is a material of the second dielectric layer 52, is applied on the sintered first dielectric layer 51 by slot coating or screen printing. The thickness of the second dielectric layer 52 is set to an amount sufficient to form wall charges for AC driving and to maintain the withstand voltage between the X electrode 10 and the Y electrode 20. Therefore, the film thickness of the second dielectric layer 52 is made larger than the film thickness of the first dielectric layer 51.
　また、第２誘電体層５２の焼結温度は第１誘電体層５１の焼結温度よりも低く、従来の鉛入りの誘電体層５の焼結温度と同じ５６０℃程度でよい。第２誘電体層５２はＸ電極１０またはＹ電極２０と接していないので、これらの電極との化学反応は生じないから、気泡の発生も少ない。したがって、第２誘電体層５２が焼結するに際して、第２誘電体層５２が溶融した場合における脱泡のために流動性を確保する必要も無いからである。その後、保護膜６であるＭｇＯをスパッタリング法等で形成することにより、図１に示すような２層の誘電体層構造を持つ前面基板１の構成を得ることが出来る。 Further, the sintering temperature of the second dielectric layer 52 may be lower than the sintering temperature of the first dielectric layer 51 and may be about 560 ° C., which is the same as the sintering temperature of the conventional lead-containing dielectric layer 5. Since the second dielectric layer 52 is not in contact with the X electrode 10 or the Y electrode 20, a chemical reaction with these electrodes does not occur, so that bubbles are not generated. Therefore, when the second dielectric layer 52 is sintered, it is not necessary to ensure fluidity for defoaming when the second dielectric layer 52 is melted. Thereafter, by forming MgO as the protective film 6 by sputtering or the like, the configuration of the front substrate 1 having a two-layer dielectric layer structure as shown in FIG. 1 can be obtained.
　本発明においては、第１誘電体層５１も第２誘電体層５２も成分は先に説明したＺｎを主成分とした同じ材料である。したがって、誘電体層５の材料の管理、塗布プロセスの管理が容易である。 In the present invention, the components of the first dielectric layer 51 and the second dielectric layer 52 are the same material mainly composed of Zn described above. Therefore, it is easy to manage the material of the dielectric layer 5 and the coating process.
　図３はＸ電極１０および第１誘電体層５１を示す詳細断面図である。図３において、ガラスで形成された前面基板１の上にＩＴＯによるＸ放電電極１１がパターニングされて形成されている。Ｘ放電電極１１の厚さｄＴは１００ｎｍ～２００ｎｍである。Ｘ放電電極１１の上には、Ｘバス電極１２が形成されている。Ｘバス電極１２はクロム、銅、クロムの３層によって形成されている。 FIG. 3 is a detailed sectional view showing the X electrode 10 and the first dielectric layer 51. In FIG. 3, an X discharge electrode 11 made of ITO is patterned on a front substrate 1 made of glass. The thickness dT of the X discharge electrode 11 is 100 nm to 200 nm. An X bus electrode 12 is formed on the X discharge electrode 11. The X bus electrode 12 is formed of three layers of chromium, copper, and chromium.
　電極に電圧を供給する役割は主として銅が担っている。銅の厚さｄＣは３μｍである。銅は酸化しやすく、ＩＴＯとの接着性がよくないので、銅の下側と上側にはクロムが形成されている。銅の下側の、すなわち前面基板側のクロムの厚さは５０ｎｍであり、銅の上側、すなわち、放電空間側のクロムの厚さは１００ｎｍである。クロムは黒色に見えるので、下側のクロムはブラックマトリクスとしての役割も有し、画像のコントラストの向上に資する。 The role of supplying voltage to the electrodes is mainly copper. The copper thickness dC is 3 μm. Copper is easily oxidized and has poor adhesion to ITO, so chromium is formed on the lower and upper sides of copper. The thickness of chromium on the lower side of copper, that is, on the front substrate side is 50 nm, and the thickness of chromium on the upper side of copper, that is, on the discharge space side, is 100 nm. Since chrome looks black, the lower chrome also serves as a black matrix, contributing to an improvement in image contrast.
　下層のクロムの替わりに酸化クロムＣｒＯが形成される場合もある。ＣｒＯは黒色という点ではＣｒよりも優れており、コントラストの向上の効果はより優れている。ＣｒＯもＣｒと同様にガラスあるいはＩＴＯとの接着性が優れている。ＣｒＯの場合も膜厚はＣｒの場合と同様に５０ｎｍ程度である。 In some cases, chromium oxide CrO is formed instead of lower layer chromium. CrO is superior to Cr in terms of black, and the effect of improving contrast is more excellent. Similar to Cr, CrO has excellent adhesion to glass or ITO. In the case of CrO, the film thickness is about 50 nm as in the case of Cr.
　図３において、Ｘ電極１０を覆って第１誘電体層５１が形成されている。第１誘電体層５１の厚さｄ２はＸ電極１０の厚さｄ１の２倍～４倍に設定されていることは先に説明したとおりである。図３はＸ電極１０について説明しているが、Ｙ電極２０についても同様である。 In FIG. 3, a first dielectric layer 51 is formed so as to cover the X electrode 10. As described above, the thickness d2 of the first dielectric layer 51 is set to be 2 to 4 times the thickness d1 of the X electrode 10. FIG. 3 illustrates the X electrode 10, but the same applies to the Y electrode 20.
　図４～図６はＩＴＯの赤変が発生するメカニズムを説明する図である。図４はＸ電極１０周辺の詳細断面図である。図４において、ＩＴＯによって形成されたＸ放電電極１１の上に、Ｘバス電極１２が形成されている。Ｘバス電極１２の主要部である銅は酸化を防止するために、銅の上下をクロムで覆っている。しかし、銅の側部はクロムによって覆うことは出来ない。Ｘバス電極１２はエッチングによって形成するので、側部は覆うことは出来ないからである。 4 to 6 are diagrams for explaining the mechanism of reddening of ITO. FIG. 4 is a detailed cross-sectional view around the X electrode 10. In FIG. 4, an X bus electrode 12 is formed on an X discharge electrode 11 formed of ITO. Copper, which is the main part of the X bus electrode 12, is covered with chromium above and below the copper in order to prevent oxidation. However, the copper sides cannot be covered with chrome. This is because the X bus electrode 12 is formed by etching, and the side portions cannot be covered.
　そうすると、図４に示すように、銅の側部が酸化されて、ＣｕｘＯが形成される。このような状態のＸバス電極１２に対して第１誘電体層（鉛を含まない低融点ガラスペースト層）５１を塗布した状態のものが図４である。図４において、第１誘電体層５１を焼結するために６２０℃程度の高温に加熱する。本発明における第１誘電体層５１は図１で説明したように、鉛を含まない低融点ガラスであるために、第１誘電体層５１が溶融した時に、従来の焼結温度では、第１誘電体層５１の流動性が十分に確保できないので、脱泡を十分行えない。脱泡が十分でないと絶縁耐圧に悪影響を及ぼすので、６２０℃のような高温で焼結を行う。 Then, as shown in FIG. 4, the side portion of the copper is oxidized to form CuxO. FIG. 4 shows a state in which the first dielectric layer (low-melting glass paste layer not containing lead) 51 is applied to the X bus electrode 12 in such a state. In FIG. 4, the first dielectric layer 51 is heated to a high temperature of about 620 ° C. in order to sinter. As described with reference to FIG. 1, the first dielectric layer 51 in the present invention is a low-melting glass not containing lead. Therefore, when the first dielectric layer 51 is melted, at the conventional sintering temperature, Since the fluidity of the dielectric layer 51 cannot be ensured sufficiently, defoaming cannot be performed sufficiently. If defoaming is not sufficient, the dielectric strength is adversely affected, so sintering is performed at a high temperature such as 620 ° C.
　このように高温で第１誘電体層５１の焼結を行うと、Ｘバス電極１２の側面に形成されていたＣｕｘＯが第１誘電体層５１中に析出する。第１誘電体層５１をＸバス電極１２を覆って塗布した状態では、バインダ等の有機物が含まれており、したがって、炭素が豊富に含まれている。 Thus, when the first dielectric layer 51 is sintered at a high temperature, CuxO formed on the side surface of the X bus electrode 12 is precipitated in the first dielectric layer 51. In a state where the first dielectric layer 51 is applied so as to cover the X bus electrode 12, an organic substance such as a binder is contained, and therefore, abundant carbon is contained.
　これらの有機物は、第１誘電体層５１を高温で焼結した際、ほとんどが外部に飛散するが、一部が第１誘電体層５１中に残る。このように炭素が第１誘電体層５１に残ると、高温となっている第１誘電体層５１中では炭素が酸化物から酸素を奪い、ＣＯ２あるいはＣＯが発生する。これらのＣＯ２あるいはＣＯが気泡となる。 Most of these organic substances are scattered outside when the first dielectric layer 51 is sintered at a high temperature, but a part of the organic matter remains in the first dielectric layer 51. When carbon remains in the first dielectric layer 51 in this way, in the first dielectric layer 51 that is at a high temperature, carbon takes oxygen from the oxide, and CO 2 or CO is generated. These CO 2 or CO becomes bubbles.
　ところで、高温下で、第１誘電体層５１中に溶け出したＣｕｘＯも、第１誘電体層５１に存在する炭素によって還元作用を受ける。すなわち、第１誘電体層５１中の炭素がＣｕｘＯから酸素を奪う。この様子を示すものが図５である。 Incidentally, CuxO dissolved in the first dielectric layer 51 at a high temperature is also subjected to a reducing action by the carbon existing in the first dielectric layer 51. That is, the carbon in the first dielectric layer 51 takes oxygen from CuxO. This is shown in FIG.
　ＣｕｘＯから酸素を奪った炭素はＣＯあるいはＣＯ２となり、気泡が発生する。一方、酸素を奪われた銅は例えば、ＩＴＯ表面に析出する。銅は赤色なので、ＩＴＯ上に析出する銅が多いと、本来は無色透明であるＩＴＯが赤く着色して見える。これが赤変の原因である。 Carbon deprived of oxygen from CuxO becomes CO or CO 2 and bubbles are generated. On the other hand, copper deprived of oxygen is deposited on the ITO surface, for example. Since copper is red, when there is a lot of copper deposited on the ITO, ITO that is originally colorless and transparent appears to be colored red. This is the cause of redness.
　このように、赤変の原因は、第１誘電体層５１中に溶け出したＣｕｘＯが炭素によって還元されることによって、銅がＩＴＯ表面に析出することが原因であるが、ＩＴＯの表面に析出する銅の量が少なければＩＴＯが着色することは免れる。銅がＩＴＯ表面にどの程度析出するかは、還元反応の量による。還元反応の量は第１誘電体層５１中に残存する炭素の量に比例する。一方、炭素の量は、第１誘電体層５１の量に比例する。 As described above, the cause of redness is caused by the fact that CuxO dissolved in the first dielectric layer 51 is reduced by carbon, so that copper is deposited on the ITO surface, but is deposited on the ITO surface. If the amount of copper to be used is small, ITO is not colored. How much copper is deposited on the ITO surface depends on the amount of reduction reaction. The amount of the reduction reaction is proportional to the amount of carbon remaining in the first dielectric layer 51. On the other hand, the amount of carbon is proportional to the amount of the first dielectric layer 51.
　本発明では、誘電体層５を第１誘電体層５１と第２誘電体層５２の２層で形成し、Ｘ電極１０あるいはＹ電極２０と接する下層の第１誘電体層５１の厚さを所定の厚さ以下とすることによってＣｕｘＯと反応する炭素の量を制限し、還元されるＣｕｘＯの量を制限することによって、ＩＴＯ表面に析出する銅の量を制限するものである。 In the present invention, the dielectric layer 5 is formed of two layers of the first dielectric layer 51 and the second dielectric layer 52, and the thickness of the first dielectric layer 51 in the lower layer in contact with the X electrode 10 or the Y electrode 20 is set. The amount of carbon that reacts with CuxO is limited by setting it to a predetermined thickness or less, and the amount of copper deposited on the ITO surface is limited by limiting the amount of CuxO that is reduced.
　実験によれば、第１誘電体層５１の厚さを、Ｘ電極１０あるいはＹ電極２０の厚さの４倍以下とすることによって、例え、ＣｕｘＯが炭素によって還元されたとしても、析出する銅の量は、ＩＴＯを赤変させるほどではないことがわかった。 According to the experiment, by setting the thickness of the first dielectric layer 51 to 4 times or less the thickness of the X electrode 10 or the Y electrode 20, even if CuxO is reduced by carbon, the deposited copper It was found that the amount of was not so great as to cause ITO to turn red.
　一方、第１誘電体層５１の厚さをＸ電極１０あるいはＹ電極２０の厚さの４倍以下とすることによって、ＣｕｘＯを還元すること等によって発生したＣＯ２あるいはＣＯは、高温で溶融することの影響と相俟って外部に容易に放出することが出来る。 On the other hand, CO 2 or CO generated by reducing CuxO or the like is melted at a high temperature by setting the thickness of the first dielectric layer 51 to 4 times or less the thickness of the X electrode 10 or the Y electrode 20. Combined with the influence of this, it can be easily released to the outside.
　なお、第１誘電体層５１の厚さをＸ電極１０またはＹ電極２０の厚さの２倍以上とするのは、第１誘電体層５１の前面パネル医療の低融点ガラスペーストをスロットコーティングあるいはスクリーン印刷のような方法で形成する場合、第１誘電体層５１の表面が平滑なるようにするためには、この程度の膜厚が必要となるからである。 Note that the thickness of the first dielectric layer 51 is set to be twice or more the thickness of the X electrode 10 or the Y electrode 20 by slot coating or coating with a low melting point glass paste for front panel medical treatment of the first dielectric layer 51. This is because when the film is formed by a method such as screen printing, such a film thickness is required to make the surface of the first dielectric layer 51 smooth.
　このように、第１誘電体層５１の厚さをＸ電極１０あるいはＹ電極２０の厚さの２倍から４倍の範囲とすることによって、銅の析出による赤変を防止することが出来、かつ、気泡が第１誘電体層５１に残存してＸ電極１０とＹ電極２０間の耐電圧を劣化させることを防止することが出来る。 Thus, by setting the thickness of the first dielectric layer 51 in the range of 2 to 4 times the thickness of the X electrode 10 or the Y electrode 20, redness due to copper deposition can be prevented. In addition, it is possible to prevent bubbles from remaining in the first dielectric layer 51 and degrading the withstand voltage between the X electrode 10 and the Y electrode 20.
　一方、第１誘電体層５１の厚さだけでは、ＡＣ駆動するための電荷を形成することが出来ないし、Ｘ電極１０とＹ電極２０間の耐電圧を維持することは出来ない。したがって、第１誘電体層５１を焼結した後、第２誘電体層５２の材料である低融点ガラスペーストをスロットコーティングあるいはスクリーン印刷によって塗布し、その後、第２誘電体層５２を焼結する。第２誘電体層５２はＸ電極１０またはＹ電極２０と接していないので、気泡の発生は少く、脱泡の問題は大きくないので、焼結温度は、第１誘電体層５１の焼結温度よりも低い５６０℃程度で行うことが出来る。 On the other hand, only the thickness of the first dielectric layer 51 cannot form a charge for AC driving, and the withstand voltage between the X electrode 10 and the Y electrode 20 cannot be maintained. Therefore, after the first dielectric layer 51 is sintered, the low-melting glass paste as the material of the second dielectric layer 52 is applied by slot coating or screen printing, and then the second dielectric layer 52 is sintered. . Since the second dielectric layer 52 is not in contact with the X electrode 10 or the Y electrode 20, the generation of bubbles is small and the problem of defoaming is not large. Therefore, the sintering temperature is the sintering temperature of the first dielectric layer 51. Lower than about 560 ° C.
　また、第２誘電体層５２の焼結温度を５６０℃に抑えることによって、第１誘電体層５１とＸ電極１０またはＹ電極２０との化学反応が生じて、第１誘電体層５１に新たな気泡が発生する、あるいは第１誘電体層５１に新たに銅が析出するというような現象を抑えることが出来る。 Further, by suppressing the sintering temperature of the second dielectric layer 52 to 560 ° C., a chemical reaction between the first dielectric layer 51 and the X electrode 10 or the Y electrode 20 occurs, so that the first dielectric layer 51 is newly added. It is possible to suppress such a phenomenon that a large bubble is generated or copper is newly deposited on the first dielectric layer 51.
本発明によるプラズマディスプレイパネルの前面基板の断面図である。FIG. 3 is a cross-sectional view of a front substrate of a plasma display panel according to the present invention. 本発明によるプラズマディスプレイパネルの前面基板の製造プロセスである。3 is a process for manufacturing a front substrate of a plasma display panel according to the present invention. 本発明によるＸ電極および第１誘電体層の詳細断面図である。FIG. 3 is a detailed cross-sectional view of an X electrode and a first dielectric layer according to the present invention. ＩＴＯの赤変のメカニズムを説明する第１の図である。It is a 1st figure explaining the mechanism of reddening of ITO. ＩＴＯの赤変のメカニズムを説明する第２の図である。It is a 2nd figure explaining the mechanism of reddening of ITO. ＩＴＯの赤変のメカニズムを説明する第３の図である。It is a 3rd figure explaining the mechanism of reddening of ITO. プラズマディスプレイパネルの分解斜視図である。It is a disassembled perspective view of a plasma display panel.
符号の説明Explanation of symbols
　１・・・前面基板、　２・・・背面基板、　３・・・シール部、　５・・・誘電体層、　６・・・保護膜、　７・・・隔壁、　８・・・蛍光体、１０・・・Ｘ電極、　１１・・・Ｘ放電電極、　１２・・・Ｘバス電極、　２０・・・Ｙ電極、　２１・・・Ｙ放電電極、　２２・・・Ｙバス電極、　３０・・・アドレス電極、　５１・・・第１誘電体層、　５２・・・第２誘電体層、　７１・・・横隔壁。 DESCRIPTION OF SYMBOLS 1 ... Front substrate, 2 ... Back substrate, 3 ... Seal part, 5 ... Dielectric layer, 6 ... Protective film, 7 ... Partition, 8 ... Phosphor, 10 ... X electrode, 11 ... X discharge electrode, 12 ... X bus electrode, 20 ... Y electrode, 21 ... Y discharge electrode, 22 ... Y bus electrode, 30 ... address Electrode, 51... 1st dielectric layer, 52... 2nd dielectric layer, 71.

Claims (5)

  1. 　放電空間を形成する一対の基板のうちの前面側の基板上に、透明な放電電極と金属のバス電極からなる表示電極を形成し、前記表示を誘電体層で被覆した構成のプラズマディスプレイパネルであって、
    　前記放電電極はＩＴＯによって形成され、前記バス電極はクロムまたは酸化クロムと、銅と、クロムが積層されて形成され、
    　前記誘電体層は、第１誘電体層と第２誘電体層が積層されて形成され、
    　前記第１の誘電体層及び前記第２の誘電体層は、実質的に鉛を含まず、酸化亜鉛を最も多い成分として含む低融点ガラスから形成され、
    　前記放電電極と、前記バス電極からなる表示電極の厚さをｄ１とし、前記表示電極と接する下層の第１の誘電体層の厚さをｄ２とし、上層の前記第２の誘電体層の厚さをｄ３としたとき、
    　前記ｄ２は前記ｄ１の２倍～４倍であり、前記ｄ３は前記ｄ２よりも大きいことを特徴とするプラズマディスプレイパネル。     A plasma display panel having a structure in which a display electrode including a transparent discharge electrode and a metal bus electrode is formed on a front substrate of a pair of substrates forming a discharge space, and the display is covered with a dielectric layer. There,
    The discharge electrode is formed of ITO, and the bus electrode is formed by stacking chromium or chromium oxide, copper, and chromium,
    The dielectric layer is formed by laminating a first dielectric layer and a second dielectric layer,
    The first dielectric layer and the second dielectric layer are formed of a low-melting glass that is substantially free of lead and contains zinc oxide as the most component,
    The thickness of the display electrode composed of the discharge electrode and the bus electrode is d1, the thickness of the lower first dielectric layer in contact with the display electrode is d2, and the thickness of the upper second dielectric layer is When d3 is
    The plasma display panel according to claim 1, wherein d2 is 2 to 4 times d1, and d3 is larger than d2.
  2. 　前記第１の誘電体層の厚さは６μｍ～１２μｍであることを特徴とする請求項１に記載のプラズマディスプレイパネル。 2. The plasma display panel according to claim 1, wherein the thickness of the first dielectric layer is 6 μm to 12 μm.
  3. 　前記第１の誘電体層及び前記第２の誘電体層は重金属を含有しないことを特徴とする請求項１に記載のプラズマディスプレイパネル。 The plasma display panel according to claim 1, wherein the first dielectric layer and the second dielectric layer do not contain heavy metal.
  4. 　前記第１の誘電体層と前記第２の誘電体層は同じ材料によって形成されていることを特徴とする請求項１に記載のプラズマディスプレイパネル。 The plasma display panel according to claim 1, wherein the first dielectric layer and the second dielectric layer are formed of the same material.
  5. 　放電空間を形成する一対の基板のうちの前面側の基板上に、透明な放電電極と金属のバス電極からなる表示電極を形成し、前記表示を誘電体層で被覆し、前記放電電極はＩＴＯによって形成され、前記バス電極はクロムまたは酸化クロムと、銅と、クロムが積層されて形成されたプラズマディスプレイパネルの製造方法であって、
    　前記誘電体層は、第１誘電体層と第２誘電体層が積層して形成し、
    　前記第１の誘電体層及び前記第２の誘電体層は、実質的に鉛を含まず、酸化亜鉛を最も多い成分として含む低融点ガラスによって形成し、
    　前記表示電極が形成された基板上に前記表示電極を覆うように前記第１の誘電体層を塗付して焼成し、前記第１の誘電体層を覆って前記第２の誘電体層を塗付して焼成する際、
    　前記第１の誘電体層の焼成温度を前記第２の誘電体層の焼成温度よりも高くすることを特徴とするプラズマディスプレイパネルの製造方法。     A display electrode composed of a transparent discharge electrode and a metal bus electrode is formed on a front side substrate of a pair of substrates forming a discharge space, and the display is covered with a dielectric layer. The bus electrode is a method of manufacturing a plasma display panel, in which chromium or chromium oxide, copper, and chromium are laminated,
    The dielectric layer is formed by laminating a first dielectric layer and a second dielectric layer,
    The first dielectric layer and the second dielectric layer are substantially made of low melting point glass that does not contain lead and contains zinc oxide as the most component,
    The first dielectric layer is applied and fired on the substrate on which the display electrode is formed so as to cover the display electrode, and the second dielectric layer is covered by covering the first dielectric layer. When applying and firing,
    A method for manufacturing a plasma display panel, wherein a firing temperature of the first dielectric layer is set higher than a firing temperature of the second dielectric layer.
PCT/JP2008/003417 2008-11-20 2008-11-20 Plasma display panel WO2010058445A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2008/003417 WO2010058445A1 (en) 2008-11-20 2008-11-20 Plasma display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2008/003417 WO2010058445A1 (en) 2008-11-20 2008-11-20 Plasma display panel

Publications (1)

Publication Number Publication Date
WO2010058445A1 true WO2010058445A1 (en) 2010-05-27

Family

ID=42197892

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/003417 WO2010058445A1 (en) 2008-11-20 2008-11-20 Plasma display panel

Country Status (1)

Country Link
WO (1) WO2010058445A1 (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0950769A (en) * 1995-05-26 1997-02-18 Fujitsu Ltd Plasma display panel and manufacture thereof
JPH11144623A (en) * 1997-11-05 1999-05-28 Toray Ind Inc Plasma display substrate and its manufacture
JP2001195989A (en) * 1999-04-28 2001-07-19 Matsushita Electric Ind Co Ltd Plasma display panel
JP2003229066A (en) * 2002-02-05 2003-08-15 Matsushita Electric Ind Co Ltd Plasma display panel and method of manufacture and device and paste used for manufacturing plasma display panel
JP2005149937A (en) * 2003-11-17 2005-06-09 Matsushita Electric Ind Co Ltd Plasma display panel and manufacturing method of the same
JP2007305528A (en) * 2006-05-15 2007-11-22 Fujitsu Hitachi Plasma Display Ltd Plasma display panel and manufacturing method therefor

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0950769A (en) * 1995-05-26 1997-02-18 Fujitsu Ltd Plasma display panel and manufacture thereof
JPH11144623A (en) * 1997-11-05 1999-05-28 Toray Ind Inc Plasma display substrate and its manufacture
JP2001195989A (en) * 1999-04-28 2001-07-19 Matsushita Electric Ind Co Ltd Plasma display panel
JP2003229066A (en) * 2002-02-05 2003-08-15 Matsushita Electric Ind Co Ltd Plasma display panel and method of manufacture and device and paste used for manufacturing plasma display panel
JP2005149937A (en) * 2003-11-17 2005-06-09 Matsushita Electric Ind Co Ltd Plasma display panel and manufacturing method of the same
JP2007305528A (en) * 2006-05-15 2007-11-22 Fujitsu Hitachi Plasma Display Ltd Plasma display panel and manufacturing method therefor

Similar Documents

Publication Publication Date Title
US7057342B2 (en) Plasma display panel and production method therefor
JP2001195989A (en) Plasma display panel
EP1600997B1 (en) Plasma display panel
JP4894234B2 (en) Plasma display panel
JP4089733B2 (en) Plasma display panel
WO2010058445A1 (en) Plasma display panel
WO2007094202A1 (en) Plasma display panel
JP3640495B2 (en) Plasma display panel
JP4788304B2 (en) Plasma display panel
JP2007141483A (en) Plasma display panel
JP5113912B2 (en) Plasma display panel and manufacturing method thereof
EP1367621A1 (en) Plasma display panel and method for manufacture thereof
JP2007026793A (en) Plasma display panel
JP2010218942A (en) Manufacturing method of plasma display panel
JP2007109480A (en) Plasma display panel
JP3576955B2 (en) Color plasma display panel
JP4186504B2 (en) Plasma display panel
JP4915106B2 (en) Method for manufacturing plasma display panel and dielectric paste for plasma display panel
JP4289433B2 (en) Plasma display panel
JP2006032044A (en) Plasma display panel
JP4289434B2 (en) Plasma display panel
KR20090046273A (en) Dielectric materials for plasma display panel, pdp using the same and method of preparing the pdp
JP2006278147A (en) Plasma display panel and manufacturing method thereof
JPH11144627A (en) Discharge display device
KR20090035211A (en) Plasma diplay panel and method for fabricating in thereof

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08878242

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08878242

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP