WO2010053568A1

WO2010053568A1 - Nanostructure growth

Info

Publication number: WO2010053568A1
Application number: PCT/US2009/006006
Authority: WO
Inventors: Brian Ruby
Original assignee: Carbon Nanoprobes, Inc.
Priority date: 2008-11-05
Filing date: 2009-11-05
Publication date: 2010-05-14

Abstract

The present invention provides improved methods and apparatus for fashioning multiple nanostructures, such as carbon nanotubes by precisely distancing the first substrate from the second substrate and growing a carbon nanorube therebetween. Generally, the distance between the first substrate and the second substrate is determined by the thickness of a sacrificial layer placed between the first substrate and the second substrate. Portions of the sacrificial layer are removed prior to the growth of multiple nanostructures with a length that correlates to the thickness of the sacrificial layer which was removed.

Description

NANOSTRUCTURE GROWTH

CROSS REFERENCE TO RELATED APPLICATION

[0001] This application claims the benefit of United States Provisional Patent

Application Serial No. 61/111,428, filed November 5, 2008, which is entitled "Nanostructure Growth," the entirety of which is incorporated herein by reference.

FIELD OF THE INVENTION

[0002] This invention relates generally to nanostructures, such as, carbon nanoprobes and methods of manufacture of the carbon nanoprobes. In particular the present invention relates to method and apparatus for fashioning multiple tips of predetermined length.

BACKGROUND

[0003] Nanostructures are molecular structures being developed for numerous useful purposes. Therefore it is of increasing importance to be able to consistently fashion structures on the nano level. For example, carbon nanotubes are carbon-based molecular structures, which can have diameters of a few nanometers and lengths of several nanometers to several micrometers. Carbon nanotubes have unique mechanical and electrical properties that make them useful for a variety of applications. One such use for a carbon nanotube includes a probe tip in atomic force microscopy (AFM). [0004] The resolution of images produced by AFM is related to the size and shape of the probe tip, and tips with small diameters and high aspect ratios of their length to their diameter can be used to resolve small lateral and vertical features. Carbon nanotubes a can be useful as AFM probe tips because they are extremely strong, and can be made of various lengths and aspect ratios to suit the user's needs.

[0005] Carbon nanotubes have been produced for use as AFM tips, as described, for example, by Dai, et al. in U.S. Patent 6,346,189 and in U. S. Patent Application Publication US2002/0178846. However, it has been difficult to efficiently mass produce carbon nanotube tips and even more difficult to efficiently manufacture carbon nanotubes with consistent yields and properties.

SUMMARY OF THE INVENTION

[0006] Accordingly, the present invention is directed to apparatus and methods for improving manufacture of nanostructures, such as carbon nanotubes. During the manufacture of nanostructures two substrates are precisely distanced, one from the other, with a sacrificial layer. Portions of the sacrificial layer are removed, such as, for example, via an etching process, so that nanostructures may be grown in between the two substrates. The distance of one substrate to another at any given points on each of the respective substrates, thereby correlates with the length of a nanostructure that can be fashioned between those points.

[0007] Other embodiments of the present invention can include a computerized system and executable software implementing the methods of the present invention. [0008] Various features and embodiments are further described in the following figures, drawings and claims.

DESCRIPTION OF THE DRAWINGS

[0009] FIG. l is a top view of a patterned substrate.

[0010] FIG. 2 A is a side view of a portion of the patterned substrate showing an array of precursor tips.

[0011] FIG. 2B is a side view of a portion of the patterned substrate showing an array of precursor tips with a layer of resist.

[0012] FIG. 2C is a side view of a portion of the patterned substrate showing an array of precursor tips with a layer of catalytic material on top of the layer of resist.

[0013] FIG. 2D is a side view of a portion of the patterned substrate showing an array of precursor tips with the resist layer removed and catalytic material on the apexes of the precursor tips.

[0014] FIG. 3 A is a top view of a flat, doped substrate with perimeter rails.

[0015] FIG. 3 B is a side view of a sandwich of the patterned substrate and the doped substrate. [0016] FIG. 4 is a schematic view of a processing furnace arrangement.

[0017] FIGS. 5A and FIG5B are schematic side views of a portion of the patterned substrate; so showing en array of precursor tips.

[0018] FIGS. 6 A and 6B are scanning electron micrograph images of a nanotube grown on a precursor tip.

[0019] FIGS. 7A-7H are a series of block diagrams illustrating various components of some embodiments of the present invention.

[0020] FIGS. 8A-8H are a series of block diagrams illustrating various components of additional embodiments of the present invention utilizing a tip structure.

DETAILED DESCRIPTION

Overview

[0021] It has been disclosed to utilize a first substrate and a second substrate to facilitate growth of nanostructures to a length corresponding to a distance between the first substrate and the second substrate, for example in WO 2005/046305. The present invention provides improved methods and apparatus for fashioning multiple nanostructures, such as carbon nanotubes by precisely distancing the first substrate from the second substrate and growing a carbon nanotube therebetween. Generally, the distance between the first substrate and the second substrate is determined by the thickness of a sacrificial layer placed between the first substrate and the second substrate. Portions of the sacrificial layer are removed prior to the growth of multiple nanostructures with a length that correlates to the thickness of the sacrificial layer which was removed.

Devices and Methods

[0022] Referring to FIG. IA, a commercially available wafer substrate 100 is provided.

The wafer can be made, for example, of silicon or other material suitable for fabricating an array of nanostructures. In some embodiments, the wafer substrate 100 can be attached to a thicker substrate to provide support and flatness to the wafer substrate 100 while chemical vapor deposition (CVD) steps are performed on the substrate 100.

[0023] Referring now to FIG. IB, an oxide layer can be applied as a top surface 102 of the substrate 100. In some embodiments, a polymethlymethacrylate (PMMA) material can be used for the resist layer 204, but other materials can also be used. Some embodiments, can include the resist layer 204 which pools around the bases of the pyramidal tips 202, leaving the apexes of the pyramidal tips 202 uncoated by the resist layer. In some embodiments of the present invention, the resist layer 204 can be applied to the top surface 102 in a single application and in other embodiments, several applications of the resist layer 204 can be applied to reach a desired thickness of the resist layer 204.

[0024] In the present invention, the resist layer 204 is applied in a thickness that covers most of the pyramidal tips 202 but leaves the apexes 206 of the tips exposed. After an adequate amount of resist 204 has been applied to cover some or all of the apexes 206 of the pyramidal tips 202, the resist 204 can be hardened. Hardening can be accomplished, for example, by baking the resist 204 on a hot plate at about 90 °C for about one minute, although other known methods in the industry can also be utilized.

[0025] Referring now to Fig. 2C, a catalyst suspension layer 208 is spin coated onto the apexes 206 of the pyramidal tips 202 and on top of the resist layer 204. The catalyst layer 208 contains materials that catalyze the growth of nanotubes on the apexes 206 of the tips 202. For example, catalyst suspension layer 208 containing Fe-Mo nanoparticles for catalyzing the growth of nanotubes can be prepared according to a procedure described in Li and Liu, "Preparation of Monodispersed Fe-Mo Nanoparticles as the Catalyst for CVD Synthesis of Carbon Nanotubes," Chem. Matter, Vol. 13, pp. 1008-14 (2001), which is incorporated herein by reference.

[0026] A catalyst suspension solution can be created, for example, by dissolving 1.00 mmol (0.196 g) Fe(CO)s, 0.020 mmol (0.053 g) Mo(CO)6, 0.100 mmol (0. 144 g) octanoic acid and 0.100 retool (0.242 g) bis-2-ethylhexylamine in 5.00 mL octyl ether and refluxing the solution under an N2 atmosphere for 30 minutes at high temperature (e.g., about 300 °C). In some embodiments, the formation of Fe-Mo catalytic nanoparticles in the solution can be indicated by the solution turning black. Some embodiments can also include the use of other catalytic materials. For example, a Co-Mo catalyst embedded in a silica matrix can be prepared according to a procedure described in "Long and Oriented Single-Walled Carbon Nanotubes Grown by Ethanol Chemical Vapor Deposition," Limin Huang, Xiaodong Cut, Brian White, and Stephen P. O'Brien, J. Phys. Chem. B. vol. 108, pp. 16451-56 (2004) (hereinafter "Huang").

[0027] In an alternative method, catalyst material can be applied to the entire surface 102 of the substrate 100 without first applying a resist layer. In such a case, the catalyst material is not limited to the apex 206 of a precursor tip 202, but is applied over the entire surface of the tip 202.

[0028] After the catalytic material solution is prepared according to Huang it can be poured onto the central patterned portion 104. The first substrate 100 is pre-heated at 200° C for 15 minutes so that when the catalyst solution is applied it evaporates very quickly, leaving the apexes 206 of the pyramidal tips 202 coated with a catalytic material 208, as shown in FIG. 2D.

[0029] The pyramidal tips 202 provide a precursor base upon which nanotube tips are grown and can also be referred to as precursor tips 202. In some embodiments, the precursor tips 202 need not be pyramidal in shape but can be of any shape that provides a base upon which a catalytic material 208 may be deposited. The catalyst-coated apexes 206 are then calcinated according to the procedure described in Huang.

[0030] Although a method of applying catalyst material to the apexes 202 of precursor tips 202 has been described, catalyst material may be applied to localized islands at the end of individual cantilevers by other methods, and the presence of a precursor tip 202 is not necessary for locating catalyst material at the ends of the cantilevers. For example, known masking and lithography techniques can be used to deposit small catalyst islands directly onto the ends of flat cantilevers without using precursor tips 202 that protrude from the cantilevers.

[0031] Referring to FIGS. 3 A and 3B, a second substrate 300 having an etched top surface 302 with perimeter rails 304 that are higher than a central flat portion 306 can be placed over the first substrate 100 in a position that allows multiple nanotubes having predetermined lengths to be grown simultaneously on the apexes 206 of the precursor tips 202. The rails 304 of the second substrate 300 can be of equal height or they can be different heights. The rails can be created on a flat, doped silicon substrate 300 by well-known lithography and etching techniques . For example, lithography and etching techniques can be used to remove t a layer from the surface of the substrate except in the regions of the rails 304, which are not etched, such that rails 304 that extend above the surface 306 of the substrate 300 remain after the etching process.

[0032] Referring now to FIG.3B, when the second substrate 300 is placed on top of the patterned wafer 100, the perimeter rails 304 rest on the perimeter 106 of the patterned wafer 100 so that the central flat portion 306 of the second substrate 300 is disposed at a distance, d, from the top surface 102 of the patterned wafer 100 to form a sandwich having a hollow central tunnel between the patterned wafer 100 and the second wafer 300. Although FIG.3B shows the precursor tips 202 facing up, the orientation of the first wafer 100 and the second wafer 300 can be reversed, such that the first wafer 100 is above the second wafer 300 and the precursor tips 202 face down. A layer of conductive material can be deposited on the surface 306 of the second wafer 300 to enhance the conductivity of the wafer when used to shorten the nanotubes grown on the precursor tips 202, as described in more detail below. For example, a conductive material as described in Maruyama et al., "Direct Synthesis of High- Quality Single- Walled Carbon Nanotubes on Silicon and Quartz Substrates," Chem. Phys. Lett., Vol. 377, p. 49-54, which is incorporated herein by reference, can be applied to the surface 306 of the wafer. The layer of conductive material can also include catalytic material for catalyzing the growth of nanotubes on the surface or for attracting nanotubes grown on the precursor tips 202 to grow directly towards the surface 306. [0033] Nanotubes can be grown on the apexes 206 of the precursor tips 202 by flowing carbon-containing gasses through the hollow central tunnel and over the apexes 206. In the tunnel between the patterned wafer 100 and the second wafer 300, the apexes 206 are located at a distance from the central flat portion 306 of the second substrate 300, where the distance between the central flat portion 306 and the apexes 206 of the precursor tips 202 is equal to the distance, d, minus the height of the precursor tips 202. When the rails 304 are of equal height, this distance is substantially constant across the entire surface of the flat portion 306. All things otherwise equivalent, if the rails are of different heights, the distance varies across the central flat portion 306.

[0034] The distance between the apexes 206 of the precursor tips 202 and the surface

306 of the doped substrate 300 determines the maximum length to which nanotubes can grow on the precursor tips 202. This maximum length can be chosen to be between 5 nanometers and 500 micrometers. The second substrate 300 can be made of doped silicon (e.g., doped with 107 boron atoms per cm3) so that the substrate 300 is conductive. An electrical contact 312 can be disposed on a back surface 310 of the second substrate 300, such that an electrical potential can be applied to the substrate 300.

[0035] After the wafer sandwich is constructed, a carbon-containing gas is flowed through the central tunnel to grow nanotubes on the apexes 206 of the precursor tips 202 through a CVD process.

[0036] Referring to FIG. 4, as described in Zheng, et al., "Efficient CVD Growth of

Single- Walled Carbon Nanotubes on Surfaces Using Carbon Monoxide Precursor," Nano Lett., Vol. 2, pp. 895-898 (2002), which is incorporated herein by reference, in one process for growing the nanotubes, a two furnace arrangement can be used. The wafer sandwich is positioned in a second furnace 404, and H2 is input from a first gas source 400 at a rate of 400 standard cubic centimeters per minute (SCCM) into a first furnace 402 until the first furnace reaches a temperature of about 500 °C, while H2 is input from a second gas source 0 406 at a rate of 400 SCCM into a second furnace 404 until the second furnace reaches a temperature of about 800 - 900 °C. The first furnace 402 and the second furnace 404 are coupled by a small conduit 408, such that gas can flow from one furnace to the other. When both furnaces 402 and 404 reach their intended temperatures, the gas flow into the first furnace 402 is changed to CO at a rate of 400 SCCM, and the flow of H2 into the second furnace 404 is increased to 800 SCCM. While CO flows through the central tunnel of the wafer sandwich and over the surface 102 of the patterned wafer, CO is dissociated and carbon nanotubes grow on the catalyst covered apexes 206 of the precursor tips 202.

[0037] Nanotubes grow on the precursor tips 202 perpendicular to the surface 102 of the wafer until they reach the flat central portion 306 of the second wafer 300. In some embodiments, the gas flows can be maintained for about 15 minutes and then the entire system can be cooled under a flow of H2.

[0038] Growth of nanotubes on the catalyst islands at the apexes 206 of the precursor tips progresses until the nanotubes reach their maximum length near to or in contact with the surface 306 of the doped silicon wafer 300.

[0039] Although a two furnace setup using CO as a source of carbon can be used to grow nanotubes, nanotubes can be grown using other methods as well. For example, a single furnace can be used with methane as the source of carbon, as described by Dai in U.S. Patent No. 6,346,189. In another process, the wafer sandwich can be loaded into a single furnace chamber, whereupon argon and hydrogen gas is flowed through the furnace over the wafer sandwich at flow rates of 480 and 100 SCCM, respectively.

[0040] The temperature of the wafer sandwich can be raised to about 850 °C while the argon and hydrogen gas is introduced to the chamber to reduce catalyst material from an oxide form to a metallic form. After the furnace temperature reaches about 850 °C, the argon and hydrogen gas flows are maintained for about 10 minutes, after which ethanol can be introduced to the furnace at a flow rate of about 10 SCCM, while the hydrogen flow rate is reduced to about 40 SCCM and the argon flow rate is increased to about 740 SCCM. The ethanol, argon, hydrogen mixtures can be flowed into the furnace for about 15 minutes, and the carbon in the ethanol gas provides the source of carbon for the nanotubes to grow on the apexes 206 of the tips 202.

[0041] After nanotubes have been grown, the ethanol and hydrogen gas flows are I terminated and the furnace is cooled to room temperature under an argon gas flow. After the nanotubes have been grown on the apexes 206 of the precursor tips 202 and the system has been cooled, the nanotubes grown on the apexes are shortened to desired lengths. In one process, after the growth furnace(s) has cooled, the furnace containing the wafer sandwich is flushed with a non- reactive gas (e.g., Ar, He, Xe, Kr, N2) to remove impurities.

[0042] A constant voltage can be applied to the doped wafer 300, while the first wafer 100 is held at ground. The potential difference between the wafers 100 and 300 can be about 1.5 volts or can be higher, for example, about 20 - 50 volts. The application of the voltage to the doped wafer 300 breaks connections between the nanotubes and the surface 306 of the doped wafer 300 and cleaves the ends of the nanotubes that are distal from the precursor tips from the surface of the second substrate. As the voltage is ramped up, the nanotubes are shortened.

[0043] The nanotubes grown on the precursor tips 202 are all shortened at the same time, such that their free ends become located at substantially the same distance from the surface 306 of the no doped wafer 300. In addition to cleaving and shortening by the application of a voltage, the nanotube tips can be shortened and cleaved in other ways, for example, by the application of a liquid or a gas phase chemical, which causes cleaving or shortening of the nanotubes.

[0044] hi some embodiments, after the nanotubes have been shortened, the individual cantilevers on the patterned wafer 100 can be separated from each other and used in individual atomic force microscopes.

[0045] Referring now to Figs. 7A-7H, in some embodiments, basic substrate assembly can include a handle layer 701, a box layer 702 and a device layer 703. At 7B, as discussed above, photolithography or other etching process can be used to define tips 704 and corresponding cantilever. At 7C a catalyst layer 705 can be applied, for example via well known deposition techniques. At 7D, a sacrificial layer, 706 can be deposited. Some embodiments can include a sacrificial layer fashioned by depositing one or more of: silicon dioxide, organic film, polymer film, poly silicon, and a nitride. As described above, the thickness of the sacrificial layer will correlate with the length of the carbon nanotubes. Deposition processes are well known and can be precisely controlled to create a sacrificial layer 706 within tight tolerances. For example, known processes can be used to create a sacrificial layer 706 within a tolerance less than 5 nM.

[0046] According to some embodiments of the present invention, the length of the carbon nanotubes will correlate precisely with the distance "d" 707 defined by the thickness of the sacrificial layer 706 minus the thickness of the initial SOI of the device layer 703.

[0047] At Fig. 7E, a layer of Si 708 can be applied on top of the sacrificial layer 706. The

Si 708 on top of the sacrificial layer 706 can be applied for example, by bonding a silicon wafer of by deposition of silicon.

[0048] At 7F, an etching process can be performed to remove portions of the backside Si

701 and the cantilever thereby defining posts under each of the respective tips 704. At 7G, removal of the backside Si 701 can provide access to the sacrificial layer such that portions of the sacrificial layers 702 can also be removed thereby providing a clear area at the apex of each tip in which a carbon nanotube may be grown. In other embodiments, an access via (not shown) can be formed in the Si 708 on top of the sacrificial layer 706 and the desired portions of the sacrificial layer can be removed by etching process performed through the access via.

[0049] At 7H, carbon nanotubes 708 can be grown from the tips 704 according to the methods described above, or other methods well known in the art. According to the present invention, the tips 704 will be grown in a controlled manner to a length defined by the distance between the tip 704 and the Si layer 708 on top of the sacrificial layer 706. [0050] Referring now to Figs. 8 A through 8H, still other embodiments of the present invention are described. At 8 A, a standard silicon wafer can be utilized as a base 801 for deposition of a sacrificial layer 802, as illustrated at 8B. Various embodiments can include a sacrificial layer fashioned by depositing one or more of: an oxide, silicon dioxide, organic film, polymer film, poly silicon, and a nitride.

[0051] At 8C, a pattern can be etched into the sacrificial layer 802. wherein the pattern defines post portions 803. The pattern can be defined, for example, using photolithography or other known process. A distance dl 804 can be defined as the distance between the bottom of the etched area and the surface of the silicon wafer. The distance dl 804 will depend therefore from the depth of the etched portion 803 and also determine the maximum length of nanostructures subsequently grown. Some embodiments can include an anisotropic etching process to define the etched portion 803.

[0052] At 8D a catalyst 806 can be deposited and a post material 805 can also be deposited.

Deposition can include, for example, shadow deposition wherein the catalyst can be followed by deposition of a post material 805. The post material can include, for example, silicone or poly-silicone. The shape of the deposited posts 805 can include pyramid shapes, straight sides or other shape conducive to the growth of the nanostructures.

[0053] At 8E, a wafer 807, such as a silicon wafer, can be bonded to the cantilever 802. In some embodiments, a planarization step, such as, for example, a chemical mechanical planarization step can be used to prepare the surface onto which the silicon wafer is bonded and therefore precede the bonding of the silicon wafer 807 to the cantilever 802 and the silicone posts 805. Some embodiments can also include a wafer 807 with a conductive surface or a wafer 807 of a conductive material. [0054] At 8F, photolithography can be used to define an area 808 to be etched, thereby exposing the cantilever with the posts 805 extending into the sacrificial layer 802. In addition, in some embodiments, the wafer 807 can be thinned to obtain a desired thickness.

[0055] At 8G, an etch can be used to remove at least a portion of the sacrificial layer 802 and create a gap 810 between the post 805 with the catalyst 806 and the base 801. At 8H, carbon nanotubes 811 can be grown between the post 805 and the base 801, across the portion of the sacrificial layer that has been removed by the etch, using the methods described above.

Systems

[0056] In general, the methods of the present invention may be implemented with industrial deposition machinery, such as spin coating machinery, suitable for applying layers of material on a conductor surface. In addition, the present invention includes an automated processor programmed cause machinery to execute the methods described herein.

[0057] For example, an automated controller can be used to control equipment and implement various embodiments of the present invention, as described herein. The controller can include one or more processors coupled to a communication device configured to communicate via a communications buss or a communication network with one or more items of manufacturing equipment or production equipment. The controller can thereby control the manufacturing or production equipment to implement the steps described herein.. [0058] The processor can also be in communication with a storage device to store commands used to implement the inventive steps disclosed herein. The storage device may comprise any suitable information storage device, including combinations of magnetic storage devices (e.g., magnetic tape and hard disk drives), optical storage devices, and/or semiconductor memory devices such as Random Access Memory (RAM) devices and Read Only Memory (ROM) devices.

[0059] The storage device can store program code for controlling the processor . The processor performs instructions according to the stored program code, and thereby operates in accordance with the present invention. For example, the processor may receive instructions from the stored program code instructing the processor to control one or more of: spin casting equipment, deposition equipment and etching equipment. The processor may also transmit information comprising conditions under which the steps described herein are implemented.

[0060] The storage device can store device manufacturing related data in a database, and other data as needed. The illustration and accompanying description of the control processor presented herein is exemplary, and any number of other data processing or controller arrangements can be employed besides those suggested by the figures.

Conclusion

[0061 ] A number of embodiments of the present invention have been described.

Nevertheless, it will be understood that various modifications may be made without departing from the spirit and scope of the invention. For example, it has been described that the sacrificial layer be accessed through the removal of significant portions of at least one of two substrates used to fashion the tips. Those skilled in the art will understand that in some embodiments, the sacrificial layer maybe also removed by any known process, such as, for example, by an etch performed through an access via formed in at least one of the substrates. Similarly, various methods or equipment may be used to implement the steps described herein. Accordingly, other embodiments are within the scope of the following claims.

Claims

CLAIMSWHAT IS CLAIMED IS:

1. A method of simultaneously producing multiple nanostructures of a predetermined length, the method comprising:

forming multiple tips on a first substrate;

coating at least a portion of the multiple tips formed on a first substrate with a catalyst, wherein each respective tip comprises a base and an apex;

depositing a sacrificial layer over the tips, wherein the thickness of the sacrificial layer will correlate with the length of the nanostructure;

bonding a first surface of the second substrate to the sacrificial layer;

etching areas of the sacrificial layer between the multiple tips and the first surface of the sacrificial layer; and

forming the multiple nanostructures between the portion of respective tips coated with the catalyst and the surface of the second substrate.

2. The method of claim 1 wherein the nanostructure comprises a carbon nanotube.

3. The method of claim 1 wherein the portion of the respective tips coated with the catalyst comprises the base of the tips.

4. The method of claim 1 wherein the portion of the respective tips coated with the catalyst comprises the apex of the tips.

5. The method of claim 1 wherein the nanostructures are formed by additional steps comprising: flowing a carbon containing gas over the catalyst coated apexes to grow carbon nanotubes protruding from the multiple catalyst coated tips until further growth is limited by the second substrate; and

flushing an area between the first substrate and the second substrate with a nonreactive gas.

6. The method of claim 1 wherein the first surface of the second substrate bonded to sacrificial layer comprises a conductive material.

7. The method of claim 1 additionally comprising the step of applying a voltage differential between the second substrate and the multiple tips which is operative to shorten the length of the respective carbon nanotubes grown on the multiple tips.

8. The method of claim 1 additionally comprising the step of applying a voltage differential between the first surface of the second substrate and a second surface of the second substrate, wherein the voltage application is operative to cleave two or more of the carbon nanotubes from the second substrate.

9. The method of claim 1 additionally comprising the step of applying a voltage differential between the second substrate and the multiple tips which is operative to cleave two or more of the carbon nanotubes from the second substrate and shorten the length of the respective carbon nanotubes grown on the multiple tips, wherein the voltage comprises between 0.5 and 50 volts.

10. The method of claim 1 additionally comprising the step of:

applying a liquid phase chemical to cleave the carbon nanotubes from the second substrate and shorten the cleaved nanotubes.

11. The method of claim 1 additionally comprising the step of: applying a gas phase chemical to cleave the carbon nanotubes from the second substrate and shorten the cleaved nanotubes.

12. The method of claim 1 additionally comprising the steps of flowing a carbon containing gas over the catalyst coated apexes comprises: placing the first substrate combined with the second substrate into a furnace; heating the furnace until the furnace reaches a temperature of at least about 750°C; flowing gas into the furnace wherein the gas comprises one of: H₂, CO, ethanol and methane.

13. The method of claim 12 wherein the gas is flowed into the furnace for a period of about 15 minutes or less.

14. The method of claim 12 additionally comprising the steps of: cooling the furnace to about room temperature; and flowing argon into the furnace while it is cooled to about room temperature.

15. An apparatus of nanostructures, the apparatus comprising:

a first substrate comprising a surface comprising multiple tips, each respective tip comprising a base and an apex;

a sacrificial layer between a portion of the first substrate and a second substrate, wherein the portion does not comprise the areas between the multiple tips and the respective tips;

multiple nanostructures, each nanostructure having a proximate end and a distal end, the proximate end extending from each respective tip and the distal end of a majority of the nanostructures extending to the surface of the second substrate.

16. The apparatus of claim 15 wherein the proximate end extends essentially perpendicular from each respective apex.

17. The apparatus of claim 15 wherein each nanostructure comprises a carbon nanotube.

18. The apparatus of claim 15 wherein the nearest distance between the apex of each respective tip and the surface of the second substrate correlates with the length of the nanostructure.

19. The apparatus of claim 18 wherein the surface of the first substrate is essentially parallel to the second substrate and the maximum length of each carbon nanotube correlates with the distance of the surface from the respective tips.

20. The apparatus of claim 15 additionally comprising a coating on at least a portion of each tip, the coating comprising at least one of: a catalyst; a transition metal and a transition metal oxide.