WO2010004738A1 - Rectification device and photovoltaic generation system using the same - Google Patents

Rectification device and photovoltaic generation system using the same Download PDF

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Publication number
WO2010004738A1
WO2010004738A1 PCT/JP2009/003171 JP2009003171W WO2010004738A1 WO 2010004738 A1 WO2010004738 A1 WO 2010004738A1 JP 2009003171 W JP2009003171 W JP 2009003171W WO 2010004738 A1 WO2010004738 A1 WO 2010004738A1
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Prior art keywords
voltage
mosfet
circuit
current
diode
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PCT/JP2009/003171
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French (fr)
Japanese (ja)
Inventor
酒井拓也
竹下みゆき
菅郁朗
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三菱電機株式会社
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Priority to JP2010519641A priority Critical patent/JPWO2010004738A1/en
Publication of WO2010004738A1 publication Critical patent/WO2010004738A1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/30—Modifications for providing a predetermined threshold before switching
    • H03K17/302—Modifications for providing a predetermined threshold before switching in field-effect transistor switches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/02016—Circuit arrangements of general character for the devices
    • H01L31/02019—Circuit arrangements of general character for the devices for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02021—Circuit arrangements of general character for the devices for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0822—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6874—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor in a symmetrical configuration
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a rectifier that is connected between two external terminals, allows a current to flow only in one direction and blocks a reverse current, and a photovoltaic power generation system including such a rectifier.
  • These general diodes are used for redundant power supplies, rectifier circuits, and the like.
  • a forward voltage is generated in the diode when conducting, and a relatively large conduction loss occurs due to the product of this voltage and the forward current.
  • a synchronous rectification method has been used for a rectifier with low conduction loss.
  • the cathode of the diode is connected to the drain of the synchronous rectifier MOSFET, the current supply means for supplying power from the outside is connected to the anode, and a resistor is connected between the anode of the diode and the source of the MOSFET. Connect and detect the voltage across it.
  • the drain electrode of the field effect transistor is used as an AC input terminal
  • the source electrode is used as a DC output terminal
  • the gate electrode is connected to the output of the operational amplifier
  • one input of the operational amplifier is input as an AC input. Connect to the terminal and connect the other to the DC output terminal.
  • JP 2004-32937 A Japanese Patent Laid-Open No. 11-122929
  • a current supply means is connected to the anode of a diode in which the cathode is connected to the drain of the MOSFET to detect the direction of the current flowing through the MOSFET, and between the anode and the source of the MOSFET. The voltage across the resistor connected to was detected.
  • the drain-source voltage is detected by the operational amplifier for detection of the direction of the current flowing through the MOSFET.
  • the operational amplifier has an input offset voltage. ing. For this reason, there has been a problem that an operational amplifier manufactured to supply an input offset voltage from an external power source or to have an input offset voltage is required.
  • the present invention has been made to solve the above-described problems, and a rectifier comprising a MOSFET having a reduced loss during conduction and connected between two external terminals is provided with a further terminal and
  • An object is to eliminate the need for an external power source and to easily replace the diode with a two-terminal diode, and to easily and reliably detect the direction of the current flowing through the MOSFET. It is a second object of the present invention to provide a solar power generation system that includes such a rectifier and can improve power generation efficiency with a simple configuration and with high reliability.
  • an external terminal is an anode terminal and a cathode terminal, and a first MOSFET connected between the two terminals with a source electrode on the anode terminal side is connected between the two terminals.
  • a power supply circuit that generates and outputs a predetermined control voltage from the applied voltage, and a first drive control circuit that outputs a drive signal to the gate electrode of the first MOSFET using the control voltage from the power supply circuit;
  • a current limiting resistor connected to the output of the power supply circuit, and a detection circuit for detecting an anode potential of the diode, having a diode having an anode connected to the current limiting resistor and a cathode connected to the cathode terminal; Is provided.
  • the first drive control circuit outputs the drive signal in accordance with the anode potential of the diode detected by the detection circuit.
  • the solar power generation system generates power using one or more solar panels.
  • Each of the solar panels includes a plurality of solar power generation cells connected in series, and an external terminal serving as an anode terminal and a cathode terminal.
  • two rectifiers connected in parallel to the respective photovoltaic power generation cells.
  • Each rectifier generates a predetermined control voltage from the first MOSFET connected between the two terminals with the source electrode on the anode terminal side and the voltage applied between the two terminals.
  • a power supply circuit for outputting, a first drive control circuit for outputting a drive signal to the gate electrode of the first MOSFET using a control voltage from the power supply circuit, and a current limiting circuit connected to the output of the power supply circuit
  • a detection circuit that includes a diode having an anode connected to the current limiting resistor and a cathode connected to the cathode terminal, and detecting an anode potential of the diode.
  • the first drive control circuit detects an abnormality of the connected photovoltaic power generation cell from the anode potential of the diode detected by the detection circuit, turns on the first MOSFET, and The solar power generation cell is bypassed by a rectifier.
  • the rectifier according to the present invention includes a power supply circuit that generates a predetermined control voltage from a voltage applied between two terminals. Further, a current limiting resistor is connected to the output of the power supply circuit, and a diode is inserted between the current limiting resistor and the cathode terminal to detect the anode potential of the diode. Since the anode potential that changes depending on the direction of the current flowing through the first MOSFET is detected, the direction of the current flowing through the first MOSFET can be easily and reliably detected.
  • the control voltage output from the power supply circuit can be used not only to control the first MOSFET, but also to operate the rectifier using a voltage for detecting the anode potential of the diode. Therefore, it is possible to realize a low-loss and high-reliability rectifier that can be easily replaced with a two-terminal diode with a simple circuit configuration.
  • a rectifier is connected in parallel to each photovoltaic power generation cell of a plurality of photovoltaic power generation cells connected in series. And this rectification
  • straightening apparatus can bypass this solar power generation cell with low loss and reliability at the time of abnormality of each solar power generation cell by simple circuit structure. For this reason, the photovoltaic power generation system can improve the power generation efficiency with a simple configuration with high reliability.
  • FIG. 1 is a diagram showing a circuit configuration of a rectifier according to Embodiment 1 of the present invention.
  • the rectifier 1 is an n-channel power MOSFET having two terminals, an anode terminal 2 serving as an anode terminal and a cathode terminal 3 serving as a cathode terminal, as external terminals connected between the two terminals.
  • MOSFET 4 a power supply circuit 5 that generates a predetermined control voltage V 1, a first drive control circuit 6 that drives and controls the first MOSFET 4 using the control voltage V 1 output from the power supply circuit 5, And a current direction detection circuit 7 as a detection circuit for detecting the direction of the current flowing through the MOSFET 4.
  • the first MOSFET 4 incorporates a parasitic diode 4 a between the source and drain, and connects the source electrode to the anode terminal 2 and the drain electrode to the cathode terminal 3.
  • the power supply circuit 5 includes a diode 51, a capacitor 52, and a voltage adjusting circuit 53 configured by, for example, a chopper circuit, and has a reverse polarity voltage (hereinafter referred to as a reverse voltage) applied between the anode terminal 2 and the cathode terminal 3.
  • the capacitor 52 is charged via the diode 51, and a predetermined voltage with the anode terminal 2 as a potential reference is generated from the charging voltage of the capacitor 52 as the control voltage V 1 of the first MOSFET 4.
  • the voltage adjustment circuit 53 employs a step-up type or a step-down type depending on the magnitude of the reverse voltage, and generates a stable control voltage V1 regardless of the magnitude of the reverse voltage.
  • the current direction detection circuit 7 includes a current limiting resistor 71 connected to the output of the power supply circuit 5, and a diode 72 having an anode connected to the current limiting resistor 71 and a cathode connected to the cathode terminal 3.
  • the anode potential V2 of the diode 72 is detected using the anode terminal 2 as a potential reference.
  • the first drive control circuit 6 uses a control voltage V1 from the power supply circuit 5 to output a drive signal 6a to the gate electrode of the first MOSFET 4, and a voltage for generating a reference voltage V3 from the control voltage V1. And an adjustment circuit 62. Then, the drive circuit 61 compares the anode voltage V2 (hereinafter referred to as the detection voltage V2) of the diode 72 detected by the current direction detection circuit 7 with the reference voltage V3, and compares the magnitude of the gate voltage of the first MOSFET 4 A drive signal 6a for turning on / off the first MOSFET 4 is output to the electrode.
  • the detection voltage V2 is lower than the reference voltage V3, the first MOSFET 4 is turned on.
  • the detection voltage V ⁇ b> 2 is a voltage between the anode of the diode 72 and the anode terminal 2.
  • the operation of the rectifier 1 will be described.
  • a reverse voltage applied between the anode terminal 2 and the cathode terminal 3 is charged to the capacitor 52 through the diode 51, and the anode terminal 2 is used as a potential reference from the charging voltage of the capacitor 52, for example, 15V.
  • the predetermined control voltage V1 can be generated regardless of the magnitude of the reverse voltage.
  • the voltage VCA between the cathode terminal 3 and the anode terminal 2 (hereinafter referred to as cathode-anode voltage VCA) is the voltage between the drain and source of the first MOSFET 4 and is reverse when a reverse voltage is applied.
  • the magnitude of the voltage is the cathode-anode voltage VCA.
  • the drive circuit 61 compares the reference voltage V3 set to, for example, 0.7V and the detection voltage V2, and turns on the first MOSFET 4 when the detection voltage V2 is lower than the reference voltage V3. In this case, since the detection voltage V2 is as high as the control voltage V1, the first MOSFET 4 is turned off, and the rectifier 1 prevents conduction of the current i.
  • the control voltage V1 is higher than the cathode-anode voltage VCA. Therefore, in the current direction detection circuit 7, the current limiting resistor 71 and the diode are connected from the output terminal of the power supply circuit 5 to the cathode terminal 3. A current flows through 72. At this time, the current limiting resistor 71 limits the current and suppresses the discharge of the output of the power supply circuit 5. A voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected as the detection voltage V2. As the cathode-anode voltage VCA decreases, the detection voltage V2 also decreases.
  • the detection voltage V2 is higher than the forward voltage Vf (about 0.6 to 0.7 V) of the diode 72, and thus the reference voltage.
  • Vf forward voltage
  • the detection voltage V2 becomes equal to or higher than the reference voltage V3
  • the first MOSFET 4 is turned off, and the rectifier 1 prevents conduction of the current i.
  • the drive circuit 61 When the cathode-anode voltage VCA decreases and the detection voltage V2 becomes lower than the reference voltage V3, the drive circuit 61 outputs a drive signal 6a for turning on the first MOSFET 4, and the first MOSFET 4 is turned on from off. .
  • the first MOSFET 4 When the first MOSFET 4 is turned on, a current i through the first MOSFET 4 flows in the forward direction from the anode terminal 2 to the cathode terminal 3, and a voltage drop due to the current i and the on-resistance of the first MOSFET 4 occurs.
  • the cathode-anode voltage VCA becomes negative.
  • the on-voltage is a voltage corresponding to a voltage drop generated by the on-resistance when the MOSFET is turned on and a current flows.
  • the reference voltage V3 used in the drive circuit 61 is set to 0.7 V, for example.
  • the forward voltage Vf of the diode 72 is subtracted from the on-voltage between the drain and source of the first MOSFET 4, and the forward voltage It is set between the direction voltage Vf and the voltage value obtained by adding the ON voltage. More precisely, the on-voltage when subtracting is the on-voltage when current flows in the first MOSFET 4 in the forward direction, and the on-voltage when adding is the current flowing in the reverse direction in the first MOSFET 4.
  • the detection voltage V2 is generated between the forward voltage Vf of the diode 72 and the drain-source of the first MOSFET 4.
  • the voltage value is obtained by subtracting the ON voltage, and is lower than the reference voltage V3.
  • the drive circuit 61 turns on the first MOSFET 4 and the rectifier 1 continues to conduct the current i.
  • the first MOSFET 4 When the cathode-anode voltage VCA is inverted from negative to positive, that is, at the initial stage of reverse voltage application, the first MOSFET 4 is in an on state, so that the current from the cathode terminal 3 to the anode terminal 2 via the first MOSFET 4 i flows in the reverse direction, and a voltage drop due to the current i and the on-resistance of the first MOSFET 4 occurs in the reverse direction.
  • a current flows from the output terminal of the power supply circuit 5 to the cathode terminal 3 through the current limiting resistor 71 and the diode 72.
  • a voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected as the detection voltage V2.
  • the detection voltage V2 has a voltage value obtained by adding the on-voltage between the drain and source of the first MOSFET 4 to the forward voltage Vf of the diode, and is equal to or higher than the reference voltage V3.
  • the drive circuit 61 turns off the first MOSFET 4 and the rectifier 1 prevents conduction of the current i.
  • the reverse voltage applied between the two terminals of the rectifier 1 is charged in the capacitor 52, and the voltage adjustment circuit 53 controls the control voltage of the first MOSFET 4 from the charged voltage of the capacitor 52.
  • V1 is generated. Therefore, the predetermined control voltage V1 can be generated regardless of the magnitude of the reverse voltage, and the predetermined control voltage V1 can be secured stably, and the rectifier 1 can be operated.
  • the withstand voltage of the element used for the first drive control circuit 6 does not need to be greater than the magnitude of the reverse voltage.
  • the cathode-anode voltage VCA is higher than the control voltage V1
  • the diode 72 in the current direction detection circuit 7 is not turned on, and a high reverse voltage can be prevented from being applied to the first drive control circuit 6.
  • the detection voltage V2 does not become higher than the control voltage V1, and the voltage applied to each element for detection can be suppressed.
  • the current direction detection circuit 7 detects a voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA, unless the reverse voltage exceeds the control voltage V1, as the detection voltage V2. Since the forward voltage Vf of the diode 72 is substantially constant and the cathode-anode voltage VCA changes depending on the direction of the current i between the cathode and the anode, the direction of the current i between the cathode and the anode is detected by the detection voltage V2. it can. In this way, detection of the direction of the current flowing through the first MOSFET 4 can be easily and reliably realized.
  • the detection voltage V2 that is equal to or higher than the reference voltage V3 can be detected. Then, the drive circuit 61 generates the drive signal 6a according to the detection voltage V2, so that when the reverse voltage is applied between the two terminals of the rectifier 1, the first MOSFET 4 is turned off and the current is blocked. When the forward voltage is applied, the first MOSFET 4 can be turned on and the two terminals of the rectifier 1 can be conducted.
  • control voltage V1 from the power supply circuit 5 is used not only for the drive voltage of the first MOSFET 4 but also for obtaining the detection voltage V2, it is easy to replace with a two-terminal diode with a simple circuit configuration. A highly reliable rectifier can be realized.
  • the reference voltage V3 used in the drive circuit 61 is obtained by adding the forward voltage Vf and the on-voltage to the voltage value obtained by subtracting the on-voltage between the drain and source of the first MOSFET 4 from the forward voltage Vf of the diode 72. Set between voltage values.
  • FIG. 2 is a diagram showing a circuit configuration of a rectifier according to Embodiment 2 of the present invention.
  • the diode 72 of the current direction detection circuit 7 is provided with a temperature detection line 73 as means for detecting the element temperature, and the detected element temperature. Is input to the voltage adjustment circuit 62 of the first drive control circuit 6.
  • the voltage adjustment circuit 62 adjusts the reference voltage V ⁇ b> 3 according to the element temperature of the diode 72.
  • Other configurations are the same as those of the first embodiment.
  • the temperature detection line 73 is, for example, a temperature detection line such as a thermocouple from the voltage adjustment circuit 62 or a temperature data line from which the diode 72 outputs its temperature to the voltage adjustment circuit 62.
  • One MOSFET 4 can be driven and controlled.
  • FIG. 3 is a diagram showing a circuit configuration of a rectifier according to Embodiment 3 of the present invention.
  • an adjustment resistor 74 is inserted between the diode 72 of the current direction detection circuit 7 and the detection point of the detection voltage V2.
  • Other configurations are the same as those of the first embodiment.
  • the diode 72 is turned on and current flows from the output terminal of the power supply circuit 5 to the cathode terminal 3. .
  • the adjustment resistor 74 is inserted between the diode 72 and the detection point of the detection voltage V2, the detection voltage V2 is the cathode-anode voltage VCA, the forward voltage Vf of the diode 72, and the adjustment resistor 74.
  • the voltage value is obtained by adding the inter-terminal voltage. Thereby, the detection voltage V2 can be shifted to a high region.
  • the current i is a small current region.
  • the detection voltage V2 is detected because the detection voltage V2 obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected. Becomes a relatively small voltage level near the forward voltage Vf.
  • the drive circuit 61 it is necessary for the drive circuit 61 to detect such a voltage change at a relatively small voltage level.
  • the detection voltage V2 can be shifted to a high region, the current direction can be detected accurately even with the current i in a small current range.
  • the detection voltage V2 can be shifted to a high region, the detection voltage V2 can be prevented from becoming a negative voltage.
  • a negative control power source or the like is required, and the circuit configuration becomes complicated at each stage.
  • the detection voltage V2 can be shifted to a high region and the direction of the current i can be detected with high reliability. .
  • the current i can be detected in the current direction with high accuracy in both a small current range and a large current range, and the detectable current range is expanded.
  • FIG. 4 is a diagram showing a circuit configuration of a rectifier according to Embodiment 4 of the present invention.
  • the adjustment resistor 74 is inserted between the diode 72 and the detection point of the detection voltage V2.
  • a Zener diode 75 as a constant voltage means is used instead of the adjustment resistor 74. It may be used.
  • the detection voltage V2 can be shifted to a high region with a constant voltage width, and the fluctuation range of the detection voltage V2 does not change without being divided by the resistance value. For this reason, the current direction can be detected with higher accuracy when the current i flowing through the first MOSFET 4 is in a small current range.
  • the drive circuit 61 may include a hysteresis circuit 63, and the reference voltage V3 may be provided with a hysteresis width.
  • the reference voltage for turning on the first MOSFET 4 from off and the reference voltage for turning off from on are changed.
  • the cathode-anode voltage VCA decreases and the detection voltage V2 becomes lower than the reference voltage V3, the first MOSFET 4 is turned on.
  • a forward current flows through the first MOSFET 4 to cause a cathode-anode voltage. Even if VCA fluctuates, it is possible to prevent the drive circuit 61 from malfunctioning.
  • the configuration in which the hysteresis circuit 63 is provided in this manner can be similarly applied to the first to third embodiments, and the same effect can be obtained.
  • the configuration using the adjustment resistor 74 and the Zener diode 75 of the third and fourth embodiments can be applied not only to the first embodiment but also to the second embodiment, and the same effect can be obtained.
  • FIG. 5 is a diagram showing a circuit configuration of a rectifier according to Embodiment 5 of the present invention.
  • the rectifier 1 uses the two terminals of the anode terminal 2 and the cathode terminal 3 as external terminals, and generates a control voltage V1 and a first drive.
  • a control circuit 6 and a current direction detection circuit 7 are provided.
  • the configurations and operations of the power supply circuit 5, the first drive control circuit 6, and the current direction detection circuit 7 are the same as those in the first embodiment.
  • the second MOSFET 10 In parallel with the first MOSFET 4 whose source electrode is connected to the anode terminal 2, the second MOSFET 10 connected in series to the first MOSFET 4, and the series circuit of the first MOSFET 4 and the second MOSFET 10.
  • a third MOSFET 12 to be connected and a third diode 13 having an anode connected to the anode terminal 2 and a cathode connected to the cathode terminal 3 are provided between the two terminals.
  • a shunt resistor 11 is connected in parallel to the second MOSFET 10, and an on-voltage adjusting circuit 14 is configured by these elements 10 to 13.
  • the third diode 13 may also be a parasitic diode built in the third MOSFET 12.
  • a second drive control circuit 20 that operates with the control voltage V1 from the power supply circuit 5 is provided, and the second drive control circuit 20 performs the second and third in accordance with the detection voltage V2 from the current direction detection circuit 7.
  • Drive signals 21 and 22 to the MOSFETs 10 and 12 and a limit signal 23 to the first drive control circuit 6 are output.
  • the second drive control circuit 20 determines the combination of MOSFETs to be turned on from the first MOSFET 4 and the second and third MOSFETs 10 and 12 according to the detection voltage V2, and controls the MOSFETs 4, 10, and 12.
  • the on-resistance between the terminals when the current i flows from the anode terminal 2 to the cathode terminal 3 in the forward direction is changed stepwise. This is a control to change the on-resistance to decrease as the current i increases, and thereby suppresses an increase in the on-voltage that is a voltage drop due to the on-resistance due to the increase in the current i.
  • 31 is a range of the anode-cathode voltage VAC in the range of the detection voltage V2 in which the current direction can be detected by the current direction detection circuit 7, and 32 is an output characteristic of the third diode 13 connected between the anode and the cathode. Is shown.
  • SW indicates a state that is switched in synchronization with the drive signal 6 a from the drive circuit 61.
  • the second drive control circuit 20 selects to turn off all the MOSFETs 4, 10, and 12, and sends the limit signal 23 for adjusting the reference voltage V3 to the first signal.
  • the voltage is output to the voltage adjustment circuit 62 in the drive control circuit 6.
  • the limit signal 23 is a signal for limiting the drive signal 6a in order to turn off the first MOSFET 4, whereby the first MOSFET 4 is turned off.
  • the second drive control circuit 20 When the cathode-anode voltage VCA decreases and the detection voltage V2 becomes lower than the reference voltage V3, and the current i when the first MOSFET 4 is turned on becomes i1, the second drive control circuit 20 Then, it is selected that only the first MOSFET 4 is turned on, and the limit signal 23 is released.
  • the on-resistance at this time is the sum of the on-resistance of the first MOSFET 4 and the shunt resistor 11.
  • the second drive control circuit 20 selects the MOSFET for turning on the first MOSFET 4 and the second MOSFET 10 and outputs a drive signal 21 for turning on the second MOSFET 10.
  • This drive signal 21 is output at a voltage based on the potential of the source electrode of the second MOSFET 10, and is charged by the second drive control circuit 20 from the control voltage V1 when the first MOSFET 4 is turned on.
  • the on-resistance at this time is the sum of the on-resistance of the first MOSFET 4 and the on-resistance of the second MOSFET 10, and the on-resistance decreases because the on-resistance decreases.
  • the third MOSFET 12 is turned on.
  • the second drive control circuit 20 selects the first MOSFET 4 and the second and third MOSFETs 10 and 12 as MOSFETs to be turned on, and outputs a drive signal 21 to turn on the second MOSFET 10 and A drive signal 22 for turning on the third MOSFET 12 is output.
  • the drive signal 22 is input to the AND circuit 63 together with the drive signal 6 a to the first MOSFET 4, and the drive signal 24 a is output from the AND circuit 63 to the gate electrode of the third MOSFET 12.
  • the third MOSFET 12 is switched in synchronization with the drive signal 6a. Since the third MOSFET 12 connected in parallel to the path formed by the first MOSFET 4 and the second MOSFET 10 is turned on, the on-resistance between the anode and the cathode is reduced, and the on-voltage is lowered.
  • the second drive control circuit 20 selects the MOSFET for turning on the second MOSFET 10, outputs the drive signal 21 for turning on the second MOSFET 10, and sets the drive signal 22 to low so that the third MOSFET 12.
  • a limit signal 23 for adjusting the reference voltage V3 is output to the voltage adjustment circuit 62 in the first drive control circuit 6.
  • the limit signal 23 is a signal for limiting the drive signal 6a in order to turn off the first MOSFET 4, whereby the first MOSFET 4 is turned off.
  • the current i flows through the path formed by the parasitic diode of the first MOSFET 4 and the second MOSFET 10, the path through the parasitic diode of the third diode 13, and the path through the third diode 13, and the current i further increases. Even so, the on-state voltage hardly changes.
  • the second drive control circuit 20 switches the combination of MOSFETs that are turned on when the current i increases so as to reduce the on-resistance, thereby suppressing the increase in the on-voltage.
  • the switching is performed when the detection voltage V2 becomes a voltage value corresponding to each of the current values i1 to i4.
  • the on-resistance is controlled to be minimum within the voltage range 31 of the on-voltage in which the current direction can be detected.
  • a second MOSFET 10 connected in series to the first MOSFET 4, a third MOSFET 12 connected in parallel, a shunt resistor 11 connected in parallel to the second MOSFET 10, and a third An on-voltage adjusting circuit 14 including a diode 13 is provided, and the on-voltage is increased by stepwise changing the on-resistance between the anode and the cathode when the current i flows from the anode terminal 2 to the cathode terminal 3 in the forward direction. Suppressed to do. Thereby, the conduction
  • control for limiting the drive signal 6a to the first MOSFET 4 is performed, so that malfunction of the rectifier 1 can be prevented.
  • Two or more second MOSFETs 10 may be connected in series to the first MOSFET 4, and the number of parallel third MOSFETs 12 connected in parallel may be two or more.
  • the second MOSFET 10 and the third MOSFET 12 may include only one of them.
  • the shunt resistor 11 and the third diode 13 may not be provided, and a plurality thereof may be provided.
  • the first MOSFET 4 and the third MOSFET 12 are simultaneously switched.
  • the present invention is not limited to this. First, only the first MOSFET 4 is turned on as the current i increases so that the power for driving the MOSFET and the on-voltage are reduced and the sum of losses during rectification is minimized.
  • the MOSFET to be driven may be selected step by step such that only the first MOSFET 4 and the third MOSFET 12 are simultaneously turned on.
  • the first MOSFET 4 and the third MOSFET 12 may be different types of elements, for example, the third MOSFET 12 may be an element having a smaller on-resistance value than the first MOSFET 4.
  • the type of element to be used according to the value of the current i so that the ON voltage is reduced within the range in which the current direction can be detected and the sum of the conduction loss during rectification and the MOSFET drive loss is minimized.
  • the number may be changed. In either case, the on-resistance is changed stepwise in accordance with the detection voltage V2 so that the on-resistance is minimized within the voltage range 31 of the on-voltage in which the current direction can be detected.
  • the second drive control circuit 20 is provided separately from the first drive control circuit 6 for driving the first MOSFET 4.
  • the first drive control circuit 6 and the second drive control circuit are provided.
  • a drive control circuit having functions of 20 and the AND circuit 24 may be used.
  • the first MOSFET 4, the second MOSFET 10 connected in series to the first MOSFET 4, and the third MOSFET 12 connected in parallel are provided, and the gates of the MOSFETs 4, 10, 12 are connected from the drive control circuit. By outputting drive signals to the electrodes, the same control as in the fifth embodiment is performed.
  • FIG. 8 is a diagram showing a circuit configuration of a rectifier according to Embodiment 6 of the present invention.
  • the rectifier 1 includes an anode terminal 2 as an anode terminal and a cathode terminal 3 as a cathode terminal as external terminals, a first MOSFET 4 connected between the two terminals, A power supply circuit 5c that generates the control voltage V1, a first drive control circuit 6 that drives and controls the first MOSFET 4 with the control voltage V1, and a current direction detection circuit 7 that detects the direction of the current flowing through the first MOSFET 4.
  • the first MOSFET 4 incorporates a parasitic diode 4 a between the source and drain, and connects the source electrode to the anode terminal 2 and the drain electrode to the cathode terminal 3.
  • the power circuit 5c includes a first power circuit 5a and a second power circuit 5b.
  • the first power supply circuit 5 a includes a first diode 51, a first capacitor 52, and a first voltage adjustment circuit 53 configured by, for example, a chopper circuit or a charge pump, and includes an anode terminal 2 and a cathode terminal 3.
  • the first capacitor 52 is charged with the reverse voltage applied to the first capacitor 51 via the first diode 51, and the first voltage adjustment circuit 53 determines the potential of the anode terminal 2 from the charged voltage of the first capacitor 52.
  • the control voltage V1 is generated.
  • the second power supply circuit 5b includes a second diode 55, a second capacitor 56, and a second voltage adjusting circuit 57 configured by, for example, a chopper circuit, a charge pump, a cockcroft circuit, etc.
  • a positive voltage applied to the cathode terminal 3 (hereinafter referred to as a forward voltage) is charged to the second capacitor 56 via the second diode 55, and the second voltage adjusting circuit 57 is connected to the second voltage adjusting circuit 57.
  • a control voltage V1 based on the potential of the anode terminal 2 is generated from the charging voltage of the capacitor 56.
  • the first and second voltage adjustment circuits 53 and 57 are connected to the output terminal of the entire power supply circuit 5c via diodes 54 and 58 arranged on the output side, respectively.
  • the power supply circuit 5c is connected to the anode terminal 2
  • the control voltage V1 is output regardless of the voltage polarity applied between the cathode terminal 3 and the cathode terminal 3.
  • the current direction detection circuit 7 includes a current limiting resistor 71 connected to the output of the power supply circuit 5 c, and a diode 72 whose anode is connected to the current limiting resistor 71 and whose cathode is connected to the cathode terminal 3. Then, the current direction detection circuit 7 detects the anode potential V2 of the diode 72 using the anode terminal 2 of the rectifier 1 as a potential reference, and sets the detected voltage V2.
  • the first drive control circuit 6 uses a control voltage V1 from the power supply circuit 5c to output a drive signal 6a to the gate electrode of the first MOSFET 4, and a voltage for generating a reference voltage V3 from the control voltage V1. And an adjustment circuit 62.
  • the drive circuit 61 compares the detection voltage V2 from the current direction detection circuit 7 with the reference voltage V3 and outputs a drive signal 6a for turning on / off the first MOSFET 4 to the gate electrode of the first MOSFET 4. Output.
  • the detection voltage V2 is lower than the reference voltage V3, the first MOSFET 4 is turned on.
  • the relationship between the cathode-anode voltage VCA between the cathode terminal 3 and the anode terminal 2 and the characteristics of the current i flowing from the anode terminal 2 to the cathode terminal 3 through the first MOSFET 4 and the operation of the first MOSFET 4 is shown.
  • 9 shows.
  • 33 indicates the operating state of the first MOSFET 4
  • 34 indicates the characteristics of the cathode-anode voltage VCA
  • 35 indicates the characteristics of the current i with the forward direction being positive.
  • the cathode-anode voltage VCA is the drain-source voltage of the first MOSFET 4.
  • the cathode-anode voltage VCA is positive, that is, when a reverse voltage is applied between the cathode and the anode, the first MOSFET 4 is turned off and the cathode-anode is cut off. . Further, in the conduction period A in which the first MOSFET 4 is turned on and the cathode and the anode are conducted, the cathode-anode voltage VCA is negative.
  • the reverse voltage applied between the anode terminal 2 and the cathode terminal 3 is charged to the first capacitor 52 via the first diode 51 of the first power supply circuit 5a.
  • the cathode-anode voltage VCA is charged to the second capacitor 56 via the second diode 55 of the second power supply circuit 5b.
  • the first voltage adjustment circuit 53 generates a control voltage V1 of, for example, 15V based on the potential of the anode terminal 2 from the charging voltage of the first capacitor 52.
  • the second voltage adjustment circuit 57 generates a similar control voltage V ⁇ b> 1 from the charging voltage of the second capacitor 56.
  • the power supply circuit 5c outputs the control voltage V1 from both the first and second power supply circuits 5a and 5b, the reverse voltage is applied regardless of the voltage polarity applied between the anode terminal 2 and the cathode terminal 3.
  • the predetermined control voltage V1 can be output regardless of the magnitude of.
  • first and second voltage adjustment circuits 53 and 57 do not always need to be operated at all, and either one may operate and the control voltage V1 may be output from the power supply circuit 5c. In that case, the voltages of the first and second capacitors 52 and 56, which are the input voltages of the first and second voltage adjustment circuits 53 and 57, are detected, and the first and second voltage adjustment circuits 53 and 57 are detected. However, a method of stopping the operation when the voltage cannot output the stable control voltage V1 may be used.
  • the drive circuit 61 compares the reference voltage V3 set to, for example, 0.7V and the detection voltage V2, and turns on the first MOSFET 4 when the detection voltage V2 is lower than the reference voltage V3. In this case, since the detection voltage V2 is as high as the control voltage V1, the first MOSFET 4 is turned off, and the rectifier 1 prevents conduction of the current i.
  • the output terminal of the power supply circuit 5c is connected to the cathode terminal 3 through the current limiting resistor 71 and the diode 72. Current flows. At this time, the current limiting resistor 71 limits the current and suppresses the discharge of the output of the power supply circuit 5c.
  • a voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected as the detection voltage V2.
  • the detection voltage V2 also decreases as the cathode-anode voltage VCA decreases.
  • the detection voltage V2 is the forward voltage Vf of the diode 72 (for example, 0.6 to 0. 0 when a PN junction diode is used). Therefore, when the reference voltage V3 is appropriately set, the detection voltage V2 becomes equal to or higher than the reference voltage V3, the first MOSFET 4 is turned off, and the rectifier 1 prevents conduction of the current i.
  • the drive circuit 61 When the cathode-anode voltage VCA decreases and the detection voltage V2 becomes lower than the reference voltage V3, the drive circuit 61 outputs a drive signal 6a for turning on the first MOSFET 4, and the first MOSFET 4 is turned on from off. .
  • the first MOSFET 4 When the first MOSFET 4 is turned on, a current i through the first MOSFET 4 flows in the forward direction from the anode terminal 2 to the cathode terminal 3, and a voltage drop due to the current i and the on-resistance of the first MOSFET 4 occurs.
  • the cathode-anode voltage VCA becomes negative.
  • the detection voltage V2 has a voltage value obtained by subtracting the on-voltage between the drain and source of the first MOSFET 4 from the forward voltage Vf of the diode.
  • the reference voltage V3 used in the drive circuit 61 is set to 0.7 V, for example.
  • the forward voltage Vf of the diode 72 is subtracted from the on-voltage between the drain and source of the first MOSFET 4, and the forward voltage It is set between the direction voltage Vf and the voltage value obtained by adding the ON voltage.
  • the detection voltage V2 is turned on between the drain and source of the first MOSFET 4 from the forward voltage Vf of the diode.
  • the voltage value is obtained by subtracting the voltage, and is lower than the reference voltage V3.
  • the drive circuit 61 turns on the first MOSFET 4 and the rectifier 1 continues to conduct the current i.
  • the first MOSFET 4 When the cathode-anode voltage VCA is inverted from negative to positive, that is, at the initial stage of reverse voltage application, the first MOSFET 4 is in an on state, so that the current from the cathode terminal 3 to the anode terminal 2 via the first MOSFET 4 i flows in the reverse direction, and a voltage drop due to the current i and the on-resistance of the first MOSFET 4 occurs in the reverse direction.
  • a current flows from the output terminal of the power supply circuit 5 c to the cathode terminal 3 through the current limiting resistor 71 and the diode 72.
  • a voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected as the detection voltage V2.
  • the detection voltage V2 has a voltage value obtained by adding the on-voltage between the drain and source of the first MOSFET 4 to the forward voltage Vf of the diode, and is equal to or higher than the reference voltage V3.
  • the drive circuit 61 turns off the first MOSFET 4 and the rectifier 1 prevents conduction of the current i.
  • the power supply circuit 5c is supplied with the predetermined control voltage V1 by the first voltage adjustment circuit 53 using the reverse voltage applied between the anode terminal 2 and the cathode terminal 3.
  • the control voltage does not fluctuate depending on the frequency of the current and the conduction rate between the two terminals, regardless of the voltage polarity applied between the two terminals.
  • the predetermined control voltage V1 can be stably output regardless of the magnitude of the reverse voltage.
  • the rectifier 1 can operate with high reliability. Further, it is not necessary to set the withstand voltage of the element used for the first drive control circuit 6 to be equal to or larger than the reverse voltage, and the first drive control circuit 6 can be configured with inexpensive elements. Further, in order to suppress the fluctuation of the control voltage V1, it is not necessary to provide a capacitor with a large capacity in the power supply circuit 5c, and the device configuration is suitable for downsizing.
  • control voltage V1 from the power supply circuit 5c is used not only for the driving voltage of the first MOSFET 4 but also for obtaining the detection voltage V2 in the current direction detection circuit 7, it has a simple circuit configuration and has two terminals.
  • the rectifier 1 that can be easily replaced with a diode, has low conduction loss, and is suitable for energy saving can be realized with high reliability.
  • the cathode-anode voltage VCA is higher than the control voltage V1
  • the diode 72 in the current direction detection circuit 7 is not turned on, and a high reverse voltage can be prevented from being applied to the first drive control circuit 6.
  • the detection voltage V2 does not become higher than the control voltage V1, and the voltage applied to each element for detection can be suppressed.
  • the current direction detection circuit 7 detects, as the detection voltage V2, a voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA when the diode 72 is conductive. Since the forward voltage Vf of the diode 72 is substantially constant and the cathode-anode voltage VCA changes depending on the direction and magnitude of the current i between the cathode and anode, the detection voltage V2 indicates the current i between the cathode and anode. Direction and size can be detected. In this way, detection of the direction of the current flowing through the first MOSFET 4 can be easily and reliably realized.
  • the detection voltage V2 that is equal to or higher than the reference voltage V3 can be detected. Then, the drive circuit 61 generates the drive signal 6a according to the detection voltage V2, so that when the reverse voltage is applied between the two terminals of the rectifier 1, the first MOSFET 4 is turned off and the current is blocked. When the forward voltage is applied, the first MOSFET 4 can be turned on and the two terminals of the rectifier 1 can be conducted.
  • FIG. 10 is a diagram showing a circuit configuration of a rectifier according to Embodiment 7 of the present invention.
  • the rectifier 1 uses the two terminals of the anode terminal 2 and the cathode terminal 3 as external terminals as in the first and sixth embodiments, and connects the first MOSFET 4 between the two terminals.
  • a power supply circuit 50 that generates a predetermined control voltage V 1, a first drive control circuit 6, and a current direction detection circuit 7 are provided.
  • the configurations and operations of the first MOSFET 4, the first drive control circuit 6, and the current direction detection circuit 7 are the same as those in the first and sixth embodiments.
  • the power supply circuit 50 will be described below.
  • the power supply circuit 50 includes a first power supply circuit 50a composed of the first voltage adjustment circuit 53 and a second power supply circuit 50b composed of the second voltage adjustment circuit 57, and is connected to the anode terminal 2 on the output side. A capacitor 59 as a filter circuit is provided between them.
  • the drive signal 6 a output from the first drive control circuit 6 is input to the first and second voltage adjustment circuits 53 and 57.
  • the first voltage adjustment circuit 53 detects the reverse voltage applied between the anode terminal 2 and the cathode terminal 3 when the input drive signal 6a is an off signal, that is, when the first MOSFET 4 is in the off state.
  • a control voltage V1 with the anode terminal 2 as a potential reference is generated.
  • the first voltage adjustment circuit 53 performs a step-down operation when the reverse voltage is larger than the control voltage V1, and performs a step-up operation when the reverse voltage is smaller than the control voltage V1.
  • the second voltage adjustment circuit 57 is applied in the order in which the voltage is applied between the anode terminal 2 and the cathode terminal 3 when the input drive signal 6a is an on signal, that is, when the first MOSFET 4 is on. The voltage is boosted to generate a control voltage V1 with the anode terminal 2 as a potential reference.
  • the power supply circuit 50 can operate one of the first and second voltage adjustment circuits 53 and 57 to generate and output the predetermined control voltage V1. Since the drive signal 6a changes between on and off, the first and second voltage adjustment circuits 53 and 57 operate alternately. Then, the capacitor 59 provided on the output side suppresses the fluctuation of the control voltage V1 when the operations of the first and second voltage adjustment circuits 53 and 57 are switched. The capacitor 59 only needs to suppress the fluctuation of the control voltage V1 when the operation of the first and second voltage adjustment circuits 53 and 57 is switched. Therefore, the capacitor 59 may be relatively small and the voltage fluctuation is within an allowable range. If it is within, the capacitor 59 may be omitted.
  • the power supply circuit 50 is operated by the first voltage adjustment circuit 53 using the reverse voltage applied between the anode terminal 2 and the cathode terminal 3.
  • the first power supply circuit 50a that generates the predetermined control voltage V1 and the second power supply circuit 50b that generates the predetermined control voltage V1 in the second voltage adjusting circuit 57 using the forward voltage.
  • the control voltage does not fluctuate depending on the frequency of the current and the conduction rate between the two terminals, regardless of the voltage polarity applied between the two terminals.
  • the predetermined control voltage V1 can be stably output regardless of the magnitude of the reverse voltage.
  • the control voltage V1 required for the first drive control circuit 6 can be stably obtained, and the rectifier 1 can operate with high reliability. Further, it is not necessary to set the withstand voltage of the element used for the first drive control circuit 6 to be equal to or larger than the reverse voltage, and the first drive control circuit 6 can be configured with inexpensive elements. In addition, in order to suppress fluctuations in the control voltage V1, it is not necessary to provide a capacitor with a large capacity in the power supply circuit 50, and the device configuration is suitable for downsizing.
  • the first and second voltage adjustment circuits 53 and 57 each have their own control power supply. At startup, each control power supply is started up from the voltages input to the first and second voltage adjustment circuits 53 and 57 using a voltage dividing resistor and a Zener diode. Alternatively, the control voltage V1 generated by one of the first and second voltage adjustment circuits 53 and 57 is charged to each control power supply capacitor by a charge pump.
  • FIG. 11 is a diagram showing a circuit configuration of a rectifier according to Embodiment 8 of the present invention.
  • the first and second voltage adjusting circuits 53 and 57 are operated by inputting the drive signal 6a output from the first drive control circuit 6, but in the eighth embodiment, The drive signal 6a is not input to the first and second voltage adjustment circuits 53 and 57, and the first and second voltage adjustment circuits 53 and 57 are operated according to the input voltage.
  • Other configurations and operations are the same as those in the seventh embodiment.
  • the first and second voltage adjustment circuits 53 and 57 generate a predetermined control voltage V1 using a cathode-anode voltage VCA applied between the anode terminal 2 and the cathode terminal 3 as an input voltage.
  • the first voltage adjustment circuit 53 When a reverse voltage applied between the anode terminal 2 and the cathode terminal 3 is input, the first voltage adjustment circuit 53 generates a control voltage V1 based on the potential of the anode terminal 2 from the reverse voltage. At this time, the first voltage adjustment circuit 53 performs a step-down operation when the reverse voltage is larger than the control voltage V1, and performs a step-up operation when the reverse voltage is smaller than the control voltage V1. Further, when a forward voltage applied between the anode terminal 2 and the cathode terminal 3 is input, the second voltage adjustment circuit 57 boosts the forward voltage to control voltage with the anode terminal 2 as a potential reference. V1 is generated.
  • the power supply circuit 50 can generate and output a predetermined control voltage V1 by operating one of the first and second voltage adjustment circuits 53 and 57.
  • the cathode-anode voltage VCA is a reverse voltage
  • the drive signal 6a is turned off and the first MOSFET 4 is turned off.
  • the cathode-anode voltage VCA is a forward voltage
  • the drive signal 6a is When the output is on, the first MOSFET 4 is turned on. Therefore, the first and second voltage adjustment circuits 53 and 57 operate alternately as in the case of the seventh embodiment.
  • the capacitor 59 provided on the output side suppresses the fluctuation of the control voltage V1 when the operations of the first and second voltage adjustment circuits 53 and 57 are switched.
  • the power supply circuit 50 according to the eighth embodiment is the same as the seventh embodiment except that the operation of the first and second voltage adjustment circuits 53 and 57 is switched based on the input voltage. An effect is obtained. That is, the generated control voltage does not vary depending on the frequency of current and the conduction rate between the two terminals, and the predetermined control is performed regardless of the polarity of the voltage applied between the two terminals and the magnitude of the reverse voltage.
  • the voltage V1 can be output stably. For this reason, the control voltage V1 required for the first drive control circuit 6 can be stably obtained, and the rectifier 1 can operate with high reliability.
  • the first drive control circuit 6 it is not necessary to set the withstand voltage of the element used for the first drive control circuit 6 to be equal to or larger than the reverse voltage, and the first drive control circuit 6 can be configured with inexpensive elements.
  • the control voltage V1 it is not necessary to provide a capacitor with a large capacity in the power supply circuit 50, and the device configuration is suitable for downsizing.
  • the first and second power supply circuits 50a and 50b are not provided with a capacitor for holding electric charge, the rise time of the power supply circuit 50 at the time of startup can be shortened.
  • the power supply circuits 5c and 50 shown in the sixth to eighth embodiments can also be applied in place of the power supply circuit 5 in the first to fifth embodiments. Also in this case, the same effect as each embodiment can be obtained.
  • the current direction detection circuit 7 can be configured by other configurations, for example, a Hall element or a shunt resistor for current detection. Also in this case, the output terminal of the power supply circuit 50 is connected to the current direction detection circuit, and the detection voltage V2 for detecting the current direction can be obtained using the control voltage V1.
  • FIG. 12 is a diagram showing a circuit configuration of a rectifier according to Embodiment 9 of the present invention.
  • the rectifier 1 uses the two terminals of the anode terminal 2 and the cathode terminal 3 as external terminals, and generates a control voltage V1 and a first drive.
  • a control circuit 6 and a current direction detection circuit 7 are provided.
  • a first MOSFET 4 that connects the drain electrode to the cathode terminal 3 between the two terminals of the rectifier 1, and an abnormal-time cutoff MOSFET 15 (hereinafter referred to as a cutoff MOSFET 15) connected in series to the first MOSFET 4.
  • the cutoff MOSFET 15 has a source electrode connected to the source electrode of the first MOSFET 4 and a drain electrode connected to the anode terminal 2.
  • the configurations and operations of the power supply circuit 5, the first drive control circuit 6, and the current direction detection circuit 7 are the same as those in the first embodiment, but in this case, between the anode terminal 2 and the first MOSFET 4. Since the cutoff MOSFET 15 is inserted, the control voltage V1, the detection voltage V2, and the reference voltage V3 are generated or detected using the source electrode of the first MOSFET 4 as a potential reference. Therefore, the voltage VCA in FIG. 12 indicates the voltage between the cathode terminal 3 and the source electrode of the first MOSFET 4.
  • the diode 16 is connected between the anode terminal 2 and the capacitor 52 in the power supply circuit 5, and the forward voltage applied between the anode terminal 2 and the cathode terminal 3 is applied to the diode 16 when the cutoff MOSFET 15 is in the OFF state.
  • a third drive control circuit 25 that operates with the control voltage V1 from the power supply circuit 5 is provided.
  • the third drive control circuit 25 supplies the cutoff MOSFET 15 to the cutoff MOSFET 15 according to the detection voltage V2 from the current direction detection circuit 7.
  • the drive signal 25a and the limit signal 25b to the first drive control circuit 6 are output.
  • the blocking MOSFET 15 is turned on in a steady state, and the first MOSFET 4 is turned off when the reverse voltage is applied to the rectifying device 1 to cut off the current i, as shown in the first embodiment.
  • the current i flows only in the direction.
  • a current i through the first MOSFET 4 flows from the anode terminal 2 to the cathode terminal 3 in the forward direction, and a voltage drop due to the current i and the on-resistance of the first MOSFET 4 occurs.
  • the third drive control circuit 25 detects that an overcurrent has occurred from the anode terminal 2 to the cathode terminal 3, and turns off the blocking MOSFET 15.
  • the detection voltage V2 is compared with a preset cutoff reference voltage, and when the detection voltage V2 becomes lower than the cutoff reference voltage, a drive signal 25a is output to the cutoff MOSFET 15 to turn off the cutoff MOSFET 15. .
  • the third drive control circuit 25 outputs a limit signal 25b for adjusting the reference voltage V3 to the voltage adjustment circuit 62 in the first drive control circuit 6 at the same time when the blocking MOSFET 15 is turned off.
  • the limit signal 25b is a signal that limits the drive signal 6a in order to turn off the first MOSFET 4, and thereby the first MOSFET 4 is turned off. As a result, all MOSFETs 4 and 15 between the two terminals of the rectifier 1 are cut off and conduction is prevented. Since the first MOSFET 4 and the cutoff MOSFET 15 are connected in the opposite directions, the built-in parasitic diodes are also in the opposite directions, and are reliably cut off regardless of the direction of the current i.
  • a cutoff MOSFET 15 is connected to the anode terminal side of the first MOSFET 4, and the third drive control circuit 25 detects the occurrence of overcurrent based on the detection voltage V 2 from the current direction detection circuit 7. Then, the blocking MOSFET 15 is turned off. Thereby, it is possible to prevent an overcurrent from flowing through the rectifying device 1 and to improve the reliability of the rectifying device 1.
  • the third drive control circuit 25 can easily detect the occurrence of overcurrent based on the detection voltage V2 from the current direction detection circuit 7, and can easily cut off the overcurrent.
  • the forward voltage applied to the rectifier 1 is charged to the capacitor 52 via the diode 16 when the cutoff MOSFET 15 is in the off state
  • the forward voltage at the time of the current cutoff can also be used to generate the control voltage V1
  • Efficiency and stabilization of control voltage generation can be achieved.
  • the detection voltage V2 is compared with a preset reference voltage for cutoff.
  • the reference voltage for cutoff may be set and changed from the outside.
  • the third drive control circuit 25 is provided with an external terminal 25c for inputting a signal from the outside, and the value of the cutoff reference voltage is externally input by an electric signal or an optical signal.
  • the setting is input to the third drive control circuit 25.
  • blocking can be performed according to conditions, such as not only the rectifier 1 but a peripheral circuit, and the convenience improves.
  • the period during which the blocking MOSFET 15 is turned off may be a predetermined period set in advance, or until a release signal such as an external electric signal or optical signal is input.
  • the third drive control circuit 25 may be provided with an external terminal for outputting a signal to the outside.
  • the blocking MOSFET 15 When the blocking MOSFET 15 is in an OFF state, Anomalies due to overcurrent may be notified to the outside by sound or light.
  • the third drive control circuit 25 that detects overcurrent and is responsible for interrupting the current can be easily notified of an abnormality by providing means for notifying the outside of the abnormality.
  • Embodiment 10 FIG.
  • the blocking MOSFET 15 is applied to the first embodiment.
  • it can be applied to the other second to eighth embodiments.
  • the case where the blocking MOSFET 15 is applied to the fifth embodiment will be described below.
  • the rectifier 1 according to this embodiment has the same structure as that of the fifth embodiment shown in FIG. 5 except that the blocking MOSFET 15, the diode 16 and the third drive control circuit 25 shown in FIG. 12 of the ninth embodiment. It becomes the added composition.
  • the first MOSFET 4 connected in series to the first MOSFET 4
  • the series circuit of the first MOSFET 4 and the second MOSFET 10 are connected in parallel.
  • a third MOSFET 12 to be connected, a third diode 13, and a blocking MOSFET 15 connected to the anode terminal side of the first MOSFET 4 are provided.
  • a shunt resistor 11 is connected in parallel to the second MOSFET 10, and an on-voltage adjusting circuit 14 is configured by the elements 10 to 13.
  • the second drive control circuit 20 selects a combination of MOSFETs to be turned on among the first MOSFET 4 and the second and third MOSFETs 10 and 12 in accordance with the detection voltage V2.
  • the on-resistance between the two terminals when the current i flows in the forward direction from the anode terminal 2 to the cathode terminal 3 is changed stepwise to increase the on-voltage.
  • the third drive control circuit 25 detects an overcurrent and turns off the blocking MOSFET 15 as shown in the ninth embodiment.
  • the potential reference for each of the voltages V1, V2, and V3 is the source electrode of the first MOSFET 4
  • the voltage VCA indicates the voltage between the cathode terminal 3 and the source electrode of the first MOSFET 4.
  • FIG. 14 shows the switching state of each MOSFET corresponding to the current i.
  • Reference numeral 31a denotes a range of the voltage VAC in the range of the detection voltage V2 in which the current direction can be detected by the current direction detection circuit 7, and 32a denotes an output characteristic of the third diode 13.
  • SW indicates a state that is switched in synchronization with the drive signal 6 a from the drive circuit 61.
  • the blocking MOSFET 15 continues to be in an ON state at the steady state, and the first to third MOSFETs 4, 10, and 12 are different from those in the fifth embodiment until the current value i5 ( ⁇ i4) at which the current i is recognized as an overcurrent. It operates in the same way.
  • the third drive control circuit 25 turns off the cutoff MOSFET 15.
  • the third drive control circuit 25 outputs a limit signal 25b for adjusting the reference voltage V3 to the voltage adjustment circuit 62 in the first drive control circuit 6. 1 MOSFET 4 is turned off.
  • the second drive control circuit 20 turns off the second and third MOSFETs 10 and 12.
  • the second drive control circuit 20 switches the combination of MOSFETs that are turned on when the current i increases so as to reduce the on-resistance, thereby suppressing the increase in the on-voltage.
  • the third drive control circuit 25 detects that an overcurrent has occurred from the anode terminal 2 to the cathode terminal 3, and turns off the blocking MOSFET 15.
  • the other MOSFETs 4, 10, 12 are also turned off. All MOSFETs 4, 10, 12, and 15 between the two terminals of the rectifier 1 are cut off, and the current is cut off reliably.
  • the first, second, and third drive control circuits 6, 20, and 25 are individually provided. However, one drive control circuit that has these functions may be used.
  • FIG. FIG. 15 is a diagram showing a circuit configuration of a rectifier according to Embodiment 11 of the present invention.
  • the rectifier according to the ninth embodiment shown in FIG. 12 includes a current limiting circuit 17 that limits the current between the two terminals of the rectifier 1.
  • the current limiting circuit 17 includes a resistor, a reactor, a diode, and the like, and includes a bypass circuit, and is connected between the drain electrode of the first MOSFET 4 and the cathode terminal 3.
  • the third drive control circuit 25 detects that an overcurrent has occurred from the anode terminal 2 to the cathode terminal 3 and turns off the cutoff MOSFET 15. At this time, a predetermined transient period is provided, and the current i gradually increases. Decrease the value to cut off the current. In this case, the drive signal 25a to the blocking MOSFET 15 is controlled so that the energization rate of the blocking MOSFET 15 is gradually decreased to zero.
  • the current limiting circuit 17 is, for example, controlled by the third drive control circuit 25, and is bypassed by a bypass circuit in a steady state. The current limiting circuit 17 limits the current by flowing the current i only during the transition period when switching on / off the blocking MOSFET 15. .
  • the length of the transition period between when the blocking MOSFET 15 is turned on and when it is turned off may be the same or different. Also, when the current i that has been interrupted between the two terminals of the rectifying device 1 is restored and made conductive by an external signal or the like, a predetermined transient period is provided as in the case of the interruption, and the value of the current i is gradually increased. Increase to return.
  • the drive signal 25a to the blocking MOSFET 15 is controlled so as to gradually increase the energization rate of the blocking MOSFET 15 from zero.
  • Embodiment 12 FIG.
  • the current limiting circuit 17 is provided, and the current supply rate of the blocking MOSFET 15 is gradually increased or decreased.
  • the driving voltage of the driving signal 25a to the blocking MOSFET 15 is adjusted.
  • the on-resistance of the blocking MOSFET 15 is adjusted.
  • the current limiting circuit 17 is unnecessary, and when the current is interrupted by turning off the interrupting MOSFET 15, a predetermined transient period is provided so that the current i is gradually decreased by gradually decreasing the value of the current i.
  • the drive voltage of the drive signal 25a to the cutoff MOSFET 15 is gradually reduced.
  • FIG. FIG. 16 is a diagram showing a simplified configuration of the rectifier 1 and peripheral circuits according to the thirteenth embodiment of the present invention.
  • the rectifier 1 is the rectifier according to the ninth embodiment shown in FIG. 12, in which the first drive control circuit 6 and the third drive control circuit 25 are represented by one drive control circuit 26. It is.
  • the power supply circuit 5 and the current direction detection circuit 7 are not shown.
  • the voltage detection circuit 27 detects the voltage of the anode terminal 2 from the external reference potential as the input voltage VIN.
  • the blocking MOSFET 15 is turned on as in the case of the overcurrent detection in the ninth embodiment. Turn off and cut off current.
  • the third drive control circuit 25 in the drive control circuit 26 for controlling the cutoff MOSFET 15 receives an external signal to detect a voltage abnormality and shuts off the cutoff MOSFET 15. For this reason, it is possible to easily and reliably detect a voltage abnormality using the external voltage detection circuit 27 and the like, and the convenience is improved. Note that a voltage / current abnormality signal detected using another detection circuit or a signal for conducting / interrupting the current i of the rectifier 1 may be received.
  • Embodiments 11 and 12 may be applied to this embodiment, and the same effect can be obtained.
  • the semiconductor materials of the MOSFETs 4, 10, 12, and 15 used in the above embodiments are wide gap semiconductor materials such as silicon carbide, gallium nitride, and diamond semiconductor, and the loss during rectification in the rectifier 1 is reduced. What you suppress is desirable.
  • each diode in the rectifier 1 may be of any type or material, such as a Schottky barrier diode or a fast recovery diode, but the delay times of the current direction detection circuit 7 and the drive control circuits 6, 20, 25, etc. are improved. In order to achieve this, it is desirable to use an element having a low forward voltage and a high response speed, such as silicon carbide or gallium nitride.
  • FIG. 17 is a diagram showing a main circuit configuration of a photovoltaic power generation system according to Embodiment 14 of the present invention.
  • the main circuit 100 of the photovoltaic power generation system includes a plurality of (in this case, three) solar panels 80 connected in parallel, and each of the solar panels 80 has a rectifier 1a connected in parallel.
  • a plurality of (in this case, three) solar cells 81 are connected in series.
  • the direct-current power generated by each solar panel 80 is stored in energy storage means such as a capacitor 82 via the rectifier 1b, and then boosted by two chopper circuits 83 connected in parallel. Is output via.
  • the chopper circuit 83 includes a switch, a reactor, and a rectifier 1c. As the rectifiers 1a, 1b, and 1c in the main circuit 100, the rectifier 1 having a low loss and high reliability having the configuration shown in the first to thirteenth embodiments is used.
  • a plurality of solar panels 80 are connected in parallel to form a redundant system circuit, and a DC voltage is reliably generated.
  • each solar panel 80 although the several photovoltaic cell 81 is connected in series, when abnormality arises in each photovoltaic cell 81, the rectifier 1a connected in parallel with the photovoltaic cell 81 which abnormality occurred Thus, the solar battery cell 81 is bypassed. For example, when some solar cells 81 are not irradiated with sunlight and cannot generate power, the impedance of the solar cells 81 is increased.
  • the connection wiring of the solar battery cell 81 fails due to the failure of the solar battery cell 81, the power generated by the other solar battery cells 81 connected in series to the failed solar battery 81 cannot be output.
  • the first drive control circuit 6 in the rectifier 1a detects the abnormality from the detection voltage V2, turns on the first MOSFET 4, and malfunctions the solar battery cell 81.
  • the electric power generated by the other solar battery cell 81 is output.
  • the solar panel 80 can output electric power.
  • the rectifying device 1a has a device configuration that has a very low loss during current conduction as shown in the first to thirteenth embodiments, and can reduce the loss in the solar panel 80.
  • the heat generation of the rectifying device 1a is small when the current of the rectifying device 1a is conducted, it is possible to suppress the heating of the other solar cells 81, and to suppress the reduction of the power generation efficiency of the other solar cells 81. it can.
  • the first drive control circuit 6 may be provided with an external terminal, and a means for informing the outside of the conduction / cutoff state of the first MOSFET 4 may be provided, and the administrator can quickly find the location where the abnormality has occurred. .
  • the DC voltage generated by each solar panel 80 is charged in the capacitor 82 via the rectifier 1b.
  • the rectifier 1b is interrupted by a reverse voltage at the time of a short circuit failure.
  • the rectifying device 1b that conducts in a steady state has a device configuration that has a very low loss during current conduction, as shown in the first to thirteenth embodiments, and can reduce the loss of the main circuit 100.
  • the first drive control circuit 6 in the rectifying device 1b may be provided with an external terminal and provided with means for informing the outside of the conduction / cutoff state of the first MOSFET 4, and the administrator can determine where the abnormality has occurred. Can be found promptly.
  • the boosting efficiency of the chopper circuit 83 is improved by using the rectifier 1c with extremely low loss for the rectifier element in the chopper circuit 83.
  • the power generation efficiency and reliability of the photovoltaic power generation system can be improved by using the low-loss and high-reliability rectifier according to the present invention for the rectifiers 1a, 1b, and 1c in the main circuit 100.

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Abstract

Provided is a rectification device including: a power supply circuit (5) which connects a first MOSFET (4) connected between an anode terminal (2) and a cathode terminal (3) in a manner such that the source electrode is on the anode terminal side and generates a control voltage (V1) from the application voltage between the two terminals; a first drive control circuit (6); and a detection circuit (7) for detecting the direction of the current between the two terminals.  The detection circuit (7) has a current limiting resistor (71) connected to the output of the power supply circuit (5) and a diode (72) having an anode connected to the current limiting resistor (71) and a cathode connected to the cathode terminal (3).  The detection circuit (7) detects the current direction in accordance with the anode potential (V2) of the diode (72).  The first drive control circuit (6) uses a control voltage (V1) to drive/control the first MOSFET (4) on the basis of the anode potential (V2).

Description

整流装置およびそれを備えた太陽光発電システムRectifier and solar power generation system including the same
　この発明は、２つの外部端子間に接続され、一方向のみ電流を流し、逆方向の電流を阻止する整流装置、およびこのような整流装置を備えた太陽光発電システムに関するものである。 The present invention relates to a rectifier that is connected between two external terminals, allows a current to flow only in one direction and blocks a reverse current, and a photovoltaic power generation system including such a rectifier.
　２つの外部端子間に接続される整流素子であるダイオードは、順方向に電圧が印加された場合は、陽極側から陰極側に一方向に電流を流し、逆電圧が印加されると、逆向きに流れようとする電流を阻止する動作を行う。これら一般的なダイオードは、冗長系電源や、整流回路などに使用されている。しかしながら、ダイオードには導通時に順方向電圧が発生し、この電圧と順方向電流との積により比較的大きな導通損失が生じる。特に、冗長系などで複数個直列接続して使用される場合では、ダイオードの接続数分だけ損失が増加するという問題がある。 A diode that is a rectifier connected between two external terminals, when a voltage is applied in the forward direction, causes a current to flow in one direction from the anode side to the cathode side, and reverses when a reverse voltage is applied. The operation to block the current that is going to flow is performed. These general diodes are used for redundant power supplies, rectifier circuits, and the like. However, a forward voltage is generated in the diode when conducting, and a relatively large conduction loss occurs due to the product of this voltage and the forward current. In particular, when a plurality of redundant systems are used in series connection, there is a problem that the loss increases by the number of diodes connected.
　導通損失の少ない整流装置には従来から同期整流方式が用いられているが、整流素子を駆動するための電源や、同期信号もしくは整流素子を流れる電流方向の検出が必要である。
　従来の整流装置では、同期整流用ＭＯＳＦＥＴのドレインにダイオードのカソードを接続し、そのアノードに外部より電力を供給する電流供給手段を接続すると共に、ダイオードのアノードとＭＯＳＦＥＴのソースとの間に抵抗を接続してその両端電圧を検出する。そして、抵抗の両端電圧と基準電圧とを比較し、その出力信号を増幅してゲート駆動手段を介しゲート電圧を得ることにより、ＭＯＳＦＥＴに電流が流れる期間の殆どでゲート電圧をＭＯＳＦＥＴに印加する（例えば、特許文献１参照）。 Conventionally, a synchronous rectification method has been used for a rectifier with low conduction loss. However, it is necessary to detect a power source for driving the rectifier and a direction of a current flowing through the synchronous signal or the rectifier.
In the conventional rectifier, the cathode of the diode is connected to the drain of the synchronous rectifier MOSFET, the current supply means for supplying power from the outside is connected to the anode, and a resistor is connected between the anode of the diode and the source of the MOSFET. Connect and detect the voltage across it. Then, the voltage across the resistor is compared with the reference voltage, the output signal is amplified, and the gate voltage is obtained via the gate driving means, so that the gate voltage is applied to the MOSFET during most of the period in which the current flows in the MOSFET ( For example, see Patent Document 1).
　さらに、従来の別例による整流装置では、電界効果トランジスタのドレイン電極を交流入力端子とし、ソース電極を直流出力端子とし、ゲート電極をオペアンプの出力に接続し、このオペアンプの入力の一方を交流入力端子に接続し、他方を直流出力端子に接続する。そして、オペアンプで交流入力端子と直流出力端子の間の電位差を検出して、逆方向に入力電圧が印加された場合には電界効果トランジスタを非導通とし、順方向に入力電圧が印加された場合は電界効果トランジスタを導通とすることで、整流を可能とする（例えば、特許文献２参照）。 Further, in the conventional rectifier according to another example, the drain electrode of the field effect transistor is used as an AC input terminal, the source electrode is used as a DC output terminal, the gate electrode is connected to the output of the operational amplifier, and one input of the operational amplifier is input as an AC input. Connect to the terminal and connect the other to the DC output terminal. When the operational amplifier detects the potential difference between the AC input terminal and the DC output terminal and the input voltage is applied in the reverse direction, the field effect transistor is turned off and the input voltage is applied in the forward direction Enables rectification by making the field effect transistor conductive (see, for example, Patent Document 2).
特開２００４－３２９３７号公報JP 2004-32937 A 特開平１１－１２２９２９号公報Japanese Patent Laid-Open No. 11-122929
　特許文献１に示す従来の整流装置では、ＭＯＳＦＥＴを流れる電流方向の検出のために、ＭＯＳＦＥＴのドレインにカソードを接続したダイオードのアノードに電流供給手段を接続し、該アノードとＭＯＳＦＥＴのソースとの間に接続された抵抗の両端電圧を検出した。しかしながら、外部端子を陽極端子と陰極端子との２端子とした整流装置に適用するには、ＭＯＳＦＥＴの駆動電源と別に定電流を供給する電流供給手段を整流装置内部で生成する必要があり、容易に適用できないものであった。
　また、特許文献２に示す従来の整流装置では、ＭＯＳＦＥＴを流れる電流方向の検出のために、オペアンプでドレイン・ソース間電圧を検出するが、信頼性を高めるためにオペアンプに入力オフセット電圧を持たせている。このため、入力オフセット電圧を外部電源により供給する、もしくは入力オフセット電圧を持つように製造されたオペアンプを要するという問題点があった。 In the conventional rectifier shown in Patent Document 1, a current supply means is connected to the anode of a diode in which the cathode is connected to the drain of the MOSFET to detect the direction of the current flowing through the MOSFET, and between the anode and the source of the MOSFET. The voltage across the resistor connected to was detected. However, in order to apply to a rectifier having two external terminals, an anode terminal and a cathode terminal, it is necessary to generate a current supply means for supplying a constant current separately from the driving power source of the MOSFET inside the rectifier. Was not applicable.
In the conventional rectifier shown in Patent Document 2, the drain-source voltage is detected by the operational amplifier for detection of the direction of the current flowing through the MOSFET. However, in order to improve the reliability, the operational amplifier has an input offset voltage. ing. For this reason, there has been a problem that an operational amplifier manufactured to supply an input offset voltage from an external power source or to have an input offset voltage is required.
　この発明は、上記のような問題点を解消するために成されたものであって、導通時の損失が低減されたＭＯＳＦＥＴを２つの外部端子間に接続して成る整流装置が、さらなる端子および外部電源が不要で２端子のダイオードとの置き換えが容易であると共に、ＭＯＳＦＥＴを流れる電流方向の検出が容易に信頼性よく実現できることを目的とする。
　また、このような整流装置を備えて、簡略な構成で信頼性よく発電効率を向上できる太陽光発電システムを提供することを第２の目的とする。 The present invention has been made to solve the above-described problems, and a rectifier comprising a MOSFET having a reduced loss during conduction and connected between two external terminals is provided with a further terminal and An object is to eliminate the need for an external power source and to easily replace the diode with a two-terminal diode, and to easily and reliably detect the direction of the current flowing through the MOSFET.
It is a second object of the present invention to provide a solar power generation system that includes such a rectifier and can improve power generation efficiency with a simple configuration and with high reliability.
　この発明による整流装置は、外部端子を陽極端子と陰極端子との２端子とし、該２端子間に、ソース電極を上記陽極端子側にして接続された第１のＭＯＳＦＥＴと、上記２端子間に印加される電圧から所定の制御電圧を生成して出力する電源回路と、上記電源回路からの制御電圧を用いて上記第１のＭＯＳＦＥＴのゲート電極に駆動信号を出力する第１の駆動制御回路と、上記電源回路の出力に接続された電流制限用抵抗、およびアノードを該電流制限用抵抗に接続しカソードを上記陰極端子に接続したダイオードを有し、該ダイオードのアノード電位を検出する検出回路とを備える。そして、上記第１の駆動制御回路は、上記検出回路に検出された上記ダイオードのアノード電位に応じて上記駆動信号を出力するものである。 In the rectifier according to the present invention, an external terminal is an anode terminal and a cathode terminal, and a first MOSFET connected between the two terminals with a source electrode on the anode terminal side is connected between the two terminals. A power supply circuit that generates and outputs a predetermined control voltage from the applied voltage, and a first drive control circuit that outputs a drive signal to the gate electrode of the first MOSFET using the control voltage from the power supply circuit; A current limiting resistor connected to the output of the power supply circuit, and a detection circuit for detecting an anode potential of the diode, having a diode having an anode connected to the current limiting resistor and a cathode connected to the cathode terminal; Is provided. The first drive control circuit outputs the drive signal in accordance with the anode potential of the diode detected by the detection circuit.
　またこの発明による太陽光発電システムは、太陽光パネルを１以上用いて発電するもので、上記各太陽光パネルは、直列接続された複数の太陽光発電セルと、外部端子を陽極端子と陰極端子との２端子として、上記各太陽光発電セルにそれぞれ並列に接続される整流装置とを備える。また、上記各整流装置は、上記２端子間に、ソース電極を上記陽極端子側にして接続された第１のＭＯＳＦＥＴと、上記２端子間に印加される電圧から所定の制御電圧を生成して出力する電源回路と、上記電源回路からの制御電圧を用いて上記第１のＭＯＳＦＥＴのゲート電極に駆動信号を出力する第１の駆動制御回路と、上記電源回路の出力に接続された電流制限用抵抗、およびアノードを該電流制限用抵抗に接続しカソードを上記陰極端子に接続したダイオードを有し、該ダイオードのアノード電位を検出する検出回路とを備える。そして、上記第１の駆動制御回路は、上記検出回路に検出された上記ダイオードのアノード電位から、接続された上記太陽光発電セルの異常を検出し、上記第１のＭＯＳＦＥＴをオンさせて、該整流装置により該太陽光発電セルをバイパスするものである。 The solar power generation system according to the present invention generates power using one or more solar panels. Each of the solar panels includes a plurality of solar power generation cells connected in series, and an external terminal serving as an anode terminal and a cathode terminal. And two rectifiers connected in parallel to the respective photovoltaic power generation cells. Each rectifier generates a predetermined control voltage from the first MOSFET connected between the two terminals with the source electrode on the anode terminal side and the voltage applied between the two terminals. A power supply circuit for outputting, a first drive control circuit for outputting a drive signal to the gate electrode of the first MOSFET using a control voltage from the power supply circuit, and a current limiting circuit connected to the output of the power supply circuit And a detection circuit that includes a diode having an anode connected to the current limiting resistor and a cathode connected to the cathode terminal, and detecting an anode potential of the diode. The first drive control circuit detects an abnormality of the connected photovoltaic power generation cell from the anode potential of the diode detected by the detection circuit, turns on the first MOSFET, and The solar power generation cell is bypassed by a rectifier.
　この発明による整流装置は、２端子間に印加される電圧から所定の制御電圧を生成する電源回路を備える。また、電源回路の出力に電流制限用抵抗を接続し、電流制限用抵抗と陰極端子との間にダイオードを挿入して、ダイオードのアノード電位を検出する。第１のＭＯＳＦＥＴを流れる電流の向きにより変化する上記アノード電位を検出するため、第１のＭＯＳＦＥＴを流れる電流方向の検出が容易に信頼性よく実現できる。また、上記電源回路が出力する制御電圧を、第１のＭＯＳＦＥＴの制御に用いるだけでなく、ダイオードのアノード電位を検出するための電圧に用いて整流装置を動作することができる。このため、簡略な回路構成で２端子のダイオードとの置き換えが容易な、低損失で信頼性の高い整流装置が実現できる。 The rectifier according to the present invention includes a power supply circuit that generates a predetermined control voltage from a voltage applied between two terminals. Further, a current limiting resistor is connected to the output of the power supply circuit, and a diode is inserted between the current limiting resistor and the cathode terminal to detect the anode potential of the diode. Since the anode potential that changes depending on the direction of the current flowing through the first MOSFET is detected, the direction of the current flowing through the first MOSFET can be easily and reliably detected. In addition, the control voltage output from the power supply circuit can be used not only to control the first MOSFET, but also to operate the rectifier using a voltage for detecting the anode potential of the diode. Therefore, it is possible to realize a low-loss and high-reliability rectifier that can be easily replaced with a two-terminal diode with a simple circuit configuration.
　またこの発明による太陽光発電システムは、直列接続された複数の太陽光発電セルの各太陽光発電セルに並列に整流装置を接続する。そして、この整流装置は、簡略な回路構成で、各太陽光発電セルの異常時に、低損失で信頼性よく該太陽光発電セルをバイパスさせることができる。このため、太陽光発電システムは、簡略な構成で信頼性よく発電効率を向上できる。 In the photovoltaic power generation system according to the present invention, a rectifier is connected in parallel to each photovoltaic power generation cell of a plurality of photovoltaic power generation cells connected in series. And this rectification | straightening apparatus can bypass this solar power generation cell with low loss and reliability at the time of abnormality of each solar power generation cell by simple circuit structure. For this reason, the photovoltaic power generation system can improve the power generation efficiency with a simple configuration with high reliability.
この発明の実施の形態１による整流装置の回路構成を示す図である。It is a figure which shows the circuit structure of the rectifier by Embodiment 1 of this invention. この発明の実施の形態２による整流装置の回路構成を示す図である。It is a figure which shows the circuit structure of the rectifier by Embodiment 2 of this invention. この発明の実施の形態３による整流装置の回路構成を示す図である。It is a figure which shows the circuit structure of the rectifier by Embodiment 3 of this invention. この発明の実施の形態４による整流装置の回路構成を示す図である。It is a figure which shows the circuit structure of the rectifier by Embodiment 4 of this invention. この発明の実施の形態５による整流装置の回路構成を示す図である。It is a figure which shows the circuit structure of the rectifier by Embodiment 5 of this invention. この発明の実施の形態５による整流装置の動作特性を説明する図である。It is a figure explaining the operating characteristic of the rectifier by Embodiment 5 of this invention. この発明の実施の形態５による整流装置内の各ＭＯＳＦＥＴのスイッチング状態を説明する図である。It is a figure explaining the switching state of each MOSFET in the rectifier by Embodiment 5 of this invention. この発明の実施の形態６による整流装置の回路構成を示す図である。It is a figure which shows the circuit structure of the rectifier by Embodiment 6 of this invention. この発明の実施の形態６による整流装置の動作を説明する図である。It is a figure explaining operation | movement of the rectifier by Embodiment 6 of this invention. この発明の実施の形態７による整流装置の回路構成を示す図である。It is a figure which shows the circuit structure of the rectifier by Embodiment 7 of this invention. この発明の実施の形態８による整流装置の回路構成を示す図である。It is a figure which shows the circuit structure of the rectifier by Embodiment 8 of this invention. この発明の実施の形態９による整流装置の回路構成を示す図である。It is a figure which shows the circuit structure of the rectifier by Embodiment 9 of this invention. この発明の実施の形態１０による整流装置の動作特性を説明する図である。It is a figure explaining the operating characteristic of the rectifier by Embodiment 10 of this invention. この発明の実施の形態１０による整流装置内の各ＭＯＳＦＥＴのスイッチング状態を説明する図である。It is a figure explaining the switching state of each MOSFET in the rectifier by Embodiment 10 of this invention. この発明の実施の形態１１による整流装置の回路構成を示す図である。It is a figure which shows the circuit structure of the rectifier by Embodiment 11 of this invention. この発明の実施の形態１３による整流装置および周辺回路構成を示す図である。It is a figure which shows the rectifier and peripheral circuit structure by Embodiment 13 of this invention. この発明の実施の形態１４による太陽光発電システムの主回路構成を示す図である。It is a figure which shows the main circuit structure of the solar energy power generation system by Embodiment 14 of this invention.
実施の形態１．
　以下、この発明の実施の形態１による整流装置を図に基づいて説明する。
　図１は、この発明の実施の形態１による整流装置の回路構成を示す図である。
　図に示すように、整流装置１は、陽極端子としてのアノード端子２、陰極端子としてのカソード端子３の２端子を外部端子とし、該２端子間に接続されたｎチャネル型パワーＭＯＳＦＥＴである第１のＭＯＳＦＥＴ４と、所定の制御電圧Ｖ１を生成する電源回路５と、電源回路５から出力される制御電圧Ｖ１を用いて第１のＭＯＳＦＥＴ４を駆動制御する第１の駆動制御回路６と、第１のＭＯＳＦＥＴ４に流れる電流方向を検出するための検出回路としての電流方向検出回路７とを備える。第１のＭＯＳＦＥＴ４は、ソース・ドレイン間に寄生ダイオード４ａを内蔵し、ソース電極をアノード端子２に、ドレイン電極をカソード端子３に接続する。 Embodiment 1 FIG.
A rectifier according to Embodiment 1 of the present invention will be described below with reference to the drawings.
1 is a diagram showing a circuit configuration of a rectifier according to Embodiment 1 of the present invention.
As shown in the figure, the rectifier 1 is an n-channel power MOSFET having two terminals, an anode terminal 2 serving as an anode terminal and a cathode terminal 3 serving as a cathode terminal, as external terminals connected between the two terminals. 1 MOSFET 4, a power supply circuit 5 that generates a predetermined control voltage V 1, a first drive control circuit 6 that drives and controls the first MOSFET 4 using the control voltage V 1 output from the power supply circuit 5, And a current direction detection circuit 7 as a detection circuit for detecting the direction of the current flowing through the MOSFET 4. The first MOSFET 4 incorporates a parasitic diode 4 a between the source and drain, and connects the source electrode to the anode terminal 2 and the drain electrode to the cathode terminal 3.
　電源回路５は、ダイオード５１、コンデンサ５２、および、例えばチョッパ回路などで構成された電圧調整回路５３を備え、アノード端子２とカソード端子３との間に印加される逆極性電圧（以下、逆電圧と称す）をダイオード５１を介してコンデンサ５２に充電し、コンデンサ５２の充電電圧からアノード端子２を電位基準とした所定の電圧を第１のＭＯＳＦＥＴ４の制御電圧Ｖ１として生成する。電圧調整回路５３は、逆電圧の大きさにより昇圧型、降圧型などの方式をとり、逆電圧の大きさにかかわらず安定した制御電圧Ｖ１を生成する。
　電流方向検出回路７は、電源回路５の出力に接続された電流制限用抵抗７１、およびアノードを電流制限用抵抗７１に接続しカソードをカソード端子３に接続したダイオード７２を備え、整流装置１のアノード端子２を電位基準として、ダイオード７２のアノード電位Ｖ２を検出する。 The power supply circuit 5 includes a diode 51, a capacitor 52, and a voltage adjusting circuit 53 configured by, for example, a chopper circuit, and has a reverse polarity voltage (hereinafter referred to as a reverse voltage) applied between the anode terminal 2 and the cathode terminal 3. The capacitor 52 is charged via the diode 51, and a predetermined voltage with the anode terminal 2 as a potential reference is generated from the charging voltage of the capacitor 52 as the control voltage V 1 of the first MOSFET 4. The voltage adjustment circuit 53 employs a step-up type or a step-down type depending on the magnitude of the reverse voltage, and generates a stable control voltage V1 regardless of the magnitude of the reverse voltage.
The current direction detection circuit 7 includes a current limiting resistor 71 connected to the output of the power supply circuit 5, and a diode 72 having an anode connected to the current limiting resistor 71 and a cathode connected to the cathode terminal 3. The anode potential V2 of the diode 72 is detected using the anode terminal 2 as a potential reference.
　第１の駆動制御回路６は、電源回路５からの制御電圧Ｖ１を用いて第１のＭＯＳＦＥＴ４のゲート電極に駆動信号６ａを出力する駆動回路６１と、制御電圧Ｖ１から基準電圧Ｖ３を生成する電圧調整回路６２とを備える。そして、駆動回路６１は、電流方向検出回路７にて検出されたダイオード７２のアノード電位Ｖ２（以下、検出電圧Ｖ２と称す）と基準電圧Ｖ３との大小を比較して、第１のＭＯＳＦＥＴ４のゲート電極へ第１のＭＯＳＦＥＴ４をオン／オフさせる駆動信号６ａを出力する。ここでは、検出電圧Ｖ２が基準電圧Ｖ３より低いとき、第１のＭＯＳＦＥＴ４をオンさせる。
　なお、検出電圧Ｖ２は、ダイオード７２のアノードとアノード端子２との間の電圧である。 The first drive control circuit 6 uses a control voltage V1 from the power supply circuit 5 to output a drive signal 6a to the gate electrode of the first MOSFET 4, and a voltage for generating a reference voltage V3 from the control voltage V1. And an adjustment circuit 62. Then, the drive circuit 61 compares the anode voltage V2 (hereinafter referred to as the detection voltage V2) of the diode 72 detected by the current direction detection circuit 7 with the reference voltage V3, and compares the magnitude of the gate voltage of the first MOSFET 4 A drive signal 6a for turning on / off the first MOSFET 4 is output to the electrode. Here, when the detection voltage V2 is lower than the reference voltage V3, the first MOSFET 4 is turned on.
The detection voltage V <b> 2 is a voltage between the anode of the diode 72 and the anode terminal 2.
　次に、整流装置１の動作について説明する。
　電源回路５では、アノード端子２とカソード端子３との間に印加される逆電圧をダイオード５１を介してコンデンサ５２に充電し、コンデンサ５２の充電電圧からアノード端子２を電位基準とした、例えば１５Ｖの所定の電圧を第１のＭＯＳＦＥＴ４の制御電圧Ｖ１として生成する。このため逆電圧の大きさに拘わらず、所定の制御電圧Ｖ１を生成できる。なお、カソード端子３とアノード端子２間の電圧ＶＣＡ（以下、カソード・アノード間電圧ＶＣＡと称す）は、この場合、第１のＭＯＳＦＥＴ４のドレイン・ソース間電圧であり、逆電圧印加時は、逆電圧の大きさがカソード・アノード間電圧ＶＣＡとなる。 Next, the operation of the rectifier 1 will be described.
In the power supply circuit 5, a reverse voltage applied between the anode terminal 2 and the cathode terminal 3 is charged to the capacitor 52 through the diode 51, and the anode terminal 2 is used as a potential reference from the charging voltage of the capacitor 52, for example, 15V. Is generated as the control voltage V1 of the first MOSFET 4. Therefore, the predetermined control voltage V1 can be generated regardless of the magnitude of the reverse voltage. In this case, the voltage VCA between the cathode terminal 3 and the anode terminal 2 (hereinafter referred to as cathode-anode voltage VCA) is the voltage between the drain and source of the first MOSFET 4 and is reverse when a reverse voltage is applied. The magnitude of the voltage is the cathode-anode voltage VCA.
　逆電圧（カソード・アノード間電圧ＶＣＡ）が制御電圧Ｖ１より高いとき、電流方向検出回路７では、制御電圧Ｖ１を出力する電源回路５の出力端子からカソード端子３に電流が流れず、検出電圧Ｖ２は制御電圧Ｖ１と同等である。駆動回路６１は、例えば０．７Ｖに設定された基準電圧Ｖ３と検出電圧Ｖ２とを比較し、検出電圧Ｖ２が基準電圧Ｖ３より低いとき第１のＭＯＳＦＥＴ４をオンさせる。この場合、検出電圧Ｖ２は制御電圧Ｖ１と同等に高い電圧であるため、第１のＭＯＳＦＥＴ４はオフし、整流装置１は電流ｉの導通を阻止する。 When the reverse voltage (cathode-anode voltage VCA) is higher than the control voltage V1, in the current direction detection circuit 7, no current flows from the output terminal of the power supply circuit 5 that outputs the control voltage V1 to the cathode terminal 3, and the detection voltage V2 Is equivalent to the control voltage V1. The drive circuit 61 compares the reference voltage V3 set to, for example, 0.7V and the detection voltage V2, and turns on the first MOSFET 4 when the detection voltage V2 is lower than the reference voltage V3. In this case, since the detection voltage V2 is as high as the control voltage V1, the first MOSFET 4 is turned off, and the rectifier 1 prevents conduction of the current i.
　逆電圧が制御電圧Ｖ１より低くなると、制御電圧Ｖ１はカソード・アノード間電圧ＶＣＡより高いため、電流方向検出回路７では、電源回路５の出力端子からカソード端子３に、電流制限用抵抗７１およびダイオード７２を介して電流が流れる。この時、電流制限用抵抗７１は電流を制限して電源回路５の出力の放電を抑制する。そして、カソード・アノード間電圧ＶＣＡにダイオード７２の順方向電圧Ｖｆを加算した電圧値を検出電圧Ｖ２として検出する。カソード・アノード間電圧ＶＣＡが低下するにつれて検出電圧Ｖ２も低下するが、逆電圧印加時には、検出電圧Ｖ２はダイオード７２の順方向電圧Ｖｆ（０．６～０．７Ｖ程度）より高いため、基準電圧Ｖ３を適切に設定することで検出電圧Ｖ２が基準電圧Ｖ３以上となって、第１のＭＯＳＦＥＴ４はオフ状態となり整流装置１は電流ｉの導通を阻止する。 When the reverse voltage becomes lower than the control voltage V1, the control voltage V1 is higher than the cathode-anode voltage VCA. Therefore, in the current direction detection circuit 7, the current limiting resistor 71 and the diode are connected from the output terminal of the power supply circuit 5 to the cathode terminal 3. A current flows through 72. At this time, the current limiting resistor 71 limits the current and suppresses the discharge of the output of the power supply circuit 5. A voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected as the detection voltage V2. As the cathode-anode voltage VCA decreases, the detection voltage V2 also decreases. However, when the reverse voltage is applied, the detection voltage V2 is higher than the forward voltage Vf (about 0.6 to 0.7 V) of the diode 72, and thus the reference voltage. By appropriately setting V3, the detection voltage V2 becomes equal to or higher than the reference voltage V3, the first MOSFET 4 is turned off, and the rectifier 1 prevents conduction of the current i.
　カソード・アノード間電圧ＶＣＡが低下して検出電圧Ｖ２が基準電圧Ｖ３より低くなると、駆動回路６１は、第１のＭＯＳＦＥＴ４をオンさせる駆動信号６ａを出力し、第１のＭＯＳＦＥＴ４はオフからオンになる。第１のＭＯＳＦＥＴ４がオンすると、アノード端子２からカソード端子３に第１のＭＯＳＦＥＴ４を介した電流ｉが順方向に流れ、この電流ｉと第１のＭＯＳＦＥＴ４のオン抵抗による電圧降下が発生して、カソード・アノード間電圧ＶＣＡが負となる。電流方向検出回路７では、電源回路５の出力端子からカソード端子３に、電流制限用抵抗７１およびダイオード７２を介して電流が流れる。そして、カソード・アノード間電圧ＶＣＡにダイオード７２の順方向電圧Ｖｆを加算した電圧値を検出電圧Ｖ２として検出する。この場合、検出電圧Ｖ２は、ダイオードの順方向電圧Ｖｆから第１のＭＯＳＦＥＴ４のドレイン・ソース間のオン電圧（＝－ＶＣＡ）を減算した電圧値となる。なお、オン電圧とは、ＭＯＳＦＥＴがオンして電流が流れる際に、オン抵抗によ発生する電圧降下分の電圧である。 When the cathode-anode voltage VCA decreases and the detection voltage V2 becomes lower than the reference voltage V3, the drive circuit 61 outputs a drive signal 6a for turning on the first MOSFET 4, and the first MOSFET 4 is turned on from off. . When the first MOSFET 4 is turned on, a current i through the first MOSFET 4 flows in the forward direction from the anode terminal 2 to the cathode terminal 3, and a voltage drop due to the current i and the on-resistance of the first MOSFET 4 occurs. The cathode-anode voltage VCA becomes negative. In the current direction detection circuit 7, a current flows from the output terminal of the power supply circuit 5 to the cathode terminal 3 through the current limiting resistor 71 and the diode 72. A voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected as the detection voltage V2. In this case, the detection voltage V2 is a voltage value obtained by subtracting the on-voltage (= −VCA) between the drain and source of the first MOSFET 4 from the forward voltage Vf of the diode. The on-voltage is a voltage corresponding to a voltage drop generated by the on-resistance when the MOSFET is turned on and a current flows.
　駆動回路６１で用いる基準電圧Ｖ３は、例えば０．７Ｖに設定されるとしたが、ダイオード７２の順方向電圧Ｖｆから第１のＭＯＳＦＥＴ４のドレイン・ソース間のオン電圧を減算した電圧値と、順方向電圧Ｖｆとオン電圧とを加算した電圧値との間に設定する。より正確には、減算する場合のオン電圧は、第１のＭＯＳＦＥＴ４に順方向に電流が流れた場合のオン電圧とし、加算する場合のオン電圧は、第１のＭＯＳＦＥＴ４に逆方向に電流が流れた場合のオン電圧とする。
　上述したように、第１のＭＯＳＦＥＴ４がオンして第１のＭＯＳＦＥＴ４に順方向に電流ｉが流れると、検出電圧Ｖ２は、ダイオード７２の順方向電圧Ｖｆから第１のＭＯＳＦＥＴ４のドレイン・ソース間のオン電圧を減算した電圧値となり、基準電圧Ｖ３より低くなる。これにより、駆動回路６１は第１のＭＯＳＦＥＴ４をオンさせ、整流装置１は電流ｉの導通を継続する。 The reference voltage V3 used in the drive circuit 61 is set to 0.7 V, for example. However, the forward voltage Vf of the diode 72 is subtracted from the on-voltage between the drain and source of the first MOSFET 4, and the forward voltage It is set between the direction voltage Vf and the voltage value obtained by adding the ON voltage. More precisely, the on-voltage when subtracting is the on-voltage when current flows in the first MOSFET 4 in the forward direction, and the on-voltage when adding is the current flowing in the reverse direction in the first MOSFET 4. ON voltage in case of
As described above, when the first MOSFET 4 is turned on and the current i flows through the first MOSFET 4 in the forward direction, the detection voltage V2 is generated between the forward voltage Vf of the diode 72 and the drain-source of the first MOSFET 4. The voltage value is obtained by subtracting the ON voltage, and is lower than the reference voltage V3. As a result, the drive circuit 61 turns on the first MOSFET 4 and the rectifier 1 continues to conduct the current i.
　カソード・アノード間電圧ＶＣＡが負から正に反転した時、即ち逆電圧印加の初期時には、第１のＭＯＳＦＥＴ４はオン状態であるため、カソード端子３からアノード端子２に第１のＭＯＳＦＥＴ４を介した電流ｉが逆方向に流れ、この電流ｉと第１のＭＯＳＦＥＴ４のオン抵抗による電圧降下が逆方向に発生する。電流方向検出回路７では、電源回路５の出力端子からカソード端子３に、電流制限用抵抗７１およびダイオード７２を介して電流が流れる。そして、カソード・アノード間電圧ＶＣＡにダイオード７２の順方向電圧Ｖｆを加算した電圧値を検出電圧Ｖ２として検出する。この場合、検出電圧Ｖ２は、ダイオードの順方向電圧Ｖｆに第１のＭＯＳＦＥＴ４のドレイン・ソース間のオン電圧を加算した電圧値となり、基準電圧Ｖ３以上となる。これにより、駆動回路６１は第１のＭＯＳＦＥＴ４をオフさせ、整流装置１は電流ｉの導通を阻止する。 When the cathode-anode voltage VCA is inverted from negative to positive, that is, at the initial stage of reverse voltage application, the first MOSFET 4 is in an on state, so that the current from the cathode terminal 3 to the anode terminal 2 via the first MOSFET 4 i flows in the reverse direction, and a voltage drop due to the current i and the on-resistance of the first MOSFET 4 occurs in the reverse direction. In the current direction detection circuit 7, a current flows from the output terminal of the power supply circuit 5 to the cathode terminal 3 through the current limiting resistor 71 and the diode 72. A voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected as the detection voltage V2. In this case, the detection voltage V2 has a voltage value obtained by adding the on-voltage between the drain and source of the first MOSFET 4 to the forward voltage Vf of the diode, and is equal to or higher than the reference voltage V3. As a result, the drive circuit 61 turns off the first MOSFET 4 and the rectifier 1 prevents conduction of the current i.
　以上のように、この実施の形態では、整流装置１の２端子間に印加される逆電圧をコンデンサ５２に充電し、コンデンサ５２の充電電圧から電圧調整回路５３にて第１のＭＯＳＦＥＴ４の制御電圧Ｖ１を生成する。このため逆電圧の大きさに拘わらず、所定の制御電圧Ｖ１を生成でき、安定して所定の制御電圧Ｖ１を確保でき整流装置１を動作させることができる。また第１の駆動制御回路６に用いる素子の耐圧を逆電圧の大きさ以上にする必要がない。
　また、カソード・アノード間電圧ＶＣＡが制御電圧Ｖ１より高いときは、電流方向検出回路７内のダイオード７２がオンせず、高い逆電圧が第１の駆動制御回路６に印加されることが防止できる。また、検出電圧Ｖ２も制御電圧Ｖ１と同等を超えて高くなることはなく、検出のための各素子に印加される電圧も抑制できる。 As described above, in this embodiment, the reverse voltage applied between the two terminals of the rectifier 1 is charged in the capacitor 52, and the voltage adjustment circuit 53 controls the control voltage of the first MOSFET 4 from the charged voltage of the capacitor 52. V1 is generated. Therefore, the predetermined control voltage V1 can be generated regardless of the magnitude of the reverse voltage, and the predetermined control voltage V1 can be secured stably, and the rectifier 1 can be operated. In addition, the withstand voltage of the element used for the first drive control circuit 6 does not need to be greater than the magnitude of the reverse voltage.
Further, when the cathode-anode voltage VCA is higher than the control voltage V1, the diode 72 in the current direction detection circuit 7 is not turned on, and a high reverse voltage can be prevented from being applied to the first drive control circuit 6. . Further, the detection voltage V2 does not become higher than the control voltage V1, and the voltage applied to each element for detection can be suppressed.
　また、電流方向検出回路７では、逆電圧が制御電圧Ｖ１を超える場合を除いて、カソード・アノード間電圧ＶＣＡにダイオード７２の順方向電圧Ｖｆを加算した電圧値を検出電圧Ｖ２として検出する。ダイオード７２の順方向電圧Ｖｆは、ほぼ一定で、カソード・アノード間電圧ＶＣＡは、カソード・アノード間の電流ｉの方向により変化するため、検出電圧Ｖ２によりカソード・アノード間の電流ｉの方向を検知できる。このように第１のＭＯＳＦＥＴ４を流れる電流方向の検出が容易に信頼性よく実現できる。また、逆電圧印加時でカソード・アノード間の電流ｉが遮断されているときも、基準電圧Ｖ３以上の検出電圧Ｖ２を検出できる。
　そして、駆動回路６１は、検出電圧Ｖ２に応じて駆動信号６ａを生成することで、整流装置１の２端子間に逆電圧が印加されたときは第１のＭＯＳＦＥＴ４をオフして電流を阻止し、順電圧が印加されたときは第１のＭＯＳＦＥＴ４をオンして整流装置１の２端子間を導通させることができる。 In addition, the current direction detection circuit 7 detects a voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA, unless the reverse voltage exceeds the control voltage V1, as the detection voltage V2. Since the forward voltage Vf of the diode 72 is substantially constant and the cathode-anode voltage VCA changes depending on the direction of the current i between the cathode and the anode, the direction of the current i between the cathode and the anode is detected by the detection voltage V2. it can. In this way, detection of the direction of the current flowing through the first MOSFET 4 can be easily and reliably realized. Further, even when the reverse voltage is applied and the current i between the cathode and the anode is interrupted, the detection voltage V2 that is equal to or higher than the reference voltage V3 can be detected.
Then, the drive circuit 61 generates the drive signal 6a according to the detection voltage V2, so that when the reverse voltage is applied between the two terminals of the rectifier 1, the first MOSFET 4 is turned off and the current is blocked. When the forward voltage is applied, the first MOSFET 4 can be turned on and the two terminals of the rectifier 1 can be conducted.
　また、電源回路５からの制御電圧Ｖ１を、第１のＭＯＳＦＥＴ４の駆動電圧に用いるだけでなく、検出電圧Ｖ２を得るために兼用したため、簡略な回路構成で２端子のダイオードとの置き換えが容易な、信頼性の高い整流装置が実現できる。 Further, since the control voltage V1 from the power supply circuit 5 is used not only for the drive voltage of the first MOSFET 4 but also for obtaining the detection voltage V2, it is easy to replace with a two-terminal diode with a simple circuit configuration. A highly reliable rectifier can be realized.
　また、駆動回路６１で用いる基準電圧Ｖ３を、ダイオード７２の順方向電圧Ｖｆから第１のＭＯＳＦＥＴ４のドレイン・ソース間のオン電圧を減算した電圧値と、順方向電圧Ｖｆとオン電圧とを加算した電圧値との間に設定した。これにより、整流装置１の２端子間に順電圧が印加されたときは第１のＭＯＳＦＥＴ４をオンして整流装置１の２端子間を確実に導通させると共に、逆電圧印加時の電流方向の変化を迅速かつ確実に検知して、第１のＭＯＳＦＥＴ４をオフさせ整流装置１の２端子間を速やかに遮断できる。 Further, the reference voltage V3 used in the drive circuit 61 is obtained by adding the forward voltage Vf and the on-voltage to the voltage value obtained by subtracting the on-voltage between the drain and source of the first MOSFET 4 from the forward voltage Vf of the diode 72. Set between voltage values. As a result, when a forward voltage is applied between the two terminals of the rectifier 1, the first MOSFET 4 is turned on to ensure conduction between the two terminals of the rectifier 1, and the change in the current direction when the reverse voltage is applied. Can be detected quickly and reliably, the first MOSFET 4 is turned off, and the two terminals of the rectifier 1 can be quickly disconnected.
実施の形態２．
　図２は、この発明の実施の形態２による整流装置の回路構成を示す図である。
　図に示すように、図１で示した上記実施の形態１による整流装置において、電流方向検出回路７のダイオード７２に素子温度を検出する手段である温度検出線７３を備え、検出された素子温度を第１の駆動制御回路６の電圧調整回路６２に入力する。電圧調整回路６２では、ダイオード７２の素子温度に応じて基準電圧Ｖ３を調整する。その他の構成は、上記実施の形態１と同様である。
　温度検出線７３は、例えば、電圧調整回路６２からの熱電対などの温度検出線、もしくはダイオード７２が自身の温度を電圧調整回路６２に出力する温度データ線である。 Embodiment 2. FIG.
2 is a diagram showing a circuit configuration of a rectifier according to Embodiment 2 of the present invention.
As shown in the figure, in the rectifier according to the first embodiment shown in FIG. 1, the diode 72 of the current direction detection circuit 7 is provided with a temperature detection line 73 as means for detecting the element temperature, and the detected element temperature. Is input to the voltage adjustment circuit 62 of the first drive control circuit 6. The voltage adjustment circuit 62 adjusts the reference voltage V <b> 3 according to the element temperature of the diode 72. Other configurations are the same as those of the first embodiment.
The temperature detection line 73 is, for example, a temperature detection line such as a thermocouple from the voltage adjustment circuit 62 or a temperature data line from which the diode 72 outputs its temperature to the voltage adjustment circuit 62.
　一般にダイオードでは、温度が高くなるほど、同じ順方向電流に対する順方向電圧は小さくなる。このため、電圧調整回路６２では、ダイオード７２の素子温度が高くなると、基準電圧Ｖ３を低く調整する。
　ダイオード７２の素子温度が高くなると、電流方向検出回路７からの検出電圧Ｖ２は低くなるが、上記のように基準電圧Ｖ３を低く調整することにより、第１の駆動制御回路６は信頼性よく第１のＭＯＳＦＥＴ４を駆動制御できる。 In general, in a diode, the higher the temperature, the smaller the forward voltage for the same forward current. For this reason, in the voltage adjustment circuit 62, when the element temperature of the diode 72 becomes high, the reference voltage V3 is adjusted low.
When the element temperature of the diode 72 increases, the detection voltage V2 from the current direction detection circuit 7 decreases. However, by adjusting the reference voltage V3 to be low as described above, the first drive control circuit 6 has a high reliability. One MOSFET 4 can be driven and controlled.
実施の形態３．
　図３は、この発明の実施の形態３による整流装置の回路構成を示す図である。
　図に示すように、図１で示した上記実施の形態１による整流装置において、電流方向検出回路７のダイオード７２と検出電圧Ｖ２の検出点との間に調整抵抗７４を挿入した。その他の構成は、上記実施の形態１と同様である。 Embodiment 3 FIG.
FIG. 3 is a diagram showing a circuit configuration of a rectifier according to Embodiment 3 of the present invention.
As shown in the figure, in the rectifier according to the first embodiment shown in FIG. 1, an adjustment resistor 74 is inserted between the diode 72 of the current direction detection circuit 7 and the detection point of the detection voltage V2. Other configurations are the same as those of the first embodiment.
　上記実施の形態１と同様に、電流方向検出回路７では、カソード・アノード間電圧ＶＣＡが制御電圧Ｖ１より低いとき、ダイオード７２はオンして電源回路５の出力端子からカソード端子３に電流が流れる。この実施の形態では、ダイオード７２と検出電圧Ｖ２の検出点との間に調整抵抗７４を挿入したため、検出電圧Ｖ２は、カソード・アノード間電圧ＶＣＡにダイオード７２の順方向電圧Ｖｆとさらに調整抵抗７４の端子間電圧とを加算した電圧値となる。これにより、検出電圧Ｖ２を高い領域にシフトできる。 As in the first embodiment, in the current direction detection circuit 7, when the cathode-anode voltage VCA is lower than the control voltage V1, the diode 72 is turned on and current flows from the output terminal of the power supply circuit 5 to the cathode terminal 3. . In this embodiment, since the adjustment resistor 74 is inserted between the diode 72 and the detection point of the detection voltage V2, the detection voltage V2 is the cathode-anode voltage VCA, the forward voltage Vf of the diode 72, and the adjustment resistor 74. The voltage value is obtained by adding the inter-terminal voltage. Thereby, the detection voltage V2 can be shifted to a high region.
　第１のＭＯＳＦＥＴ４がオン状態で、逆電圧印加時に第１のＭＯＳＦＥＴ４を流れる電流ｉの方向の変化を検出する際、電流ｉは小さい電流領域である。ダイオード７２と検出電圧Ｖ２の検出点との間に調整抵抗７４を挿入しない構成では、カソード・アノード間電圧ＶＣＡにダイオード７２の順方向電圧Ｖｆを加算した検出電圧Ｖ２を検出するため、検出電圧Ｖ２は順方向電圧Ｖｆ付近の比較的小さい電圧レベルとなる。実施の形態１では、このような比較的小さい電圧レベルでの電圧変化を駆動回路６１が検出する必要があった。この実施の形態では、検出電圧Ｖ２を高い領域にシフトできるため、小さい電流範囲の電流ｉでも電流方向の検出が精度良く行える。 When the first MOSFET 4 is in the ON state and a change in the direction of the current i flowing through the first MOSFET 4 is detected when a reverse voltage is applied, the current i is a small current region. In the configuration in which the adjustment resistor 74 is not inserted between the diode 72 and the detection point of the detection voltage V2, the detection voltage V2 is detected because the detection voltage V2 obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected. Becomes a relatively small voltage level near the forward voltage Vf. In the first embodiment, it is necessary for the drive circuit 61 to detect such a voltage change at a relatively small voltage level. In this embodiment, since the detection voltage V2 can be shifted to a high region, the current direction can be detected accurately even with the current i in a small current range.
　また、第１のＭＯＳＦＥＴ４がオン状態で、第１のＭＯＳＦＥＴ４を流れる電流ｉが大きくなると、第１のＭＯＳＦＥＴ４のオン電圧が大きくなるため検出電圧Ｖ２は低くなる。この実施の形態では、検出電圧Ｖ２を高い領域にシフトできるため、検出電圧Ｖ２が負電圧となることを防止できる。第１の駆動制御回路６が負電圧を扱うには、負の制御電源などが必要で回路構成が各段と複雑となる。この実施の形態では、ダイオード７２と検出電圧Ｖ２の検出点との間に調整抵抗７４を挿入する簡略な回路構成で、検出電圧Ｖ２を高い領域にシフトでき信頼性よく電流ｉの方向検出が行える。
　このように、電流ｉは、小さい電流範囲でも大きい電流範囲でも電流方向の検出が精度良く行え、検出可能電流範囲が拡がる。 In addition, when the first MOSFET 4 is on and the current i flowing through the first MOSFET 4 increases, the on-voltage of the first MOSFET 4 increases and the detection voltage V2 decreases. In this embodiment, since the detection voltage V2 can be shifted to a high region, the detection voltage V2 can be prevented from becoming a negative voltage. In order for the first drive control circuit 6 to handle a negative voltage, a negative control power source or the like is required, and the circuit configuration becomes complicated at each stage. In this embodiment, with a simple circuit configuration in which the adjustment resistor 74 is inserted between the diode 72 and the detection point of the detection voltage V2, the detection voltage V2 can be shifted to a high region and the direction of the current i can be detected with high reliability. .
As described above, the current i can be detected in the current direction with high accuracy in both a small current range and a large current range, and the detectable current range is expanded.
実施の形態４．
　図４は、この発明の実施の形態４による整流装置の回路構成を示す図である。
　上記実施の形態３では、ダイオード７２と検出電圧Ｖ２の検出点との間に調整抵抗７４を挿入したが、図４に示すように、調整抵抗７４の代わりに定電圧手段としてのツェナーダイオード７５を用いても良い。この場合、検出電圧Ｖ２を高い領域に一定の電圧幅でシフトでき、検出電圧Ｖ２の変動幅は、抵抗値により分圧することが無く変化しない。このため、第１のＭＯＳＦＥＴ４を流れる電流ｉが小さい電流範囲の時の電流方向の検出がさらに精度良く行える。 Embodiment 4 FIG.
4 is a diagram showing a circuit configuration of a rectifier according to Embodiment 4 of the present invention.
In the third embodiment, the adjustment resistor 74 is inserted between the diode 72 and the detection point of the detection voltage V2. However, as shown in FIG. 4, a Zener diode 75 as a constant voltage means is used instead of the adjustment resistor 74. It may be used. In this case, the detection voltage V2 can be shifted to a high region with a constant voltage width, and the fluctuation range of the detection voltage V2 does not change without being divided by the resistance value. For this reason, the current direction can be detected with higher accuracy when the current i flowing through the first MOSFET 4 is in a small current range.
　また、図４に示すように、駆動回路６１にヒステリシス回路６３を備えて、基準電圧Ｖ３にヒステリシス幅を設けても良い。これにより、第１のＭＯＳＦＥＴ４をオフからオンさせるための基準電圧と、オンからオフさせるための基準電圧とを変化させる。
　カソード・アノード間電圧ＶＣＡが低下して検出電圧Ｖ２が基準電圧Ｖ３より低くなると、第１のＭＯＳＦＥＴ４をオンさせるが、その際、第１のＭＯＳＦＥＴ４に順方向電流が流れることでカソード・アノード間電圧ＶＣＡが変動しても、駆動回路６１が誤動作することを防止できる。
　なお、このようにヒステリシス回路６３を設ける構成は、上記各実施の形態１～３に同様に適用でき、同様の効果が得られる。 Further, as shown in FIG. 4, the drive circuit 61 may include a hysteresis circuit 63, and the reference voltage V3 may be provided with a hysteresis width. Thereby, the reference voltage for turning on the first MOSFET 4 from off and the reference voltage for turning off from on are changed.
When the cathode-anode voltage VCA decreases and the detection voltage V2 becomes lower than the reference voltage V3, the first MOSFET 4 is turned on. At this time, a forward current flows through the first MOSFET 4 to cause a cathode-anode voltage. Even if VCA fluctuates, it is possible to prevent the drive circuit 61 from malfunctioning.
Note that the configuration in which the hysteresis circuit 63 is provided in this manner can be similarly applied to the first to third embodiments, and the same effect can be obtained.
　また、上記実施の形態３、４の調整抵抗７４やツェナーダイオード７５を用いる構成は、上記実施の形態１だけでなく、上記実施の形態２にも同様に適用でき、同様の効果が得られる。 Further, the configuration using the adjustment resistor 74 and the Zener diode 75 of the third and fourth embodiments can be applied not only to the first embodiment but also to the second embodiment, and the same effect can be obtained.
実施の形態５．
　次に、この発明の実施の形態５による整流装置を図に基づいて説明する。
　図５は、この発明の実施の形態５による整流装置の回路構成を示す図である。
　図に示すように、整流装置１は、上記実施の形態１と同様に、アノード端子２、カソード端子３の２端子を外部端子とし、制御電圧Ｖ１を生成する電源回路５と、第１の駆動制御回路６と、電流方向検出回路７とを備える。電源回路５、第１の駆動制御回路６、および電流方向検出回路７の構成および動作は上記実施の形態１と同様である。 Embodiment 5 FIG.
Next, a rectifier according to Embodiment 5 of the present invention will be described with reference to the drawings.
FIG. 5 is a diagram showing a circuit configuration of a rectifier according to Embodiment 5 of the present invention.
As shown in the figure, in the same way as in the first embodiment, the rectifier 1 uses the two terminals of the anode terminal 2 and the cathode terminal 3 as external terminals, and generates a control voltage V1 and a first drive. A control circuit 6 and a current direction detection circuit 7 are provided. The configurations and operations of the power supply circuit 5, the first drive control circuit 6, and the current direction detection circuit 7 are the same as those in the first embodiment.
　また、ソース電極がアノード端子２に接続された第１のＭＯＳＦＥＴ４と、第１のＭＯＳＦＥＴ４に直列に接続される第２のＭＯＳＦＥＴ１０と、第１のＭＯＳＦＥＴ４と第２のＭＯＳＦＥＴ１０との直列回路に並列に接続される第３のＭＯＳＦＥＴ１２と、さらに、アノードをアノード端子２に接続し、カソードをカソード端子３に接続する第３のダイオード１３とを２端子間に備える。また、第２のＭＯＳＦＥＴ１０に並列にシャント抵抗１１を接続し、これら各素子１０～１３でオン電圧調整回路１４を構成する。
　なお、第３のダイオード１３は、第３のＭＯＳＦＥＴ１２に内蔵される寄生ダイオードで兼用しても良い。
　また、電源回路５からの制御電圧Ｖ１で動作する第２の駆動制御回路２０を備え、第２の駆動制御回路２０は、電流方向検出回路７からの検出電圧Ｖ２に応じて第２、第３のＭＯＳＦＥＴ１０、１２への駆動信号２１、２２および第１の駆動制御回路６への制限信号２３を出力する。 In parallel with the first MOSFET 4 whose source electrode is connected to the anode terminal 2, the second MOSFET 10 connected in series to the first MOSFET 4, and the series circuit of the first MOSFET 4 and the second MOSFET 10. A third MOSFET 12 to be connected and a third diode 13 having an anode connected to the anode terminal 2 and a cathode connected to the cathode terminal 3 are provided between the two terminals. In addition, a shunt resistor 11 is connected in parallel to the second MOSFET 10, and an on-voltage adjusting circuit 14 is configured by these elements 10 to 13.
Note that the third diode 13 may also be a parasitic diode built in the third MOSFET 12.
In addition, a second drive control circuit 20 that operates with the control voltage V1 from the power supply circuit 5 is provided, and the second drive control circuit 20 performs the second and third in accordance with the detection voltage V2 from the current direction detection circuit 7. Drive signals 21 and 22 to the MOSFETs 10 and 12 and a limit signal 23 to the first drive control circuit 6 are output.
　上記実施の形態１で示したように、第１のＭＯＳＦＥＴ４がオンすると、アノード端子２からカソード端子３に第１のＭＯＳＦＥＴ４を介した電流ｉが順方向に流れ、この電流ｉと第１のＭＯＳＦＥＴ４のオン抵抗による電圧降下が発生する。
　第２の駆動制御回路２０は、検出電圧Ｖ２に応じて、第１のＭＯＳＦＥＴ４および第２、第３のＭＯＳＦＥＴ１０、１２の内、オンさせるＭＯＳＦＥＴの組み合わせを決定して各ＭＯＳＦＥＴ４、１０、１２を制御することで、アノード端子２からカソード端子３に順方向に電流ｉが流れるときの両端子間のオン抵抗を段階的に変化させる。これは、電流ｉが増大するとオン抵抗を低くするように変化させる制御であり、これにより、電流ｉが増大することによりオン抵抗による電圧降下であるオン電圧が増大するのを抑制する。 As shown in the first embodiment, when the first MOSFET 4 is turned on, the current i through the first MOSFET 4 flows from the anode terminal 2 to the cathode terminal 3 in the forward direction. This current i and the first MOSFET 4 A voltage drop occurs due to the on-resistance.
The second drive control circuit 20 determines the combination of MOSFETs to be turned on from the first MOSFET 4 and the second and third MOSFETs 10 and 12 according to the detection voltage V2, and controls the MOSFETs 4, 10, and 12. As a result, the on-resistance between the terminals when the current i flows from the anode terminal 2 to the cathode terminal 3 in the forward direction is changed stepwise. This is a control to change the on-resistance to decrease as the current i increases, and thereby suppresses an increase in the on-voltage that is a voltage drop due to the on-resistance due to the increase in the current i.
　図６は、この実施の形態による整流装置１の動作特性を示すもので、電流ｉに応じて変化するアノード・カソード間電圧ＶＡＣ（＝－ＶＣＡ）を示す図である。また、図７に、電流ｉに対応する各ＭＯＳＦＥＴのスイッチング状態を示す。オン電圧は、アノード・カソード間が導通時のアノード・カソード間電圧ＶＡＣ（＝－ＶＣＡ）で示される。また、３１は、電流方向検出回路７において電流方向が検出可能な検出電圧Ｖ２の範囲におけるアノード・カソード間電圧ＶＡＣの範囲、３２はアノード・カソード間に接続された第３のダイオード１３の出力特性を示すものである。第１のＭＯＳＦＥＴ４および第２、第３のＭＯＳＦＥＴ１０、１２の状態で、ＳＷは、駆動回路６１からの駆動信号６ａと同期してスイッチングされる状態を示す。 FIG. 6 shows the operating characteristics of the rectifier 1 according to this embodiment, and is a diagram showing the anode-cathode voltage VAC (= −VCA) that changes according to the current i. FIG. 7 shows the switching state of each MOSFET corresponding to the current i. The on-voltage is indicated by an anode-cathode voltage VAC (= −VCA) when the anode-cathode is conductive. Further, 31 is a range of the anode-cathode voltage VAC in the range of the detection voltage V2 in which the current direction can be detected by the current direction detection circuit 7, and 32 is an output characteristic of the third diode 13 connected between the anode and the cathode. Is shown. In the state of the first MOSFET 4 and the second and third MOSFETs 10 and 12, SW indicates a state that is switched in synchronization with the drive signal 6 a from the drive circuit 61.
　第１のＭＯＳＦＥＴ４がオン状態で、逆電圧印加時に第１のＭＯＳＦＥＴ４を流れる電流ｉの方向の変化を検出する際、電流ｉが小さい領域では、検出電圧Ｖ２の変化が小さく駆動回路６１に使用されているコンパレータやオペアンプなどで検出するのが困難な場合や、ダイオードを流れた際の導通損失より第１のＭＯＳＦＥＴ４を駆動するための駆動電力のほうが大きくなる場合がある。このような電流ｉの範囲（ｉ１以下）では、第２の駆動制御回路２０は、各ＭＯＳＦＥＴ４、１０、１２を全てオフさせることを選択し、基準電圧Ｖ３を調整する制限信号２３を第１の駆動制御回路６内の電圧調整回路６２に出力する。この制限信号２３は第１のＭＯＳＦＥＴ４をオフさせるために駆動信号６ａを制限する信号であり、これにより第１のＭＯＳＦＥＴ４はオフする。 When a change in the direction of the current i flowing through the first MOSFET 4 is detected when a reverse voltage is applied when the first MOSFET 4 is on, the change in the detection voltage V2 is small in the region where the current i is small and is used for the drive circuit 61. In some cases, it is difficult to detect with a comparator or operational amplifier, or the driving power for driving the first MOSFET 4 is larger than the conduction loss when flowing through the diode. In such a range of the current i (i1 or less), the second drive control circuit 20 selects to turn off all the MOSFETs 4, 10, and 12, and sends the limit signal 23 for adjusting the reference voltage V3 to the first signal. The voltage is output to the voltage adjustment circuit 62 in the drive control circuit 6. The limit signal 23 is a signal for limiting the drive signal 6a in order to turn off the first MOSFET 4, whereby the first MOSFET 4 is turned off.
　カソード・アノード間電圧ＶＣＡが低下して検出電圧Ｖ２が基準電圧Ｖ３より低くなり、さらに、第１のＭＯＳＦＥＴ４のオン時の電流ｉの値がｉ１となる時点で、第２の駆動制御回路２０は、第１のＭＯＳＦＥＴ４のみをオンさせることを選択し、制限信号２３を解除する。第１の駆動制御回路６は駆動信号６ａにより第１のＭＯＳＦＥＴ４をオンさせ、ｉ１の電流ｉが流れる。
　この電流ｉは、第１のＭＯＳＦＥＴ４およびシャント抵抗１１を介してアノード・カソード間に流れ、アノード・カソード間電圧ＶＡＣ（＝－ＶＣＡ）は小さくなる。この時のオン抵抗は、第１のＭＯＳＦＥＴ４のオン抵抗とシャント抵抗１１との和である。 When the cathode-anode voltage VCA decreases and the detection voltage V2 becomes lower than the reference voltage V3, and the current i when the first MOSFET 4 is turned on becomes i1, the second drive control circuit 20 Then, it is selected that only the first MOSFET 4 is turned on, and the limit signal 23 is released. The first drive control circuit 6 turns on the first MOSFET 4 by the drive signal 6a, and the current i of i1 flows.
This current i flows between the anode and the cathode via the first MOSFET 4 and the shunt resistor 11, and the anode-cathode voltage VAC (= −VCA) becomes small. The on-resistance at this time is the sum of the on-resistance of the first MOSFET 4 and the shunt resistor 11.
　この状態で電流ｉが増大するとオン電圧、即ちアノード・カソード間電圧ＶＡＣが増大するが、電流ｉの値がｉ２になると、第２のＭＯＳＦＥＴ１０をオンさせる。この時、第２の駆動制御回路２０は、第１のＭＯＳＦＥＴ４および第２のＭＯＳＦＥＴ１０をオンさせるＭＯＳＦＥＴとして選択し、第２のＭＯＳＦＥＴ１０をオンさせる駆動信号２１を出力する。この駆動信号２１は、第２のＭＯＳＦＥＴ１０のソース電極の電位基準の電圧で出力され、第１のＭＯＳＦＥＴ４がオンした際に第２の駆動制御回路２０に制御電圧Ｖ１からチャージされるチャージポンプなどにより生成する。第２のＭＯＳＦＥＴ１０がオンすると、シャント抵抗１１を流れていた電流ｉが第２のＭＯＳＦＥＴ１０に転流する。これにより、電流ｉは、第１のＭＯＳＦＥＴ４および第２のＭＯＳＦＥＴ１０を介してアノード・カソード間に流れる。この時のオン抵抗は、第１のＭＯＳＦＥＴ４のオン抵抗と第２のＭＯＳＦＥＴ１０のオン抵抗との和となり、オン抵抗が小さくなるためオン電圧が下がる。 In this state, when the current i increases, the on-voltage, that is, the anode-cathode voltage VAC increases, but when the value of the current i reaches i2, the second MOSFET 10 is turned on. At this time, the second drive control circuit 20 selects the MOSFET for turning on the first MOSFET 4 and the second MOSFET 10 and outputs a drive signal 21 for turning on the second MOSFET 10. This drive signal 21 is output at a voltage based on the potential of the source electrode of the second MOSFET 10, and is charged by the second drive control circuit 20 from the control voltage V1 when the first MOSFET 4 is turned on. Generate. When the second MOSFET 10 is turned on, the current i flowing through the shunt resistor 11 is commutated to the second MOSFET 10. As a result, the current i flows between the anode and the cathode via the first MOSFET 4 and the second MOSFET 10. The on-resistance at this time is the sum of the on-resistance of the first MOSFET 4 and the on-resistance of the second MOSFET 10, and the on-resistance decreases because the on-resistance decreases.
　電流ｉがさらに増大するとオン電圧が増大するが、電流ｉの値がｉ３になると、第３のＭＯＳＦＥＴ１２をオンさせる。この時、第２の駆動制御回路２０は、第１のＭＯＳＦＥＴ４および第２、第３のＭＯＳＦＥＴ１０、１２をオンさせるＭＯＳＦＥＴとして選択し、第２のＭＯＳＦＥＴ１０をオンさせる駆動信号２１を出力すると共に、第３のＭＯＳＦＥＴ１２をオンさせる駆動信号２２を出力する。この駆動信号２２は、第１のＭＯＳＦＥＴ４への駆動信号６ａと共にＡＮＤ回路６３に入力されて、ＡＮＤ回路６３から第３のＭＯＳＦＥＴ１２のゲート電極に駆動信号２４ａが出力される。このため、第３のＭＯＳＦＥＴ１２は、駆動信号６ａと同期してスイッチングされる。
　第１のＭＯＳＦＥＴ４および第２のＭＯＳＦＥＴ１０で形成される経路に並列に接続される第３のＭＯＳＦＥＴ１２がオンするため、アノード・カソード間のオン抵抗が小さくなりオン電圧が下がる。 When the current i further increases, the on-voltage increases, but when the value of the current i becomes i3, the third MOSFET 12 is turned on. At this time, the second drive control circuit 20 selects the first MOSFET 4 and the second and third MOSFETs 10 and 12 as MOSFETs to be turned on, and outputs a drive signal 21 to turn on the second MOSFET 10 and A drive signal 22 for turning on the third MOSFET 12 is output. The drive signal 22 is input to the AND circuit 63 together with the drive signal 6 a to the first MOSFET 4, and the drive signal 24 a is output from the AND circuit 63 to the gate electrode of the third MOSFET 12. For this reason, the third MOSFET 12 is switched in synchronization with the drive signal 6a.
Since the third MOSFET 12 connected in parallel to the path formed by the first MOSFET 4 and the second MOSFET 10 is turned on, the on-resistance between the anode and the cathode is reduced, and the on-voltage is lowered.
　電流ｉがさらに増大するとオン電圧が増大するが、電流ｉの値がｉ４になると、第１のＭＯＳＦＥＴ４および第３のＭＯＳＦＥＴ１２をオフさせ、第２のＭＯＳＦＥＴ１０をオンさせる。この時、第２の駆動制御回路２０は、第２のＭＯＳＦＥＴ１０をオンさせるＭＯＳＦＥＴとして選択し、第２のＭＯＳＦＥＴ１０をオンさせる駆動信号２１を出力すると共に、駆動信号２２をロウにして第３のＭＯＳＦＥＴ１２をオフさせ、さらに、基準電圧Ｖ３を調整する制限信号２３を第１の駆動制御回路６内の電圧調整回路６２に出力する。この制限信号２３は第１のＭＯＳＦＥＴ４をオフさせるために駆動信号６ａを制限する信号であり、これにより第１のＭＯＳＦＥＴ４はオフする。
　電流ｉは、第１のＭＯＳＦＥＴ４の寄生ダイオードおよび第２のＭＯＳＦＥＴ１０で形成される経路、第３のダイオード１３の寄生ダイオードを経る経路、第３のダイオード１３を経る経路に流れ、電流ｉがさらに増大してもオン電圧は殆ど変化しない。 When the current i further increases, the on-voltage increases, but when the value of the current i becomes i4, the first MOSFET 4 and the third MOSFET 12 are turned off and the second MOSFET 10 is turned on. At this time, the second drive control circuit 20 selects the MOSFET for turning on the second MOSFET 10, outputs the drive signal 21 for turning on the second MOSFET 10, and sets the drive signal 22 to low so that the third MOSFET 12. And a limit signal 23 for adjusting the reference voltage V3 is output to the voltage adjustment circuit 62 in the first drive control circuit 6. The limit signal 23 is a signal for limiting the drive signal 6a in order to turn off the first MOSFET 4, whereby the first MOSFET 4 is turned off.
The current i flows through the path formed by the parasitic diode of the first MOSFET 4 and the second MOSFET 10, the path through the parasitic diode of the third diode 13, and the path through the third diode 13, and the current i further increases. Even so, the on-state voltage hardly changes.
　以上のように、第２の駆動制御回路２０は、電流ｉが増大するとオンさせるＭＯＳＦＥＴの組み合わせを、オン抵抗を低くするように切り替えて、オン電圧の増大を抑制する。実際には、検出電圧Ｖ２が上記電流値ｉ１～ｉ４のそれぞれに対応する電圧値となる時に切り替える。また、図６に示すように、電流方向が検出可能なオン電圧の電圧範囲３１内で、オン抵抗が最小となるように制御される。 As described above, the second drive control circuit 20 switches the combination of MOSFETs that are turned on when the current i increases so as to reduce the on-resistance, thereby suppressing the increase in the on-voltage. Actually, the switching is performed when the detection voltage V2 becomes a voltage value corresponding to each of the current values i1 to i4. Further, as shown in FIG. 6, the on-resistance is controlled to be minimum within the voltage range 31 of the on-voltage in which the current direction can be detected.
　この実施の形態では、第１のＭＯＳＦＥＴ４に直列に接続される第２のＭＯＳＦＥＴ１０と、並列に接続される第３のＭＯＳＦＥＴ１２と、第２のＭＯＳＦＥＴ１０に並列接続されるシャント抵抗１１と、第３のダイオード１３とを備えたオン電圧調整回路１４を備えて、アノード端子２からカソード端子３に順方向に電流ｉが流れるときのアノード・カソード間のオン抵抗を段階的に変化させてオン電圧が増大するのを抑制した。これにより、整流装置１の導通損失を低減でき、高効率で省エネルギ化に適した整流装置が実現できる。
　また、電流方向変化の検出が困難な電流ｉの範囲（ｉ１以下）では、第１のＭＯＳＦＥＴ４への駆動信号６ａを制限する制御を行うため、整流装置１の誤動作を防止できる。 In this embodiment, a second MOSFET 10 connected in series to the first MOSFET 4, a third MOSFET 12 connected in parallel, a shunt resistor 11 connected in parallel to the second MOSFET 10, and a third An on-voltage adjusting circuit 14 including a diode 13 is provided, and the on-voltage is increased by stepwise changing the on-resistance between the anode and the cathode when the current i flows from the anode terminal 2 to the cathode terminal 3 in the forward direction. Suppressed to do. Thereby, the conduction | electrical_connection loss of the rectifier 1 can be reduced and the rectifier suitable for energy saving with high efficiency is realizable.
In addition, in the range of the current i in which it is difficult to detect the change in the current direction (i1 or less), control for limiting the drive signal 6a to the first MOSFET 4 is performed, so that malfunction of the rectifier 1 can be prevented.
　なお、２以上の第２のＭＯＳＦＥＴ１０を第１のＭＯＳＦＥＴ４に直列に接続しても良く、並列に接続される第３のＭＯＳＦＥＴ１２の並列数を２以上としても良い。また、第２のＭＯＳＦＥＴ１０、第３のＭＯＳＦＥＴ１２は、いずれか一方のみを備えても良い。さらに、シャント抵抗１１や第３のダイオード１３は無くても良く、複数個あっても良い。
　またこの実施の形態では第１のＭＯＳＦＥＴ４と第３のＭＯＳＦＥＴ１２とを同時にスイッチングするものを示したが、これに限らない。ＭＯＳＦＥＴを駆動するための電力とオン電圧を小さくして、整流時の損失和が最小になるように、電流ｉの増大に合わせて、まず第１のＭＯＳＦＥＴ４のみオンさせ、次に第３のＭＯＳＦＥＴ１２のみオンさせ、さらに第１のＭＯＳＦＥＴ４および第３のＭＯＳＦＥＴ１２を同時にオンさせる等、駆動するＭＯＳＦＥＴを段階的に選択してもかまわない。
　また、第１のＭＯＳＦＥＴ４と第３のＭＯＳＦＥＴ１２は種類の違う素子、例えば第１のＭＯＳＦＥＴ４に比べて第３のＭＯＳＦＥＴ１２はオン抵抗値の小さな素子を用いても良い。このように、電流方向が検出可能な範囲でオン電圧を小さくし整流時の導通損失と、ＭＯＳＦＥＴの駆動損失の和が最小になるように、電流ｉの値に応じて使用する素子の種類と個数を変更しても良い。
　いずれの場合も、電流方向が検出可能なオン電圧の電圧範囲３１内で、オン抵抗が最小となるように、検出電圧Ｖ２に応じてオン抵抗を段階的に変化させる。 Two or more second MOSFETs 10 may be connected in series to the first MOSFET 4, and the number of parallel third MOSFETs 12 connected in parallel may be two or more. The second MOSFET 10 and the third MOSFET 12 may include only one of them. Further, the shunt resistor 11 and the third diode 13 may not be provided, and a plurality thereof may be provided.
In this embodiment, the first MOSFET 4 and the third MOSFET 12 are simultaneously switched. However, the present invention is not limited to this. First, only the first MOSFET 4 is turned on as the current i increases so that the power for driving the MOSFET and the on-voltage are reduced and the sum of losses during rectification is minimized. Alternatively, the MOSFET to be driven may be selected step by step such that only the first MOSFET 4 and the third MOSFET 12 are simultaneously turned on.
In addition, the first MOSFET 4 and the third MOSFET 12 may be different types of elements, for example, the third MOSFET 12 may be an element having a smaller on-resistance value than the first MOSFET 4. In this way, the type of element to be used according to the value of the current i so that the ON voltage is reduced within the range in which the current direction can be detected and the sum of the conduction loss during rectification and the MOSFET drive loss is minimized. The number may be changed.
In either case, the on-resistance is changed stepwise in accordance with the detection voltage V2 so that the on-resistance is minimized within the voltage range 31 of the on-voltage in which the current direction can be detected.
　また、この実施の形態では、第１のＭＯＳＦＥＴ４を駆動する第１の駆動制御回路６と別に第２の駆動制御回路２０を備えたが、第１の駆動制御回路６と第２の駆動制御回路２０とＡＮＤ回路２４との機能を備えた駆動制御回路を用いても良い。その場合、第１のＭＯＳＦＥＴ４と、第１のＭＯＳＦＥＴ４に直列に接続される第２のＭＯＳＦＥＴ１０と、並列に接続される第３のＭＯＳＦＥＴ１２とを備え、駆動制御回路から各ＭＯＳＦＥＴ４、１０、１２のゲート電極に駆動信号を出力することで、上記実施の形態５と同様の制御を行う。 In this embodiment, the second drive control circuit 20 is provided separately from the first drive control circuit 6 for driving the first MOSFET 4. However, the first drive control circuit 6 and the second drive control circuit are provided. A drive control circuit having functions of 20 and the AND circuit 24 may be used. In this case, the first MOSFET 4, the second MOSFET 10 connected in series to the first MOSFET 4, and the third MOSFET 12 connected in parallel are provided, and the gates of the MOSFETs 4, 10, 12 are connected from the drive control circuit. By outputting drive signals to the electrodes, the same control as in the fifth embodiment is performed.
実施の形態６．
　次に、この発明の実施の形態６による整流装置を図に基づいて説明する。
　図８は、この発明の実施の形態６による整流装置の回路構成を示す図である。
　図に示すように、整流装置１は、陽極端子としてのアノード端子２、陰極端子としてのカソード端子３の２端子を外部端子とし、該２端子間に接続された第１のＭＯＳＦＥＴ４と、所定の制御電圧Ｖ１を生成する電源回路５ｃと、制御電圧Ｖ１により第１のＭＯＳＦＥＴ４を駆動制御する第１の駆動制御回路６と、第１のＭＯＳＦＥＴ４に流れる電流方向を検出するための電流方向検出回路７とを備える。第１のＭＯＳＦＥＴ４は、ソース・ドレイン間に寄生ダイオード４ａを内蔵し、ソース電極をアノード端子２に、ドレイン電極をカソード端子３に接続する。 Embodiment 6 FIG.
Next, a rectifier according to Embodiment 6 of the present invention will be described with reference to the drawings.
FIG. 8 is a diagram showing a circuit configuration of a rectifier according to Embodiment 6 of the present invention.
As shown in the figure, the rectifier 1 includes an anode terminal 2 as an anode terminal and a cathode terminal 3 as a cathode terminal as external terminals, a first MOSFET 4 connected between the two terminals, A power supply circuit 5c that generates the control voltage V1, a first drive control circuit 6 that drives and controls the first MOSFET 4 with the control voltage V1, and a current direction detection circuit 7 that detects the direction of the current flowing through the first MOSFET 4. With. The first MOSFET 4 incorporates a parasitic diode 4 a between the source and drain, and connects the source electrode to the anode terminal 2 and the drain electrode to the cathode terminal 3.
　電源回路５ｃは、第１の電源回路５ａと第２の電源回路５ｂとで構成される。第１の電源回路５ａは、第１のダイオード５１、第１のコンデンサ５２、および、例えばチョッパ回路やチャージポンプなどで構成された第１の電圧調整回路５３を備え、アノード端子２とカソード端子３との間に印加される逆電圧を第１のダイオード５１を介して第１のコンデンサ５２に充電し、第１の電圧調整回路５３は第１のコンデンサ５２の充電電圧からアノード端子２を電位基準とした制御電圧Ｖ１を生成する。第２の電源回路５ｂは、第２のダイオード５５、第２のコンデンサ５６、および、例えばチョッパ回路やチャージポンプ、コッククロフト回路などで構成された第２の電圧調整回路５７を備え、アノード端子２とカソード端子３との間に印加される正極性電圧（以下、順電圧と称す）を第２のダイオード５５を介して第２のコンデンサ５６に充電し、第２の電圧調整回路５７は第２のコンデンサ５６の充電電圧からアノード端子２を電位基準とした制御電圧Ｖ１を生成する。また、第１、第２の電圧調整回路５３、５７は、それぞれ出力側に配されたダイオード５４、５８を介して電源回路５ｃ全体の出力端子に接続されて、電源回路５ｃは、アノード端子２とカソード端子３との間に印加される電圧極性に拘わらず制御電圧Ｖ１を出力する。 The power circuit 5c includes a first power circuit 5a and a second power circuit 5b. The first power supply circuit 5 a includes a first diode 51, a first capacitor 52, and a first voltage adjustment circuit 53 configured by, for example, a chopper circuit or a charge pump, and includes an anode terminal 2 and a cathode terminal 3. The first capacitor 52 is charged with the reverse voltage applied to the first capacitor 51 via the first diode 51, and the first voltage adjustment circuit 53 determines the potential of the anode terminal 2 from the charged voltage of the first capacitor 52. The control voltage V1 is generated. The second power supply circuit 5b includes a second diode 55, a second capacitor 56, and a second voltage adjusting circuit 57 configured by, for example, a chopper circuit, a charge pump, a cockcroft circuit, etc. A positive voltage applied to the cathode terminal 3 (hereinafter referred to as a forward voltage) is charged to the second capacitor 56 via the second diode 55, and the second voltage adjusting circuit 57 is connected to the second voltage adjusting circuit 57. A control voltage V1 based on the potential of the anode terminal 2 is generated from the charging voltage of the capacitor 56. The first and second voltage adjustment circuits 53 and 57 are connected to the output terminal of the entire power supply circuit 5c via diodes 54 and 58 arranged on the output side, respectively. The power supply circuit 5c is connected to the anode terminal 2 The control voltage V1 is output regardless of the voltage polarity applied between the cathode terminal 3 and the cathode terminal 3.
　電流方向検出回路７は、電源回路５ｃの出力に接続された電流制限用抵抗７１、およびアノードを電流制限用抵抗７１に接続しカソードをカソード端子３に接続したダイオード７２を備える。そして、電流方向検出回路７は、ダイオード７２のアノード電位Ｖ２を、整流装置１のアノード端子２を電位基準として検出し、検出電圧Ｖ２とする。
　第１の駆動制御回路６は、電源回路５ｃからの制御電圧Ｖ１を用いて第１のＭＯＳＦＥＴ４のゲート電極に駆動信号６ａを出力する駆動回路６１と、制御電圧Ｖ１から基準電圧Ｖ３を生成する電圧調整回路６２とを備える。そして、駆動回路６１は、電流方向検出回路７からの検出電圧Ｖ２と基準電圧Ｖ３との大小を比較して、第１のＭＯＳＦＥＴ４のゲート電極へ第１のＭＯＳＦＥＴ４をオン／オフさせる駆動信号６ａを出力する。ここでは、検出電圧Ｖ２が基準電圧Ｖ３より低いとき、第１のＭＯＳＦＥＴ４をオンさせる。 The current direction detection circuit 7 includes a current limiting resistor 71 connected to the output of the power supply circuit 5 c, and a diode 72 whose anode is connected to the current limiting resistor 71 and whose cathode is connected to the cathode terminal 3. Then, the current direction detection circuit 7 detects the anode potential V2 of the diode 72 using the anode terminal 2 of the rectifier 1 as a potential reference, and sets the detected voltage V2.
The first drive control circuit 6 uses a control voltage V1 from the power supply circuit 5c to output a drive signal 6a to the gate electrode of the first MOSFET 4, and a voltage for generating a reference voltage V3 from the control voltage V1. And an adjustment circuit 62. Then, the drive circuit 61 compares the detection voltage V2 from the current direction detection circuit 7 with the reference voltage V3 and outputs a drive signal 6a for turning on / off the first MOSFET 4 to the gate electrode of the first MOSFET 4. Output. Here, when the detection voltage V2 is lower than the reference voltage V3, the first MOSFET 4 is turned on.
　次に、整流装置１の動作特性について説明する。
　カソード端子３とアノード端子２間のカソード・アノード間電圧ＶＣＡ、およびアノード端子２からカソード端子３に第１のＭＯＳＦＥＴ４を介して流れる電流ｉの特性と、第１のＭＯＳＦＥＴ４の動作との関係を図９に示す。図９において、３３は第１のＭＯＳＦＥＴ４の動作状態、３４はカソード・アノード間電圧ＶＣＡの特性、３５は順方向を正とした電流ｉの特性を示すものである。なお、カソード・アノード間電圧ＶＣＡは、第１のＭＯＳＦＥＴ４のドレイン・ソース間電圧である。
　図に示すように、カソード・アノード間電圧ＶＣＡが正である時、即ちカソード・アノード間に逆電圧印加時、第１のＭＯＳＦＥＴ４はオフしてカソード・アノード間が遮断される遮断期間Ｂとなる。また、第１のＭＯＳＦＥＴ４がオンしてカソード・アノード間が導通する導通期間Ａでは、カソード・アノード間電圧ＶＣＡは負である。 Next, the operational characteristics of the rectifier 1 will be described.
The relationship between the cathode-anode voltage VCA between the cathode terminal 3 and the anode terminal 2 and the characteristics of the current i flowing from the anode terminal 2 to the cathode terminal 3 through the first MOSFET 4 and the operation of the first MOSFET 4 is shown. 9 shows. In FIG. 9, 33 indicates the operating state of the first MOSFET 4, 34 indicates the characteristics of the cathode-anode voltage VCA, and 35 indicates the characteristics of the current i with the forward direction being positive. The cathode-anode voltage VCA is the drain-source voltage of the first MOSFET 4.
As shown in the figure, when the cathode-anode voltage VCA is positive, that is, when a reverse voltage is applied between the cathode and the anode, the first MOSFET 4 is turned off and the cathode-anode is cut off. . Further, in the conduction period A in which the first MOSFET 4 is turned on and the cathode and the anode are conducted, the cathode-anode voltage VCA is negative.
　遮断期間Ｂでは、アノード端子２とカソード端子３との間に印加される逆電圧を第１の電源回路５ａの第１のダイオード５１を介して第１のコンデンサ５２に充電する。導通期間Ａでは、カソード・アノード間電圧ＶＣＡを第２の電源回路５ｂの第２のダイオード５５を介して第２のコンデンサ５６に充電する。
　第１の電圧調整回路５３は、第１のコンデンサ５２の充電電圧からアノード端子２を電位基準とした、例えば１５Ｖの制御電圧Ｖ１を生成する。第２の電圧調整回路５７は、第２のコンデンサ５６の充電電圧から同様の制御電圧Ｖ１を生成する。
　電源回路５ｃは、第１、第２の電源回路５ａ、５ｂ双方からの制御電圧Ｖ１を出力するため、アノード端子２とカソード端子３との間に印加される電圧極性に拘わらず、また逆電圧の大きさに拘わらず、所定の制御電圧Ｖ１を出力できる。 In the cut-off period B, the reverse voltage applied between the anode terminal 2 and the cathode terminal 3 is charged to the first capacitor 52 via the first diode 51 of the first power supply circuit 5a. In the conduction period A, the cathode-anode voltage VCA is charged to the second capacitor 56 via the second diode 55 of the second power supply circuit 5b.
The first voltage adjustment circuit 53 generates a control voltage V1 of, for example, 15V based on the potential of the anode terminal 2 from the charging voltage of the first capacitor 52. The second voltage adjustment circuit 57 generates a similar control voltage V <b> 1 from the charging voltage of the second capacitor 56.
Since the power supply circuit 5c outputs the control voltage V1 from both the first and second power supply circuits 5a and 5b, the reverse voltage is applied regardless of the voltage polarity applied between the anode terminal 2 and the cathode terminal 3. The predetermined control voltage V1 can be output regardless of the magnitude of.
　なお、第１、第２の電圧調整回路５３、５７は、双方を常時動作させる必要はなく、いずれかが動作して電源回路５ｃから制御電圧Ｖ１を出力すれば良い。その場合、第１、第２の電圧調整回路５３、５７の各入力電圧である第１、第２のコンデンサ５２、５６の電圧を検出して、第１、第２の電圧調整回路５３、５７が安定した制御電圧Ｖ１を出力できない電圧の場合に動作を停止させるなどの方法を用いても良い。 Note that the first and second voltage adjustment circuits 53 and 57 do not always need to be operated at all, and either one may operate and the control voltage V1 may be output from the power supply circuit 5c. In that case, the voltages of the first and second capacitors 52 and 56, which are the input voltages of the first and second voltage adjustment circuits 53 and 57, are detected, and the first and second voltage adjustment circuits 53 and 57 are detected. However, a method of stopping the operation when the voltage cannot output the stable control voltage V1 may be used.
　逆電圧印加時、カソード・アノード間電圧ＶＣＡが制御電圧Ｖ１より高いとき、電流方向検出回路７では、電源回路５ｃの出力端子からカソード端子３に電流が流れず、検出電圧Ｖ２は制御電圧Ｖ１と同等である。駆動回路６１は、例えば０．７Ｖに設定された基準電圧Ｖ３と検出電圧Ｖ２とを比較し、検出電圧Ｖ２が基準電圧Ｖ３より低いとき第１のＭＯＳＦＥＴ４をオンさせる。この場合、検出電圧Ｖ２は制御電圧Ｖ１と同等に高い電圧であるため、第１のＭＯＳＦＥＴ４はオフし、整流装置１は電流ｉの導通を阻止する。 When the reverse voltage is applied and the cathode-anode voltage VCA is higher than the control voltage V1, in the current direction detection circuit 7, no current flows from the output terminal of the power supply circuit 5c to the cathode terminal 3, and the detection voltage V2 is equal to the control voltage V1. It is equivalent. The drive circuit 61 compares the reference voltage V3 set to, for example, 0.7V and the detection voltage V2, and turns on the first MOSFET 4 when the detection voltage V2 is lower than the reference voltage V3. In this case, since the detection voltage V2 is as high as the control voltage V1, the first MOSFET 4 is turned off, and the rectifier 1 prevents conduction of the current i.
　逆電圧印加時で、カソード・アノード間電圧ＶＣＡが制御電圧Ｖ１より低くなると、電流方向検出回路７では、電源回路５ｃの出力端子からカソード端子３に、電流制限用抵抗７１およびダイオード７２を介して電流が流れる。この時、電流制限用抵抗７１は電流を制限して電源回路５ｃの出力の放電を抑制する。
　そして、カソード・アノード間電圧ＶＣＡにダイオード７２の順方向電圧Ｖｆを加算した電圧値を検出電圧Ｖ２として検出する。カソード・アノード間電圧ＶＣＡが低下するにつれて検出電圧Ｖ２も低下するが、逆電圧印加時には、検出電圧Ｖ２はダイオード７２の順方向電圧Ｖｆ（例えばＰＮ接合ダイオードを使用した場合は０．６～０．７Ｖ程度）より高いため、基準電圧Ｖ３を適切に設定することで検出電圧Ｖ２が基準電圧Ｖ３以上となって、第１のＭＯＳＦＥＴ４はオフ状態となり整流装置１は電流ｉの導通を阻止する。 When the reverse voltage is applied and the cathode-anode voltage VCA becomes lower than the control voltage V1, in the current direction detection circuit 7, the output terminal of the power supply circuit 5c is connected to the cathode terminal 3 through the current limiting resistor 71 and the diode 72. Current flows. At this time, the current limiting resistor 71 limits the current and suppresses the discharge of the output of the power supply circuit 5c.
A voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected as the detection voltage V2. The detection voltage V2 also decreases as the cathode-anode voltage VCA decreases. However, when the reverse voltage is applied, the detection voltage V2 is the forward voltage Vf of the diode 72 (for example, 0.6 to 0. 0 when a PN junction diode is used). Therefore, when the reference voltage V3 is appropriately set, the detection voltage V2 becomes equal to or higher than the reference voltage V3, the first MOSFET 4 is turned off, and the rectifier 1 prevents conduction of the current i.
　カソード・アノード間電圧ＶＣＡが低下して検出電圧Ｖ２が基準電圧Ｖ３より低くなると、駆動回路６１は、第１のＭＯＳＦＥＴ４をオンさせる駆動信号６ａを出力し、第１のＭＯＳＦＥＴ４はオフからオンになる。第１のＭＯＳＦＥＴ４がオンすると、アノード端子２からカソード端子３に第１のＭＯＳＦＥＴ４を介した電流ｉが順方向に流れ、この電流ｉと第１のＭＯＳＦＥＴ４のオン抵抗による電圧降下が発生して、カソード・アノード間電圧ＶＣＡが負となる。電流方向検出回路７では、電源回路５ｃの出力端子からカソード端子３に、電流制限用抵抗７１およびダイオード７２を介して電流が流れる。そして、カソード・アノード間電圧ＶＣＡにダイオード７２の順方向電圧Ｖｆを加算した電圧値を検出電圧Ｖ２として検出する。この場合、検出電圧Ｖ２は、ダイオードの順方向電圧Ｖｆから第１のＭＯＳＦＥＴ４のドレイン・ソース間のオン電圧を減算した電圧値となる。 When the cathode-anode voltage VCA decreases and the detection voltage V2 becomes lower than the reference voltage V3, the drive circuit 61 outputs a drive signal 6a for turning on the first MOSFET 4, and the first MOSFET 4 is turned on from off. . When the first MOSFET 4 is turned on, a current i through the first MOSFET 4 flows in the forward direction from the anode terminal 2 to the cathode terminal 3, and a voltage drop due to the current i and the on-resistance of the first MOSFET 4 occurs. The cathode-anode voltage VCA becomes negative. In the current direction detection circuit 7, a current flows from the output terminal of the power supply circuit 5 c to the cathode terminal 3 through the current limiting resistor 71 and the diode 72. A voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected as the detection voltage V2. In this case, the detection voltage V2 has a voltage value obtained by subtracting the on-voltage between the drain and source of the first MOSFET 4 from the forward voltage Vf of the diode.
　駆動回路６１で用いる基準電圧Ｖ３は、例えば０．７Ｖに設定されるとしたが、ダイオード７２の順方向電圧Ｖｆから第１のＭＯＳＦＥＴ４のドレイン・ソース間のオン電圧を減算した電圧値と、順方向電圧Ｖｆとオン電圧とを加算した電圧値との間に設定する。
　上述したように、第１のＭＯＳＦＥＴ４がオンして第１のＭＯＳＦＥＴ４に順方向に電流ｉが流れると、検出電圧Ｖ２は、ダイオードの順方向電圧Ｖｆから第１のＭＯＳＦＥＴ４のドレイン・ソース間のオン電圧を減算した電圧値となり、基準電圧Ｖ３より低くなる。これにより、駆動回路６１は第１のＭＯＳＦＥＴ４をオンさせ、整流装置１は電流ｉの導通を継続する。 The reference voltage V3 used in the drive circuit 61 is set to 0.7 V, for example. However, the forward voltage Vf of the diode 72 is subtracted from the on-voltage between the drain and source of the first MOSFET 4, and the forward voltage It is set between the direction voltage Vf and the voltage value obtained by adding the ON voltage.
As described above, when the first MOSFET 4 is turned on and the current i flows through the first MOSFET 4 in the forward direction, the detection voltage V2 is turned on between the drain and source of the first MOSFET 4 from the forward voltage Vf of the diode. The voltage value is obtained by subtracting the voltage, and is lower than the reference voltage V3. As a result, the drive circuit 61 turns on the first MOSFET 4 and the rectifier 1 continues to conduct the current i.
　カソード・アノード間電圧ＶＣＡが負から正に反転した時、即ち逆電圧印加の初期時には、第１のＭＯＳＦＥＴ４はオン状態であるため、カソード端子３からアノード端子２に第１のＭＯＳＦＥＴ４を介した電流ｉが逆方向に流れ、この電流ｉと第１のＭＯＳＦＥＴ４のオン抵抗による電圧降下が逆方向に発生する。電流方向検出回路７では、電源回路５ｃの出力端子からカソード端子３に、電流制限用抵抗７１およびダイオード７２を介して電流が流れる。そして、カソード・アノード間電圧ＶＣＡにダイオード７２の順方向電圧Ｖｆを加算した電圧値を検出電圧Ｖ２として検出する。この場合、検出電圧Ｖ２は、ダイオードの順方向電圧Ｖｆに第１のＭＯＳＦＥＴ４のドレイン・ソース間のオン電圧を加算した電圧値となり、基準電圧Ｖ３以上となる。これにより、駆動回路６１は第１のＭＯＳＦＥＴ４をオフさせ、整流装置１は電流ｉの導通を阻止する。 When the cathode-anode voltage VCA is inverted from negative to positive, that is, at the initial stage of reverse voltage application, the first MOSFET 4 is in an on state, so that the current from the cathode terminal 3 to the anode terminal 2 via the first MOSFET 4 i flows in the reverse direction, and a voltage drop due to the current i and the on-resistance of the first MOSFET 4 occurs in the reverse direction. In the current direction detection circuit 7, a current flows from the output terminal of the power supply circuit 5 c to the cathode terminal 3 through the current limiting resistor 71 and the diode 72. A voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA is detected as the detection voltage V2. In this case, the detection voltage V2 has a voltage value obtained by adding the on-voltage between the drain and source of the first MOSFET 4 to the forward voltage Vf of the diode, and is equal to or higher than the reference voltage V3. As a result, the drive circuit 61 turns off the first MOSFET 4 and the rectifier 1 prevents conduction of the current i.
　以上のようにこの実施の形態では、電源回路５ｃを、アノード端子２とカソード端子３との間に印加される逆電圧を利用して第１の電圧調整回路５３にて所定の制御電圧Ｖ１を生成する第１の電源回路５ａと、順電圧を利用して第２の電圧調整回路５７にて所定の制御電圧Ｖ１を生成するする第２の電源回路５ｂとで構成した。このため、逆電圧のみを用いて電源生成した場合に比べて、電流の周波数や２端子間の通電率によって制御電圧が変動することはなく、２端子間に印加される電圧極性に拘わらず、また逆電圧の大きさに拘わらず、所定の制御電圧Ｖ１を安定して出力できる。このため、第１の駆動制御回路６に必要な、例えば第１のＭＯＳＦＥＴ４の駆動や、第１の駆動制御回路６内の素子に要する電圧となる制御電圧Ｖ１を安定して得ることができ、整流装置１が信頼性よく動作できる。また第１の駆動制御回路６に用いる素子の耐圧を逆電圧の大きさ以上にする必要がなく、安価な素子で第１の駆動制御回路６を構成できる。また、制御電圧Ｖ１の変動を抑制するために、電源回路５ｃに容量の大きなコンデンサなどを設ける必要もなく、小型化に適した装置構成となる。 As described above, in this embodiment, the power supply circuit 5c is supplied with the predetermined control voltage V1 by the first voltage adjustment circuit 53 using the reverse voltage applied between the anode terminal 2 and the cathode terminal 3. The first power supply circuit 5a to be generated and the second power supply circuit 5b to generate a predetermined control voltage V1 by the second voltage adjustment circuit 57 using a forward voltage. For this reason, compared with the case where the power source is generated using only the reverse voltage, the control voltage does not fluctuate depending on the frequency of the current and the conduction rate between the two terminals, regardless of the voltage polarity applied between the two terminals. Further, the predetermined control voltage V1 can be stably output regardless of the magnitude of the reverse voltage. For this reason, it is possible to stably obtain the control voltage V1 required for the first drive control circuit 6, for example, the drive of the first MOSFET 4 and the voltage required for the elements in the first drive control circuit 6, The rectifier 1 can operate with high reliability. Further, it is not necessary to set the withstand voltage of the element used for the first drive control circuit 6 to be equal to or larger than the reverse voltage, and the first drive control circuit 6 can be configured with inexpensive elements. Further, in order to suppress the fluctuation of the control voltage V1, it is not necessary to provide a capacitor with a large capacity in the power supply circuit 5c, and the device configuration is suitable for downsizing.
　また、電源回路５ｃからの制御電圧Ｖ１を、第１のＭＯＳＦＥＴ４の駆動電圧に用いるだけでなく、電流方向検出回路７にて検出電圧Ｖ２を得るために兼用したため、簡略な回路構成で２端子のダイオードとの置き換えが容易で、導通損失が小さく省エネルギ化に適した整流装置１を、高い信頼性で実現できる。
　また、カソード・アノード間電圧ＶＣＡが制御電圧Ｖ１より高いときは、電流方向検出回路７内のダイオード７２がオンせず、高い逆電圧が第１の駆動制御回路６に印加されることが防止できる。また、検出電圧Ｖ２も制御電圧Ｖ１と同等を超えて高くなることはなく、検出のための各素子に印加される電圧も抑制できる。 Further, since the control voltage V1 from the power supply circuit 5c is used not only for the driving voltage of the first MOSFET 4 but also for obtaining the detection voltage V2 in the current direction detection circuit 7, it has a simple circuit configuration and has two terminals. The rectifier 1 that can be easily replaced with a diode, has low conduction loss, and is suitable for energy saving can be realized with high reliability.
Further, when the cathode-anode voltage VCA is higher than the control voltage V1, the diode 72 in the current direction detection circuit 7 is not turned on, and a high reverse voltage can be prevented from being applied to the first drive control circuit 6. . Further, the detection voltage V2 does not become higher than the control voltage V1, and the voltage applied to each element for detection can be suppressed.
　また、電流方向検出回路７では、ダイオード７２が導通時、カソード・アノード間電圧ＶＣＡにダイオード７２の順方向電圧Ｖｆを加算した電圧値を検出電圧Ｖ２として検出する。ダイオード７２の順方向電圧Ｖｆは、ほぼ一定で、カソード・アノード間電圧ＶＣＡは、カソード・アノード間の電流ｉの方向と大きさにより変化するため、検出電圧Ｖ２によりカソード・アノード間の電流ｉの方向と大きさを検出できる。このように第１のＭＯＳＦＥＴ４を流れる電流方向の検出が容易に信頼性よく実現できる。また、逆電圧印加時でカソード・アノード間の電流ｉが遮断されているときも、基準電圧Ｖ３以上の検出電圧Ｖ２を検出できる。
　そして、駆動回路６１は、検出電圧Ｖ２に応じて駆動信号６ａを生成することで、整流装置１の２端子間に逆電圧が印加されたときは第１のＭＯＳＦＥＴ４をオフして電流を阻止し、順電圧が印加されたときは第１のＭＯＳＦＥＴ４をオンして整流装置１の２端子間を導通させることができる。 The current direction detection circuit 7 detects, as the detection voltage V2, a voltage value obtained by adding the forward voltage Vf of the diode 72 to the cathode-anode voltage VCA when the diode 72 is conductive. Since the forward voltage Vf of the diode 72 is substantially constant and the cathode-anode voltage VCA changes depending on the direction and magnitude of the current i between the cathode and anode, the detection voltage V2 indicates the current i between the cathode and anode. Direction and size can be detected. In this way, detection of the direction of the current flowing through the first MOSFET 4 can be easily and reliably realized. Further, even when the reverse voltage is applied and the current i between the cathode and the anode is interrupted, the detection voltage V2 that is equal to or higher than the reference voltage V3 can be detected.
Then, the drive circuit 61 generates the drive signal 6a according to the detection voltage V2, so that when the reverse voltage is applied between the two terminals of the rectifier 1, the first MOSFET 4 is turned off and the current is blocked. When the forward voltage is applied, the first MOSFET 4 can be turned on and the two terminals of the rectifier 1 can be conducted.
実施の形態７．
　次に、この発明の実施の形態７による整流装置を図に基づいて説明する。
　図１０は、この発明の実施の形態７による整流装置の回路構成を示す図である。
　図に示すように、整流装置１は、上記実施の形態１、６と同様に、アノード端子２、カソード端子３の２端子を外部端子とし、この２端子間に第１のＭＯＳＦＥＴ４を接続する。そして、所定の制御電圧Ｖ１を生成する電源回路５０と、第１の駆動制御回路６と、電流方向検出回路７とを備える。第１のＭＯＳＦＥＴ４、第１の駆動制御回路６、および電流方向検出回路７の構成および動作は上記実施の形態１、６と同様である。電源回路５０について、以下に説明する。 Embodiment 7 FIG.
Next, a rectifier according to Embodiment 7 of the present invention will be described with reference to the drawings.
FIG. 10 is a diagram showing a circuit configuration of a rectifier according to Embodiment 7 of the present invention.
As shown in the figure, the rectifier 1 uses the two terminals of the anode terminal 2 and the cathode terminal 3 as external terminals as in the first and sixth embodiments, and connects the first MOSFET 4 between the two terminals. A power supply circuit 50 that generates a predetermined control voltage V 1, a first drive control circuit 6, and a current direction detection circuit 7 are provided. The configurations and operations of the first MOSFET 4, the first drive control circuit 6, and the current direction detection circuit 7 are the same as those in the first and sixth embodiments. The power supply circuit 50 will be described below.
　電源回路５０は、第１の電圧調整回路５３から成る第１の電源回路５０ａと、第２の電圧調整回路５７から成る第２の電源回路５０ｂとで構成され、出力側でアノード端子２との間に、フィルタ回路としてのコンデンサ５９を備える。また、第１の駆動制御回路６から出力される駆動信号６ａが、第１、第２の電圧調整回路５３、５７に入力される。
　第１の電圧調整回路５３は、入力される駆動信号６ａがオフ信号の時、即ち、第１のＭＯＳＦＥＴ４がオフ状態の時、アノード端子２とカソード端子３との間に印加される逆電圧からアノード端子２を電位基準とした制御電圧Ｖ１を生成する。この時、第１の電圧調整回路５３は、逆電圧が制御電圧Ｖ１より大きい場合は降圧動作を行い、逆電圧が制御電圧Ｖ１より小さい場合は昇圧動作を行う。
　また、第２の電圧調整回路５７は、入力される駆動信号６ａがオン信号の時、即ち、第１のＭＯＳＦＥＴ４がオン状態の時、アノード端子２とカソード端子３との間に印加される順電圧を昇圧してアノード端子２を電位基準とした制御電圧Ｖ１を生成する。 The power supply circuit 50 includes a first power supply circuit 50a composed of the first voltage adjustment circuit 53 and a second power supply circuit 50b composed of the second voltage adjustment circuit 57, and is connected to the anode terminal 2 on the output side. A capacitor 59 as a filter circuit is provided between them. The drive signal 6 a output from the first drive control circuit 6 is input to the first and second voltage adjustment circuits 53 and 57.
The first voltage adjustment circuit 53 detects the reverse voltage applied between the anode terminal 2 and the cathode terminal 3 when the input drive signal 6a is an off signal, that is, when the first MOSFET 4 is in the off state. A control voltage V1 with the anode terminal 2 as a potential reference is generated. At this time, the first voltage adjustment circuit 53 performs a step-down operation when the reverse voltage is larger than the control voltage V1, and performs a step-up operation when the reverse voltage is smaller than the control voltage V1.
The second voltage adjustment circuit 57 is applied in the order in which the voltage is applied between the anode terminal 2 and the cathode terminal 3 when the input drive signal 6a is an on signal, that is, when the first MOSFET 4 is on. The voltage is boosted to generate a control voltage V1 with the anode terminal 2 as a potential reference.
　これにより、電源回路５０は、第１、第２の電圧調整回路５３、５７のいずれか一方を動作させて、所定の制御電圧Ｖ１を生成して出力することができる。なお、駆動信号６ａは、オン／オフと変化するため、第１、第２の電圧調整回路５３、５７は交互に動作することになる。そして、出力側に設けられたコンデンサ５９により、第１、第２の電圧調整回路５３、５７の動作の切替時に、制御電圧Ｖ１が変動するのが抑制される。
　なお、コンデンサ５９は、第１、第２の電圧調整回路５３、５７の動作切替時における制御電圧Ｖ１の変動のみを抑えればよいため、容量は比較的小さいもので良く、電圧変動が許容範囲内であれば、コンデンサ５９は無くても良い。 Thereby, the power supply circuit 50 can operate one of the first and second voltage adjustment circuits 53 and 57 to generate and output the predetermined control voltage V1. Since the drive signal 6a changes between on and off, the first and second voltage adjustment circuits 53 and 57 operate alternately. Then, the capacitor 59 provided on the output side suppresses the fluctuation of the control voltage V1 when the operations of the first and second voltage adjustment circuits 53 and 57 are switched.
The capacitor 59 only needs to suppress the fluctuation of the control voltage V1 when the operation of the first and second voltage adjustment circuits 53 and 57 is switched. Therefore, the capacitor 59 may be relatively small and the voltage fluctuation is within an allowable range. If it is within, the capacitor 59 may be omitted.
　この実施の形態においても、上記実施の形態６と同様に、電源回路５０を、アノード端子２とカソード端子３との間に印加される逆電圧を利用して第１の電圧調整回路５３にて所定の制御電圧Ｖ１を生成する第１の電源回路５０ａと、順電圧を利用して第２の電圧調整回路５７にて所定の制御電圧Ｖ１を生成する第２の電源回路５０ｂとで構成した。このため、逆電圧のみを用いて電源生成した場合に比べて、電流の周波数や２端子間の通電率によって制御電圧が変動することはなく、２端子間に印加される電圧極性に拘わらず、また逆電圧の大きさに拘わらず、所定の制御電圧Ｖ１を安定して出力できる。このため、第１の駆動制御回路６に必要な制御電圧Ｖ１を安定して得ることができ、整流装置１が信頼性よく動作できる。また第１の駆動制御回路６に用いる素子の耐圧を逆電圧の大きさ以上にする必要がなく、安価な素子で第１の駆動制御回路６を構成できる。また、制御電圧Ｖ１の変動を抑制するために、電源回路５０に容量の大きなコンデンサなどを設ける必要もなく、小型化に適した装置構成となる。 Also in this embodiment, similarly to the sixth embodiment, the power supply circuit 50 is operated by the first voltage adjustment circuit 53 using the reverse voltage applied between the anode terminal 2 and the cathode terminal 3. The first power supply circuit 50a that generates the predetermined control voltage V1 and the second power supply circuit 50b that generates the predetermined control voltage V1 in the second voltage adjusting circuit 57 using the forward voltage. For this reason, compared with the case where the power source is generated using only the reverse voltage, the control voltage does not fluctuate depending on the frequency of the current and the conduction rate between the two terminals, regardless of the voltage polarity applied between the two terminals. Further, the predetermined control voltage V1 can be stably output regardless of the magnitude of the reverse voltage. For this reason, the control voltage V1 required for the first drive control circuit 6 can be stably obtained, and the rectifier 1 can operate with high reliability. Further, it is not necessary to set the withstand voltage of the element used for the first drive control circuit 6 to be equal to or larger than the reverse voltage, and the first drive control circuit 6 can be configured with inexpensive elements. In addition, in order to suppress fluctuations in the control voltage V1, it is not necessary to provide a capacitor with a large capacity in the power supply circuit 50, and the device configuration is suitable for downsizing.
　また、第１、第２の電源回路５０ａ、５０ｂには、電荷を保持するためのコンデンサを設けないため、起動時の電源回路５０の立ち上がり時間を短縮することができる。
　なお、第１、第２の電圧調整回路５３、５７は、内部に自身の制御電源を備える。そして起動時には、第１、第２の電圧調整回路５３、５７に入力される電圧から、分圧抵抗やツェナーダイオードを用いて各制御電源を立ち上げる。あるいは、第１、第２の電圧調整回路５３、５７のいずれかが生成する制御電圧Ｖ１を、各制御電源用のコンデンサにチャージポンプにより充電する。 In addition, since the first and second power supply circuits 50a and 50b are not provided with a capacitor for holding electric charge, the rise time of the power supply circuit 50 at the time of startup can be shortened.
The first and second voltage adjustment circuits 53 and 57 each have their own control power supply. At startup, each control power supply is started up from the voltages input to the first and second voltage adjustment circuits 53 and 57 using a voltage dividing resistor and a Zener diode. Alternatively, the control voltage V1 generated by one of the first and second voltage adjustment circuits 53 and 57 is charged to each control power supply capacitor by a charge pump.
実施の形態８．
　次に、この発明の実施の形態８による整流装置を図に基づいて説明する。
　図１１は、この発明の実施の形態８による整流装置の回路構成を示す図である。
　上記実施の形態７では、第１、第２の電圧調整回路５３、５７は、第１の駆動制御回路６から出力される駆動信号６ａを入力して動作させたが、この実施の形態８では、駆動信号６ａを第１、第２の電圧調整回路５３、５７に入力せず、第１、第２の電圧調整回路５３、５７は、入力される電圧に応じて動作させる。その他の構成および動作は、上記実施の形態７と同様である。
　第１、第２の電圧調整回路５３、５７は、アノード端子２とカソード端子３との間に印加されるカソード・アノード間電圧ＶＣＡを入力電圧として所定の制御電圧Ｖ１を生成する。第１の電圧調整回路５３は、アノード端子２とカソード端子３との間に印加される逆電圧が入力されると、この逆電圧からアノード端子２を電位基準とした制御電圧Ｖ１を生成する。この時、第１の電圧調整回路５３は、逆電圧が制御電圧Ｖ１より大きい場合は降圧動作を行い、逆電圧が制御電圧Ｖ１より小さい場合は昇圧動作を行う。
　また、第２の電圧調整回路５７は、アノード端子２とカソード端子３との間に印加される順電圧が入力されると、この順電圧を昇圧してアノード端子２を電位基準とした制御電圧Ｖ１を生成する。 Embodiment 8 FIG.
Next, a rectifier according to Embodiment 8 of the present invention will be described with reference to the drawings.
FIG. 11 is a diagram showing a circuit configuration of a rectifier according to Embodiment 8 of the present invention.
In the seventh embodiment, the first and second voltage adjusting circuits 53 and 57 are operated by inputting the drive signal 6a output from the first drive control circuit 6, but in the eighth embodiment, The drive signal 6a is not input to the first and second voltage adjustment circuits 53 and 57, and the first and second voltage adjustment circuits 53 and 57 are operated according to the input voltage. Other configurations and operations are the same as those in the seventh embodiment.
The first and second voltage adjustment circuits 53 and 57 generate a predetermined control voltage V1 using a cathode-anode voltage VCA applied between the anode terminal 2 and the cathode terminal 3 as an input voltage. When a reverse voltage applied between the anode terminal 2 and the cathode terminal 3 is input, the first voltage adjustment circuit 53 generates a control voltage V1 based on the potential of the anode terminal 2 from the reverse voltage. At this time, the first voltage adjustment circuit 53 performs a step-down operation when the reverse voltage is larger than the control voltage V1, and performs a step-up operation when the reverse voltage is smaller than the control voltage V1.
Further, when a forward voltage applied between the anode terminal 2 and the cathode terminal 3 is input, the second voltage adjustment circuit 57 boosts the forward voltage to control voltage with the anode terminal 2 as a potential reference. V1 is generated.
　これにより、電源回路５０は、第１、第２の電圧調整回路５３、５７のいずれか一方を動作させて、所定の制御電圧Ｖ１を生成して出力することができる。なお、カソード・アノード間電圧ＶＣＡが逆電圧である時は、駆動信号６ａはオフ出力で第１のＭＯＳＦＥＴ４はオフ状態となり、カソード・アノード間電圧ＶＣＡが順電圧である時は、駆動信号６ａはオン出力で第１のＭＯＳＦＥＴ４はオン状態となる。このため、第１、第２の電圧調整回路５３、５７は、上記実施の形態７の場合と同様に交互に動作することになる。そして、出力側に設けられたコンデンサ５９により、第１、第２の電圧調整回路５３、５７の動作の切替時に、制御電圧Ｖ１が変動するのが抑制される。 Thus, the power supply circuit 50 can generate and output a predetermined control voltage V1 by operating one of the first and second voltage adjustment circuits 53 and 57. When the cathode-anode voltage VCA is a reverse voltage, the drive signal 6a is turned off and the first MOSFET 4 is turned off. When the cathode-anode voltage VCA is a forward voltage, the drive signal 6a is When the output is on, the first MOSFET 4 is turned on. Therefore, the first and second voltage adjustment circuits 53 and 57 operate alternately as in the case of the seventh embodiment. Then, the capacitor 59 provided on the output side suppresses the fluctuation of the control voltage V1 when the operations of the first and second voltage adjustment circuits 53 and 57 are switched.
　この実施の形態８による電源回路５０は、第１、第２の電圧調整回路５３、５７の動作の切替を、入力電圧に基づいて行う他は、上記実施の形態７と同様であり、同様の効果が得られる。
　即ち、電流の周波数や２端子間の通電率によって生成する制御電圧が変動することはなく、２端子間に印加される電圧極性に拘わらず、また逆電圧の大きさに拘わらず、所定の制御電圧Ｖ１を安定して出力できる。このため、第１の駆動制御回路６に必要な制御電圧Ｖ１を安定して得ることができ、整流装置１が信頼性よく動作できる。また第１の駆動制御回路６に用いる素子の耐圧を逆電圧の大きさ以上にする必要がなく、安価な素子で第１の駆動制御回路６を構成できる。また、制御電圧Ｖ１の変動を抑制するために、電源回路５０に容量の大きなコンデンサなどを設ける必要もなく、小型化に適した装置構成となる。
　また、第１、第２の電源回路５０ａ、５０ｂには、電荷を保持するためのコンデンサを設けないため、起動時の電源回路５０の立ち上がり時間を短縮することができる。 The power supply circuit 50 according to the eighth embodiment is the same as the seventh embodiment except that the operation of the first and second voltage adjustment circuits 53 and 57 is switched based on the input voltage. An effect is obtained.
That is, the generated control voltage does not vary depending on the frequency of current and the conduction rate between the two terminals, and the predetermined control is performed regardless of the polarity of the voltage applied between the two terminals and the magnitude of the reverse voltage. The voltage V1 can be output stably. For this reason, the control voltage V1 required for the first drive control circuit 6 can be stably obtained, and the rectifier 1 can operate with high reliability. Further, it is not necessary to set the withstand voltage of the element used for the first drive control circuit 6 to be equal to or larger than the reverse voltage, and the first drive control circuit 6 can be configured with inexpensive elements. In addition, in order to suppress fluctuations in the control voltage V1, it is not necessary to provide a capacitor with a large capacity in the power supply circuit 50, and the device configuration is suitable for downsizing.
In addition, since the first and second power supply circuits 50a and 50b are not provided with a capacitor for holding electric charge, the rise time of the power supply circuit 50 at the time of startup can be shortened.
　なお、上記実施の形態６～８で示した電源回路５ｃ、５０は、上記実施の形態１～５において、電源回路５の替わりに適用することもできる。この場合も、各実施の形態と同様の効果が得られる。 The power supply circuits 5c and 50 shown in the sixth to eighth embodiments can also be applied in place of the power supply circuit 5 in the first to fifth embodiments. Also in this case, the same effect as each embodiment can be obtained.
　また、上記実施の形態６～８に示された整流装置において、電流方向検出回路７を、他の構成、例えば、ホール素子や、電流検出用のシャント抵抗により構成することもできる。この場合も、電源回路５０の出力端子を電流方向検出回路に接続し、制御電圧Ｖ１を用いて、電流方向を検知するための検出電圧Ｖ２を得ることができる。 Further, in the rectifiers shown in the above sixth to eighth embodiments, the current direction detection circuit 7 can be configured by other configurations, for example, a Hall element or a shunt resistor for current detection. Also in this case, the output terminal of the power supply circuit 50 is connected to the current direction detection circuit, and the detection voltage V2 for detecting the current direction can be obtained using the control voltage V1.
実施の形態９．
　次に、この発明の実施の形態９による整流装置を図に基づいて説明する。
　図１２は、この発明の実施の形態９による整流装置の回路構成を示す図である。
　図に示すように、整流装置１は、上記実施の形態１と同様に、アノード端子２、カソード端子３の２端子を外部端子とし、制御電圧Ｖ１を生成する電源回路５と、第１の駆動制御回路６と、電流方向検出回路７とを備える。
　また、整流装置１の２端子間に、ドレイン電極をカソード端子３に接続する第１のＭＯＳＦＥＴ４と、この第１のＭＯＳＦＥＴ４に直列接続される異常時遮断用ＭＯＳＦＥＴ１５（以下、遮断用ＭＯＳＦＥＴ１５と称す）とを備える。遮断用ＭＯＳＦＥＴ１５は、ソース電極を第１のＭＯＳＦＥＴ４のソース電極に接続し、ドレイン電極をアノード端子２に接続する。 Embodiment 9 FIG.
Next, a rectifier according to Embodiment 9 of the present invention will be described with reference to the drawings.
FIG. 12 is a diagram showing a circuit configuration of a rectifier according to Embodiment 9 of the present invention.
As shown in the figure, in the same way as in the first embodiment, the rectifier 1 uses the two terminals of the anode terminal 2 and the cathode terminal 3 as external terminals, and generates a control voltage V1 and a first drive. A control circuit 6 and a current direction detection circuit 7 are provided.
Also, a first MOSFET 4 that connects the drain electrode to the cathode terminal 3 between the two terminals of the rectifier 1, and an abnormal-time cutoff MOSFET 15 (hereinafter referred to as a cutoff MOSFET 15) connected in series to the first MOSFET 4. With. The cutoff MOSFET 15 has a source electrode connected to the source electrode of the first MOSFET 4 and a drain electrode connected to the anode terminal 2.
　電源回路５、第１の駆動制御回路６、および電流方向検出回路７の構成および動作は、上記実施の形態１と同様であるが、この場合、アノード端子２と第１のＭＯＳＦＥＴ４との間に遮断用ＭＯＳＦＥＴ１５が挿入されているため、制御電圧Ｖ１、検出電圧Ｖ２、基準電圧Ｖ３は、第１のＭＯＳＦＥＴ４のソース電極を電位基準として生成あるいは検出される。このため、図１２内の電圧ＶＣＡは、カソード端子３と第１のＭＯＳＦＥＴ４のソース電極との間の電圧を示すものとする。
　また、アノード端子２と電源回路５内のコンデンサ５２との間にダイオード１６を接続し、遮断用ＭＯＳＦＥＴ１５がオフ状態の時に、アノード端子２、カソード端子３間に印加される順電圧をダイオード１６を介してコンデンサ５２に充電する。
　さらに、電源回路５からの制御電圧Ｖ１で動作する第３の駆動制御回路２５を備え、第３の駆動制御回路２５は、電流方向検出回路７からの検出電圧Ｖ２に応じて遮断用ＭＯＳＦＥＴ１５への駆動信号２５ａおよび第１の駆動制御回路６への制限信号２５ｂを出力する。 The configurations and operations of the power supply circuit 5, the first drive control circuit 6, and the current direction detection circuit 7 are the same as those in the first embodiment, but in this case, between the anode terminal 2 and the first MOSFET 4. Since the cutoff MOSFET 15 is inserted, the control voltage V1, the detection voltage V2, and the reference voltage V3 are generated or detected using the source electrode of the first MOSFET 4 as a potential reference. Therefore, the voltage VCA in FIG. 12 indicates the voltage between the cathode terminal 3 and the source electrode of the first MOSFET 4.
Further, the diode 16 is connected between the anode terminal 2 and the capacitor 52 in the power supply circuit 5, and the forward voltage applied between the anode terminal 2 and the cathode terminal 3 is applied to the diode 16 when the cutoff MOSFET 15 is in the OFF state. Through the capacitor 52.
Furthermore, a third drive control circuit 25 that operates with the control voltage V1 from the power supply circuit 5 is provided. The third drive control circuit 25 supplies the cutoff MOSFET 15 to the cutoff MOSFET 15 according to the detection voltage V2 from the current direction detection circuit 7. The drive signal 25a and the limit signal 25b to the first drive control circuit 6 are output.
　遮断用ＭＯＳＦＥＴ１５は、定常時はオン状態で、第１のＭＯＳＦＥＴ４は、上記実施の形態１で示したように、整流装置１に逆電圧が印加されるとオフして電流ｉを遮断し、順方向にのみ電流ｉを流す。
　第１のＭＯＳＦＥＴ４がオンすると、アノード端子２からカソード端子３に第１のＭＯＳＦＥＴ４を介した電流ｉが順方向に流れ、この電流ｉと第１のＭＯＳＦＥＴ４のオン抵抗による電圧降下が発生する。この電圧降下分の電圧であるオン電圧（＝－ＶＣＡ）は、電流の増大と共に大きくなり、電流方向検出回路７からの検出電圧Ｖ２が低下する。
　そして、第３の駆動制御回路２５は、アノード端子２からカソード端子３に過電流が生じたことを検出し、遮断用ＭＯＳＦＥＴ１５をオフする。実際には、検出電圧Ｖ２を予め設定された遮断用の基準電圧と比較し、検出電圧Ｖ２が遮断用基準電圧より低くなると、遮断用ＭＯＳＦＥＴ１５へ駆動信号２５ａを出力して遮断用ＭＯＳＦＥＴ１５をオフする。 The blocking MOSFET 15 is turned on in a steady state, and the first MOSFET 4 is turned off when the reverse voltage is applied to the rectifying device 1 to cut off the current i, as shown in the first embodiment. The current i flows only in the direction.
When the first MOSFET 4 is turned on, a current i through the first MOSFET 4 flows from the anode terminal 2 to the cathode terminal 3 in the forward direction, and a voltage drop due to the current i and the on-resistance of the first MOSFET 4 occurs. The on-voltage (= −VCA), which is a voltage corresponding to this voltage drop, increases as the current increases, and the detection voltage V2 from the current direction detection circuit 7 decreases.
Then, the third drive control circuit 25 detects that an overcurrent has occurred from the anode terminal 2 to the cathode terminal 3, and turns off the blocking MOSFET 15. Actually, the detection voltage V2 is compared with a preset cutoff reference voltage, and when the detection voltage V2 becomes lower than the cutoff reference voltage, a drive signal 25a is output to the cutoff MOSFET 15 to turn off the cutoff MOSFET 15. .
　また、第３の駆動制御回路２５は、遮断用ＭＯＳＦＥＴ１５をオフするとき、同時に、第１の駆動制御回路６内の電圧調整回路６２に、基準電圧Ｖ３を調整する制限信号２５ｂを出力する。この制限信号２５ｂは第１のＭＯＳＦＥＴ４をオフさせるために駆動信号６ａを制限する信号であり、これにより第１のＭＯＳＦＥＴ４はオフする。これにより整流装置１の２端子間の全てのＭＯＳＦＥＴ４、１５が遮断され、導通が阻止される。なお、第１のＭＯＳＦＥＴ４と遮断用ＭＯＳＦＥＴ１５とは互いに逆方向に接続されているため、内蔵される寄生ダイオードも互いに逆方向となり、電流ｉの向きに拘わらず確実に遮断される。 The third drive control circuit 25 outputs a limit signal 25b for adjusting the reference voltage V3 to the voltage adjustment circuit 62 in the first drive control circuit 6 at the same time when the blocking MOSFET 15 is turned off. The limit signal 25b is a signal that limits the drive signal 6a in order to turn off the first MOSFET 4, and thereby the first MOSFET 4 is turned off. As a result, all MOSFETs 4 and 15 between the two terminals of the rectifier 1 are cut off and conduction is prevented. Since the first MOSFET 4 and the cutoff MOSFET 15 are connected in the opposite directions, the built-in parasitic diodes are also in the opposite directions, and are reliably cut off regardless of the direction of the current i.
　この実施の形態では、第１のＭＯＳＦＥＴ４のアノード端子側に遮断用ＭＯＳＦＥＴ１５を接続し、第３の駆動制御回路２５は、電流方向検出回路７からの検出電圧Ｖ２に基づいて過電流の発生を検出して遮断用ＭＯＳＦＥＴ１５をオフさせる。これにより、整流装置１に過電流を流すことが防止でき、整流装置１の信頼性を向上できる。
　また、第３の駆動制御回路２５は、電流方向検出回路７からの検出電圧Ｖ２に基づいて過電流の発生を容易に検出することができ、容易に過電流の遮断が行える。
　さらに、遮断用ＭＯＳＦＥＴ１５をがオフ状態の時に、整流装置１に印加される順電圧をダイオード１６を介してコンデンサ５２に充電するため、電流遮断時の順電圧も制御電圧Ｖ１の生成に利用でき、制御電圧生成の効率化、安定化が図れる。 In this embodiment, a cutoff MOSFET 15 is connected to the anode terminal side of the first MOSFET 4, and the third drive control circuit 25 detects the occurrence of overcurrent based on the detection voltage V 2 from the current direction detection circuit 7. Then, the blocking MOSFET 15 is turned off. Thereby, it is possible to prevent an overcurrent from flowing through the rectifying device 1 and to improve the reliability of the rectifying device 1.
The third drive control circuit 25 can easily detect the occurrence of overcurrent based on the detection voltage V2 from the current direction detection circuit 7, and can easily cut off the overcurrent.
Furthermore, since the forward voltage applied to the rectifier 1 is charged to the capacitor 52 via the diode 16 when the cutoff MOSFET 15 is in the off state, the forward voltage at the time of the current cutoff can also be used to generate the control voltage V1, Efficiency and stabilization of control voltage generation can be achieved.
　なお、上記実施の形態では、検出電圧Ｖ２を予め設定された遮断用基準電圧と比較するとしたが、遮断用基準電圧は、外部から設定および変更可能としても良い。この場合、図１２に示すように、第３の駆動制御回路２５は、外部から信号入力するための外部端子２５ｃを備え、電気的信号や光信号などにより遮断用基準電圧の値を、外部から第３の駆動制御回路２５に入力して設定する。これにより、遮断用の基準設定を、整流装置１だけでなく周辺回路等の条件に応じて行うことができ、利便度が向上する。
　また遮断用ＭＯＳＦＥＴ１５をオフさせている期間は、予め設定された一定期間、もしく、外部からの電気的信号や光信号などによる解除信号が入力されるまでとしても良い。　 In the above embodiment, the detection voltage V2 is compared with a preset reference voltage for cutoff. However, the reference voltage for cutoff may be set and changed from the outside. In this case, as shown in FIG. 12, the third drive control circuit 25 is provided with an external terminal 25c for inputting a signal from the outside, and the value of the cutoff reference voltage is externally input by an electric signal or an optical signal. The setting is input to the third drive control circuit 25. Thereby, the reference | standard setting for interruption | blocking can be performed according to conditions, such as not only the rectifier 1 but a peripheral circuit, and the convenience improves.
Further, the period during which the blocking MOSFET 15 is turned off may be a predetermined period set in advance, or until a release signal such as an external electric signal or optical signal is input.
　また、外部端子２５ｃは、外部から信号入力するために用いたが、外部に信号出力するための外部端子を第３の駆動制御回路２５に備えても良く、遮断用ＭＯＳＦＥＴ１５をオフ状態の時に、音や光などにより外部に過電流による異常を報知させても良い。過電流を検出して電流遮断を担う第３の駆動制御回路２５が、外部に異常を報知する手段を備えることで、容易に異常を知らせることができる。 Although the external terminal 25c is used for inputting a signal from the outside, the third drive control circuit 25 may be provided with an external terminal for outputting a signal to the outside. When the blocking MOSFET 15 is in an OFF state, Anomalies due to overcurrent may be notified to the outside by sound or light. The third drive control circuit 25 that detects overcurrent and is responsible for interrupting the current can be easily notified of an abnormality by providing means for notifying the outside of the abnormality.
実施の形態１０．
　上記実施の形態９は、遮断用ＭＯＳＦＥＴ１５を上記実施の形態１に適用したものを示したが、他の各実施の形態２～８に適用することもできる。特に、上記実施の形態５に遮断用ＭＯＳＦＥＴ１５を適用した場合を以下に示す。
　この実施の形態による整流装置１は、図５で示した上記実施の形態５による構成に、上記実施の形態９の図１２で示した遮断用ＭＯＳＦＥＴ１５、ダイオード１６および第３の駆動制御回路２５を付加した構成となる。 Embodiment 10 FIG.
In the ninth embodiment, the blocking MOSFET 15 is applied to the first embodiment. However, it can be applied to the other second to eighth embodiments. In particular, the case where the blocking MOSFET 15 is applied to the fifth embodiment will be described below.
The rectifier 1 according to this embodiment has the same structure as that of the fifth embodiment shown in FIG. 5 except that the blocking MOSFET 15, the diode 16 and the third drive control circuit 25 shown in FIG. 12 of the ninth embodiment. It becomes the added composition.
　即ち、整流装置１の２端子間には、第１のＭＯＳＦＥＴ４と、第１のＭＯＳＦＥＴ４に直列に接続される第２のＭＯＳＦＥＴ１０と、第１のＭＯＳＦＥＴ４と第２のＭＯＳＦＥＴ１０との直列回路に並列に接続される第３のＭＯＳＦＥＴ１２と、第３のダイオード１３と、さらに第１のＭＯＳＦＥＴ４のアノード端子側に接続される遮断用ＭＯＳＦＥＴ１５とを備える。また、第２のＭＯＳＦＥＴ１０に並列にシャント抵抗１１を接続し、各素子１０～１３でオン電圧調整回路１４を構成する。
　上記実施の形態５で示したように、第２の駆動制御回路２０は、検出電圧Ｖ２に応じて、第１のＭＯＳＦＥＴ４および第２、第３のＭＯＳＦＥＴ１０、１２の内、オンさせるＭＯＳＦＥＴの組み合わせを決定して各ＭＯＳＦＥＴ４、１０、１２を制御することで、アノード端子２からカソード端子３に順方向に電流ｉが流れるときの両端子間のオン抵抗を段階的に変化させて、オン電圧が増大するのを抑制する。そして、上記第３の駆動制御回路２５は、上記実施の形態９に示したように、過電流を検出して遮断用ＭＯＳＦＥＴ１５をオフさせる。 That is, between the two terminals of the rectifier 1, the first MOSFET 4, the second MOSFET 10 connected in series to the first MOSFET 4, and the series circuit of the first MOSFET 4 and the second MOSFET 10 are connected in parallel. A third MOSFET 12 to be connected, a third diode 13, and a blocking MOSFET 15 connected to the anode terminal side of the first MOSFET 4 are provided. In addition, a shunt resistor 11 is connected in parallel to the second MOSFET 10, and an on-voltage adjusting circuit 14 is configured by the elements 10 to 13.
As shown in the fifth embodiment, the second drive control circuit 20 selects a combination of MOSFETs to be turned on among the first MOSFET 4 and the second and third MOSFETs 10 and 12 in accordance with the detection voltage V2. By determining and controlling each of the MOSFETs 4, 10, and 12, the on-resistance between the two terminals when the current i flows in the forward direction from the anode terminal 2 to the cathode terminal 3 is changed stepwise to increase the on-voltage. To suppress. Then, the third drive control circuit 25 detects an overcurrent and turns off the blocking MOSFET 15 as shown in the ninth embodiment.
　図１３は、この実施の形態による整流装置１の動作特性を示すもので、電流ｉに応じて変化する電圧ＶＡＣ（＝－ＶＣＡ）を示す図である。なお、この場合も、各電圧Ｖ１、Ｖ２、Ｖ３の電位基準は第１のＭＯＳＦＥＴ４のソース電極でり、電圧ＶＣＡは、カソード端子３と第１のＭＯＳＦＥＴ４のソース電極との間の電圧を示す。
　また、図１４に、電流ｉに対応する各ＭＯＳＦＥＴのスイッチング状態を示す。また、３１ａは、電流方向検出回路７において電流方向が検出可能な検出電圧Ｖ２の範囲における電圧ＶＡＣの範囲、３２ａは第３のダイオード１３の出力特性を示すものである。第１のＭＯＳＦＥＴ４および第２、第３のＭＯＳＦＥＴ１０、１２の状態で、ＳＷは、駆動回路６１からの駆動信号６ａと同期してスイッチングされる状態を示す。 FIG. 13 shows the operating characteristics of the rectifier 1 according to this embodiment, and is a diagram showing a voltage VAC (= −VCA) that changes according to the current i. In this case as well, the potential reference for each of the voltages V1, V2, and V3 is the source electrode of the first MOSFET 4, and the voltage VCA indicates the voltage between the cathode terminal 3 and the source electrode of the first MOSFET 4.
FIG. 14 shows the switching state of each MOSFET corresponding to the current i. Reference numeral 31a denotes a range of the voltage VAC in the range of the detection voltage V2 in which the current direction can be detected by the current direction detection circuit 7, and 32a denotes an output characteristic of the third diode 13. In the state of the first MOSFET 4 and the second and third MOSFETs 10 and 12, SW indicates a state that is switched in synchronization with the drive signal 6 a from the drive circuit 61.
　遮断用ＭＯＳＦＥＴ１５は、定常時はオン状態を継続し、第１～第３のＭＯＳＦＥＴ４、１０、１２は、電流ｉが過電流と認識される電流値ｉ５（＜ｉ４）まで上記実施の形態５と同様に動作する。
　電流ｉが増大して電流値ｉ５となり、検出電圧Ｖ２が遮断用基準電圧より低くなると、第３の駆動制御回路２５は、遮断用ＭＯＳＦＥＴ１５をオフする。また、第３の駆動制御回路２５は、遮断用ＭＯＳＦＥＴ１５をオフするとき、同時に、第１の駆動制御回路６内の電圧調整回路６２に、基準電圧Ｖ３を調整する制限信号２５ｂを出力して第１のＭＯＳＦＥＴ４をオフさせる。さらに同時に、第２の駆動制御回路２０は、第２、第３のＭＯＳＦＥＴ１０、１２をオフさせる。 The blocking MOSFET 15 continues to be in an ON state at the steady state, and the first to third MOSFETs 4, 10, and 12 are different from those in the fifth embodiment until the current value i5 (<i4) at which the current i is recognized as an overcurrent. It operates in the same way.
When the current i increases to a current value i5 and the detection voltage V2 becomes lower than the cutoff reference voltage, the third drive control circuit 25 turns off the cutoff MOSFET 15. Further, when the third drive control circuit 25 turns off the blocking MOSFET 15, at the same time, the third drive control circuit 25 outputs a limit signal 25b for adjusting the reference voltage V3 to the voltage adjustment circuit 62 in the first drive control circuit 6. 1 MOSFET 4 is turned off. At the same time, the second drive control circuit 20 turns off the second and third MOSFETs 10 and 12.
　以上のように、第２の駆動制御回路２０は、電流ｉが増大するとオンさせるＭＯＳＦＥＴの組み合わせを、オン抵抗を低くするように切り替えて、オン電圧の増大を抑制する。そして、第３の駆動制御回路２５は、アノード端子２からカソード端子３に過電流が生じたことを検出し、遮断用ＭＯＳＦＥＴ１５をオフする。またこのとき、他のＭＯＳＦＥＴ４、１０、１２もオフされる。整流装置１の２端子間の全ＭＯＳＦＥＴ４、１０、１２、１５が遮断され、電流が確実に遮断される。 As described above, the second drive control circuit 20 switches the combination of MOSFETs that are turned on when the current i increases so as to reduce the on-resistance, thereby suppressing the increase in the on-voltage. Then, the third drive control circuit 25 detects that an overcurrent has occurred from the anode terminal 2 to the cathode terminal 3, and turns off the blocking MOSFET 15. At this time, the other MOSFETs 4, 10, 12 are also turned off. All MOSFETs 4, 10, 12, and 15 between the two terminals of the rectifier 1 are cut off, and the current is cut off reliably.
　なお、この実施の形態では、第１、第２、第３の駆動制御回路６、２０、２５を個別に備えたが、これらの機能を併せ持つ１つの駆動制御回路を用いても良い。 In this embodiment, the first, second, and third drive control circuits 6, 20, and 25 are individually provided. However, one drive control circuit that has these functions may be used.
実施の形態１１．
　図１５は、この発明の実施の形態１１による整流装置の回路構成を示す図である。
　図に示すように、図１２で示した上記実施の形態９による整流装置において、整流装置１の２端子間の電流を制限する電流制限回路１７を備える。この電流制限回路１７は、抵抗体やリアクトル、ダイオードなどから成り、またバイパス回路を備えて、第１のＭＯＳＦＥＴ４のドレイン電極とカソード端子３との間に接続される。 Embodiment 11 FIG.
FIG. 15 is a diagram showing a circuit configuration of a rectifier according to Embodiment 11 of the present invention.
As shown in the figure, the rectifier according to the ninth embodiment shown in FIG. 12 includes a current limiting circuit 17 that limits the current between the two terminals of the rectifier 1. The current limiting circuit 17 includes a resistor, a reactor, a diode, and the like, and includes a bypass circuit, and is connected between the drain electrode of the first MOSFET 4 and the cathode terminal 3.
　第３の駆動制御回路２５は、アノード端子２からカソード端子３に過電流が生じたことを検出し、遮断用ＭＯＳＦＥＴ１５をオフするが、この際、所定の過渡期間を設け、徐々に電流ｉの値を減少させて電流遮断する。この場合、遮断用ＭＯＳＦＥＴ１５の通電率を徐々に減少させて０にするように、遮断用ＭＯＳＦＥＴ１５への駆動信号２５ａを制御する。電流制限回路１７は、例えば第３の駆動制御回路２５からの制御により、定常時にはバイパス回路にてバイパスされ、遮断用ＭＯＳＦＥＴ１５をオン／オフする切替時の過渡期間のみ電流ｉを流して電流制限する。この遮断用ＭＯＳＦＥＴ１５をオンする際とオフする際との過渡期間の長さは同じであっても異なるものでも良い。
　また、外部からの信号などにより、整流装置１の２端子間で遮断されていた電流ｉを復帰させて導通させる際も、遮断時と同様に所定の過渡期間を設け、徐々に電流ｉの値を増大させて復帰させる。ここでは、遮断用ＭＯＳＦＥＴ１５の通電率を０から徐々に増大させるように、遮断用ＭＯＳＦＥＴ１５への駆動信号２５ａを制御する。 The third drive control circuit 25 detects that an overcurrent has occurred from the anode terminal 2 to the cathode terminal 3 and turns off the cutoff MOSFET 15. At this time, a predetermined transient period is provided, and the current i gradually increases. Decrease the value to cut off the current. In this case, the drive signal 25a to the blocking MOSFET 15 is controlled so that the energization rate of the blocking MOSFET 15 is gradually decreased to zero. The current limiting circuit 17 is, for example, controlled by the third drive control circuit 25, and is bypassed by a bypass circuit in a steady state. The current limiting circuit 17 limits the current by flowing the current i only during the transition period when switching on / off the blocking MOSFET 15. . The length of the transition period between when the blocking MOSFET 15 is turned on and when it is turned off may be the same or different.
Also, when the current i that has been interrupted between the two terminals of the rectifying device 1 is restored and made conductive by an external signal or the like, a predetermined transient period is provided as in the case of the interruption, and the value of the current i is gradually increased. Increase to return. Here, the drive signal 25a to the blocking MOSFET 15 is controlled so as to gradually increase the energization rate of the blocking MOSFET 15 from zero.
　この実施の形態では、遮断用ＭＯＳＦＥＴ１５を用いて２端子間の電流の導通／遮断状態を切り替える際、電流値の変化を緩やかにすることで、遮断時の異常電圧発生を防止でき、また、２端子間の電流を復帰させる際に流れる突入電流も防止できる。 In this embodiment, when the conduction / cutoff state of the current between the two terminals is switched using the cutoff MOSFET 15, it is possible to prevent the occurrence of abnormal voltage at the cutoff by slowing the change in the current value. Inrush current that flows when restoring the current between the terminals can also be prevented.
実施の形態１２．
　上記実施の形態１１では、電流制限回路１７を備え、遮断用ＭＯＳＦＥＴ１５の通電率を徐々に増減させたが、この実施の形態１１では、遮断用ＭＯＳＦＥＴ１５への駆動信号２５ａの駆動電圧を調整して、遮断用ＭＯＳＦＥＴ１５のオン抵抗を調整する。
　この実施の形態では、電流制限回路１７は不要であり、遮断用ＭＯＳＦＥＴ１５をオフして電流遮断する際、所定の過渡期間を設け、徐々に電流ｉの値を減少させて電流遮断するように、遮断用ＭＯＳＦＥＴ１５への駆動信号２５ａの駆動電圧を徐々に減少させる。また、外部からの信号などにより、整流装置１の２端子間で遮断されていた電流ｉを復帰させて導通させる際も、遮断時と同様に所定の過渡期間を設け、徐々に電流ｉの値を増大させて復帰させるように、遮断用ＭＯＳＦＥＴ１５への駆動信号２５ａの駆動電圧を徐々に増大させる。これらの過渡期間中、遮断用ＭＯＳＦＥＴ１５以外の全てのＭＯＳＦＥＴをオフさせて、ＭＯＳＦＥＴの寄生ダイオードに電流を流しても良い。
　この実施の形態においても、遮断用ＭＯＳＦＥＴ１５を用いて２端子間の電流の導通／遮断状態を切り替える際、電流値の変化を緩やかにすることで、遮断時の異常電圧発生を防止でき、また、２端子間の電流を復帰させる際に流れる突入電流も防止できる。 Embodiment 12 FIG.
In the eleventh embodiment, the current limiting circuit 17 is provided, and the current supply rate of the blocking MOSFET 15 is gradually increased or decreased. However, in the eleventh embodiment, the driving voltage of the driving signal 25a to the blocking MOSFET 15 is adjusted. The on-resistance of the blocking MOSFET 15 is adjusted.
In this embodiment, the current limiting circuit 17 is unnecessary, and when the current is interrupted by turning off the interrupting MOSFET 15, a predetermined transient period is provided so that the current i is gradually decreased by gradually decreasing the value of the current i. The drive voltage of the drive signal 25a to the cutoff MOSFET 15 is gradually reduced. Also, when the current i that has been interrupted between the two terminals of the rectifying device 1 is restored and made conductive by an external signal or the like, a predetermined transient period is provided as in the case of the interruption, and the value of the current i is gradually increased. The drive voltage of the drive signal 25a to the cutoff MOSFET 15 is gradually increased so as to increase and recover. During these transition periods, all the MOSFETs other than the blocking MOSFET 15 may be turned off, and a current may flow through the parasitic diode of the MOSFET.
Also in this embodiment, when switching the conduction / cutoff state of the current between the two terminals using the cut-off MOSFET 15, it is possible to prevent the occurrence of abnormal voltage at the cut-off by gradual change of the current value, Inrush current that flows when the current between the two terminals is restored can also be prevented.
実施の形態１３．
　図１６は、この発明の実施の形態１３による整流装置１および周辺回路の簡略構成を示す図である。この場合、整流装置１は、図１２で示した上記実施の形態９による整流装置において、第１の駆動制御回路６と第３の駆動制御回路２５とを１つの駆動制御回路２６で示したものである。なお、電源回路５および電流方向検出回路７は、図示を省略した。
　図に示すように、電圧検出回路２７は、外部の基準電位からのアノード端子２の電圧を入力電圧ＶＩＮとして検出する。駆動制御回路２６内の第３の駆動制御回路２５では、外部から入力電圧ＶＩＮの信号を受信し、電圧異常を検出すると、上記実施の形態９の過電流検出時と同様に、遮断用ＭＯＳＦＥＴ１５をオフして電流遮断する。 Embodiment 13 FIG.
FIG. 16 is a diagram showing a simplified configuration of the rectifier 1 and peripheral circuits according to the thirteenth embodiment of the present invention. In this case, the rectifier 1 is the rectifier according to the ninth embodiment shown in FIG. 12, in which the first drive control circuit 6 and the third drive control circuit 25 are represented by one drive control circuit 26. It is. The power supply circuit 5 and the current direction detection circuit 7 are not shown.
As shown in the figure, the voltage detection circuit 27 detects the voltage of the anode terminal 2 from the external reference potential as the input voltage VIN. In the third drive control circuit 25 in the drive control circuit 26, when the signal of the input voltage VIN is received from the outside and a voltage abnormality is detected, the blocking MOSFET 15 is turned on as in the case of the overcurrent detection in the ninth embodiment. Turn off and cut off current.
　この実施の形態では、遮断用ＭＯＳＦＥＴ１５を制御する駆動制御回路２６内の第３の駆動制御回路２５が、外部信号を受信して電圧異常を検出して遮断用ＭＯＳＦＥＴ１５を遮断するようにした。このため、外部の電圧検出回路２７などを利用して電圧異常を容易で確実に検出でき利便性が向上する。なお、他の検出回路を用いて検出された電圧電流異常の信号や整流装置１の電流ｉを導通／遮断するための信号を受信しても良い。 In this embodiment, the third drive control circuit 25 in the drive control circuit 26 for controlling the cutoff MOSFET 15 receives an external signal to detect a voltage abnormality and shuts off the cutoff MOSFET 15. For this reason, it is possible to easily and reliably detect a voltage abnormality using the external voltage detection circuit 27 and the like, and the convenience is improved. Note that a voltage / current abnormality signal detected using another detection circuit or a signal for conducting / interrupting the current i of the rectifier 1 may be received.
　また、この実施の形態に、上記実施の形態１１、１２を適用しても良く、同様の効果が得られる。 Also, the above-described Embodiments 11 and 12 may be applied to this embodiment, and the same effect can be obtained.
　また、上記各実施の形態で用いるＭＯＳＦＥＴ４、１０、１２、１５の半導体材料には、シリコンカーバイト、ガリウムナイトライド、ダイヤモンド半導体など、ワイドギャップの半導体材料で、整流装置１における整流時の損失を抑えるものが望ましい。また、整流装置１内の各ダイオードは、ショットキーバリアダイオード、ファーストリカバリダイオードなど、種類や材質は問わないが、電流方向検出回路７や各駆動制御回路６、２０、２５などの遅れ時間を改善するためには、シリコンカーバイトやガリウムナイトライド等から成る、順方向電圧が小さくかつ応答速度の速い素子を使うことが望ましい。 Further, the semiconductor materials of the MOSFETs 4, 10, 12, and 15 used in the above embodiments are wide gap semiconductor materials such as silicon carbide, gallium nitride, and diamond semiconductor, and the loss during rectification in the rectifier 1 is reduced. What you suppress is desirable. In addition, each diode in the rectifier 1 may be of any type or material, such as a Schottky barrier diode or a fast recovery diode, but the delay times of the current direction detection circuit 7 and the drive control circuits 6, 20, 25, etc. are improved. In order to achieve this, it is desirable to use an element having a low forward voltage and a high response speed, such as silicon carbide or gallium nitride.
実施の形態１４．
　次に、この発明の実施の形態１４による太陽光発電システムを図に基づいて説明する。
　図１７は、この発明の実施の形態１４による太陽光発電システムの主回路構成を示す図である。
　図に示すように、太陽光発電システムの主回路１００は、複数（この場合３個）の太陽光パネル８０を並列接続して備え、各太陽光パネル８０は、それぞれ整流装置１ａが並列接続された太陽電池セル８１が、複数個（この場合３個）直列接続されて構成される。各太陽光パネル８０にて発電された直流電力は、整流装置１ｂを介してコンデンサ８２等のエネルギ蓄積手段に蓄積された後、並列接続された２つのチョッパ回路８３により昇圧され、平滑コンデンサ８４を介して出力される。チョッパ回路８３は、スイッチとリアクトルと整流装置１ｃとを備えて構成される。
　主回路１００内の整流装置１ａ、１ｂ、１ｃには、上記実施の形態１～１３で示した構成の低損失で信頼性の高い整流装置１が用いられる。 Embodiment 14 FIG.
Next, a solar power generation system according to Embodiment 14 of the present invention will be described with reference to the drawings.
FIG. 17 is a diagram showing a main circuit configuration of a photovoltaic power generation system according to Embodiment 14 of the present invention.
As shown in the figure, the main circuit 100 of the photovoltaic power generation system includes a plurality of (in this case, three) solar panels 80 connected in parallel, and each of the solar panels 80 has a rectifier 1a connected in parallel. A plurality of (in this case, three) solar cells 81 are connected in series. The direct-current power generated by each solar panel 80 is stored in energy storage means such as a capacitor 82 via the rectifier 1b, and then boosted by two chopper circuits 83 connected in parallel. Is output via. The chopper circuit 83 includes a switch, a reactor, and a rectifier 1c.
As the rectifiers 1a, 1b, and 1c in the main circuit 100, the rectifier 1 having a low loss and high reliability having the configuration shown in the first to thirteenth embodiments is used.
　このような太陽光発電システムでは、複数の太陽光パネル８０を並列接続して冗長系回路を構成し、確実に直流電圧を発生させる。
　また、各太陽光パネル８０では、複数の太陽電池セル８１を直列接続しているが、各太陽電池セル８１に異常が発生すると、異常が発生した太陽電池セル８１に並列接続された整流装置１ａにより太陽電池セル８１をバイパスする。例えば、一部の太陽電池セル８１に太陽光の照射が少なくて発電できない場合、その太陽電池セル８１のインピーダンスが高くなる。また、太陽電池セル８１の故障により太陽電池セル８１の接続配線が開放故障した際、故障した太陽電池セル８１に直列接続された他の太陽電池セル８１により発電された電力は出力できない。このような太陽電池セル８１の異常時に、整流装置１ａ内の第１の駆動制御回路６は、検出電圧Ｖ２から異常を検出して、第１のＭＯＳＦＥＴ４をオンさせて、故障した太陽電池セル８１をバイパスする電流を流し、他の太陽電池セル８１にて発電された電力は出力される。 In such a solar power generation system, a plurality of solar panels 80 are connected in parallel to form a redundant system circuit, and a DC voltage is reliably generated.
Moreover, in each solar panel 80, although the several photovoltaic cell 81 is connected in series, when abnormality arises in each photovoltaic cell 81, the rectifier 1a connected in parallel with the photovoltaic cell 81 which abnormality occurred Thus, the solar battery cell 81 is bypassed. For example, when some solar cells 81 are not irradiated with sunlight and cannot generate power, the impedance of the solar cells 81 is increased. In addition, when the connection wiring of the solar battery cell 81 fails due to the failure of the solar battery cell 81, the power generated by the other solar battery cells 81 connected in series to the failed solar battery 81 cannot be output. When such an abnormality of the solar battery cell 81 occurs, the first drive control circuit 6 in the rectifier 1a detects the abnormality from the detection voltage V2, turns on the first MOSFET 4, and malfunctions the solar battery cell 81. The electric power generated by the other solar battery cell 81 is output.
　このように、整流装置１ａを太陽光パネル８０の保護用回路として動作させ、一部の太陽電池セル８１に異常が発生しても、太陽光パネル８０は電力を出力できる。また、整流装置１ａは、上記各実施の形態１～１３で示したように、電流導通時に損失が極めて低い装置構成であり、太陽光パネル８０内の損失が低減できる。また、整流装置１ａの電流導通時に、整流装置１ａの発熱が小さいことから、他の太陽電池セル８１が加熱されることも抑制でき、他の太陽電池セル８１の発電効率が低減するのを抑制できる。
　また、第１の駆動制御回路６に外部端子を備えて、第１のＭＯＳＦＥＴ４の導通／遮断状態を外部に報知させる手段を設けても良く、管理者は異常発生箇所を速やかに見つけることができる。 Thus, even if the rectifier 1a is operated as a protection circuit for the solar panel 80 and an abnormality occurs in some of the solar cells 81, the solar panel 80 can output electric power. In addition, the rectifying device 1a has a device configuration that has a very low loss during current conduction as shown in the first to thirteenth embodiments, and can reduce the loss in the solar panel 80. Moreover, since the heat generation of the rectifying device 1a is small when the current of the rectifying device 1a is conducted, it is possible to suppress the heating of the other solar cells 81, and to suppress the reduction of the power generation efficiency of the other solar cells 81. it can.
Further, the first drive control circuit 6 may be provided with an external terminal, and a means for informing the outside of the conduction / cutoff state of the first MOSFET 4 may be provided, and the administrator can quickly find the location where the abnormality has occurred. .
　また上述したように、各太陽光パネル８０にて発電された直流電圧は整流装置１ｂを介してコンデンサ８２に充電されている。いずれかの太陽光パネル８０に短絡故障が発生すると、他の太陽光パネル８０で発電されてコンデンサ８２に蓄積された電力は、故障した太陽光パネル８０を介して放電されるが、該放電経路を整流装置１ｂにて遮断することで上記放電が防止できる。この場合、整流装置１ｂは短絡故障時の逆電圧により遮断される。また、定常時に導通する整流装置１ｂは、上記各実施の形態１～１３で示したように、電流導通時に損失が極めて低い装置構成であり、主回路１００の損失が低減できる。
　この場合も、整流装置１ｂ内の第１の駆動制御回路６に外部端子を備えて、第１のＭＯＳＦＥＴ４の導通／遮断状態を外部に報知させる手段を設けても良く、管理者は異常発生箇所を速やかに見つけることができる。 Further, as described above, the DC voltage generated by each solar panel 80 is charged in the capacitor 82 via the rectifier 1b. When a short circuit failure occurs in any of the solar panels 80, the electric power generated by the other solar panels 80 and stored in the capacitor 82 is discharged through the failed solar panel 80. Is prevented by the rectifying device 1b. In this case, the rectifier 1b is interrupted by a reverse voltage at the time of a short circuit failure. Further, the rectifying device 1b that conducts in a steady state has a device configuration that has a very low loss during current conduction, as shown in the first to thirteenth embodiments, and can reduce the loss of the main circuit 100.
Also in this case, the first drive control circuit 6 in the rectifying device 1b may be provided with an external terminal and provided with means for informing the outside of the conduction / cutoff state of the first MOSFET 4, and the administrator can determine where the abnormality has occurred. Can be found promptly.
　さらに、チョッパ回路８３内の整流素子にも、損失が極めて低い整流装置１ｃを用いることで、チョッパ回路８３の昇圧効率が向上する。
　このように、主回路１００内の整流装置１ａ、１ｂ、１ｃに、この発明による低損失で信頼性の高い整流装置を用いたことで、太陽光発電システムの発電効率および信頼性を向上できる。 Furthermore, the boosting efficiency of the chopper circuit 83 is improved by using the rectifier 1c with extremely low loss for the rectifier element in the chopper circuit 83.
Thus, the power generation efficiency and reliability of the photovoltaic power generation system can be improved by using the low-loss and high-reliability rectifier according to the present invention for the rectifiers 1a, 1b, and 1c in the main circuit 100.
　外部端子が２端子である整流回路を備えた回路に幅広く利用でき、特に電力変換装置に用いることで、電力変換効率の向上に寄与できる。　 It can be widely used in circuits equipped with a rectifier circuit with two external terminals, and can contribute to the improvement of power conversion efficiency, especially when used in a power converter. *

Claims (28)

  1. 　外部端子を陽極端子と陰極端子との２端子とした整流装置において、
    　上記２端子間に、ソース電極を上記陽極端子側にして接続された第１のＭＯＳＦＥＴと、
    　上記２端子間に印加される電圧から所定の制御電圧を生成して出力する電源回路と、
    　上記電源回路からの制御電圧を用いて上記第１のＭＯＳＦＥＴのゲート電極に駆動信号を出力する第１の駆動制御回路と、
    　上記電源回路の出力に接続された電流制限用抵抗、およびアノードを該電流制限用抵抗に接続しカソードを上記陰極端子に接続したダイオードを有し、該ダイオードのアノード電位を検出する検出回路とを備え、
    　上記第１の駆動制御回路は、上記検出回路に検出された上記ダイオードのアノード電位に応じて上記駆動信号を出力することを特徴とする整流装置。     In the rectifier with two external terminals, an anode terminal and a cathode terminal,
    A first MOSFET connected between the two terminals with the source electrode on the anode terminal side;
    A power supply circuit that generates and outputs a predetermined control voltage from the voltage applied between the two terminals;
    A first drive control circuit that outputs a drive signal to the gate electrode of the first MOSFET using a control voltage from the power supply circuit;
    A current limiting resistor connected to the output of the power supply circuit; and a detection circuit for detecting an anode potential of the diode, having a diode having an anode connected to the current limiting resistor and a cathode connected to the cathode terminal. Prepared,
    The rectifier according to claim 1, wherein the first drive control circuit outputs the drive signal in accordance with an anode potential of the diode detected by the detection circuit.
  2. 　上記電源回路は、上記２端子間に印加される逆極性電圧をダイオードを介して充電するコンデンサ、および該コンデンサの電圧から上記陽極端子を電位基準とした上記制御電圧を生成する電圧調整回路を備えて、該制御電圧を出力することを特徴とする請求項１に記載の整流装置。 The power supply circuit includes a capacitor that charges a reverse polarity voltage applied between the two terminals via a diode, and a voltage adjustment circuit that generates the control voltage based on the potential of the anode terminal from the voltage of the capacitor. The rectifier according to claim 1, wherein the control voltage is output.
  3. 　上記電源回路は、上記２端子間に印加される逆極性電圧を用いて上記陽極端子を電位基準とした上記制御電圧を生成する第１の電圧調整回路、および上記２端子間に印加される正極性電圧を用いて上記陽極端子を電位基準とした上記制御電圧を生成する第２の電圧調整回路、を備えて、該制御電圧を出力することを特徴とする請求項１に記載の整流装置。 The power supply circuit includes a first voltage adjusting circuit that generates the control voltage with the anode terminal as a potential reference using a reverse polarity voltage applied between the two terminals, and a positive electrode applied between the two terminals. 2. The rectifier according to claim 1, further comprising: a second voltage adjusting circuit that generates the control voltage using a positive voltage with respect to the anode terminal as a potential reference, and outputs the control voltage.
  4. 　上記第１の駆動制御回路は、上記制御電圧から生成した基準電圧と上記検出回路に検出された上記ダイオードのアノード電位とを比較し、該アノード電位が上記基準電圧より低いとき、上記第１のＭＯＳＦＥＴをオンさせることを特徴とする請求項１～３のいずれか１項に記載の整流装置。 The first drive control circuit compares a reference voltage generated from the control voltage with an anode potential of the diode detected by the detection circuit, and when the anode potential is lower than the reference voltage, the first drive control circuit The rectifier according to any one of claims 1 to 3, wherein the MOSFET is turned on.
  5. 　上記検出回路は、上記ダイオードのアノードとアノード電位検出点との間に抵抗あるいは定電圧手段を挿入したことを特徴とする請求項１～３のいずれか１項に記載の整流装置。 4. The rectifier according to claim 1, wherein the detection circuit includes a resistor or a constant voltage means between an anode of the diode and an anode potential detection point.
  6. 　上記第１のＭＯＳＦＥＴは、ソース・ドレイン間に寄生ダイオードが内蔵されたパワーＭＯＳＦＥＴであることを特徴とする請求項１～３のいずれか１項に記載の整流装置。 The rectifier according to any one of claims 1 to 3, wherein the first MOSFET is a power MOSFET in which a parasitic diode is built in between a source and a drain.
  7. 　上記第１のＭＯＳＦＥＴには、シリコンカーバイト、ガリウムナイトライド、ダイヤモンド等のワイドギャップ半導体が用いられていることを特徴とする請求項１～３のいずれか１項に記載の整流装置。 The rectifier according to any one of claims 1 to 3, wherein a wide gap semiconductor such as silicon carbide, gallium nitride, diamond or the like is used for the first MOSFET.
  8. 　上記電源回路は、上記２端子間に印加される逆極性電圧を第１のダイオードを介して充電する第１のコンデンサ、および上記２端子間に印加される正極性電圧を第２のダイオードを介して充電する第２のコンデンサを備え、上記第１の電圧調整回路は上記第１のコンデンサの電圧から上記制御電圧を生成し、上記第２の電圧調整回路は上記第２のコンデンサの電圧から上記制御電圧を生成することを特徴とする請求項３記載の整流装置。 The power supply circuit includes a first capacitor that charges a reverse polarity voltage applied between the two terminals via a first diode, and a positive voltage applied between the two terminals via a second diode. And the second voltage regulator circuit generates the control voltage from the voltage of the first capacitor, and the second voltage regulator circuit generates the control voltage from the voltage of the second capacitor. The rectifier according to claim 3, wherein a control voltage is generated.
  9. 　上記第１、第２のコンデンサの各電圧を検出する手段を備え、上記第１、第２の電圧調整回路は、検出された上記各電圧に応じて動作することを特徴とする請求項８に記載の整流装置。 9. The apparatus according to claim 8, further comprising means for detecting each voltage of the first and second capacitors, wherein the first and second voltage adjusting circuits operate in accordance with the detected voltages. The rectifier of description.
  10. 　上記電源回路は、上記第１の駆動制御回路から出力される上記駆動信号に基づいて、上記第１のＭＯＳＦＥＴがオフ状態の時に上記第１の電圧調整回路を動作させ、上記第１のＭＯＳＦＥＴがオン状態の時に上記第２の電圧調整回路を動作させることを特徴とする請求項３に記載の整流装置。 The power supply circuit operates the first voltage adjustment circuit when the first MOSFET is in an off state based on the drive signal output from the first drive control circuit, and the first MOSFET 4. The rectifier according to claim 3, wherein the second voltage regulator circuit is operated in an ON state. 5.
  11. 　上記第１、第２の電圧調整回路は、上記２端子間の電圧を入力電圧として動作するもので、該入力電圧を検出する手段を備え、該検出電圧に応じて上記第１、第２の電圧調整回路を交互に動作させることを特徴とする請求項３に記載の整流装置。 The first and second voltage adjusting circuits operate using the voltage between the two terminals as an input voltage, and include means for detecting the input voltage, and the first and second voltage adjusting circuits are provided according to the detected voltage. The rectifier according to claim 3, wherein the voltage adjustment circuit is operated alternately.
  12. 　上記基準電圧は、上記ダイオードの順方向電圧から上記第１のＭＯＳＦＥＴのドレイン・ソース間のオン電圧を減算した電圧値と、上記ダイオードの順方向電圧に上記第１のＭＯＳＦＥＴのドレイン・ソース間のオン電圧を加算した電圧値との間に設定されることを特徴とする請求項４に記載の整流装置。 The reference voltage includes a voltage value obtained by subtracting an on-voltage between the drain and source of the first MOSFET from a forward voltage of the diode, and a drain voltage between the drain and source of the first MOSFET to a forward voltage of the diode. The rectifier according to claim 4, wherein the rectifier is set between a voltage value obtained by adding an on-voltage.
  13. 　上記ダイオードの温度を検出するセンサを備え、検出された温度に応じて上記基準電圧が調整されることを特徴とする請求項４に記載の整流装置。 The rectifier according to claim 4, further comprising a sensor for detecting the temperature of the diode, wherein the reference voltage is adjusted according to the detected temperature.
  14. 　上記基準電圧にヒステリシス幅を設け、上記第１のＭＯＳＦＥＴをオフからオンにする際とオンからオフにする際とで、上記基準電圧を変化させることを特徴とする請求項４に記載の整流装置。 5. The rectifier according to claim 4, wherein a hysteresis width is provided in the reference voltage, and the reference voltage is changed between when the first MOSFET is turned on and when the first MOSFET is turned on. .
  15. 　上記２端子間で、上記第１のＭＯＳＦＥＴに直列に接続される１あるいは複数の第２のＭＯＳＦＥＴ、上記第１のＭＯＳＦＥＴに並列に接続される１あるいは複数の第３のＭＯＳＦＥＴの一方あるいは双方を有したオン電圧調整回路と、
    　上記電源回路からの上記制御電圧を用いて上記オン電圧調整回路内の上記第２、第３のＭＯＳＦＥＴのゲート電極に駆動信号を出力する第２の駆動制御回路とを備え、
    　該第２の駆動制御回路は、上記第１のＭＯＳＦＥＴおよび上記オン電圧調整回路内の第２、第３のＭＯＳＦＥＴの内、オンさせるＭＯＳＦＥＴの組み合わせを、上記検出回路に検出された上記ダイオードのアノード電位に応じて、上記２端子間のオン抵抗が低減されるように選択して、上記駆動信号を出力することを特徴とする請求項４に記載の整流装置。     One or both of one or a plurality of second MOSFETs connected in series to the first MOSFET and one or a plurality of third MOSFETs connected in parallel to the first MOSFET are connected between the two terminals. An on-voltage adjusting circuit,
    A second drive control circuit for outputting a drive signal to the gate electrodes of the second and third MOSFETs in the on-voltage adjusting circuit using the control voltage from the power supply circuit;
    The second drive control circuit includes: an anode of the diode that is detected by the detection circuit of a combination of MOSFETs to be turned on from the first MOSFET and the second and third MOSFETs in the on-voltage adjusting circuit; 5. The rectifier according to claim 4, wherein the drive signal is output by selecting so as to reduce an on-resistance between the two terminals in accordance with a potential.
  16. 　上記第２の駆動制御回路は、上記検出回路に検出された上記ダイオードのアノード電位に応じて、上記第１のＭＯＳＦＥＴの駆動信号を制限する信号を上記第１の駆動制御回路に対して出力することを特徴とする請求項１５に記載の整流装置。 The second drive control circuit outputs a signal for limiting the drive signal of the first MOSFET to the first drive control circuit in accordance with the anode potential of the diode detected by the detection circuit. The rectifier according to claim 15.
  17. 　上記第２のＭＯＳＦＥＴと並列にシャント抵抗を接続したことを特徴とする請求項１５または１６に記載の整流装置。 The rectifier according to claim 15 or 16, wherein a shunt resistor is connected in parallel with the second MOSFET.
  18. 　アノードを上記陽極端子に接続し、カソードを上記陰極端子に接続するダイオードを上記２端子間に備えたことを特徴とする請求項１５または１６に記載の整流装置。 The rectifier according to claim 15 or 16, further comprising a diode between the two terminals, the anode being connected to the anode terminal and the cathode being connected to the cathode terminal.
  19. 　ドレイン電極を上記陽極端子に接続しソース電極を上記第１のＭＯＳＦＥＴのソース電極に接続した異常時遮断用ＭＯＳＦＥＴと、上記電源回路からの上記制御電圧を用いて上記異常時遮断用ＭＯＳＦＥＴのゲート電極に駆動信号を出力する第３の駆動制御回路とを備え、
    　該第３の駆動制御回路は、電流電圧異常を検出して、上記異常時遮断用ＭＯＳＦＥＴをオフさせて上記２端子間の電流を遮断することを特徴とする請求項４に記載の整流装置。     An abnormal cutoff MOSFET having a drain electrode connected to the anode terminal and a source electrode connected to the source electrode of the first MOSFET, and a gate electrode of the abnormal cutoff MOSFET using the control voltage from the power supply circuit And a third drive control circuit for outputting a drive signal to
    5. The rectifier according to claim 4, wherein the third drive control circuit detects a current-voltage abnormality and turns off the abnormal-time cutoff MOSFET to cut off a current between the two terminals. 6.
  20. 　上記陽極端子と上記電源回路との間にダイオードを備え、上記異常時遮断用ＭＯＳＦＥＴがオフ状態の時に、上記２端子間に印加される正極性電圧が上記ダイオードを介して上記電源回路に充電されることを特徴とする請求項１９に記載の整流装置。 A diode is provided between the anode terminal and the power supply circuit, and a positive voltage applied between the two terminals is charged to the power supply circuit via the diode when the abnormal-time cutoff MOSFET is in an OFF state. The rectifier according to claim 19.
  21. 　上記第３の駆動制御回路は、設定された基準値と比較することで電流電圧異常を検出し、上記整流装置は、上記基準値を外部から設定および変更する手段を備えることを特徴とする請求項１９に記載の整流装置。 The third drive control circuit detects a current-voltage abnormality by comparing with a set reference value, and the rectifier includes means for setting and changing the reference value from the outside. Item 20. The rectifier according to Item 19.
  22. 　上記第３の駆動制御回路は、上記検出回路に検出された上記ダイオードのアノード電位に基づいて上記電流電圧異常である過電流を検出することを特徴とする請求項１９～２１のいずれか１項に記載の整流装置。 The third drive control circuit detects an overcurrent which is the current voltage abnormality based on an anode potential of the diode detected by the detection circuit. The rectifier described in 1.
  23. 　上記第３の駆動制御回路は、外部信号を受信する手段を備え、受信した該外部信号により上記電流電圧異常を検出することを特徴とする請求項１９～２１のいずれか１項に記載の整流装置。 The rectification according to any one of claims 19 to 21, wherein the third drive control circuit includes means for receiving an external signal, and detects the current voltage abnormality based on the received external signal. apparatus.
  24. 　上記異常時遮断用ＭＯＳＦＥＴがオフ状態の時、外部に異常を報知する手段を備えたことを特徴とする請求項１９～２１のいずれか１項に記載の整流装置。 The rectifier according to any one of claims 19 to 21, further comprising means for informing the outside of the abnormality when the abnormal-time cutoff MOSFET is in an off state.
  25. 　上記第３の駆動制御回路は、上記異常時遮断用ＭＯＳＦＥＴを制御して上記２端子間の電流の導通／遮断状態を切り替える際、所定の過渡期間を設け、上記２端子間の電流値を徐々に変化させることを特徴とする請求項１９～２１のいずれか１項に記載の整流装置。 The third drive control circuit provides a predetermined transition period when controlling the abnormal cutoff MOSFET to switch the conduction / cutoff state of the current between the two terminals, and gradually changes the current value between the two terminals. The rectifier according to any one of claims 19 to 21, wherein the rectifier is changed to:
  26. 　上記所定の過渡期間のみ上記２端子間の電流を制限する電流制限回路を設け、上記第３の駆動制御回路は、上記所定の過渡期間において上記異常時遮断用ＭＯＳＦＥＴの通電率を徐々に変化させることで上記２端子間の電流値を徐々に変化させることを特徴とする請求項２５に記載の整流装置。 A current limiting circuit that limits the current between the two terminals only during the predetermined transition period is provided, and the third drive control circuit gradually changes the current supply rate of the abnormal-time cutoff MOSFET during the predetermined transition period. 26. The rectifier according to claim 25, wherein the current value between the two terminals is gradually changed.
  27. 　上記第３の駆動制御回路は、上記所定の過渡期間において、上記異常時遮断用ＭＯＳＦＥＴへの上記駆動信号の電圧を徐々に変化させることで上記２端子間の電流値を徐々に変化させることを特徴とする請求項２５に記載の整流装置。 The third drive control circuit gradually changes the current value between the two terminals by gradually changing the voltage of the drive signal to the abnormal-time cutoff MOSFET during the predetermined transition period. 26. A rectifier according to claim 25, characterized in that:
  28. 　太陽光パネルを１以上用いて発電する太陽光発電システムにおいて、
    　上記各太陽光パネルは、
    　　　直列接続された複数の太陽光発電セルと、
    　　　外部端子を陽極端子と陰極端子との２端子として、上記各太陽光発電セルにそれぞれ並列に接続される整流装置とを備え、
    　上記各整流装置は、
    　　　上記２端子間に、ソース電極を上記陽極端子側にして接続された第１のＭＯＳＦＥＴと、
    　　　上記２端子間に印加される電圧から所定の制御電圧を生成して出力する電源回路と、
    　　　上記電源回路からの制御電圧を用いて上記第１のＭＯＳＦＥＴのゲート電極に駆動信号を出力する第１の駆動制御回路と、
    　　　上記電源回路の出力に接続された電流制限用抵抗、およびアノードを該電流制限用抵抗に接続しカソードを上記陰極端子に接続したダイオードを有し、該ダイオードのアノード電位を検出する検出回路とを備え、
    　　　上記第１の駆動制御回路は、上記検出回路に検出された上記ダイオードのアノード電位から、接続された上記太陽光発電セルの異常を検出し、上記第１のＭＯＳＦＥＴをオンさせて、該整流装置により該太陽光発電セルをバイパスすることを特徴とする太陽光発電システム。     In a solar power generation system that generates power using one or more solar panels,
    Each of the above solar panels
    A plurality of photovoltaic cells connected in series;
    A rectifier connected in parallel to each of the photovoltaic power generation cells, with the external terminal as two terminals of an anode terminal and a cathode terminal,
    Each of the above rectifiers is
    A first MOSFET connected between the two terminals with the source electrode on the anode terminal side;
    A power supply circuit that generates and outputs a predetermined control voltage from the voltage applied between the two terminals;
    A first drive control circuit that outputs a drive signal to the gate electrode of the first MOSFET using a control voltage from the power supply circuit;
    A current limiting resistor connected to the output of the power supply circuit; and a detection circuit for detecting an anode potential of the diode, having a diode having an anode connected to the current limiting resistor and a cathode connected to the cathode terminal. Prepared,
    The first drive control circuit detects an abnormality of the connected photovoltaic power generation cell from the anode potential of the diode detected by the detection circuit, turns on the first MOSFET, and the rectifier A photovoltaic power generation system characterized by bypassing the photovoltaic power generation cell.
PCT/JP2009/003171 2008-07-11 2009-07-08 Rectification device and photovoltaic generation system using the same WO2010004738A1 (en)

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