WO2009152207A2 - Zinc oxide alloys and devices including the same - Google Patents

Zinc oxide alloys and devices including the same Download PDF

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Publication number
WO2009152207A2
WO2009152207A2 PCT/US2009/046845 US2009046845W WO2009152207A2 WO 2009152207 A2 WO2009152207 A2 WO 2009152207A2 US 2009046845 W US2009046845 W US 2009046845W WO 2009152207 A2 WO2009152207 A2 WO 2009152207A2
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zno
layer
based alloy
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substrate
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PCT/US2009/046845
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WO2009152207A3 (en
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Bunmi T. Adekore
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Lumenz, Inc.
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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/024—Group 12/16 materials
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02469—Group 12/16 materials
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    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02483—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02581—Transition metal or rare earth elements
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Definitions

  • the invention relates generally to zinc oxide alloys and more specifically to devices including zinc oxide alloys.
  • Zinc oxide (ZnO) materials are useful in a variety of applications, such as optoelectronic, electronic, and photonic devices.
  • opto-electronic devices such as light-emitting devices (e.g., light-emitting diodes (LEDs), laser diodes (LD)) may include heterostructures of different semiconductor alloys which enable the tailoring of the light emission wavelength and the device conversion efficiency.
  • LEDs light-emitting diodes
  • LD laser diodes
  • semiconductor alloys enable the creation of high mobility carrier confined channels layers for field-effect transistors (FETs), such as high electron mobility devices (HEMTs) and heterostructure bipolar transistors (HBTs).
  • FETs field-effect transistors
  • HEMTs high electron mobility devices
  • HBTs heterostructure bipolar transistors
  • alloys allow for the tailoring of optical properties, such as refractive index and light absorption coefficients.
  • optical properties such as refractive index and light absorption coefficients.
  • alloys of zinc oxide such as alloys including silver (Ag) and/or gold (Au) with atomic fractions greater than about 0.01, and devices, such as optoelectronic devices (e.g., LEDs, LDs) and electronic devices (e.g., FETs, HEMTs, HBTs), including such alloys are provided.
  • optoelectronic devices e.g., LEDs, LDs
  • electronic devices e.g., FETs, HEMTs, HBTs
  • a ZnO-based alloy comprises at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
  • a method of forming a ZnO-based alloy including providing a substrate, and providing a layer comprising a ZnO-based alloy on the substrate, where the ZnO-based alloy comprises at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
  • a device including a ZnO-based alloy comprising at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
  • a light-emitting device comprises a p-type layer, an n-type layer, and an active layer disposed between the n-type and p-type, wherein at least one layer selected from the group consisting of the p-type layer, the n-type layer, and the active layer comprises a ZnO-based material comprising at least calcium (Ca).
  • FIG. 1 is a bandgap versus lattice parameter diagram for ZnAgO and ZnAuO alloys
  • FIG. 2 is a cross-section of a ZnO-based epilayer deposited on a substrate
  • FIG. 3 is a cross-section of a light-emitting device, such as an LED, that can include one or more ZnO-based materials according to embodiments of the present invention
  • FIG. 4 is a cross-section of a light-emitting device, such as an LED, that can include one or more ZnO-based materials according to embodiments of the present invention
  • FIG. 5 is a cross-section of a lateral contacting geometry light-emitting device, that can include one or more ZnO-based materials according to embodiments of the present invention
  • FIG. 6 is a cross-section of a FET or HEMT device that can include one or more ZnO-based materials according to embodiments of the present invention.
  • FIG. 7 is cross-section of an HBT device that can include one or more ZnO-based materials according to embodiments of the present invention.
  • ZnO Zinc-silicon
  • Methods are presented to form ZnO alloys, and devices are provided that may include one or more of these ZnO-based alloys, including opto-electronic devices (e.g., LEDs, LDs) and electronic devices (e.g., FETs, HEMTs, HBTs).
  • opto-electronic devices e.g., LEDs, LDs
  • electronic devices e.g., FETs, HEMTs, HBTs.
  • ZnO possesses a direct bandgap of about 3.37 eV at room temperature, which with regards to light emission devices corresponds to a near-UV emission wavelength of about 368 nm.
  • alloys including ZnO which have bandgaps lower or higher than the bandgap energy of ZnO.
  • visible light having a wavelength between about 400 nm to 700 nm corresponds to photon energies ranging from about 3.1 eV to 1.7 eV.
  • the bandgap may be downshifted so as to attain energies within the above-mentioned range.
  • the bandgap may be increased by alloying ZnO with a material that has a larger bandgap than ZnO.
  • gold and silver oxides may be alloyed with ZnO in a sufficient quantity beyond doping concentrations (e.g., about 1% atomic percent concentrations) so as to provide a substantial bandgap shift as compared to ZnO itself.
  • doping concentrations e.g., about 1% atomic percent concentrations
  • some ZnO-based alloy compositions of silver and gold can possess direct bandgaps that allow for the creation of light-emitting devices, such as LEDs and LDs, that emit light at wavelengths longer than the natural emission wavelength of ZnO.
  • ZnO-based light-emitting devices including silver and/or gold oxides in the active region (e.g., quantum wells formed of such ZnO-based materials) may provide visible light emission (e.g., wavelengths between about 400 nm and 700 nm).
  • FIG. 1 is a schematic of a bandgap versus lattice parameter diagram for ZnAgO and ZnAuO alloys.
  • Certain silver oxide and/or gold oxide phases possess bandgaps as low as about 1.1 eV and 0.8 eV, respectively.
  • Such oxides may include AgO and Au 2 O, however some embodiments presented herein need not be limited to only these silver oxide and gold oxide phases.
  • Some low bandgap phases of silver and/or gold oxide e.g., having bandgaps less than about 2 eV have been found to also have direct bandgaps.
  • these materials can be used to form alloys with ZnO so as to decrease the bandgap of the resulting alloy below the bandgap of ZnO (3.37 eV) while at the same time preserving a direct bandgap.
  • the ZnO-based alloys including silver oxide and/or gold oxide may have direct bandgaps.
  • the schematic of FIG. 1 illustrates the decrease of the bandgap resulting from increasing the Ag and Au atomic fraction within a ZnO-based alloy.
  • the alloys may include an atomic fraction (x) of Ag and/or Au greater than about 1%. Typical alloying ranges for x are about 0.01 to about 0.3, and in some embodiments, x may be as large as the solubility limit of Ag and/or Au in ZnO. In some embodiments, the atomic fraction (x) of Ag and/or Au is greater than about 0.05. In some embodiments, the atomic fraction (x) of Ag and/or Au is less than about 0.3.
  • the bandgap of the ZnAgO or ZnAuO alloys can be estimated based on linear interpolation of the bandgap of ZnO and the bandgap of the Ag or Au oxide present in the ZnO-based alloy. However, it should be appreciated than the actual bandgap may be somewhat smaller due to band bowing effects.
  • a ZnO-based alloy has a bandgap of less than about 3 eV and/or greater than about 2 eV.
  • the bandgap of the ZnAgO oxide is estimated via linear interpolation to be about 3.0 eV for an Ag atomic fraction of about 0.1.
  • the bandgap of the ZnAgO oxide is estimated to be about 2.86 eV for an Ag atomic fraction of about 0.2, and about 2.64 eV for an Ag atomic fraction of about 0.3.
  • ZnO-based materials described herein may be an oxide containing Zn, examples of which include oxides of Group HA and Group HB with Zn, in addition to ZnO itself.
  • Specific examples of ZnO-based materials include ZnO, ZnMgO, ZnCaO, ZnBeO, ZnSrO, ZnBaO, ZnCdO, and alloys of these materials, such as MgCdZnO.
  • Each of the above materials may be optionally alloyed with Te, Se, and/or S.
  • each of the above materials may be alloyed with Ag and/or Au with atomic fractions in excess of 0.01, which can yield a decrease in the bandgap.
  • alloying with an element on the oxygen sub-lattice can further vary (e.g., decrease and/or increase) the bandgap of a ZnO-based material.
  • Such alloying is described in PCT publication WO 2008/073469 (PCT application serial number, PCT/US2007/025432, filed December 11, 2007) entitled "Zinc Oxide Multi- Junction Photovoltaic Cells and Optoelectronic Devices," commonly owned by the assignee and herein incorporated by reference in its entirety. Alloying with an element on the oxygen sub-lattice can further lower the bandgap of the ZnO-based material beyond what may be achieved due to the solubility limit of Ag or Au in ZnO.
  • bandgap of less than about 2 eV may be achieved. In some embodiments, the bandgap of the alloy may be greater than about 1 eV and less than about 2 eV.
  • Oxygen sub-lattice alloying elements that can result in a variation of the bandgap of a ZnO-based material can include Te, Se, and/or S.
  • a ZnO-based alloy can include at least one additional alloying element (e.g., Mg, Be, Ca, Sr, Ba, Cd, or other related elements) in addition to Attorney Docket No.: 3356/1 HWO
  • additional alloying element e.g., Mg, Be, Ca, Sr, Ba, Cd, or other related elements
  • the additional alloying element can enable the formation of a ternary or quaternary compound that may allow for greater flexibility in engineering the bandgap and/or lattice parameter(s) of the alloy, which may be useful in device structures that employ stacked semiconductor epilayers having differing bandgaps (e.g., LEDs, LDs).
  • a ternary or quaternary compound that may allow for greater flexibility in engineering the bandgap and/or lattice parameter(s) of the alloy, which may be useful in device structures that employ stacked semiconductor epilayers having differing bandgaps (e.g., LEDs, LDs).
  • the ZnO-based alloy may be a p-type conductor, an n-type conductor, or a compensated semiconductor. Since Ag and/or Au may act as acceptors in ZnO, the resulting alloy may be a natural p-type material when even only some of the Ag and/or Au atoms are activated. Additional p- type dopants may be included in the ZnO-alloy, including K, N, P, and/or other related elements. An n-type conductivity ZnO-alloy may be formed by doping or alloying with a Group III element such as Al, Ga, In, and/or other related elements.
  • a Group III element such as Al, Ga, In, and/or other related elements.
  • an n-type atomic species can be incorporated into the alloy in a sufficient quantity so as to compensate the hole concentration that results from the activated Ag and/or Au atoms.
  • Doping compensation can be used to form an n-type conductor or a compensated semiconductor where the concentration of activated p-type atoms may be about equal the concentration of activated n-type atoms.
  • ZnO-based materials can be formed as a crystalline thin film on a substrate, such as an epilayer deposited on a substrate.
  • FIG. 2 illustrates a schematic of a ZnO-based material epilayer 4 deposited on a substrate 2.
  • Epitaxial layers 4 of ZnO-based materials may be deposited onto various substrates such as ZnO, MgO, Ill-nitride (e.g., GaN, AlN), sapphire, silicon carbide, silicon, or ScAlMg substrates.
  • the substrate may be a single crystal substrate.
  • the substrate may be electrically conductive, optically conductive, and/or thermally conductive.
  • the substrate comprises a ZnO-based material, as may be the case for a ZnO substrate (e.g., a single crystal ZnO substrate) or a composite layer substrate including a ZnO-based material layer on a base substrate (e.g., sapphire, glass).
  • a ZnO substrate e.g., a single crystal ZnO substrate
  • a composite layer substrate including a ZnO-based material layer on a base substrate e.g., sapphire, glass.
  • a ZnO-based epilayer may be deposited using conventional techniques such as chemical deposition techniques (e.g., MOCVD, plasma CVD), physical deposition techniques (e.g., MBE, pulsed laser deposition, plasma assisted PLD, sputtering, Attorney Docket No.: 3356/1 HWO
  • chemical deposition techniques e.g., MOCVD, plasma CVD
  • physical deposition techniques e.g., MBE, pulsed laser deposition, plasma assisted PLD, sputtering, Attorney Docket No.: 3356/1 HWO
  • the ZnO-based material in the form of an epilayer or otherwise, may be p-doped, n-doped, undoped, or compensated.
  • the fabrication techniques overcome difficulties relating to reliably fabricating p-type ZnO materials with sufficiently high concentrations of relatively shallow acceptor impurities operating as p-type dopants.
  • the same methods used for p-type doping may also be used to prepare n-type ZnO by selection of the appropriate n-type dopants.
  • An n-type ZnO may be prepared by using dopants including Al, Ga and In, or other appropriate elements.
  • ZnO may be doped with In at concentrations ranging from approximately 1x10 12 to 1x10 20 cm " .
  • the same fabrication techniques may be used to prepare n-type, p-type, undoped, and/or compensated ZnO alloys.
  • epitaxial layers of ZnO-based materials may be doped with p-type species such as Ag, Au and K and which may have as much as 50% acceptor activation in ZnO.
  • epitaxial layers of ZnO-based materials may be doped with n-type species such as aluminum, gallium or indium.
  • the processing techniques for incorporating p-type dopants may include implanting the silver, potassium and/or gold dopants into the ZnO-based compound semiconductor layer at dose levels of greater than about 1x10 13 cm “2 and, for example, in a range from about IxIO 13 cm “2 to about IxIO 15 cm “2 .
  • This implanting step may be performed as a single implanting step or as multiple implanting steps, which may be performed at multiple different implant energy levels to thereby yield multiple implant peaks within the layer.
  • An annealing step is then performed to more evenly distribute and activate the dopants and repair crystal damage within the layer.
  • This annealing step may include annealing the ZnO-based compound semiconductor layer at a temperature in a range from about 250 0 C to about 2000 0 C, in an ambient (e.g., chemically inert ambient) having a pressure in a range from about 25 mbar to about 7 kbar. In certain applications, it may be preferable to perform the annealing step at a temperature in a range from about Attorney Docket No.: 3356/1 HWO
  • a p-type ZnO-based compound semiconductor layer may be formed using an atomic layer deposition (ALD) technique, e.g. a deposition technique that includes exposing a substrate to a combination of gases.
  • ALD atomic layer deposition
  • This combination may include a first reaction gas containing zinc at a concentration that is repeatedly transitioned (e.g. pulsed) between at least two concentration levels during a processing time interval, and a second reaction gas containing oxygen and a p-type dopant gas containing at least one p-type dopant species selected from a group consisting of silver, potassium, gold, or an n-type dopant gas, as appropriate.
  • a concentration of oxygen in the second reaction gas may be repeatedly transitioned between at least two concentration levels.
  • a concentration of zinc in the first reaction gas and a concentration of oxygen in the second reaction gas may be transitioned in an alternating sequence so that relatively high zinc concentrations in the first reaction gas overlap with relatively low oxygen concentrations in the second reaction gas and vice versa
  • Methods of forming a p-type ZnO-based compound semiconductor layer may also include using an iterative nucleation and growth technique.
  • This technique may include using an alternating sequence of deposition/growth steps that favor c-plane growth (i.e., vertical growth direction, which causes nucleation) at relatively low temperatures interleaved with a-plane growth (i.e., horizontal growth direction, which causes densification) at relatively high temperatures to coalesce the layer.
  • iterative nucleation and growth may include depositing a plurality of first ZnO-based compound semiconductor layers at a first temperature in a range from about 200 0 C to about 600 0 C and depositing a plurality of second ZnO-based compound semiconductor layers at a second higher temperature in a range from about 400 0 C to about 900 0 C.
  • first and second ZnO-based compound semiconductor layers are deposited in an alternating sequence so that a composite layer is formed.
  • Still other methods of forming a p-type ZnO-based compound semiconductor layer include exposing the substrate to a combination of a first reaction gas containing zinc, a second reaction gas containing oxygen and a p-type dopant gas containing at least Attorney Docket No.: 3356/1 HWO
  • one p-type dopant species selected from a group consisting of silver, potassium and gold, while simultaneously transitioning a temperature of the substrate between at least two temperatures.
  • These two temperatures may include a first lower temperature in a range from about 200 0 C to about 600 0 C and a second higher temperature in a range from about 400 0 C to about 900 0 C.
  • the concentration of the p-type dopant species in the p-type dopant gas is repeatedly transitioned between two concentration levels while the temperature of the substrate is also being transitioned between the two temperatures.
  • the concentration of the p-type dopant species in the p-type dopant gas is transitioned in an alternating sequence relative to the transitioning of the temperature of the substrate so that relatively high concentrations of the p-type dopant species in the p-type dopant gas overlap with relatively low temperatures of the substrate and vice versa.
  • the concentration of the p- type dopant species in the p-type dopant gas is transitioned so that relatively high temperatures of the substrate overlap with a timing of relatively high concentrations of the p-type dopant species in the p-type dopant gas.
  • one or more ZnO-based compound semiconductor layer(s) may be formed on a substrate using a chemical vapor transport technique (e.g., MOCVD).
  • This technique may include transporting concentrations of a plurality of reaction gases in a carrier gas towards a substrate that is exposed to an ambient at growth temperature(s) between 300 degrees C and 1000 degrees C. The pressure of the ambient is held in a range from about 20 Torr to about 76 Torr.
  • one or more semiconductor layers e.g., monocrystalline layers
  • Controlling the reaction can be used to control the thickness of each semiconductor layer.
  • Reaction gases may include diethylzinc for Zn, and oxygen gas for O.
  • Alternative oxygen reaction gases may include carbon dioxide, nitrous oxide, and/or nitrogen dioxide.
  • Other reaction gases may be used for additional elements present in the desired semiconductor layer, such as cyclopentadiethylmagnesium for Mg, diethylcadmium for Cd, di-tertiary-butylselenium for Se, and other reaction gases known to those of ordinary skill in the art.
  • Other reaction gases that may be employed may include ethyl chloride as an n-type dopant gas of Cl, Attorney Docket No.: 3356/1 HWO
  • a condensed matter source may be used for some doping and/or alloying elements (e.g., Ag, Au, K) to circumvent limited availability of some volatile species using conventional metalorganic transport temperatures (e.g., ⁇ 30 0 C) and equipment.
  • the source can be converted to a gas prior to transport.
  • a condensed matter source may include a source in a solid phase, a liquid phase or a semisolid phase, such as a gel.
  • a bubbler or heater containing the condensed matter source may be heated to above room temperature in order to convert the source to the gas phase.
  • the condensed matter source may, preferably, include non-halogenated and non- silylated complexes, or may include halogenated or silylated complexes.
  • the material should have sufficient vapor pressure at reasonable elevated temperatures.
  • non-halogenated or non- silylated solid sources of Ag, Au and K may have a vapor pressure ranging from about 10 ⁇ 5 to about 10 3 torr between about 30 0 C and about 200 0 C.
  • the sublimation of Au and K occurs at higher temperatures relative to Ag sublimation because of much lower volatility of their ligands.
  • Table 2 List of Halogenated or Silylated Silver and Gold Precursors Attorney Docket No.: 3356/1 HWO
  • the vapor pressure of the silver-based condensed matter source or precursor may typically be between at least about 10 ⁇ 5 to 10 3 torr.
  • the conversion of the silver-based precursors may be achieved by heating the bubbler or heater that contains one or more selected compounds (e.g., compounds containing Ag, Au, or K) to at or above the compound's sublimation temperature, but below its decomposition temperature.
  • the sublimation temperature may be between about 30 0 C to about 205 0 C and the decomposition temperature may be between about 80 0 C to about 300 0 C.
  • the heater when using silver trifluoroacetate (CF 3 COOAg) as the precursor, the heater may be uniformly heated to an elevated temperature of about 60 0 C (or higher) to ensure that significant vapor pressure of the precursor (e.g., >10 "5 torr) is achieved even though the actual sublimation temperature Of CF 3 COOAg commences at around 30 0 C in air.
  • CF 3 COOAg silver trifluoroacetate
  • the heater may be heated to a temperature of about 180 0 C (or higher) to ensure that significant vapor pressure of the precursor (e.g., ⁇ IO "1 torr) is achieved even though the actual sublimation temperature OfAcAcAgP 3 commences at around 80 0 C in air.
  • the sublimation temperatures may be marginally different in a vacuum.
  • a reaction gas comprising zinc may be provided from a zinc-based source, a reaction gas comprising oxygen may be provided from an oxygen-based source, and one or more other reactions gases supplying other elements (e.g., alloying and/or doping elements) desired in the ZnO-based material.
  • zinc-based source and the oxygen-based source are typically supplied in the gas phase, although the source may be in a solid, liquid, or semisolid phase.
  • Reaction gases including alloying and/or dopant atoms may be transported to one or more substrates located within a reactor chamber.
  • the substrate may be a wafer processed in a variety of ways and may include a variety of materials.
  • the substrate preferably includes ZnO, although other materials may be used, as previously described.
  • Transport of gas species converted from condensed matter sources may be achieved by heating gas lines to an elevated temperature in order to limit or prevent condensation of the converted species during transport prior to delivery into a reactor chamber.
  • the elevated temperature should be at least the minimum temperature of actual conversion/sublimation (e.g., 30 0 C in the case of CF 3 COOAg, 80 0 C in the case of AcAcAgP 3 ) and preferably higher.
  • the elevated temperature gas lines may be maintained at approximately the same temperature as the bubbler (e.g., 60 0 C in the case Of CF 3 COOAg, 180 0 C in the case OfAcAcAgP 3 ) or higher.
  • the heated gas lines may be maintained at about 190 0 C in the case OfAcAcAgP 3 .
  • An inert gas such as argon
  • the inert gas may be supplied into the heated bubbler through an inlet port via gas lines and allowed to exit through an outlet port into the heated gas lines.
  • the inert gas may or may not be heated to an elevated temperature in gas lines prior to entering the heater.
  • the elevated temperature gas transport lines may have valves and gauges that utilize special seals (e.g., such as polyimide and stainless steel), which may enable the flow regulation of the transported species within the temperature range of interest.
  • Gas lines transport the second gas and the third gas, respectively, to the reactor chamber.
  • the elevated temperature gas lines may be separate from the gas lines used from transporting the reaction gases of other elements (e.g., Zn and O 2 ) to prevent any premature reactions.
  • the deposition process may be conducted in the reactor chamber where the reaction gases may be combined.
  • One or more additional gases may also be used, such as multiple organometallic precursors, reaction gases, inert carrier gases, etc.
  • Control of the process gas composition may be accomplished using mass-flow controllers, valves, etc., as known by those skilled in the art.
  • the one or more substrates are typically heated to an elevated temperature in the reactor chamber.
  • pyro lysis of the precursor complexes occurs either in the gas mixture or at the surface of the substrate when the gas mixture contacts the heated substrate surface.
  • MOCVD process may be used to deposit a ZnO-based semiconductor layer including Ag and/or Au with an atomic fraction greater than about 0.01 on one or more substrates.
  • a ZnO-based compound semiconductor layer may be formed on a substrate using a molecular beam epitaxy technique.
  • the desired elements to form the ZnO-based layer may be evaporated from one or more Knudsen cells to a substrate in a partial pressure of oxygen.
  • the Ag and/or Au may be evaporated from a first Knudsen cell concurrently with the evaporation of Zn from a second Knudsen cell in a partial pressure of oxygen.
  • Additional Knudsen cell(s) can evaporate one or more other elements (e.g., Mg, Be, Ca, Sr, Ba, Cd, Te, Se, S, In, Al, Ga, or other elements) so as to form any desired ZnO-based material on the substrate.
  • the temperature of the substrate is typically held at a temperature of greater than about 300 0 C and at pressures ranging from about 25 mbar to about 700 mbar.
  • Still further embodiments may include using a physical vapor transport technique that includes transport of zinc to a substrate by evaporation, magnetron sputtering, flame hydrolysis deposition or sublimation.
  • a physical vapor transport technique that includes transport of zinc to a substrate by evaporation, magnetron sputtering, flame hydrolysis deposition or sublimation.
  • liquid phase epitaxy techniques and solvus-thermal incorporation techniques may also be used to form the ZnO-based compound semiconductor.
  • the above-mentioned techniques may be employed to produce structures and devices that employ n-type, p-type, undoped, and/or compensated ZnO-based materials (e.g., ZnO-based epilayers). These techniques use processing conditions that can yield a net p-type dopant concentration of greater than about IxIO 17 cm "3 therein, for dopants having an acceptor ionization energy below about 355 meV.
  • the processing conditions Attorney Docket No.: 3356/1 HWO
  • the dopant activation level may also yield a dopant activation level of greater than about 10% for the dopants having the desired acceptor ionization energy.
  • Devices including one or more ZnO-based materials may include optoelectronic devices (e.g., light emitting devices such as LEDs and LDs, photodetectors such as photodiodes, photovoltaics), electronic devices (e.g., FETs, HEMTs, HBTs), photonic devices, spintronic devices, and any other type of device.
  • a device may include one or more ZnO-based epilayers.
  • a device includes a ZnO-based alloy comprising at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
  • FIG. 3 is a cross-section of light-emitting device, such as an LED, that can include one or more ZnO-based materials.
  • the device may include an active layer 8 that can be sandwiched between a first conductivity-type layer 6 and a second conductivity type layer 10.
  • One or more (e.g., all) of these layers may include a ZnO-based material.
  • one or more (e.g., all) of these layers includes a ZnO-based epilayer.
  • Active layer 8 may be a bulk layer or may include one or more quantum wells (e.g., one quantum well, two quantum wells, four quantum wells, etc.) that may be separated by barrier layers.
  • the active layer 8 includes one or more ZnO-based material(s) having bandgap(s) that can emit the desired wavelength of light under application of an electrical current the light-emitting device (e.g., via device electrodes).
  • the active layer comprises a ZnO-based alloy including Ag and/or Au with an atomic fraction (x) greater than about 0.01.
  • the ZnO-based alloy including Au and/or Ag has a bandgap of less than about 3 eV (e.g., less than about 2.5 eV, less than about 2.0 eV) and thereby can generate visible light (e.g., violet light, blue light, and/or green light wavelengths) during device operation.
  • a bandgap of less than about 3 eV e.g., less than about 2.5 eV, less than about 2.0 eV
  • visible light e.g., violet light, blue light, and/or green light wavelengths
  • ZnO-based alloy layers including Ag and/or Au in the active layer may be compensated. Compensation may be accomplished by incorporating one or more n-type elements (e.g., Ga, In, Al) in an appropriate atomic fraction so as to compensate any Attorney Docket No.: 3356/1 HWO
  • the active layer may include Se and/or Te that may further facilitate the tailoring of the bandgap so as to provide a desired wavelength for the emitted light.
  • a ZnO-based alloy including Ag and/or Au in addition to Se and/or Te may provide for visible light emission, possibly less than about 2.0 eV (e.g., yellow light, amber light, and/or red light wavelengths).
  • the Au and/or Ag atomic fraction is greater than 0.05 and/or may be less than about 0.3.
  • the Se and/or Te atomic fraction may be less than about 0.3 and/or may be greater than 0.05.
  • the active layer comprises one or more quantum wells formed of ZnO-based alloys including Ag and/or Au with an atomic fraction (x) greater than about 0.01.
  • the quantum well may include Se and/or Te that may further facilitate the tailoring of the bandgap so as to provide a desired wavelength for the emitted light.
  • one or more quantum wells may be formed of a ZnO- based alloy including Ag and/or Au in addition to Se and/or Te.
  • Barrier layers for the quantum wells may be formed of any material having a larger bandgap than the quantum wells, for example, any suitable ZnO-based material may be used that has such a bandgap.
  • the barrier layers may be formed of ZnO-based alloys including Ag and/or Au with an atomic fraction that is less than the atomic fraction of Ag and/or Au in the quantum wells.
  • the quantum wells may have an Ag and/or Au atomic fraction of about 0.2 or greater (e.g., about 0.25, about 0.3) and the barrier layers may have an atomic fraction of less than about 0.2 (e.g., less than about 0.1, less than about 0.05, less than about 0.02).
  • ZnO itself or any suitable ZnO-based materials including Mg, Ca, Be, Sr, Ba, Cd, Se, Te, and/or S may be used as a barrier layer material for one or more of the quantum well barrier layers.
  • a barrier layer for the quantum well(s) may include a ZnCaO alloy.
  • First conductivity-type layer 6 and second conductivity-type layer 10 may provide carrier confinement due to bandgap differences with the active layer.
  • the bandgap of layers 6 and 10 may be larger than the bandgap of one or more layers in the active layer 8 (e.g., quantum wells and/or barrier layers).
  • Such a configuration may also ensure that layers 6 and 10 do not substantially absorb light emitted by active layer 8.
  • the first conductivity-type layer 6 may be an n-type layer and the second conductivity-type layer 10 may be a p-type layer.
  • the first conductivity- type layer 6 may be a p-type layer and the second conductivity-type layer 10 may be an n-type layer.
  • the thickness of the first conductivity-type layer 6 and/or the second conductivity-type layer 10 may range from about 0.5 ⁇ mto about 3 ⁇ m, however any other suitable thickness may also be used. Doping of the first conductivity-type layer 6 and second conductivity-type layer 10 may be achieved with various dopant elements for ZnO-based materials, as previously described.
  • doping with Ag, Au, K, and/or other suitable elements may be used to achieve p-type conductivity and doping with Al, Ga, In and/or other suitable elements may be used to achieve n-type conductivity.
  • the doping concentration of part or all of the first conductivity-type layer 6 and/or second conductivity-type layer 10 may range between from about 10 16 cm “3 to about 10 19 cm "3 , however any other suitable doping concentration may be used.
  • first conductivity-type layer 6 and the second conductivity-type layer 10 may include ZnO-based materials, such as one or more ZnO-based epilayers.
  • ZnO-based materials such as one or more ZnO-based epilayers.
  • the entire first conductivity-type layer 6 and/or the second conductivity-type layer 10 are formed of one or more ZnO-based materials.
  • Such materials may include ZnO itself or ZnO-based alloys including Mg, Ca, Be, Sr, Ba, Cd, Se, Te, and/or S.
  • At least one of the first conductivity-type layer 6, the second conductivity-type layer 10, and/or the active layer 8 may include a ZnO-based material comprising at least Ca.
  • the first conductivity-type layer 6 and/or second conductivity-type layer 10 may comprise a ZnO-based material including Ca.
  • CaO has a bandgap of about 7.7 eV and therefore may serve as a useful wide bandgap material that may be used for carrier confinement layers such as layers 6 and 10.
  • the material may take the form of an alloy such as Zn ⁇ x Ca x O where 0 ⁇ x ⁇ l (e.g., x less than about 0.5, x less than about 0.4, x less than about 0.3).
  • One or more other alloying elements e.g., Mg, Be, Sr, Ba, Cd, Se, Te, and/or S
  • Mg, Be, Sr, Ba, Cd, Se, Te, and/or S may also be present in addition to Ca thereby, for example
  • the first conductivity-type layer 6 and/or second conductivity-type layer 10 may comprise a ZnO-based material including Ca, and the Attorney Docket No.: 3356/1 HWO
  • the active layer may comprise any suitable material with a bandgap that enables the generation of visible light (e.g., between about 400 nm and about 700 nm) during device operation.
  • the active layer may comprise a ZnO-based material including Se and/or Te, and in some embodiments may take the form of a ternary compound (e.g., ZnSeO, ZnTeO) or a quaternary compound.
  • the active layer may include Cd.
  • the active layer may include Au and/or Ag with atomic fractions greater than about 0.01. One or a combination of such elements may provide for visible light emission from the light-emitting device.
  • the active layer may include a ZnO-based material including Ca and having a bandgap corresponding to UV light (e.g., UV-A, UV-B, or UV-C).
  • quantum wells may be formed with ZnO or a ZnCaO alloy to produce light emission at or above the bandgap energy of ZnO (e.g., greater than about 3.37 eV).
  • the first conductivity-type layer 6 and/or second conductivity-type layer 10 may include a ZnO-based material including Ca with a higher atomic fraction, and hence higher bandgap, than the ZnO-based material in the active layer (e.g., quantum wells in the active layer). Barriers between the quantum wells may be formed with ZnCaO having a higher Ca atomic fraction than the quantum wells.
  • a transparent conducting layer 12 may be disposed on the second conductivity-type layer 10.
  • An electrode 14 may be disposed on the transparent conducting layer 12.
  • Transparent conducting layer 12 may provide current spreading from electrode 14.
  • Electrode 14 may be formed of any suitable metal, such as Ti/ Au or the like to form an n-type contact or Ni/ Al/ Au to form a p-type contact, that may provide electrical contact (e.g., Ohmic contact) with the transparent conducting layer 12.
  • the transparent conducting layer 12 may be formed of a transparent conducting oxide. Examples of transparent conductive oxides include ZnO-based materials, In 2 O 3 , and indium tin oxide.
  • the transparent conductive layer 12 includes a transparent ZnO-based material including In, Ga, and/or Al, which can be employed to form an n-type ZnO-based transparent conductive layer 12.
  • the transparent conductive layer 12 includes a ZnO-based material including Ag and/or Au with an atomic fraction (x) greater than about 0.01.
  • the transparent conductive layer 12 may serve as a current spreading layer for the device, as Attorney Docket No.: 3356/1 HWO
  • Second conductivity-type layer 10 which in some embodiments may be a p-type or n-type ZnO-based layer, that is disposed under transparent conducting layer 12 may have a different (e.g., lower) atomic fraction of Ag or Au.
  • second conductivity-type layer 10 may be doped with Ag and/or Au at doping levels less than about 10 20 cm "3 (e.g., less than about 10 19 cm "3 , less than about 10 18 cm “3 ).
  • Transparent conducting layer 12 may have any suitable thickness, with a typical thickness of between about 0.1 ⁇ m and about 20 ⁇ m, and a preferred thickness of about 2 ⁇ m.
  • transparent conducting layer may have a textured surface so as to facilitate light extraction.
  • a thin layer of metal(s) may be disposed over a portion or all of layer 10 and may serve as a current spreading layer.
  • the thin metal layer may be formed of a semi-transparent metal such as Pd, Pt, Pd/ Au, Ni/ Au, NiO/ Au, or any other suitable metal(s) or any alloy thereof.
  • the device of FIG. 3 may include a substrate 2 comprising a ZnO-based material, wherein the p-type layer, the n-type layer and the active layer are disposed (e.g., deposited) on the substrate 2.
  • Substrate 2 may be a ZnO, MgO, Ill-nitride (e.g., GaN, AlN), sapphire, silicon carbide, silicon, or ScAlMg substrate.
  • the substrate 2 may be a single crystal substrate.
  • the substrate 2 may be electrically conductive, optically conductive, and/or thermally conductive.
  • the substrate 2 comprises a ZnO-based material.
  • Such substrates may include a ZnO single crystal substrate, a substrate including a layer of ZnO disposed on (e.g., deposited on and/or wafer bonded to) another material such as a sapphire base substrate or a glass base substrate, or any other substrate that includes a ZnO-based material.
  • the substrate 2 may be electrically conductive and may be n-doped or p-doped, thereby allowing for a backside electrical contact via an electrode 16 disposed on the backside of the substrate 2.
  • Electrode 16 may be formed of one or more metals and may provide for electrical contact to substrate 2. Additionally, electrode 16 may also serve a reflective layer that may reflect light that may be emitted by the active layer 8 and may impinge on the electrode 16.
  • Electrode 16 may include a reflective metal layer such as a layer of Ag and/or Al that may be in direct contact with the substrate backside, and one or more electrical contacting metal layer(s) in contact with the reflective metal layer.
  • electrical contacting metal layer(s) may be formed of any suitable metal(s), such as Ti/ Au or the like.
  • the device of FIG. 3 may be fabricated by depositing layers 6, 8, 10, and optionally also layer 12 on substrate 2.
  • the deposition process may include using conventional techniques such as chemical deposition techniques (e.g., MOCVD, plasma CVD) and/or physical deposition techniques (e.g., MBE), as previously described.
  • layers 6, 8, 10 and optionally also layer 12 are deposited in a single deposition process, such as an MOCVD or MBE process.
  • the transparent conductor layer 12 may be deposited separately in another deposition system after the deposition of semiconductor layers 6, 8 and 10.
  • Metal layer(s) that from electrode 16 may be deposited (e.g., evaporated and/or sputtered) on the backside of substrate 2.
  • Metal layer(s) that will form electrode 14 may be deposited (e.g., evaporated and/or sputtered) on a patterned mask disposed on the transparent conducting layer 12 and exposing a portion of layer 12. A selective etch that etches the mask may be used to remove the mask and form electrode 14 covering a desired portion of the transparent conducting layer 12.
  • Electrode 14 may cover an area of
  • a wafer including multiple die regions may be diced so as to form the die (chip) shown in the cross-section of FIG. 3.
  • substrate 2 may be lapped and optionally polished so as to reduce the thickness of the substrate (e.g., to a final thickness of about 100 ⁇ m) prior to deposition of the electrode 16 on the backside.
  • a reduced substrate thickness may minimize series resistance and/or substrate free carrier light absorption when using an electrically conductive substrate.
  • Other variations are possible, such as any modification to the contacting geometry, for example modifications to the contacting geometry when using an electrically semi-insulating or insulating substrate.
  • FIG. 4 is an illustration of a light-emitting device (e.g., LEDs, LDs) that may have cladding and contact layers on one or both sides of the active layer 8.
  • the device is similar to the light-emitting device of FIG. 3 except that the first conductivity-type layer 6 may comprise a first conductivity-type clad layer 22 and a first conductivity-type Attorney Docket No.: 3356/1 HWO
  • Contact layer 24 may have a higher doping concentration than the clad layer 22, and may be formed of the same or different semiconductor materials.
  • Second conductivity-type layer 10 may comprise a second conductivity-type clad layer 20 and a second conductivity-type contact layer 18.
  • Contact layer 18 may have a higher doping concentration than the clad layer 20, and may be formed of the same or different semiconductor materials.
  • optical waveguide layers may be included on either side of the active layer 8, so as to provide lateral waveguiding of the light within the laser cavity.
  • Such a configuration may be used in a side-emitting laser diode where the laser resonator cavity is oriented laterally along a length of the die.
  • VCSELs vertical cavity emitting laser diodes
  • Dielectric Bragg mirrors may be introduced on one or both sides of the active region to form a vertical laser cavity. Irrespective of the light-emitting device configuration, one or more of the ZnO-based materials taught herein may be incorporated in the device, for example in the active layer, clad layers, carrier confinement layers, and/or the contact layers.
  • FIG. 5 illustrates an example of light-emitting device (e.g., LED, LD) having a lateral contacting geometry.
  • the device is similar to that of FIG. 4 except that the backside substrate electrode 16 is absent and electrical contact to the first conductivity- type layer 6 is achieved via electrode 15 that may be in contact with first conductivity- type contact layer 24.
  • substrate 2 may be electrically conductive, semi-insulating, or insulating substrate.
  • Such a configuration may be flip-chip bonded onto a package sub-mount and electrical contact to the electrodes 14 and 15 may be achieved via bump bonding or any other appropriate contacting approach.
  • the device structure shown in FIG. 5 may be fabricated by performing a masked etch (e.g., dry etching or wet etching) of the wafer surface so as to expose the first conductivity-type contact layer 24 in a portion of each die.
  • Electrode 15 may be formed using metal evaporation and a lift-off process.
  • FIG. 6 is a cross-section of an electronic device that can include one or more ZnO-based materials.
  • the electronic device of FIG. 6 may include a channel layer 26 comprising one or more ZnO-based materials.
  • the channel layer 26 may include a ZnO-based alloy including Ag and/or Au with an atomic fraction greater than about 0.01.
  • the device may be a FET, HEMT, or other suitable device that includes a channel layer 26.
  • Channel layer 26 may be a single layer or may include one or more layers of different materials.
  • Channel layer 26 may include one or more buried and/or surface quantum wells that may be formed of one or more ZnO-based materials, such as any of the materials described herein.
  • Gate insulator 28 may be disposed on channel layer 26, and may be formed of any suitable insulating material, including but not limited to a semi-insulating ZnO-based material.
  • a gate 30 may be formed using any substantially electrically conductive material, and such as any suitable metal and/or conductive oxide such as transparent conductive oxide.
  • gate 30 may be formed of a transparent conductive ZnO-based material, such as a highly doped ZnO-based material (e.g., n-type or p-type).
  • the gate insulator 28 may be absent and the gate 30 may be directly in contact with the channel layer 26.
  • Source 32 and drain 34 may be doped regions that may be formed by ion implantation or diffusion of dopant atoms.
  • channel layer 26 may be a transparent layer.
  • substrate 2, gate insulator 28 and/or gate 30 may be transparent layers.
  • the device structure of FIG. 6 may be formed by the deposition of channel layer 26, gate insulator layer 28, and gate 30 on substrate 2.
  • Deposition may be performed in multiple deposition process or in a single deposition, for example using a deposition process (e.g., MOCVD) where multiple layers are formed of materials that may be deposited in a common reactor (e.g., when multiple layers are ZnO-based materials).
  • a deposition process e.g., MOCVD
  • the gate insulator 28 and/or the gate 30 may be formed with other deposition processes, such as evaporation to form a metal gate. Conventional patterning and etching processes may be used to pattern the gate insulator 28 and/or the gate 30.
  • FIG. 7 is a cross-section of an HBT that can include one or more ZnO-based materials.
  • one or more of the layers of the HBT may be formed of Attorney Docket No.: 3356/1 HWO
  • collector layer 35, base layer 36, and/or emitter layer 38 may be formed of a ZnO-based material, such as a ZnO-based alloy including Ag and/or Au with an atomic fraction greater than about 0.01.
  • Emitter electrode 44 may provide an electrical contact to emitter layer 38
  • base electrode 42 may provide an electrical contact to base layer 38
  • collector electrode 40 may provide an electrical contact to collector layer 35.
  • the HBT structure may be formed as a n/p/n stack of doped emitter, base, and collector layers, respectively, or alternatively, a p/n/p stack of doped emitter, base, and collector layers, respectively.
  • the HBT structure can be formed via deposition of semiconductor layers 35, 36, and 38 followed by conventional patterning, etching, and electrode formation processes.
  • a structure e.g., layer, region
  • it can be directly on the structure, or an intervening structure (e.g., layer, region) also may be present.
  • a structure that is “directly on” or “in contact with” another structure means that no intervening structure is present.

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Abstract

Methods of forming alloys of zinc oxide, such as alloys including silver (Ag) and/or gold (Au) with atomic fractions greater than about 1% are provided. Devices, such as opto-electronic devices (e.g., light-emitting diodes, laser diodes) and electronic devices (e.g., field-effect transistors, high-electron mobility transistors, heterojunction bipolar transistors), may include one or more of the zinc oxide alloys.

Description

Attorney Docket No.: 3356/1 HWO
ZINC OXIDE ALLOYS AND DEVICES INCLUDING THE SAME
CROSS-REFERENCE TO RELATED APPLICATIONS
This patent application claims priority to U.S. Provisional Patent Application No. 61/060,754 filed June 11, 2008, entitled ZINC OXIDE ALLOYS AND DEVICES INCLUDING THE SAME, the disclosure of which is incorporated by reference herein in its entirety.
FIELD OF INVENTION
The invention relates generally to zinc oxide alloys and more specifically to devices including zinc oxide alloys.
BACKGROUND
Zinc oxide (ZnO) materials are useful in a variety of applications, such as optoelectronic, electronic, and photonic devices. In many such applications, semiconductor alloys having different properties, especially different bandgaps and band offsets, play an important role in operation of the device. For example, opto-electronic devices such as light-emitting devices (e.g., light-emitting diodes (LEDs), laser diodes (LD)) may include heterostructures of different semiconductor alloys which enable the tailoring of the light emission wavelength and the device conversion efficiency. In the case of electronic devices, semiconductor alloys enable the creation of high mobility carrier confined channels layers for field-effect transistors (FETs), such as high electron mobility devices (HEMTs) and heterostructure bipolar transistors (HBTs). Regarding photonic devices, alloys allow for the tailoring of optical properties, such as refractive index and light absorption coefficients. Thus, semiconductor alloys play a critical role in a variety of device applications. Attorney Docket No.: 3356/1 HWO
SUMMARY OF INVENTION
Methods of forming alloys of zinc oxide, such as alloys including silver (Ag) and/or gold (Au) with atomic fractions greater than about 0.01, and devices, such as optoelectronic devices (e.g., LEDs, LDs) and electronic devices (e.g., FETs, HEMTs, HBTs), including such alloys are provided.
In one aspect, a ZnO-based alloy comprises at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
In another aspect, a method of forming a ZnO-based alloy including providing a substrate, and providing a layer comprising a ZnO-based alloy on the substrate, where the ZnO-based alloy comprises at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
In another aspect, a device including a ZnO-based alloy comprising at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
In another aspect, a light-emitting device comprises a p-type layer, an n-type layer, and an active layer disposed between the n-type and p-type, wherein at least one layer selected from the group consisting of the p-type layer, the n-type layer, and the active layer comprises a ZnO-based material comprising at least calcium (Ca).
Other aspects, embodiments and features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings. The accompanying figures are schematic and are not intended to be drawn to scale. In the figures, each identical, or substantially similar component that is illustrated in various figures is represented by a single numeral or notation. For purposes of clarity, not every component is labeled in every figure. Nor is every component of each embodiment of the invention shown where illustration is not necessary to allow those of ordinary skill in the art to understand the invention. All patent applications and patents incorporated herein by reference are incorporated by reference in their entirety. In case of conflict, the present specification, including definitions, will control. Attorney Docket No.: 3356/1 HWO
BRIEF DESCRIPTION OF DRAWINGS
FIG. 1 is a bandgap versus lattice parameter diagram for ZnAgO and ZnAuO alloys;
FIG. 2 is a cross-section of a ZnO-based epilayer deposited on a substrate;
FIG. 3 is a cross-section of a light-emitting device, such as an LED, that can include one or more ZnO-based materials according to embodiments of the present invention;
FIG. 4 is a cross-section of a light-emitting device, such as an LED, that can include one or more ZnO-based materials according to embodiments of the present invention;
FIG. 5 is a cross-section of a lateral contacting geometry light-emitting device, that can include one or more ZnO-based materials according to embodiments of the present invention;
FIG. 6 is a cross-section of a FET or HEMT device that can include one or more ZnO-based materials according to embodiments of the present invention; and
FIG. 7 is cross-section of an HBT device that can include one or more ZnO-based materials according to embodiments of the present invention.
DETAILED DESCRIPTION
Compound semiconductor alloys of ZnO, such as alloys including silver (Ag) and/or gold (Au) oxides, are presented which may possess different bandgap energies than ZnO itself. Methods are presented to form ZnO alloys, and devices are provided that may include one or more of these ZnO-based alloys, including opto-electronic devices (e.g., LEDs, LDs) and electronic devices (e.g., FETs, HEMTs, HBTs).
ZnO possesses a direct bandgap of about 3.37 eV at room temperature, which with regards to light emission devices corresponds to a near-UV emission wavelength of about 368 nm. As such, it may be desirable to form alloys including ZnO which have bandgaps lower or higher than the bandgap energy of ZnO. For example, visible light having a wavelength between about 400 nm to 700 nm corresponds to photon energies ranging from about 3.1 eV to 1.7 eV. Thus, to achieve visible light emission from a Attorney Docket No.: 3356/1 HWO
ZnO-based alloy, the bandgap may be downshifted so as to attain energies within the above-mentioned range. Conversely, to achieve light emission at wavelengths corresponding to energies greater than the bandgap of ZnO (e.g., UV wavelengths smaller than about 368 nm), the bandgap may be increased by alloying ZnO with a material that has a larger bandgap than ZnO.
In some embodiments presented herein, gold and silver oxides may be alloyed with ZnO in a sufficient quantity beyond doping concentrations (e.g., about 1% atomic percent concentrations) so as to provide a substantial bandgap shift as compared to ZnO itself. Moreover, some ZnO-based alloy compositions of silver and gold can possess direct bandgaps that allow for the creation of light-emitting devices, such as LEDs and LDs, that emit light at wavelengths longer than the natural emission wavelength of ZnO. For example, ZnO-based light-emitting devices including silver and/or gold oxides in the active region (e.g., quantum wells formed of such ZnO-based materials) may provide visible light emission (e.g., wavelengths between about 400 nm and 700 nm).
FIG. 1 is a schematic of a bandgap versus lattice parameter diagram for ZnAgO and ZnAuO alloys. Certain silver oxide and/or gold oxide phases possess bandgaps as low as about 1.1 eV and 0.8 eV, respectively. Such oxides may include AgO and Au2O, however some embodiments presented herein need not be limited to only these silver oxide and gold oxide phases. Some low bandgap phases of silver and/or gold oxide (e.g., having bandgaps less than about 2 eV) have been found to also have direct bandgaps. Thus, these materials can be used to form alloys with ZnO so as to decrease the bandgap of the resulting alloy below the bandgap of ZnO (3.37 eV) while at the same time preserving a direct bandgap. Thus, in some embodiments, the ZnO-based alloys including silver oxide and/or gold oxide may have direct bandgaps.
The schematic of FIG. 1 illustrates the decrease of the bandgap resulting from increasing the Ag and Au atomic fraction within a ZnO-based alloy. The alloys may include an atomic fraction (x) of Ag and/or Au greater than about 1%. Typical alloying ranges for x are about 0.01 to about 0.3, and in some embodiments, x may be as large as the solubility limit of Ag and/or Au in ZnO. In some embodiments, the atomic fraction (x) of Ag and/or Au is greater than about 0.05. In some embodiments, the atomic fraction (x) of Ag and/or Au is less than about 0.3. Attorney Docket No.: 3356/1 HWO
The bandgap of the ZnAgO or ZnAuO alloys can be estimated based on linear interpolation of the bandgap of ZnO and the bandgap of the Ag or Au oxide present in the ZnO-based alloy. However, it should be appreciated than the actual bandgap may be somewhat smaller due to band bowing effects. In some embodiments, a ZnO-based alloy has a bandgap of less than about 3 eV and/or greater than about 2 eV. For example, in the case of a ZnAgO alloy including an Ag oxide having a bandgap of about 1.1 eV, the bandgap of the ZnAgO oxide is estimated via linear interpolation to be about 3.0 eV for an Ag atomic fraction of about 0.1. The bandgap of the ZnAgO oxide is estimated to be about 2.86 eV for an Ag atomic fraction of about 0.2, and about 2.64 eV for an Ag atomic fraction of about 0.3.
ZnO-based materials described herein may be an oxide containing Zn, examples of which include oxides of Group HA and Group HB with Zn, in addition to ZnO itself. Specific examples of ZnO-based materials include ZnO, ZnMgO, ZnCaO, ZnBeO, ZnSrO, ZnBaO, ZnCdO, and alloys of these materials, such as MgCdZnO. Each of the above materials may be optionally alloyed with Te, Se, and/or S. Alternatively, or additionally, each of the above materials may be alloyed with Ag and/or Au with atomic fractions in excess of 0.01, which can yield a decrease in the bandgap.
In some embodiments, alloying with an element on the oxygen sub-lattice can further vary (e.g., decrease and/or increase) the bandgap of a ZnO-based material. Such alloying is described in PCT publication WO 2008/073469 (PCT application serial number, PCT/US2007/025432, filed December 11, 2007) entitled "Zinc Oxide Multi- Junction Photovoltaic Cells and Optoelectronic Devices," commonly owned by the assignee and herein incorporated by reference in its entirety. Alloying with an element on the oxygen sub-lattice can further lower the bandgap of the ZnO-based material beyond what may be achieved due to the solubility limit of Ag or Au in ZnO. In some embodiments, bandgap of less than about 2 eV may be achieved. In some embodiments, the bandgap of the alloy may be greater than about 1 eV and less than about 2 eV. Oxygen sub-lattice alloying elements that can result in a variation of the bandgap of a ZnO-based material can include Te, Se, and/or S.
In some embodiments, a ZnO-based alloy can include at least one additional alloying element (e.g., Mg, Be, Ca, Sr, Ba, Cd, or other related elements) in addition to Attorney Docket No.: 3356/1 HWO
Au and/or Ag. The additional alloying element can enable the formation of a ternary or quaternary compound that may allow for greater flexibility in engineering the bandgap and/or lattice parameter(s) of the alloy, which may be useful in device structures that employ stacked semiconductor epilayers having differing bandgaps (e.g., LEDs, LDs).
The ZnO-based alloy (e.g., including Ag and/or Au as alloying elements) may be a p-type conductor, an n-type conductor, or a compensated semiconductor. Since Ag and/or Au may act as acceptors in ZnO, the resulting alloy may be a natural p-type material when even only some of the Ag and/or Au atoms are activated. Additional p- type dopants may be included in the ZnO-alloy, including K, N, P, and/or other related elements. An n-type conductivity ZnO-alloy may be formed by doping or alloying with a Group III element such as Al, Ga, In, and/or other related elements.
In some embodiments, when some of the Ag and/or Au atoms in alloy are activated, an n-type atomic species can be incorporated into the alloy in a sufficient quantity so as to compensate the hole concentration that results from the activated Ag and/or Au atoms. Doping compensation can be used to form an n-type conductor or a compensated semiconductor where the concentration of activated p-type atoms may be about equal the concentration of activated n-type atoms.
In one or more embodiments, ZnO-based materials can be formed as a crystalline thin film on a substrate, such as an epilayer deposited on a substrate. FIG. 2 illustrates a schematic of a ZnO-based material epilayer 4 deposited on a substrate 2. Epitaxial layers 4 of ZnO-based materials may be deposited onto various substrates such as ZnO, MgO, Ill-nitride (e.g., GaN, AlN), sapphire, silicon carbide, silicon, or ScAlMg substrates. In some embodiments, the substrate may be a single crystal substrate. The substrate may be electrically conductive, optically conductive, and/or thermally conductive. In some embodiments, the substrate comprises a ZnO-based material, as may be the case for a ZnO substrate (e.g., a single crystal ZnO substrate) or a composite layer substrate including a ZnO-based material layer on a base substrate (e.g., sapphire, glass).
A ZnO-based epilayer may be deposited using conventional techniques such as chemical deposition techniques (e.g., MOCVD, plasma CVD), physical deposition techniques (e.g., MBE, pulsed laser deposition, plasma assisted PLD, sputtering, Attorney Docket No.: 3356/1 HWO
evaporation, electron beam evaporation) and the like. The ZnO-based material, in the form of an epilayer or otherwise, may be p-doped, n-doped, undoped, or compensated.
US Patent Application 11/551058 filed October 19, 2006, entitled "Zinc Oxide Based II- VI Compound Semiconductor Layers with Shallow Acceptor Conductivities and Methods of Forming Same," which is hereby incorporated in its entirety by reference herein, discloses chemical vapor deposition fabrication techniques that enable the use of ZnO compounds in various applications. The fabrication techniques overcome difficulties relating to reliably fabricating p-type ZnO materials with sufficiently high concentrations of relatively shallow acceptor impurities operating as p-type dopants. The same methods used for p-type doping may also be used to prepare n-type ZnO by selection of the appropriate n-type dopants. An n-type ZnO may be prepared by using dopants including Al, Ga and In, or other appropriate elements. By way of example, ZnO may be doped with In at concentrations ranging from approximately 1x1012 to 1x1020 cm" . The same fabrication techniques may be used to prepare n-type, p-type, undoped, and/or compensated ZnO alloys. In some embodiments, epitaxial layers of ZnO-based materials may be doped with p-type species such as Ag, Au and K and which may have as much as 50% acceptor activation in ZnO. In a similar manner, epitaxial layers of ZnO-based materials may be doped with n-type species such as aluminum, gallium or indium.
In some embodiments, the processing techniques for incorporating p-type dopants may include implanting the silver, potassium and/or gold dopants into the ZnO-based compound semiconductor layer at dose levels of greater than about 1x1013 cm"2 and, for example, in a range from about IxIO13 cm"2 to about IxIO15 cm"2. This implanting step may be performed as a single implanting step or as multiple implanting steps, which may be performed at multiple different implant energy levels to thereby yield multiple implant peaks within the layer. An annealing step is then performed to more evenly distribute and activate the dopants and repair crystal damage within the layer. This annealing step may include annealing the ZnO-based compound semiconductor layer at a temperature in a range from about 2500C to about 20000C, in an ambient (e.g., chemically inert ambient) having a pressure in a range from about 25 mbar to about 7 kbar. In certain applications, it may be preferable to perform the annealing step at a temperature in a range from about Attorney Docket No.: 3356/1 HWO
7000C to about 17000C, in an oxygen ambient environment having a pressure of about 1 atmosphere. Similar ion implantation and anneal processes can be used for n-type dopants.
In some embodiments, a p-type ZnO-based compound semiconductor layer may be formed using an atomic layer deposition (ALD) technique, e.g. a deposition technique that includes exposing a substrate to a combination of gases. This combination may include a first reaction gas containing zinc at a concentration that is repeatedly transitioned (e.g. pulsed) between at least two concentration levels during a processing time interval, and a second reaction gas containing oxygen and a p-type dopant gas containing at least one p-type dopant species selected from a group consisting of silver, potassium, gold, or an n-type dopant gas, as appropriate. A concentration of oxygen in the second reaction gas may be repeatedly transitioned between at least two concentration levels. In particular a concentration of zinc in the first reaction gas and a concentration of oxygen in the second reaction gas may be transitioned in an alternating sequence so that relatively high zinc concentrations in the first reaction gas overlap with relatively low oxygen concentrations in the second reaction gas and vice versa.
Methods of forming a p-type ZnO-based compound semiconductor layer may also include using an iterative nucleation and growth technique. This technique may include using an alternating sequence of deposition/growth steps that favor c-plane growth (i.e., vertical growth direction, which causes nucleation) at relatively low temperatures interleaved with a-plane growth (i.e., horizontal growth direction, which causes densification) at relatively high temperatures to coalesce the layer. In particular, iterative nucleation and growth may include depositing a plurality of first ZnO-based compound semiconductor layers at a first temperature in a range from about 2000C to about 6000C and depositing a plurality of second ZnO-based compound semiconductor layers at a second higher temperature in a range from about 4000C to about 9000C. These first and second ZnO-based compound semiconductor layers are deposited in an alternating sequence so that a composite layer is formed.
Still other methods of forming a p-type ZnO-based compound semiconductor layer include exposing the substrate to a combination of a first reaction gas containing zinc, a second reaction gas containing oxygen and a p-type dopant gas containing at least Attorney Docket No.: 3356/1 HWO
one p-type dopant species selected from a group consisting of silver, potassium and gold, while simultaneously transitioning a temperature of the substrate between at least two temperatures. These two temperatures may include a first lower temperature in a range from about 2000C to about 6000C and a second higher temperature in a range from about 4000C to about 9000C.
According to aspects of these embodiments, the concentration of the p-type dopant species in the p-type dopant gas is repeatedly transitioned between two concentration levels while the temperature of the substrate is also being transitioned between the two temperatures. In particular, the concentration of the p-type dopant species in the p-type dopant gas is transitioned in an alternating sequence relative to the transitioning of the temperature of the substrate so that relatively high concentrations of the p-type dopant species in the p-type dopant gas overlap with relatively low temperatures of the substrate and vice versa. Alternatively, the concentration of the p- type dopant species in the p-type dopant gas is transitioned so that relatively high temperatures of the substrate overlap with a timing of relatively high concentrations of the p-type dopant species in the p-type dopant gas.
In some embodiments, one or more ZnO-based compound semiconductor layer(s) may be formed on a substrate using a chemical vapor transport technique (e.g., MOCVD). This technique may include transporting concentrations of a plurality of reaction gases in a carrier gas towards a substrate that is exposed to an ambient at growth temperature(s) between 300 degrees C and 1000 degrees C. The pressure of the ambient is held in a range from about 20 Torr to about 76 Torr. By varying the reaction gases and/or their flow rates, one or more semiconductor layers (e.g., monocrystalline layers) having desired compositions may be deposited on the substrate. Controlling the reaction can be used to control the thickness of each semiconductor layer. Reaction gases may include diethylzinc for Zn, and oxygen gas for O. Alternative oxygen reaction gases may include carbon dioxide, nitrous oxide, and/or nitrogen dioxide. Other reaction gases may be used for additional elements present in the desired semiconductor layer, such as cyclopentadiethylmagnesium for Mg, diethylcadmium for Cd, di-tertiary-butylselenium for Se, and other reaction gases known to those of ordinary skill in the art. Other reaction gases that may be employed may include ethyl chloride as an n-type dopant gas of Cl, Attorney Docket No.: 3356/1 HWO
plasma N2 or the like as a p-type dopant gas, or any other reaction gases known in the art for providing the desired elements for deposition.
In some embodiments, a condensed matter source may be used for some doping and/or alloying elements (e.g., Ag, Au, K) to circumvent limited availability of some volatile species using conventional metalorganic transport temperatures (e.g., < 300C) and equipment. When using a condensed matter source, the source can be converted to a gas prior to transport. A condensed matter source may include a source in a solid phase, a liquid phase or a semisolid phase, such as a gel. A bubbler or heater containing the condensed matter source may be heated to above room temperature in order to convert the source to the gas phase.
The condensed matter source may, preferably, include non-halogenated and non- silylated complexes, or may include halogenated or silylated complexes. When using non-halogenated or non-silylated complexes, the material should have sufficient vapor pressure at reasonable elevated temperatures. For example, non-halogenated or non- silylated solid sources of Ag, Au and K may have a vapor pressure ranging from about 10~5 to about 103 torr between about 300C and about 2000C. Generally, the sublimation of Au and K occurs at higher temperatures relative to Ag sublimation because of much lower volatility of their ligands.
Examples of some non-halogenated and non-silylated precursors that may be used for the source are listed below in Table 1 and some halogenated or silylated precursors that may be used are listed below in Tables 2 and 3, although others may be used.
Attorney Docket No.: 3356/1 HWO
Figure imgf000012_0001
Table 1 : Non-halogenated and non-silylated precursors of Ag, Au and K
Figure imgf000012_0002
Table 2: List of Halogenated or Silylated Silver and Gold Precursors Attorney Docket No.: 3356/1 HWO
Figure imgf000013_0001
Table 3: List of Halogenated or Silylated Potassium Precursors
For example, when using silver atoms for the p-type dopant and/or an alloying element, the vapor pressure of the silver-based condensed matter source or precursor may typically be between at least about 10~5 to 103 torr. The conversion of the silver-based precursors may be achieved by heating the bubbler or heater that contains one or more selected compounds (e.g., compounds containing Ag, Au, or K) to at or above the compound's sublimation temperature, but below its decomposition temperature. For example, for some silver-based compounds, the sublimation temperature may be between about 300C to about 205 0C and the decomposition temperature may be between about 80 0C to about 3000C. For instance, when using silver trifluoroacetate (CF3COOAg) as the precursor, the heater may be uniformly heated to an elevated temperature of about 600C (or higher) to ensure that significant vapor pressure of the precursor (e.g., >10"5 torr) is achieved even though the actual sublimation temperature Of CF3COOAg commences at around 300C in air. Similarly, when using silver trialkyphosphine-acetylacetonate (AcAcAgP3) as the precursor, the heater may be heated to a temperature of about 180 0C (or higher) to ensure that significant vapor pressure of the precursor (e.g., ≥IO"1 torr) is achieved even though the actual sublimation temperature OfAcAcAgP3 commences at around 80 0C in air. As known to those skilled in the art, the sublimation temperatures may be marginally different in a vacuum.
To form a ZnO-based material layer, a reaction gas comprising zinc may be provided from a zinc-based source, a reaction gas comprising oxygen may be provided from an oxygen-based source, and one or more other reactions gases supplying other elements (e.g., alloying and/or doping elements) desired in the ZnO-based material. The Attorney Docket No.: 3356/1 HWO
zinc-based source and the oxygen-based source are typically supplied in the gas phase, although the source may be in a solid, liquid, or semisolid phase.
Reaction gases including alloying and/or dopant atoms may be transported to one or more substrates located within a reactor chamber. As known to those skilled in the art, the substrate may be a wafer processed in a variety of ways and may include a variety of materials. For ZnO-based films, the substrate preferably includes ZnO, although other materials may be used, as previously described.
Transport of gas species converted from condensed matter sources may be achieved by heating gas lines to an elevated temperature in order to limit or prevent condensation of the converted species during transport prior to delivery into a reactor chamber. The elevated temperature should be at least the minimum temperature of actual conversion/sublimation (e.g., 300C in the case of CF3COOAg, 80 0C in the case of AcAcAgP3) and preferably higher. For example, the elevated temperature gas lines may be maintained at approximately the same temperature as the bubbler (e.g., 600C in the case Of CF3COOAg, 180 0C in the case OfAcAcAgP3) or higher. For instance, the heated gas lines may be maintained at about 190 0C in the case OfAcAcAgP3.
An inert gas, such as argon, may be supplied into the heated bubbler through an inlet port via gas lines and allowed to exit through an outlet port into the heated gas lines. The inert gas may or may not be heated to an elevated temperature in gas lines prior to entering the heater. The elevated temperature gas transport lines may have valves and gauges that utilize special seals (e.g., such as polyimide and stainless steel), which may enable the flow regulation of the transported species within the temperature range of interest. Gas lines transport the second gas and the third gas, respectively, to the reactor chamber. The elevated temperature gas lines may be separate from the gas lines used from transporting the reaction gases of other elements (e.g., Zn and O2) to prevent any premature reactions.
As is known by those skilled in the art, the deposition process may be conducted in the reactor chamber where the reaction gases may be combined. One or more additional gases may also be used, such as multiple organometallic precursors, reaction gases, inert carrier gases, etc. Attorney Docket No.: 3356/1 HWO
Control of the process gas composition may be accomplished using mass-flow controllers, valves, etc., as known by those skilled in the art. The one or more substrates are typically heated to an elevated temperature in the reactor chamber. As the gases enter into the reactor, pyro lysis of the precursor complexes occurs either in the gas mixture or at the surface of the substrate when the gas mixture contacts the heated substrate surface. In some embodiments, such an MOCVD process may be used to deposit a ZnO-based semiconductor layer including Ag and/or Au with an atomic fraction greater than about 0.01 on one or more substrates.
In some embodiments, a ZnO-based compound semiconductor layer may be formed on a substrate using a molecular beam epitaxy technique. Using this technique, the desired elements to form the ZnO-based layer may be evaporated from one or more Knudsen cells to a substrate in a partial pressure of oxygen. For example, in the case of a ZnO-based material including Ag and/or Au elements (e.g., for doping and/or alloying), the Ag and/or Au may be evaporated from a first Knudsen cell concurrently with the evaporation of Zn from a second Knudsen cell in a partial pressure of oxygen. Additional Knudsen cell(s) can evaporate one or more other elements (e.g., Mg, Be, Ca, Sr, Ba, Cd, Te, Se, S, In, Al, Ga, or other elements) so as to form any desired ZnO-based material on the substrate. The temperature of the substrate is typically held at a temperature of greater than about 3000C and at pressures ranging from about 25 mbar to about 700 mbar.
Still further embodiments may include using a physical vapor transport technique that includes transport of zinc to a substrate by evaporation, magnetron sputtering, flame hydrolysis deposition or sublimation. Alternatively, liquid phase epitaxy techniques and solvus-thermal incorporation techniques may also be used to form the ZnO-based compound semiconductor.
The above-mentioned techniques may be employed to produce structures and devices that employ n-type, p-type, undoped, and/or compensated ZnO-based materials (e.g., ZnO-based epilayers). These techniques use processing conditions that can yield a net p-type dopant concentration of greater than about IxIO17 cm"3 therein, for dopants having an acceptor ionization energy below about 355 meV. The processing conditions Attorney Docket No.: 3356/1 HWO
may also yield a dopant activation level of greater than about 10% for the dopants having the desired acceptor ionization energy.
Devices including one or more ZnO-based materials may include optoelectronic devices (e.g., light emitting devices such as LEDs and LDs, photodetectors such as photodiodes, photovoltaics), electronic devices (e.g., FETs, HEMTs, HBTs), photonic devices, spintronic devices, and any other type of device. In some embodiments, a device may include one or more ZnO-based epilayers. In some embodiments, a device includes a ZnO-based alloy comprising at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
FIG. 3 is a cross-section of light-emitting device, such as an LED, that can include one or more ZnO-based materials. Although the structure is described in the context of a light-emitting device, it should be appreciated that such a structure or similar structures may also be used in other opto-electronic devices, such a photodiodes, photovoltaics, or the like. The device may include an active layer 8 that can be sandwiched between a first conductivity-type layer 6 and a second conductivity type layer 10. One or more (e.g., all) of these layers may include a ZnO-based material. In some embodiments, one or more (e.g., all) of these layers includes a ZnO-based epilayer.
Active layer 8 may be a bulk layer or may include one or more quantum wells (e.g., one quantum well, two quantum wells, four quantum wells, etc.) that may be separated by barrier layers. In some embodiments, the active layer 8 includes one or more ZnO-based material(s) having bandgap(s) that can emit the desired wavelength of light under application of an electrical current the light-emitting device (e.g., via device electrodes). In one embodiment, the active layer comprises a ZnO-based alloy including Ag and/or Au with an atomic fraction (x) greater than about 0.01. In some embodiments, the ZnO-based alloy including Au and/or Ag has a bandgap of less than about 3 eV (e.g., less than about 2.5 eV, less than about 2.0 eV) and thereby can generate visible light (e.g., violet light, blue light, and/or green light wavelengths) during device operation.
ZnO-based alloy layers including Ag and/or Au in the active layer may be compensated. Compensation may be accomplished by incorporating one or more n-type elements (e.g., Ga, In, Al) in an appropriate atomic fraction so as to compensate any Attorney Docket No.: 3356/1 HWO
activated Ag and/or Au atoms. In some embodiments, the active layer may include Se and/or Te that may further facilitate the tailoring of the bandgap so as to provide a desired wavelength for the emitted light. For example, a ZnO-based alloy including Ag and/or Au in addition to Se and/or Te may provide for visible light emission, possibly less than about 2.0 eV (e.g., yellow light, amber light, and/or red light wavelengths). In some embodiments, the Au and/or Ag atomic fraction is greater than 0.05 and/or may be less than about 0.3. The Se and/or Te atomic fraction may be less than about 0.3 and/or may be greater than 0.05.
In some embodiments, the active layer comprises one or more quantum wells formed of ZnO-based alloys including Ag and/or Au with an atomic fraction (x) greater than about 0.01. In some embodiments, the quantum well may include Se and/or Te that may further facilitate the tailoring of the bandgap so as to provide a desired wavelength for the emitted light. For example, one or more quantum wells may be formed of a ZnO- based alloy including Ag and/or Au in addition to Se and/or Te.
Barrier layers for the quantum wells may be formed of any material having a larger bandgap than the quantum wells, for example, any suitable ZnO-based material may be used that has such a bandgap. The barrier layers may be formed of ZnO-based alloys including Ag and/or Au with an atomic fraction that is less than the atomic fraction of Ag and/or Au in the quantum wells. For example, the quantum wells may have an Ag and/or Au atomic fraction of about 0.2 or greater (e.g., about 0.25, about 0.3) and the barrier layers may have an atomic fraction of less than about 0.2 (e.g., less than about 0.1, less than about 0.05, less than about 0.02). Alternatively, or additionally, ZnO itself or any suitable ZnO-based materials including Mg, Ca, Be, Sr, Ba, Cd, Se, Te, and/or S may be used as a barrier layer material for one or more of the quantum well barrier layers. In some embodiments, a barrier layer for the quantum well(s) may include a ZnCaO alloy.
First conductivity-type layer 6 and second conductivity-type layer 10 may provide carrier confinement due to bandgap differences with the active layer. For example, the bandgap of layers 6 and 10 may be larger than the bandgap of one or more layers in the active layer 8 (e.g., quantum wells and/or barrier layers). Such a configuration may also ensure that layers 6 and 10 do not substantially absorb light emitted by active layer 8. Attorney Docket No.: 3356/1 HWO
The first conductivity-type layer 6 may be an n-type layer and the second conductivity-type layer 10 may be a p-type layer. Alternatively, the first conductivity- type layer 6 may be a p-type layer and the second conductivity-type layer 10 may be an n-type layer. The thickness of the first conductivity-type layer 6 and/or the second conductivity-type layer 10 may range from about 0.5 μmto about 3 μm, however any other suitable thickness may also be used. Doping of the first conductivity-type layer 6 and second conductivity-type layer 10 may be achieved with various dopant elements for ZnO-based materials, as previously described. For example, doping with Ag, Au, K, and/or other suitable elements may be used to achieve p-type conductivity and doping with Al, Ga, In and/or other suitable elements may be used to achieve n-type conductivity. The doping concentration of part or all of the first conductivity-type layer 6 and/or second conductivity-type layer 10 may range between from about 1016 cm"3 to about 1019 cm"3, however any other suitable doping concentration may be used.
One or both of the first conductivity-type layer 6 and the second conductivity-type layer 10 may include ZnO-based materials, such as one or more ZnO-based epilayers. In some embodiment, the entire first conductivity-type layer 6 and/or the second conductivity-type layer 10 are formed of one or more ZnO-based materials. Such materials may include ZnO itself or ZnO-based alloys including Mg, Ca, Be, Sr, Ba, Cd, Se, Te, and/or S.
In some embodiments, at least one of the first conductivity-type layer 6, the second conductivity-type layer 10, and/or the active layer 8 may include a ZnO-based material comprising at least Ca. In one embodiment, the first conductivity-type layer 6 and/or second conductivity-type layer 10 may comprise a ZnO-based material including Ca. CaO has a bandgap of about 7.7 eV and therefore may serve as a useful wide bandgap material that may be used for carrier confinement layers such as layers 6 and 10. The material may take the form of an alloy such as Zn^xCaxO where 0<x<l (e.g., x less than about 0.5, x less than about 0.4, x less than about 0.3). One or more other alloying elements (e.g., Mg, Be, Sr, Ba, Cd, Se, Te, and/or S) may also be present in addition to Ca thereby, for example, forming a quaternary compound.
In some embodiments, the first conductivity-type layer 6 and/or second conductivity-type layer 10 may comprise a ZnO-based material including Ca, and the Attorney Docket No.: 3356/1 HWO
active layer may comprise any suitable material with a bandgap that enables the generation of visible light (e.g., between about 400 nm and about 700 nm) during device operation. The active layer may comprise a ZnO-based material including Se and/or Te, and in some embodiments may take the form of a ternary compound (e.g., ZnSeO, ZnTeO) or a quaternary compound. Alternatively or additionally, the active layer may include Cd. Also, as previously described, the active layer may include Au and/or Ag with atomic fractions greater than about 0.01. One or a combination of such elements may provide for visible light emission from the light-emitting device.
In some applications, the active layer may include a ZnO-based material including Ca and having a bandgap corresponding to UV light (e.g., UV-A, UV-B, or UV-C). For example, quantum wells may be formed with ZnO or a ZnCaO alloy to produce light emission at or above the bandgap energy of ZnO (e.g., greater than about 3.37 eV). In such devices, the first conductivity-type layer 6 and/or second conductivity-type layer 10 may include a ZnO-based material including Ca with a higher atomic fraction, and hence higher bandgap, than the ZnO-based material in the active layer (e.g., quantum wells in the active layer). Barriers between the quantum wells may be formed with ZnCaO having a higher Ca atomic fraction than the quantum wells.
In some embodiments, a transparent conducting layer 12 may be disposed on the second conductivity-type layer 10. An electrode 14 may be disposed on the transparent conducting layer 12. Transparent conducting layer 12 may provide current spreading from electrode 14. Electrode 14 may be formed of any suitable metal, such as Ti/ Au or the like to form an n-type contact or Ni/ Al/ Au to form a p-type contact, that may provide electrical contact (e.g., Ohmic contact) with the transparent conducting layer 12. In some embodiments, the transparent conducting layer 12 may be formed of a transparent conducting oxide. Examples of transparent conductive oxides include ZnO-based materials, In2O3, and indium tin oxide. In one embodiment, the transparent conductive layer 12 includes a transparent ZnO-based material including In, Ga, and/or Al, which can be employed to form an n-type ZnO-based transparent conductive layer 12. In some embodiments, the transparent conductive layer 12 includes a ZnO-based material including Ag and/or Au with an atomic fraction (x) greater than about 0.01. The transparent conductive layer 12 may serve as a current spreading layer for the device, as Attorney Docket No.: 3356/1 HWO
is understood by those of skill in the art. Second conductivity-type layer 10, which in some embodiments may be a p-type or n-type ZnO-based layer, that is disposed under transparent conducting layer 12 may have a different (e.g., lower) atomic fraction of Ag or Au. For example, second conductivity-type layer 10 may be doped with Ag and/or Au at doping levels less than about 1020 cm"3 (e.g., less than about 1019 cm"3, less than about 1018 cm"3). Transparent conducting layer 12 may have any suitable thickness, with a typical thickness of between about 0.1 μm and about 20 μm, and a preferred thickness of about 2 μm. In some embodiments, transparent conducting layer may have a textured surface so as to facilitate light extraction. Alternatively, a thin layer of metal(s) may be disposed over a portion or all of layer 10 and may serve as a current spreading layer. The thin metal layer may be formed of a semi-transparent metal such as Pd, Pt, Pd/ Au, Ni/ Au, NiO/ Au, or any other suitable metal(s) or any alloy thereof.
The device of FIG. 3 may include a substrate 2 comprising a ZnO-based material, wherein the p-type layer, the n-type layer and the active layer are disposed (e.g., deposited) on the substrate 2. Substrate 2 may be a ZnO, MgO, Ill-nitride (e.g., GaN, AlN), sapphire, silicon carbide, silicon, or ScAlMg substrate. In some embodiments, the substrate 2 may be a single crystal substrate. The substrate 2 may be electrically conductive, optically conductive, and/or thermally conductive. In some embodiments, the substrate 2 comprises a ZnO-based material. Examples of such substrates may include a ZnO single crystal substrate, a substrate including a layer of ZnO disposed on (e.g., deposited on and/or wafer bonded to) another material such as a sapphire base substrate or a glass base substrate, or any other substrate that includes a ZnO-based material.
The substrate 2 may be electrically conductive and may be n-doped or p-doped, thereby allowing for a backside electrical contact via an electrode 16 disposed on the backside of the substrate 2. Electrode 16 may be formed of one or more metals and may provide for electrical contact to substrate 2. Additionally, electrode 16 may also serve a reflective layer that may reflect light that may be emitted by the active layer 8 and may impinge on the electrode 16. Electrode 16 may include a reflective metal layer such as a layer of Ag and/or Al that may be in direct contact with the substrate backside, and one or more electrical contacting metal layer(s) in contact with the reflective metal layer. The Attorney Docket No.: 3356/1 HWO
electrical contacting metal layer(s) may be formed of any suitable metal(s), such as Ti/ Au or the like.
The device of FIG. 3 may be fabricated by depositing layers 6, 8, 10, and optionally also layer 12 on substrate 2. The deposition process may include using conventional techniques such as chemical deposition techniques (e.g., MOCVD, plasma CVD) and/or physical deposition techniques (e.g., MBE), as previously described. In a preferred embodiment, layers 6, 8, 10 and optionally also layer 12 are deposited in a single deposition process, such as an MOCVD or MBE process. Alternatively, the transparent conductor layer 12 may be deposited separately in another deposition system after the deposition of semiconductor layers 6, 8 and 10.
Metal layer(s) that from electrode 16 may be deposited (e.g., evaporated and/or sputtered) on the backside of substrate 2. Metal layer(s) that will form electrode 14 may be deposited (e.g., evaporated and/or sputtered) on a patterned mask disposed on the transparent conducting layer 12 and exposing a portion of layer 12. A selective etch that etches the mask may be used to remove the mask and form electrode 14 covering a desired portion of the transparent conducting layer 12. Electrode 14 may cover an area of
0 0 0 about 50 μm to about 400 μm , with a preferred area being about 100x100 μm . A wafer including multiple die regions may be diced so as to form the die (chip) shown in the cross-section of FIG. 3.
Various modifications to the above processes and device structure are possible. For example, substrate 2 may be lapped and optionally polished so as to reduce the thickness of the substrate (e.g., to a final thickness of about 100 μm) prior to deposition of the electrode 16 on the backside. A reduced substrate thickness may minimize series resistance and/or substrate free carrier light absorption when using an electrically conductive substrate. Other variations are possible, such as any modification to the contacting geometry, for example modifications to the contacting geometry when using an electrically semi-insulating or insulating substrate.
FIG. 4 is an illustration of a light-emitting device (e.g., LEDs, LDs) that may have cladding and contact layers on one or both sides of the active layer 8. The device is similar to the light-emitting device of FIG. 3 except that the first conductivity-type layer 6 may comprise a first conductivity-type clad layer 22 and a first conductivity-type Attorney Docket No.: 3356/1 HWO
contact layer 24. Contact layer 24 may have a higher doping concentration than the clad layer 22, and may be formed of the same or different semiconductor materials. Second conductivity-type layer 10 may comprise a second conductivity-type clad layer 20 and a second conductivity-type contact layer 18. Contact layer 18 may have a higher doping concentration than the clad layer 20, and may be formed of the same or different semiconductor materials.
When the device is a laser diode, optical waveguide layers (not shown) may be included on either side of the active layer 8, so as to provide lateral waveguiding of the light within the laser cavity. Such a configuration may be used in a side-emitting laser diode where the laser resonator cavity is oriented laterally along a length of the die. However, for other types of lasers, such as a vertical cavity emitting laser diodes (VCSELs), other configurations may be used and the above-mentioned optical waveguide layers on either side of the active layer may be omitted or modified. Dielectric Bragg mirrors may be introduced on one or both sides of the active region to form a vertical laser cavity. Irrespective of the light-emitting device configuration, one or more of the ZnO-based materials taught herein may be incorporated in the device, for example in the active layer, clad layers, carrier confinement layers, and/or the contact layers.
FIG. 5 illustrates an example of light-emitting device (e.g., LED, LD) having a lateral contacting geometry. The device is similar to that of FIG. 4 except that the backside substrate electrode 16 is absent and electrical contact to the first conductivity- type layer 6 is achieved via electrode 15 that may be in contact with first conductivity- type contact layer 24. In such an electrical contacting geometry, substrate 2 may be electrically conductive, semi-insulating, or insulating substrate. Such a configuration may be flip-chip bonded onto a package sub-mount and electrical contact to the electrodes 14 and 15 may be achieved via bump bonding or any other appropriate contacting approach.
The device structure shown in FIG. 5 may be fabricated by performing a masked etch (e.g., dry etching or wet etching) of the wafer surface so as to expose the first conductivity-type contact layer 24 in a portion of each die. Electrode 15 may be formed using metal evaporation and a lift-off process. Attorney Docket No.: 3356/1 HWO
FIG. 6 is a cross-section of an electronic device that can include one or more ZnO-based materials. The electronic device of FIG. 6 may include a channel layer 26 comprising one or more ZnO-based materials. In some embodiments, the channel layer 26 may include a ZnO-based alloy including Ag and/or Au with an atomic fraction greater than about 0.01. The device may be a FET, HEMT, or other suitable device that includes a channel layer 26. Channel layer 26 may be a single layer or may include one or more layers of different materials. Channel layer 26 may include one or more buried and/or surface quantum wells that may be formed of one or more ZnO-based materials, such as any of the materials described herein.
Gate insulator 28 may be disposed on channel layer 26, and may be formed of any suitable insulating material, including but not limited to a semi-insulating ZnO-based material. A gate 30 may be formed using any substantially electrically conductive material, and such as any suitable metal and/or conductive oxide such as transparent conductive oxide. In some embodiments, gate 30 may be formed of a transparent conductive ZnO-based material, such as a highly doped ZnO-based material (e.g., n-type or p-type). In some embodiments, the gate insulator 28 may be absent and the gate 30 may be directly in contact with the channel layer 26.
Source 32 and drain 34 may be doped regions that may be formed by ion implantation or diffusion of dopant atoms. In some embodiments, channel layer 26 may be a transparent layer. Additionally, or alternatively, substrate 2, gate insulator 28 and/or gate 30 may be transparent layers.
The device structure of FIG. 6 may be formed by the deposition of channel layer 26, gate insulator layer 28, and gate 30 on substrate 2. Deposition may be performed in multiple deposition process or in a single deposition, for example using a deposition process (e.g., MOCVD) where multiple layers are formed of materials that may be deposited in a common reactor (e.g., when multiple layers are ZnO-based materials). Alternatively, the gate insulator 28 and/or the gate 30 may be formed with other deposition processes, such as evaporation to form a metal gate. Conventional patterning and etching processes may be used to pattern the gate insulator 28 and/or the gate 30.
FIG. 7 is a cross-section of an HBT that can include one or more ZnO-based materials. In some embodiments, one or more of the layers of the HBT may be formed of Attorney Docket No.: 3356/1 HWO
one or more ZnO-based materials including Ag and/or Au with an atomic fraction greater than about 0.01. For example, collector layer 35, base layer 36, and/or emitter layer 38 may be formed of a ZnO-based material, such as a ZnO-based alloy including Ag and/or Au with an atomic fraction greater than about 0.01. Emitter electrode 44 may provide an electrical contact to emitter layer 38, base electrode 42 may provide an electrical contact to base layer 38, and collector electrode 40 may provide an electrical contact to collector layer 35. As is well known, the HBT structure may be formed as a n/p/n stack of doped emitter, base, and collector layers, respectively, or alternatively, a p/n/p stack of doped emitter, base, and collector layers, respectively. The HBT structure can be formed via deposition of semiconductor layers 35, 36, and 38 followed by conventional patterning, etching, and electrode formation processes.
As used herein, when a structure (e.g., layer, region) is referred to as being "on", "over" "overlying" or "supported by" another structure, it can be directly on the structure, or an intervening structure (e.g., layer, region) also may be present. A structure that is "directly on" or "in contact with" another structure means that no intervening structure is present.
Having thus described several aspects of at least one embodiment of this invention, it is to be appreciated various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and scope of the invention. Accordingly, the foregoing description and drawings are by way of example only.

Claims

Attorney Docket No.: 3356/1 HWOCLAIMSWhat is claimed is:
1. A ZnO-based alloy comprising at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
2. The ZnO-based alloy of claim 1, wherein 0.05≤x≤0.3.
3. The ZnO-based alloy of claim 1 , wherein the ZnO-based alloy has a bandgap of less than about 3 eV.
4. The ZnO-based alloy of claim 3, wherein the ZnO-based alloy has a bandgap of greater than about 2 eV.
5. The ZnO-based alloy of claim 1 , wherein the ZnO-based alloy has a direct bandgap.
6. The ZnO-based alloy of claim 1 , wherein the ZnO-based alloy is a p-type conductor material.
7. The ZnO-based alloy of claim 6, wherein the ZnO-based alloy is doped with a p-type dopant selected from the group consisting of K and N.
8. The ZnO-based alloy of claim 1 , wherein the ZnO-based alloy is an n-type conductor material.
9. The ZnO-based alloy of claim 8, wherein the ZnO-based alloy is doped with an n- type dopant selected from the group consisting of Al, Ga, and In.
10. The ZnO-based alloy of claim 1, further comprising at least one additional element selected from the group consisting of Mg, Be, Ca, Sr, Ba, and Cd. Attorney Docket No.: 3356/1 HWO
11. The ZnO-based alloy of claim 1 , further comprising at least one additional element selected from the group consisting of Te, Se, and S.
12. A device including a ZnO-based alloy comprising at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
13. The device of claim 12, further comprising a current spreading layer including the ZnO-based alloy, wherein the current spreading layer is disposed over a p-type or n- type layer having a different atomic fraction of the at least one element than that of the ZnO-based alloy.
14. The device of claim 12, wherein the device is an optoelectronic device.
15. The device of claim 14, wherein the device is a light-emitting device.
16. The device of claim 15, further comprising: a p-type layer; an n-type layer; and an active layer disposed between the p-type layer and the n-type layer.
17. The device of claim 16, wherein the active layer comprises the ZnO-based alloy comprising at least one element selected from the group consisting of Ag and Au.
18. The device of claim 17, wherein the n-type layer and the p-type layer comprise a ZnO-based material.
19. The device of claim 16, further comprising a substrate comprising a ZnO-based material, wherein the p-type layer, the n-type layer and the active layer are disposed on the substrate. Attorney Docket No.: 3356/1 HWO
20. The device of claim 19, wherein the substrate is a ZnO substrate.
21. The device of claim 12, wherein the ZnO-based alloy has a bandgap of less than about 3 eV.
22. The device of claim 12, wherein the device is an electronic device.
23. The device of claim 22, wherein the electronic device comprises a channel layer comprising the ZnO-based alloy comprising at least one element selected from the group consisting of Ag and Au.
24. A method of forming a ZnO-based alloy, the method comprising: providing a substrate; and providing a layer comprising a ZnO-based alloy on the substrate, where the ZnO-based alloy comprises at least one element selected from the group consisting of Ag and Au, where an atomic fraction (x) of the at least one element is greater than about 0.01.
25. The method of claim 24, wherein providing the layer comprising the ZnO-based alloy comprises depositing the layer by a metal organic chemical vapor deposition (MOCVD) process.
26. The method of claim 24, wherein the substrate comprises a ZnO-based material.
27. A light-emitting device comprising: a p-type layer; an n-type layer; and an active layer disposed between the n-type and p-type, Attorney Docket No.: 3356/1 HWO
wherein at least one layer selected from the group consisting of the p-type layer, the n-type layer, and the active layer comprises a ZnO-based material comprising at least Ca.
28. The light-emitting device of claim 27, wherein the n-type layer and/or the p-type layer comprise a ZnO-based material comprising at least Ca.
29. The light-emitting device of claim 27, wherein the ZnO-based material has a composition given by ZnxCa^xO where 0<x<l.
30. The light-emitting device of claim 27, wherein the active layer comprises a ZnO- based material comprising at least one element selected from the group consisting of Se and Te.
31. The light-emitting device of claim 30, wherein the ZnO-based material comprising at least one element selected from the group consisting of Se and Te is a quaternary compound semiconductor.
32. The light-emitting device of claim 27, wherein the active layer comprises a ZnO- based material comprising Cd.
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