WO2009149651A1 - Variable resistor array and channel selection filter - Google Patents

Variable resistor array and channel selection filter Download PDF

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Publication number
WO2009149651A1
WO2009149651A1 PCT/CN2009/072179 CN2009072179W WO2009149651A1 WO 2009149651 A1 WO2009149651 A1 WO 2009149651A1 CN 2009072179 W CN2009072179 W CN 2009072179W WO 2009149651 A1 WO2009149651 A1 WO 2009149651A1
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Prior art keywords
resistor
variable
series
resistance
resistor array
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PCT/CN2009/072179
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French (fr)
Chinese (zh)
Inventor
白承昊
郑圣宪
黄明运
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慧帝科技(深圳)有限公司
慧荣科技股份有限公司
芯光飞株式会社
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Publication of WO2009149651A1 publication Critical patent/WO2009149651A1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/04—Frequency selective two-port networks
    • H03H11/12—Frequency selective two-port networks using amplifiers with feedback
    • H03H11/1291—Current or voltage controlled filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/24—Frequency- independent attenuators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/04—Frequency selective two-port networks
    • H03H11/0422—Frequency selective two-port networks using transconductance amplifiers, e.g. gmC filters
    • H03H11/0472—Current or voltage controlled filters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers

Definitions

  • the present invention relates to a resistor array and a channel selection filter, and more particularly to a variable resistor array and a channel selection filter including the variable resistor array.
  • Channel selection filters are widely used in a variety of integrated circuits based primarily on wired and wireless mobile communication receivers. Especially in wireless mobile communication receivers, in order to achieve integration of various communication specifications and improve receiver performance, the channel selection filter is required to have a wide band width and gain. For example, DVB-H (Digital Video Broadcasting-Handheld), which is a mobile broadcast receiving technology, requires 4 MHz, 3.5 MHz, 3 MHz, and 2.5 MHz, and T-DMB (Terrestrial Digital Multimedia Broadcasting) requires 785 KHz, etc. In order to meet these different communication specifications, a channel selection filter capable of changing the band width wider is required.
  • DVB-H Digital Video Broadcasting-Handheld
  • T-DMB Transmissionrestrial Digital Multimedia Broadcasting
  • Figure 1 is a block diagram of a conventional receiver.
  • the receiver 100 includes an antenna 101, a low noise amplifier 102, a frequency converter 103, a channel selection filter 104, and a variable gain amplifier (Programmable Gain Amplifier) 105. .
  • the receiver 100 receives the UHF signal through the antenna 101. After the received signal is amplified by the low noise amplifier 102, the frequency of the signal is reduced by the frequency converter 103, and the jamming signal is filtered by the channel selection filter 104. After the variable gain amplifier 105 amplifies, a certain output signal is generated.
  • Figure 2 shows the channel selection using a biquad operational amplifier (Operational Amplifier). Select the circuit diagram of the filter.
  • the transfer function of the channel selection filter 104 can be expressed as Equation 1.
  • the gain of the channel selection filter 104 at the direct current (DC), after substituting O(zero) into the variable S in the equation 1, can be expressed as Equation 2.
  • the frequency characteristic of the channel selection filter 104 is determined by the product of a resistor and a capacitor. Referring to Equation 2, the gain (Gain) of the channel selection filter 104 is determined by the ratio of two resistors (R1, R2).
  • the band width of the channel selection filter 104 can be adjusted as long as the values of the resistance and capacitance are adjusted. In most integrated circuits, since the area of the resistor is smaller than the capacitance, it is effective to determine the approximate band width by the resistor first, and then determine the precise band width by the capacitor. In this case, the frequency characteristics are not changed only when all the resistance values change at the same ratio.
  • the resistance and capacitance vary by up to 20% depending on the process and temperature, so the common channel selection filter is automatically corrected. (calibmtkm) to bring the product of resistance and capacitance to the desired value. Therefore, only the approximate range of the resistance value and the capacitance value can be known, and an accurate value cannot be obtained.
  • the resistance value of each resistor changes, and the resistance value of the second resistor (R2) also changes, but the first need to be increased or decreased due to the change in gain cannot be accurately controlled.
  • the resistance value of the resistor R1 therefore, cannot achieve a channel selection filter that achieves both a wide band amplitude variation and a large gain variation.
  • a variable resistor array according to the present invention comprises a base resistor, a first resistor array, a second resistor array, an Nth resistor array, and a plurality of switches.
  • the first resistor array is composed of M (M is an integer:) resistors connected in parallel, and the total resistance of the resistors connected in parallel is the same as the resistance of the base resistor.
  • the second resistor array is composed of M resistors connected in parallel, and the total resistance of the resistors connected in parallel is twice the total resistance of the first resistor array.
  • the Nth resistor array is composed of M resistors connected in parallel, and the total resistance of the resistors connected in parallel is twice the total resistance of the (N-1, N is an integer:) resistor array.
  • the base resistor, the first resistor array, the second resistor array to the Nth resistor array are connected in parallel with each other, and one terminal of the plurality of switches is respectively connected to the resistors connected in parallel
  • the common node, the other terminals are connected in common, and are opened and closed in response to the variable resistance control signals, respectively.
  • a channel selection filter capable of changing a band width and a gain includes: at least one operational amplifier; an output terminal connected to the at least one operational amplifier a plurality of variable resistors whose resistance values are changed in response to the variable resistance control signal; and a plurality of resistors connected to the input and output terminals of the operational amplifier and whose capacitance values are changed in response to the variable capacitance control signal Variable capacitance.
  • the plurality of variable resistors respectively include a base resistor, a first resistor array having a total resistance of the resistors connected in parallel and a base resistor having the same resistance of M (M is an integer:) resistors connected in parallel, a second resistor array composed of M resistors connected in parallel, and having a total resistance of twice the total resistance of the first resistor array, and M resistors connected in parallel, and having a total resistance of (N-1, N is an integer N) an Nth resistor array twice the total resistance of the resistor array, and a plurality of switches.
  • M is an integer:
  • the base resistor, the first resistor array, the second resistor array to the Nth resistor array are connected in parallel with each other, and one terminal of the plurality of switches is respectively connected to a common node of the parallel connected resistors,
  • the other terminals are connected in common and open and close in response to a variable resistance control signal, and one terminal of each variable resistor is connected to the two terminals of the base resistor and is not connected to the first resistor array.
  • the invention has the advantages that the required resistance value can be obtained by changing, and the channel selection filter of the variable resistance array according to the present invention is adopted, and the resistances increased by the same ratio are expressed as the resistances distributed by the same amount, thereby A wide band width and gain are achieved by simple addition and subtraction of digital codes. In addition, depending on the required range of band width and gain variation, it is free to expand without the expense of adding hardware.
  • Figure 1 is a block diagram of an existing receiver
  • FIG. 2 is a circuit diagram of a channel selection filter using a biquad operational amplifier (Operational Amplifier);
  • Figure 5 is a circuit diagram of a variable capacitance value array;
  • Figure 6 shows a conventional correction circuit
  • Fig. 7 is a diagram showing the corrected output state of the correction circuit shown in Fig. 6 as a function of the switching state. detailed description
  • Figure 3 illustrates a variable resistance array of the present invention.
  • the variable resistor array 300 has a base group resistance (Ru:), a group 0 group resistance (Group 0) having the same (2 Q ) resistance as the base resistance (Ru), and a base. Resistance group (Ru) 2 times (2 1 ) resistance value of the first group resistance (Group 1) to base resistance (Ru) 2 k (k is an integer:) times the resistance value of the kth group resistance (Group k) A structure in which they are connected in series.
  • the 0th group resistance (Group 0) is made up of m (m is an integer:) differential resistance (; ) in series with the same resistance value.
  • the kth group resistance (Group k) is formed by connecting m different resistances ( ) of the same resistance value in series. That is, each group resistance is formed by connecting m different resistances in series, and the resistance value of each difference resistance is a value of the resistance of the corresponding group resistance divided by m.
  • a base resistor (Ru) and a common node of a plurality of different resistors connected in series with the base resistor (Ru) are connected, in response to the variable resistance control signal (SW QQ , SW 01 , ... , SW K(m-1) , SW km :) switch that opens and closes.
  • the variable resistance control signal (SW QQ , SW 01 , ... , SW K(m-1) , SW km :) switch that opens and closes.
  • one terminal of each switch is connected to a corresponding common node, and the other terminal is connected in common (B).
  • variable resistance control signal when a variable resistance control signal is turned on, the remaining variable resistance control signals are turned on and off.
  • variable resistance control signal and the response to the variable power are mixed together.
  • the resistance value between the two nodes (A, B) can be expressed as Equation 3, ignoring the inherent turn-on resistance of the corresponding switch.
  • variable resistor array In order to explain the operation of the variable resistor array according to the present invention, a case where k is 2 and m is 4 will be described.
  • the change in the resistance value between two nodes ( ⁇ , ⁇ ) will be described below. First, the change in the resistance value that changes with the switch position that is turned on in the same switch group will be described. Next, the change in the resistance value when the switches that are turned on belong to the two different switch groups will be described.
  • the resistance between the two nodes (A, ⁇ ) is at the first switch (SW Q (Ru when turned on, and 2Ru when the fifth switch (SWCM) is turned on) At this time, we can know that among the switches connected to the resistor belonging to the 0th group (Group 0), the resistance value when the switch having 4 positions is turned on is changed twice.
  • the resistance value between the two nodes (A, B) is 3Ru when the seventh switch (SW 12 :) is turned on, and 6Ru when the eleventh switch (SW 22 ) is turned on.
  • the resistance value is increased by 2 times.
  • the switch positions are also different by four.
  • the resistance value when the position change of the switch that is turned on is not moving to the right as described above, but moving to the left side, the resistance value can be reduced, and the resistance value can be increased by a non-integer multiple or cut back.
  • the increase rate of the base resistance and the group resistance is 2 in the description of the embodiment, the increase rate of other integer multiples, for example, 3 or 4 times is also possible.
  • Figure 5 is a circuit diagram of a variable capacitance value array.
  • the variable capacitance value array 500 includes a plurality of capacitors and a plurality of switches.
  • One of the plurality of capacitors C Q , d to C P is commonly connected to the node B, and the other terminal is connected to one terminal of each of the switches (SW SWi, . . . , SW P ).
  • the other terminal of the switch is commonly connected to node A.
  • the capacitance value between the two nodes (A, B) is determined according to the capacitance value of the switch that is turned on and the capacitance that is connected to the corresponding switch. In this case, only one switch can be exclusively turned on, or more than two switches can be turned on to add a capacitor. Therefore, the capacitance values of the capacitors can be made the same or different.
  • variable resistor array In order to use the variable resistor array according to the present invention and the variable capacitance value array as shown in FIG. 4 as shown in FIG. 3 in any system, in order to determine the resistance value as a reference in advance, it is necessary to perform setting for Pre-work for initial conditions.
  • Figure 6 illustrates a conventional correction circuit
  • the correction circuit (600) applies an integrator.
  • the switch (SW) When the switch (SW) is turned on, the integrator using the variable resistor and the variable capacitor starts to work, that is, the pair is applied to 2
  • the difference between the signals (Vrefm, Vre) at the input is integrated.
  • Figure 7 illustrates various output states of the correction circuit of Figure 6 as a function of switching states.
  • Equation 4 the time interval ( ⁇ ) at which the switch (SW) is turned on is determined based on the external reference clock, so it can be accurately known.
  • the values of the two differential input signals (Vre, Vrem) are generated by the internal reference voltage source, the prediction can be accurately performed.
  • the product of the variable resistor and the variable capacitor (R ⁇ C can be accurately set by the following procedure.
  • variable resistor array and variable capacitance value array can also be used for a channel selection filter, which will be described below.
  • the channel selection filter includes: at least one operational amplifier; a plurality of variable resistors connected to the input/output terminals of the at least one operational amplifier and whose resistance values are changed in response to the variable resistance control signal; And a plurality of variable capacitors whose input and output terminals of the operational amplifier are changed in response to the variable capacitance control signal. Therefore, in order to adjust the frequency characteristics (i.e., band width and gain) of the channel selection filter, it is first necessary to set the resistance value of the variable resistor and the initial value of the capacitance value of the variable capacitor.
  • the gain can be changed by changing the resistance of the desired resistor (R1).
  • R1 the resistance of the desired resistor
  • the value of m added to the digital code used to control the switch is reduced by 6 dB (decibel).
  • the switches used to determine the band width and turn on and off will also vary depending on the situation.
  • the circuit is implemented by using the variable resistor array and the variable capacitance value array according to the present invention, particularly when applied to a filter, it is only necessary to simply add and subtract resistors according to band width and gain variation. Group, so it is easy to change and increase the band width and gain of the filter.
  • the value of the resistor that needs to be changed according to the required band width is not additionally added, but the initial resistance to be used is grouped, and each group is composed of several resistors having the same resistance value. Since the series is connected and used, the original that is additionally consumed in order to add the wide-band domain and the gain range is only a switch. In an integrated circuit, since the switch implemented by the field effect transistor is very small compared to the area occupied by the variable resistor or the variable capacitor, the increase in cost due to the increase in area can be ignored.

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Abstract

A variable resistor array and a channel selection filter using the variable resistor array are provided. The variable resistor array comprises a base resistor, the first resistor array, the second resistor array, the Nth (N is an integer) resistor array and a plurality of switches. The first resistor array is composed of M (M is an integer) resistors connected in series and its total resistance value is equal to the resistance value of the base resistor. The second resistor array is composed of M resistors connected in series and its total resistance value is twice as much as the total resistance value of the first resistor array. The Nth resistor array is composed of M resistors connected in series and its total resistance value is twice as much as the total resistance value of the (N-1)th resistor array.

Description

可变电阻阵列及信道选择滤波器  Variable resistor array and channel selection filter
技术领域 Technical field
本发明涉及一种电阻阵列及信道选择滤波器，特别是一种可变电阻阵列及 包含有所述可变电阻阵列的信道选择滤波器。 背景技术  The present invention relates to a resistor array and a channel selection filter, and more particularly to a variable resistor array and a channel selection filter including the variable resistor array. Background technique
信道选择滤波器在以有线及无线移动通讯接收器为主的各种集成电路中 已广泛地使用。尤其在无线移动通讯接收器中， 为了实现各种通讯规格的集成 化并提高接收器性能， 会同时要求信道选择滤波器具有较宽的带域幅和增益。 例如， 作为移动广播接收技术的 DVB-H(Digital Video Broadcasting-Handheld) 所要求的是 4MHz、 3.5MHz, 3MHz、 2.5MHz, 而 T-DMB(Terrestrial Digital Multimedia Broadcasting)所要求的是 785 KHz等， 为了满足这些不同的通讯规 格， 需要一种能够较宽地变更带域幅的信道选择滤波器。  Channel selection filters are widely used in a variety of integrated circuits based primarily on wired and wireless mobile communication receivers. Especially in wireless mobile communication receivers, in order to achieve integration of various communication specifications and improve receiver performance, the channel selection filter is required to have a wide band width and gain. For example, DVB-H (Digital Video Broadcasting-Handheld), which is a mobile broadcast receiving technology, requires 4 MHz, 3.5 MHz, 3 MHz, and 2.5 MHz, and T-DMB (Terrestrial Digital Multimedia Broadcasting) requires 785 KHz, etc. In order to meet these different communication specifications, a channel selection filter capable of changing the band width wider is required.
图 1为现有的接收器的方框图。  Figure 1 is a block diagram of a conventional receiver.
如图 1所示，接收器 100包含天线 101、低噪声放大器 (Low Noise Amplifier) 102、 频率变换器 103、 信道选择滤波器 (Channel Selection Filter) 104,、 可变增 益放大器 (Programmable Gain Amplifier) 105。  As shown in FIG. 1, the receiver 100 includes an antenna 101, a low noise amplifier 102, a frequency converter 103, a channel selection filter 104, and a variable gain amplifier (Programmable Gain Amplifier) 105. .
接收器 100通过天线 101接收超高频信号，所接收的信号通过低噪声放大 器 102放大后， 在频率变换器 103 降低信号的频率， 再利用信道选择滤波器 104将妨碍信号 (jammer)进行滤波后， 在可变增益放大器 105进行放大后生成 一定大小的输出信号。  The receiver 100 receives the UHF signal through the antenna 101. After the received signal is amplified by the low noise amplifier 102, the frequency of the signal is reduced by the frequency converter 103, and the jamming signal is filtered by the channel selection filter 104. After the variable gain amplifier 105 amplifies, a certain output signal is generated.
图 2 为利用了双二阶 (biquad)运算放大器 (Operational Amplifier)的信道选 择滤波器的电路图。 Figure 2 shows the channel selection using a biquad operational amplifier (Operational Amplifier). Select the circuit diagram of the filter.
请参照图 2， 信道选择滤波器 104的传递函数可以如公式 1表示。 另外， 信道选择滤波器 104在直流 (Direct Current, DC)时的增益， 将 O(zero)代入公式 1中的变数 S后， 可以如公式 2表示。  Referring to Figure 2, the transfer function of the channel selection filter 104 can be expressed as Equation 1. In addition, the gain of the channel selection filter 104 at the direct current (DC), after substituting O(zero) into the variable S in the equation 1, can be expressed as Equation 2.
【公式 1】
Figure imgf000004_0001
【Formula 1】
Figure imgf000004_0001
【公式 2】 [Formula 2]
V； RV; R
Figure imgf000004_0002
1，如带域幅 (band width)的信道选择滤波器 104的频率特性由 电阻 (resistor)和电容 (capacitor)的乘积而决定。 请参照公式 2， 信道选择滤波器 104的增益 (Gain)由 2个电阻 (Rl, R2)之比而决定。
Figure imgf000004_0002
1. The frequency characteristic of the channel selection filter 104, such as a band width, is determined by the product of a resistor and a capacitor. Referring to Equation 2, the gain (Gain) of the channel selection filter 104 is determined by the ratio of two resistors (R1, R2).
从而，只要调整电阻和电容的值，即可调节信道选择滤波器 104的带域幅。 在大部分的集成电路中， 由于电阻的面积小于电容， 从而先通过电阻来决定大 致的带域幅， 再通过电容来决定精确的带域幅比较有效。在这种情况下， 只有 在所有电阻值以相同比率变化时才不会改变频率特性。  Thus, the band width of the channel selection filter 104 can be adjusted as long as the values of the resistance and capacitance are adjusted. In most integrated circuits, since the area of the resistor is smaller than the capacitance, it is effective to determine the approximate band width by the resistor first, and then determine the precise band width by the capacitor. In this case, the frequency characteristics are not changed only when all the resistance values change at the same ratio.
为了改变信道选择滤波器 104的增益需要改变 2个电阻 (Rl, R2)之比。 特 别是， 为了只改变增益而不改变频率特性时， 只需改变 R1即可。  In order to change the gain of the channel selection filter 104, it is necessary to change the ratio of two resistors (R1, R2). In particular, in order to change only the gain without changing the frequency characteristics, it is only necessary to change R1.
在集成电路中， 电阻和电容根据制程 (process)和温度 (temperature)的不同， 最大有 20%左右的误差， 因此普通的信道选择滤波器通过自动化的校正 (calibmtkm)来使电阻和电容的乘积达到所需的值。 从而， 只能知道电阻值 (resistance)及电容值capacitance)的大致范围， 而无法得到精确的值。 In an integrated circuit, the resistance and capacitance vary by up to 20% depending on the process and temperature, so the common channel selection filter is automatically corrected. (calibmtkm) to bring the product of resistance and capacitance to the desired value. Therefore, only the approximate range of the resistance value and the capacitance value can be known, and an accurate value cannot be obtained.
然而， 为了校正带域幅而各电阻的电阻值会发生变化， 这时第 2电阻 (R2) 的电阻值也会发生变化，但是无法精确地控制因增益的变化而需要增加或减少 的第一电阻 R1的电阻值， 因此无法实现同时达成较宽的带域幅变化和较大的 增益变化的信道选择滤波器。  However, in order to correct the band width, the resistance value of each resistor changes, and the resistance value of the second resistor (R2) also changes, but the first need to be increased or decreased due to the change in gain cannot be accurately controlled. The resistance value of the resistor R1, therefore, cannot achieve a channel selection filter that achieves both a wide band amplitude variation and a large gain variation.
发明内容 Summary of the invention
本发明的目的在于提供一种通过开关和若干个并联连接的电阻，可以选择 并决定所需要的电阻值的可变电阻阵列。  SUMMARY OF THE INVENTION It is an object of the present invention to provide a variable resistance array that can select and determine a desired resistance value through a switch and a plurality of resistors connected in parallel.
本发明的另一目的在于提供一种通过改变电阻值 (resistance)及电容值 (capacitance)来同时改变信道选择滤波器的带域幅和增益的信道选择滤波器。 为了达到上述目的， 根据本发明的可变电阻阵列包含， 基电阻、第一电阻 阵列、第二电阻阵列、第 N电阻阵列及若干个开关。所述第一电阻阵列由 M(M 为整数：)个并联连接的电阻构成，且并联连接的电阻的总电阻值 (resistance)与所 述基电阻的电阻值相同。 所述第二电阻阵列由 M个并联连接的电阻构成， 且 并联连接的电阻的总电阻值为所述第一电阻阵列的总电阻值的 2倍。 第 N电 阻阵列由 M个并联连接的电阻构成， 且并联连接的电阻的总电阻值为第 (N-1 , N为整数：)电阻阵列的总电阻值的 2倍。 其中， 所述基电阻、 所述第一电阻阵 列、 所述第二电阻阵列至所述第 N 电阻阵列相互并联连接， 所述若干个开关 的一端子分别连接于所述并联连接的各电阻的共同节点，另一端子则被共同地 连接， 并且分别回应于可变电阻控制信号而开闭。  Another object of the present invention is to provide a channel selection filter that simultaneously changes the band width and gain of a channel selection filter by changing a resistance and a capacitance. In order to achieve the above object, a variable resistor array according to the present invention comprises a base resistor, a first resistor array, a second resistor array, an Nth resistor array, and a plurality of switches. The first resistor array is composed of M (M is an integer:) resistors connected in parallel, and the total resistance of the resistors connected in parallel is the same as the resistance of the base resistor. The second resistor array is composed of M resistors connected in parallel, and the total resistance of the resistors connected in parallel is twice the total resistance of the first resistor array. The Nth resistor array is composed of M resistors connected in parallel, and the total resistance of the resistors connected in parallel is twice the total resistance of the (N-1, N is an integer:) resistor array. The base resistor, the first resistor array, the second resistor array to the Nth resistor array are connected in parallel with each other, and one terminal of the plurality of switches is respectively connected to the resistors connected in parallel The common node, the other terminals are connected in common, and are opened and closed in response to the variable resistance control signals, respectively.
为了达到上述另一目的，根据本发明的可改变带域幅及增益的信道选择滤 波器包含： 至少一个运算放大器； 连接于所述至少一个运算放大器的输出入端 子， 且其电阻值回应于可变电阻控制信号而变更的若干个可变电阻； 及连接于 所述运算放大器的输出入端子，且其电容值回应于可变电容控制信号而变更的 若干个可变电容。 其中， 所述若干个可变电阻分别包含， 基电阻、 由并联连接 的 M(M为整数：)个电阻构成，且并联连接的电阻的总电阻与所述基电阻相同的 第一电阻阵列、 由并联连接的 M个电阻构成， 且总电阻为所述第一电阻阵列 的总电阻的 2倍的第二电阻阵列、 由并联连接的 M个电阻构成， 且总电阻为 第 (N-1, N为整数)电阻阵列的总电阻的 2倍的第 N电阻阵列、 及若干个开关。 所述基电阻、 所述第一电阻阵列、 所述第二电阻阵列至所述第 N 电阻阵列相 互并联连接，所述若干个开关的一端子分别连接于所述并联连接的电阻的共同 节点， 其另一端子则共同地被连接， 并分别回应于可变电阻控制信号而开闭， 所述各个可变电阻的一端子连接于所述基电阻的 2 个端子中未与第一电阻阵 列相连接的端子， 其另一端子则为所述开关的共同端子。 In order to achieve the above other object, a channel selection filter capable of changing a band width and a gain according to the present invention includes: at least one operational amplifier; an output terminal connected to the at least one operational amplifier a plurality of variable resistors whose resistance values are changed in response to the variable resistance control signal; and a plurality of resistors connected to the input and output terminals of the operational amplifier and whose capacitance values are changed in response to the variable capacitance control signal Variable capacitance. The plurality of variable resistors respectively include a base resistor, a first resistor array having a total resistance of the resistors connected in parallel and a base resistor having the same resistance of M (M is an integer:) resistors connected in parallel, a second resistor array composed of M resistors connected in parallel, and having a total resistance of twice the total resistance of the first resistor array, and M resistors connected in parallel, and having a total resistance of (N-1, N is an integer N) an Nth resistor array twice the total resistance of the resistor array, and a plurality of switches. The base resistor, the first resistor array, the second resistor array to the Nth resistor array are connected in parallel with each other, and one terminal of the plurality of switches is respectively connected to a common node of the parallel connected resistors, The other terminals are connected in common and open and close in response to a variable resistance control signal, and one terminal of each variable resistor is connected to the two terminals of the base resistor and is not connected to the first resistor array. The connected terminals, the other terminal of which is the common terminal of the switch.
本发明的优点在于：通过改变即可得到需要的电阻值，采用了根据本发明 的可变电阻阵列的信道选择滤波器，将以相同比率增加的电阻体现为以相同数 量分配的电阻， 从而可以通过简单的数字码的加减来实现较宽的带域幅和增 益。 另外， 根据所需的带域幅和增益变化的范围， 可以自由地扩张， 且没有增 加硬件的费用。 附图说明  The invention has the advantages that the required resistance value can be obtained by changing, and the channel selection filter of the variable resistance array according to the present invention is adopted, and the resistances increased by the same ratio are expressed as the resistances distributed by the same amount, thereby A wide band width and gain are achieved by simple addition and subtraction of digital codes. In addition, depending on the required range of band width and gain variation, it is free to expand without the expense of adding hardware. DRAWINGS
图 1 为现有的接收器的方框图；  Figure 1 is a block diagram of an existing receiver;
图 2为利用了双二阶 (biquad)运算放大器 (Operational Amplifier)的信道选 择滤波器的电路图；  2 is a circuit diagram of a channel selection filter using a biquad operational amplifier (Operational Amplifier);
图 3绘示根据本发明的可变电阻阵列；  3 illustrates a variable resistance array in accordance with the present invention;
图 4为 k=2, m=4时的可变电阻阵列的电路图； 图 5为可变电容值阵列的电路图； 4 is a circuit diagram of a variable resistance array when k=2, m=4; Figure 5 is a circuit diagram of a variable capacitance value array;
图 6绘示普通的校正电路；  Figure 6 shows a conventional correction circuit;
图 7绘示图 6所示的校正电路随着开关状态而变化的校正的输出状态。 具体实施方式  Fig. 7 is a diagram showing the corrected output state of the correction circuit shown in Fig. 6 as a function of the switching state. detailed description
以下结合附图， 具体说明本发明的具体实施例。  Specific embodiments of the present invention will be specifically described below with reference to the accompanying drawings.
图 3绘示本发明的可变电阻阵列。  Figure 3 illustrates a variable resistance array of the present invention.
如图 3所示， 可变电阻阵列 300具有， 由基电阻 (Ru：)、 具有与基电阻 (Ru) 相同 (2Q)电阻值 (resistance)的第 0群电阻 (Group 0)、 具有基电阻 (Ru)的 2倍 (21) 电阻值的第一群电阻 (Group 1)至具有基电阻 (Ru)的 2k(k为整数:)倍电阻值的第 k群电阻 (Group k)相互串联连接而成的结构。 As shown in FIG. 3, the variable resistor array 300 has a base group resistance (Ru:), a group 0 group resistance (Group 0) having the same (2 Q ) resistance as the base resistance (Ru), and a base. Resistance group (Ru) 2 times (2 1 ) resistance value of the first group resistance (Group 1) to base resistance (Ru) 2 k (k is an integer:) times the resistance value of the kth group resistance (Group k) A structure in which they are connected in series.
Ru  Ru
第 0群电阻 (Group 0)由电阻值相同的 m(m为整数：)个区别电阻 (； )相串联  The 0th group resistance (Group 0) is made up of m (m is an integer:) differential resistance (; ) in series with the same resistance value.
2Ru 连接而成， 第一群电阻 (Group 1)也是由电阻值相同的 m个区别电阻（^)相 串联连接而成。 虽然在图 3中未图示， 接下来的第二群电阻 (Group 2)至第 2^ 1〉群电阻 (Group (k-1))也都是由电阻值相同的 m个区别电阻相串联连接而成 2Ru is connected, and the first group of resistors (Group 1) are also connected in series by m different resistors (^) having the same resistance value. Although not shown in FIG. 3, the next second group resistance (Group 2) to the 2^ 1 group resistance (Group (k-1)) are also connected in series by m different resistances having the same resistance value. Connected
2kRu 的。最后，第 k群电阻 (Group k)是由电阻值相同的 m个区别电阻 ( )相串联 连接而成的。 即， 每个群电阻由 m个区别电阻串联连接而成， 且每个区别电 阻的电阻值为相应的群电阻的电阻值除于 m的值。 2 k Ru's. Finally, the kth group resistance (Group k) is formed by connecting m different resistances ( ) of the same resistance value in series. That is, each group resistance is formed by connecting m different resistances in series, and the resistance value of each difference resistance is a value of the resistance of the corresponding group resistance divided by m.
基电阻 ( Ru)及与基电阻 ( Ru)相串联连接的若干个区别电阻的公共节点 (common node)上连接有， 回应于可变电阻控制信号 (SWQQ, SW01,... ,SWk(m-1), SWkm：)而开合的开关。 较佳地， 每个开关的一个端子连接于相应的公共节点， 另一端子则被共同地连接 (B)。 从而， 基电阻 (Ru)的一个端子 (A)和所述公共节 点 (B)之间电阻的电阻值， 随着排他地开启 (exclusively enable)的各个可变电阻 控制信号 (SWQQ, SWQ1，...
Figure imgf000007_0001
SWkm)而不同。 在此， 排他的意思是， 当有 一个可变电阻控制信号被开启时， 其余可变电阻控制信号则被开闭。在以下说 明中， 为了简化附图及说明书的记载，将可变电阻控制信号和回应于该可变电 阻控制信号而工作的开关的部件号混在一起使用。 A base resistor (Ru) and a common node of a plurality of different resistors connected in series with the base resistor (Ru) are connected, in response to the variable resistance control signal (SW QQ , SW 01 , ... , SW K(m-1) , SW km :) switch that opens and closes. Preferably, one terminal of each switch is connected to a corresponding common node, and the other terminal is connected in common (B). Thus, the resistance value of the resistance between one terminal (A) of the base resistance (Ru) and the common node (B), with each of the variable resistance control signals (SW QQ , SW Q1 ) that are exclusively enabled ,...
Figure imgf000007_0001
SW km ) and different. Here, the exclusive meaning is that when a variable resistance control signal is turned on, the remaining variable resistance control signals are turned on and off. In the following description, in order to simplify the description of the drawings and the description, the variable resistance control signal and the response to the variable power The part numbers of the switches that work with the control signal are mixed together.
任意开关被接通时， 在忽略相应开关固有的接通电阻 (turn on resistance)的 情况下， 两个节点 (A, B)之间的电阻值可以如公式 3表示。  When any switch is turned on, the resistance value between the two nodes (A, B) can be expressed as Equation 3, ignoring the inherent turn-on resistance of the corresponding switch.
【公式 3】
Figure imgf000008_0001
[Formula 3]
Figure imgf000008_0001
如公式 3所示， 当 k为 0， n为 0时可变电阻控制信号 (SWQ(被开启， 因 此 A节点 (A)和 B节点 (B)之间只存在基电阻 (Ru：)。从而， 这时的电阻值为 Ru。 K为 0， n为 m时， 其它任意的可变电阻控制信号 (SWQn会被开启， 因此这时 的电阻值为基电阻的 2倍即 2Ru。 As shown in Equation 3, when k is 0 and n is 0, the variable resistance control signal (SW Q (turned on, so there is only a base resistance (Ru:) between the A node (A) and the B node (B). Therefore, the resistance value at this time is Ru. When K is 0 and n is m, any other variable resistance control signal (SW Qn is turned on, so the resistance value at this time is twice the base resistance, that is, 2Ru.
为了说明根据本发明的可变电阻阵列的工作， 对 k为 2， m为 4时的情况 进行说明。  In order to explain the operation of the variable resistor array according to the present invention, a case where k is 2 and m is 4 will be described.
图 4为， 当 k=2,m=4时的可变电阻阵列的电路图。  Fig. 4 is a circuit diagram of a variable resistor array when k = 2 and m = 4.
下面对 2个节点 (Α, Β)之间的电阻值的变化进行说明。 首先说明， 在相同 的开关群内随着被接通的开关位置而变化的电阻值的变化。接下来说明，被接 通的开关属不同的 2个开关群时的电阻值的变化。  The change in the resistance value between two nodes (Α, Β) will be described below. First, the change in the resistance value that changes with the switch position that is turned on in the same switch group will be described. Next, the change in the resistance value when the switches that are turned on belong to the two different switch groups will be described.
如图 4所示， 2个节点 (A, Β)之间的电阻值在第 1个开关 (SWQ(被接通时为 Ru， 当第 5个开关 (SWCM)被接通时则为 2Ru。 这时我们可以知道， 连接于属于 第 0群 (Group 0)的电阻的开关当中，相差 4个位置的开关被接通时的电阻值变 化为 2倍。 As shown in Figure 4, the resistance between the two nodes (A, Β) is at the first switch (SW Q (Ru when turned on, and 2Ru when the fifth switch (SWCM) is turned on) At this time, we can know that among the switches connected to the resistor belonging to the 0th group (Group 0), the resistance value when the switch having 4 positions is turned on is changed twice.
2个节点 (A, B)之间的电阻值在第 7个开关 (SW12：)被接通时为 3Ru， 当第 11个开关 (SW22)被接通时则为 6Ru。 这时， 属于第二群 (Group 2)的第 11个开 关 (SW22)被接通时， 与属于第一群 (Group 1)的第 7个开关 (SW12：)被接通时相比 电阻值增加 2倍。 这时的开关位置也是相差 4个。 The resistance value between the two nodes (A, B) is 3Ru when the seventh switch (SW 12 :) is turned on, and 6Ru when the eleventh switch (SW 22 ) is turned on. At this time, when the eleventh switch (SW 22 ) belonging to the second group (Group 2) is turned on, compared with when the seventh switch (SW 12 :) belonging to the first group (Group 1) is turned on. The resistance value is increased by 2 times. At this time, the switch positions are also different by four.
为了便于说明， 对电阻值增加 2 倍时被接通的开关的位置变化进行了说 明， 但我们可以容易地知道， 当开关的位置移动 m个的情况下所增加的电阻 值为 2倍时， 开关的位置移动 2m个的情况下所增加的电阻值为 4倍。 For the sake of explanation, the position change of the switch that is turned on when the resistance value is increased by 2 times is explained, but we can easily know the increased resistance when the position of the switch is moved by m. When the value is 2 times, the resistance value increased by 4 times when the position of the switch is moved by 2 m.
虽然未作说明， 当被接通的开关的位置变化并非为如上所述的往右侧移 动， 而是往左侧移动时， 可以减少电阻值， 而且还可以使电阻值以非整数倍增 加或减少。 另外， 虽然在实施例说明中， 基电阻及群电阻的增加率为 2， 但是 其它整数倍的增加率， 例如 3或 4倍也是可以的。  Although not illustrated, when the position change of the switch that is turned on is not moving to the right as described above, but moving to the left side, the resistance value can be reduced, and the resistance value can be increased by a non-integer multiple or cut back. Further, although the increase rate of the base resistance and the group resistance is 2 in the description of the embodiment, the increase rate of other integer multiples, for example, 3 or 4 times is also possible.
图 5为可变电容值阵列的电路图。  Figure 5 is a circuit diagram of a variable capacitance value array.
如图 5所示， 可变电容值阵列 500包含若干个电容及若干个开关。若干个 电容 CQ, d〜 CP的一个端子共同地被连接于节点 B,其另一端子则分别连接于 各开关（SW SWi, ...... , SWP) 的一个端子上。 所述开关的另一端子共同地被 连接于节点 A。 2个节点 (A, B)之间的电容值根据被接通的开关和连接于相应 开关的电容的电容值而决定。在这种情况下， 可以排他地只接通一个开关， 也 可以接通 2个以上开关来相加电容。从而， 可以使电容的电容值相同， 也可以 不同。 As shown in FIG. 5, the variable capacitance value array 500 includes a plurality of capacitors and a plurality of switches. One of the plurality of capacitors C Q , d to C P is commonly connected to the node B, and the other terminal is connected to one terminal of each of the switches (SW SWi, . . . , SW P ). The other terminal of the switch is commonly connected to node A. The capacitance value between the two nodes (A, B) is determined according to the capacitance value of the switch that is turned on and the capacitance that is connected to the corresponding switch. In this case, only one switch can be exclusively turned on, or more than two switches can be turned on to add a capacitor. Therefore, the capacitance values of the capacitors can be made the same or different.
虽然没有对控制开关的开闭信号进行图示和说明，但只要是本领域技术人 员都很容易理解， 因此不再详细说明。  Although the opening and closing signals of the control switch are not illustrated and described, they will be easily understood by those skilled in the art and will not be described in detail.
为了在任意***中都能使用如图 3 所示的根据本发明的可变电阻阵列及 如图 4所示的可变电容值阵列， 为了提前决定作为基准的电阻值， 需要进行用 于设定初始条件的事前工作。  In order to use the variable resistor array according to the present invention and the variable capacitance value array as shown in FIG. 4 as shown in FIG. 3 in any system, in order to determine the resistance value as a reference in advance, it is necessary to perform setting for Pre-work for initial conditions.
用于决定适当的电阻值及电容值时， 普遍使用采用了积分器的校正 (Calibration)电路。  When determining the appropriate resistance value and capacitance value, a calibration circuit using an integrator is commonly used.
图 6绘示普通的校正电路。  Figure 6 illustrates a conventional correction circuit.
如图 6 所示， 校正电路 (600)应用了积分器， 当开关 (SW)被接通 (turn on) 时， 利用了可变电阻 和可变电容 的积分器开始工作， 即对施加于 2 个输入端的信号 (Vrefm, Vre )间差异进行积分。  As shown in Figure 6, the correction circuit (600) applies an integrator. When the switch (SW) is turned on, the integrator using the variable resistor and the variable capacitor starts to work, that is, the pair is applied to 2 The difference between the signals (Vrefm, Vre) at the input is integrated.
图 7绘示图 6的校正电路随着开关状态而变化的各种输出状态。  Figure 7 illustrates various output states of the correction circuit of Figure 6 as a function of switching states.
请参照图 6及图 7， 开关被接通 (SW on)的时间区间 (Ton)内积分器的输出 (Vop-Vom)可以如公式 4表示。 Please refer to Figure 6 and Figure 7. The output of the integrator in the time interval (Ton) when the switch is turned on (SW on) (Vop-Vom) can be expressed as Equation 4.
【公式 4】 r r [Formula 4] r r
Figure imgf000010_0001
一s ) 请参照公式 4，开关 (SW)被接通的时间区间 (Τοη), 由于是根据外部参考时 钟 (external reference clock)而决定的， 因此可以精确地知道。 另外， 因为 2个 差动输入信号 (Vre , Vrem)的值由内部基准电压源而生成， 因此也可以准确地 进行预测。从而， 可变电阻 及可变电容 的乘积 (R^ C 可通过如下过 程进行精确的设定。
Figure imgf000010_0001
One s) Please refer to Equation 4, and the time interval (Τοη) at which the switch (SW) is turned on is determined based on the external reference clock, so it can be accurately known. In addition, since the values of the two differential input signals (Vre, Vrem) are generated by the internal reference voltage source, the prediction can be accurately performed. Thus, the product of the variable resistor and the variable capacitor (R^C can be accurately set by the following procedure.
如图 7所示， 当校正电路的差动输出电压 (Vop-Vom)的值大于参考值时， 说明可变电阻及可变电容的乘积 （RcalxCcal)的值较小， 因此应增加可变电阻 (Real)的值或者可变电容 (Ccal)的值。 相反地， 差动输出电压 (Vop-Vom)的值小 于参考值时， 说明可变电阻及可变电容的乘积 (RcalxCcal)的值较大， 因此应减 小可变电阻 (Real)的值或者可变电容 (Ccal)的值。如此反复进行至找到与参考值 相同的差动输出电压 (Vop-Vom)的值时， 即为最佳的可变电阻及可变电容的乘 积 (RcalxCcal)的值。  As shown in FIG. 7, when the value of the differential output voltage (Vop-Vom) of the correction circuit is larger than the reference value, the value of the product of the variable resistor and the variable capacitor (RcalxCcal) is small, so the variable resistor should be added. The value of (Real) or the value of the variable capacitor (Ccal). Conversely, when the value of the differential output voltage (Vop-Vom) is smaller than the reference value, the value of the product of the variable resistor and the variable capacitor (RcalxCcal) is large, so the value of the variable resistor (Real) should be reduced or The value of the variable capacitor (Ccal). By repeating this until the value of the differential output voltage (Vop-Vom) which is the same as the reference value is found, it is the value of the optimum product of the variable resistor and the variable capacitor (RcalxCcal).
根据本发明的可变电阻阵列及可变电容值阵列还可以用于信道选择滤波 器， 以下对此进行说明。  The variable resistor array and variable capacitance value array according to the present invention can also be used for a channel selection filter, which will be described below.
一般情况下， 信道选择滤波器包含： 至少一个运算放大器； 连接于所述至 少一个运算放大器的输出入端子，且其电阻值回应于可变电阻控制信号而变更 的若干个可变电阻； 及连接于所述运算放大器的输出入端子， 且其电容值回应 于可变电容控制信号而变更的若干个可变电容。从而， 为了调节信道选择滤波 器的频率特性 （即带域幅及增益）， 首先需要设定可变电阻的电阻值及可变电 容的电容值的初始值。  In general, the channel selection filter includes: at least one operational amplifier; a plurality of variable resistors connected to the input/output terminals of the at least one operational amplifier and whose resistance values are changed in response to the variable resistance control signal; And a plurality of variable capacitors whose input and output terminals of the operational amplifier are changed in response to the variable capacitance control signal. Therefore, in order to adjust the frequency characteristics (i.e., band width and gain) of the channel selection filter, it is first necessary to set the resistance value of the variable resistor and the initial value of the capacitance value of the variable capacitor.
利用上述说明的普通的校正电路， 以下述方式寻找适当的电阻值 (resistance)和电容值 (capacitance),以使根据本发明的阵列适用于信道选择滤波 器。 Using the conventional correction circuit described above, an appropriate resistance and capacitance are sought in such a manner that the array according to the present invention is suitable for channel selection filtering. Device.
首先， 选择出对信道选择滤波器的带域幅及增益的影响最大的电阻及电 容。由上述原因被选择出的电阻及电容分别对应至与如图 7所示的可变电阻及 可变电容。接下来经过与图 7所示的电路及说明相同的过程， 决定出最佳的电 阻值及最佳的电容值。经过上述判断的过程之后，在构成信道选择滤波器的可 变电阻阵列及可变电容值阵列的开关中，先接通用于设定最佳电阻值及电容值 所需要的开关。  First, select the resistor and capacitor that have the greatest influence on the band width and gain of the channel selection filter. The resistors and capacitors selected for the above reasons correspond to the variable resistors and variable capacitors as shown in Fig. 7, respectively. Next, the same process as the circuit and description shown in Fig. 7 is used to determine the optimum resistance value and the optimum capacitance value. After the above-described determination process, in the switches constituting the variable resistance array and the variable capacitance value array of the channel selection filter, the switches necessary for setting the optimum resistance value and capacitance value are turned on first.
之后， 可以通过改变所需电阻 (R1)的电阻值来改变增益， 例如， 用于控制 开关的数字码上每加上 m的值时， 增益会减少 6dB(decibel) 。 通过如上所述 的对开关的控制， 不仅能得到较宽带域幅的变化， 而且不用考虑带域幅即可对 增益进行 6dB或 -6dB的调节。  After that, the gain can be changed by changing the resistance of the desired resistor (R1). For example, the value of m added to the digital code used to control the switch is reduced by 6 dB (decibel). By controlling the switch as described above, it is possible to obtain not only a change in the wider-bandwidth but also a gain of 6 dB or -6 dB without considering the band width.
由于每个通讯标准所要求的带域幅都不相同，因此用于决定带域幅而接通 及断开的开关也会根据具体情况而不同。另外，在任何一个带域幅中都需要随 着工程的变化而保持一定的大小的电阻电容乘积值，因此所被闭合的开关有可 能会改变。  Since the band width required for each communication standard is different, the switches used to determine the band width and turn on and off will also vary depending on the situation. In addition, in any of the band widths, it is necessary to maintain a certain value of the resistance and capacitance product value as the engineering changes, so that the closed switch may change.
如上所述，采用了根据本发明的可变电阻阵列及可变电容值阵列而实现电 路的情况下，特别是应用在滤波器时， 只需根据带域幅和增益变化来简单地加 减电阻群， 因此可以很容易改变、 增加滤波器的带域幅和增益。  As described above, in the case where the circuit is implemented by using the variable resistor array and the variable capacitance value array according to the present invention, particularly when applied to a filter, it is only necessary to simply add and subtract resistors according to band width and gain variation. Group, so it is easy to change and increase the band width and gain of the filter.
另外， 根据所需的带域幅而需要改变的电阻的值不是额外加上去的， 而是 将本需要使用的初始的电阻进行了群化，并且各群是由若干个具有相同电阻值 的电阻串联连接而使用的，因此为了加宽带域幅和增益的范围而追加消耗的原 件只有开关而已。在集成电路中， 由于场效应三极管所实现的开关， 与所述可 变电阻或可变电容所占的面积相比时非常小，因此可以忽略由于面积的增加引 起的费用增加。  In addition, the value of the resistor that needs to be changed according to the required band width is not additionally added, but the initial resistance to be used is grouped, and each group is composed of several resistors having the same resistance value. Since the series is connected and used, the original that is additionally consumed in order to add the wide-band domain and the gain range is only a switch. In an integrated circuit, since the switch implemented by the field effect transistor is very small compared to the area occupied by the variable resistor or the variable capacitor, the increase in cost due to the increase in area can be ignored.
虽然已结合附图对本发明的技术思想叙述如上，但这是对本发明的较佳实 施例进行的说明， 并非用以限定本发明。 另外， 本发明所属的技术领域中具有 常规知识的技术人员， 谁都有可能在不脱离本发明之技术思想的范围内， 都可 以做出各种变动及模仿。 The technical idea of the present invention has been described above with reference to the accompanying drawings, but is a description of the preferred embodiments of the present invention and is not intended to limit the invention. In addition, the technical field to which the present invention pertains has It is possible for a person skilled in the art to make various changes and imitations without departing from the scope of the technical idea of the present invention.

Claims

权 利 要 求 Rights request
1、 一种可变电阻阵列， 其特征在于包含： A variable resistor array, comprising:
一基电阻；  One base resistance;
一第一电阻阵列， 由 M(M为整数：)个串联连接的第一电阻构成，且所述 M 个串联连接的第一电阻的总电阻值 (resistance)与所述基电阻的电阻值相同； 一第二电阻阵列， 由 M个串联连接的第二电阻构成， 且所述 M个串联连 接的第二电阻的总电阻值为所述第一电阻阵列的总电阻值的 2倍；  a first resistor array, wherein M (M is an integer:) a first resistor connected in series, and a total resistance of the M series-connected first resistors is the same as a resistance of the base resistor a second resistor array is composed of M series resistors connected in series, and the total resistance of the M series connected second resistors is twice the total resistance value of the first resistor array;
一第 N电阻阵列， 由 M个串联连接的第 N电阻构成， 且所述串联连接的 第 N电阻的总电阻值为第 (N-1,N为整数：)电阻阵列的总电阻值的 2倍； 及  An Nth resistor array is composed of M series connected Nth resistors, and the total resistance value of the series connected Nth resistors is (N-1, N is an integer:) 2 of the total resistance value of the resistor array Times; and
复数个开关， 并且，  a plurality of switches, and,
所述基电阻、 所述第一电阻阵列、 所述第二电阻阵列至所述第 N 电阻阵 列相互串联连接，所述复数个开关的一端子分别连接于所述串联连接的各电阻 的共同节点，另一端子则共同地连接，且分别回应于可变电阻控制信号而开闭。  The base resistor, the first resistor array, the second resistor array to the Nth resistor array are connected in series with each other, and one terminal of the plurality of switches is respectively connected to a common node of the series connected resistors The other terminals are connected in common and are opened and closed in response to the variable resistance control signals, respectively.
2、 一种信道选择滤波器， 所述信道选择滤波器包含： 2. A channel selection filter, the channel selection filter comprising:
至少一个运算放大器； 至少一个可变电阻， 连接于所述至少一个运算放大器的输出入端子， 且所 述至少一个可变电阻的电阻值回应于一可变电阻控制信号而变更； 及 至少一个可变电容， 连接于所述运算放大器的所述输出入端子， 且所述至 少一个可变电容的电容值回应于可变电容控制信号而变更， 其特征在于，  At least one operational amplifier; at least one variable resistor connected to an input/output terminal of the at least one operational amplifier, and a resistance value of the at least one variable resistor is changed in response to a variable resistance control signal; and at least one a variable capacitor connected to the input/output terminal of the operational amplifier, and a capacitance value of the at least one variable capacitor is changed in response to a variable capacitance control signal, wherein
所述至少一个可变电阻分别包含：  The at least one variable resistor respectively includes:
一基电阻； 一第一电阻阵列， 由 M(M为整数：)个串联连接的第一电阻构成， 且所述 M 个串联连接的第一电阻的总电阻值 (resistance)与所述基电阻的电阻值相同； 一第二电阻阵列， 由 M个串联连接的第二电阻构成， 且所述 M个串联连 接的第二电阻的总电阻值为所述第一电阻阵列的总电阻值的 2倍； 一第 N电阻阵列， 由 M个串联连接的第 N电阻构成， 且所述串联连接的 第 N电阻的总电阻值为第 (N-1,N为整数：)电阻阵列的总电阻值的 2倍； 及 复数个开关， 用以分别回应于该可变电阻控制信号而开闭， 并且 a first resistor array, wherein M (M is an integer:) a series of first resistors connected in series, and a total resistance of the M series connected first resistors and the base resistor The resistance value is the same; a second resistor array is composed of M series resistors connected in series, and the M series connection The total resistance of the connected second resistor is twice the total resistance of the first resistor array; an Nth resistor array is composed of M series connected Nth resistors, and the series connected Nth resistor The total resistance value is twice the total resistance value of the (N-1, N is an integer:) resistance array; and a plurality of switches are opened and closed in response to the variable resistance control signal, respectively, and
所述基电阻、 所述第一电阻阵列、 所述第二电阻阵列至所述第 N 电阻阵 列相互串联连接，所述复数个开关的一端子分别连接于所述串联连接的各电阻 的共同节点，另一端子则共同地连接，且分别回应于可变电阻控制信号而开闭， 所述至少一个可变电阻的一端子连接于所述基电阻的 2 个端子中未与第一电 阻阵列相连接的端子， 另一端子则为所述复数个开关的共同端子。  The base resistor, the first resistor array, the second resistor array to the Nth resistor array are connected in series with each other, and one terminal of the plurality of switches is respectively connected to a common node of the series connected resistors The other terminals are connected in common, and are respectively opened and closed in response to a variable resistance control signal, and one terminal of the at least one variable resistor is connected to the two terminals of the base resistor and is not connected to the first resistor array. The connected terminal, the other terminal is the common terminal of the plurality of switches.
PCT/CN2009/072179 2008-06-09 2009-06-08 Variable resistor array and channel selection filter WO2009149651A1 (en)

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