WO2009134009A2 - Electroplating substrate containing metal catalyst layer and metal seed layer, and method for producing printed circuit board using the same - Google Patents

Electroplating substrate containing metal catalyst layer and metal seed layer, and method for producing printed circuit board using the same Download PDF

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Publication number
WO2009134009A2
WO2009134009A2 PCT/KR2009/001460 KR2009001460W WO2009134009A2 WO 2009134009 A2 WO2009134009 A2 WO 2009134009A2 KR 2009001460 W KR2009001460 W KR 2009001460W WO 2009134009 A2 WO2009134009 A2 WO 2009134009A2
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WIPO (PCT)
Prior art keywords
layer
seed layer
metal seed
metal catalyst
metal
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PCT/KR2009/001460
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French (fr)
Korean (ko)
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WO2009134009A3 (en
Inventor
백영환
유대환
강동엽
Original Assignee
주식회사 피앤아이
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Publication of WO2009134009A2 publication Critical patent/WO2009134009A2/en
Publication of WO2009134009A3 publication Critical patent/WO2009134009A3/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • H05K3/387—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive for electroless plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating

Definitions

  • the present invention relates to a material of a printed circuit board and a method of manufacturing a printed circuit board, and more particularly, to an electroplating substrate including a metal catalyst layer and a metal seed layer, and a printed circuit board using the same. It relates to a manufacturing method.
  • a tenting method and a semiadditive method are used in the manufacturing process of a printed circuit board.
  • the tenting method is to form a circuit pattern by removing the copper foil layer of the remaining portion except the circuit wiring by wet etching among the copper foil layers laminated on the substrate.
  • the tenting method has a limitation in forming a fine circuit pattern due to the nature of wet etching. Therefore, the tenting method is mainly used to form circuit patterns having a relatively wide wiring width.
  • the semi-additive method that can form a relatively fine and detailed circuit pattern compared to the tenting method is mainly used to form a fine circuit pattern.
  • a process of forming a fine circuit pattern using a general semi-additive method will be briefly described as follows. First, a metal seed layer is formed on the surface of the substrate by an electroless plating process or a dry deposition process, and a dry film is applied on the metal seed layer. Thereafter, the dry film is exposed and developed to pattern the dry film so that the metal seed layer in the portion corresponding to the circuit wiring is exposed to the outside.
  • the adhesion between the metal seed layer formed by the electroless plating process or the dry deposition process and the substrate is varied depending on the material of the printed circuit board, but the bismaleimide triazine (BT) and the ajinomoto build-up film (ABF) It is difficult to form a metal seed layer on the surface of the same glass fiber reinforced epoxy-based rigid substrate with sufficient adhesion to the rigid substrate by electroless plating or dry deposition.
  • BT bismaleimide triazine
  • ABSF ajinomoto build-up film
  • Adhesion deterioration caused by the plating process is recovered over time, but depending on the material of the substrate and the type of surface treatment process to enhance the adhesion between the metal seed layer and the substrate, the recovery time of the adhesive force and the restored adhesive strength Since the value of is different, there is still a limitation in forming a fine circuit pattern on a substrate using a conventional semi-additive method.
  • the present invention provides a substrate for electroplating comprising a hard substrate having a surface treated to form a reactive functional group and a metal catalyst layer continuously or discontinuously formed between the metal seed layers.
  • the present invention removes a number of factors including hydrogen and moisture, which have a great influence on lowering the adhesion between the metal seed layer and the hard substrate, by removing the metal catalyst layer activated by the heating process and the heating process, thereby reducing the hardness after electrolytic plating.
  • a method of manufacturing a printed circuit board which can shorten the recovery time of adhesion between the substrate and the metal seed layer, and can alleviate and stabilize the stress of the electroplating film.
  • the electroplating substrate according to the present invention comprises a rigid substrate, a metal catalyst layer, and a metal seed layer.
  • the rigid substrate includes a surface treatment layer containing reactive functional groups formed by a surface treatment process.
  • the metal catalyst layer is formed continuously or discontinuously by a dry deposition process on the surface treatment layer of the rigid substrate.
  • the metal seed layer is formed by a dry deposition process on the entire surface of the rigid substrate on which the metal catalyst layer is formed.
  • the metal catalyst layer is activated by a heating process.
  • the activated metal catalyst layer may be formed by removing hydrogen generated in the electrolytic plating layer and moisture introduced into the electrolytic plating layer during the electroplating process of forming a circuit pattern on the metal seed layer in manufacturing the printed circuit board. The recovery time of adhesion between the hard substrate and the metal seed layer reduced by the hydrogen and moisture is shortened.
  • a method of manufacturing a printed circuit board according to the present invention includes forming a surface treatment layer including a reactive functional group on a surface of a rigid substrate by a surface treatment process; Forming a metal catalyst layer, continuously or discontinuously, on the surface treatment layer of the rigid substrate by a dry deposition process; Forming a metal seed layer on the entire surface of the rigid substrate on which the metal catalyst layer is formed by a dry deposition process; Applying a dry film on the metal seed layer; Exposing and developing the dry film to pattern the dry film so that the metal seed layer in the portion corresponding to the set circuit wiring is exposed to the outside; Performing an electrolytic plating process to form a plating layer on the externally exposed metal seed layer, thereby forming circuit wiring made of the plating layer; Removing the dry film pattern, and then performing a flash etching process to remove the metal seed layer except for the metal seed layer under the plating layer; And performing a heating process of heating the rigid substrate on which the plating layer is formed.
  • various factors including hydrogen and moisture, which are generated in the electrolytic plating film during the electroplating process and have a great influence on reducing the adhesion between the metal seed layer and the rigid substrate, are activated by the heating process and the heating process. It can be removed by the metal catalyst layer. As a result, the adhesion recovery time between the hard substrate and the metal seed layer, which are degraded after electrolytic plating, can be shortened, and the stress of the electroplating film can be alleviated and stabilized.
  • FIG. 1 is a cross-sectional view showing a manufacturing process of an electroplating substrate according to an embodiment of the present invention.
  • FIG. 2 is a cross-sectional view showing a manufacturing process of an electroplating substrate according to another embodiment of the present invention.
  • FIG 3 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to an exemplary embodiment of the present invention.
  • FIG. 4 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to another exemplary embodiment of the present invention.
  • 5 is a cross-sectional view of an experimental printed circuit board.
  • FIG. 6 is a table illustrating a configuration of the printed circuit board illustrated in FIG. 5 and peel strengths according to respective process conditions.
  • FIG. 1 is a cross-sectional view showing a manufacturing process of an electroplating substrate 101 according to an embodiment of the present invention.
  • a surface treatment process is performed on the rigid substrate 110.
  • the surface treatment process may include at least one of an ion assist reaction method, an ion beam treatment method, and a plasma treatment method. That is, the surface treatment process may be performed by using any one of an ion assist reaction method, an ion beam treatment method, a plasma treatment method, or a mixture of two or more methods.
  • the plasma treatment method may include any one of an atmospheric pressure plasma treatment method, a DC plasma treatment method, and an RF plasma treatment method.
  • the ion particles used in the surface treatment process one of the inert gases containing argon, or one of the reactive gases containing nitrogen, hydrogen, helium, oxygen, ammonia, or the inert gases and the reactive It may comprise a mixture comprising at least two of the gases.
  • the reactive gas used in the surface treatment process may include one of active gases including oxygen, nitrogen, ammonia and hydrogen, or a mixed gas including at least two of the active gases.
  • the metal catalyst layer 130a is formed discontinuously on the surface treatment layer 120 of the rigid substrate 110 by a dry deposition process.
  • the metal catalyst layer 130a may be formed to a thickness of about 1 to 40 nm according to the shape of the surface of the rigid substrate 110.
  • the dry deposition process for forming the metal catalyst layer 130a may include any one of ion beam sputtering, DC sputtering, RF sputtering, and evaporation.
  • the metal catalyst layer 130a may include any one of nickel (Ni), chromium (Cr), nickel alloys, and chromium alloys.
  • the metal catalyst layer 130a may include an oxide or a nitride of a metal including any one of nickel (Ni), chromium (Cr), nickel alloy, and chromium alloy.
  • the metal seed layer 140 is formed by a dry deposition process on the entire surface of the hard substrate 110 on which the metal catalyst layer 130a is formed.
  • the dry deposition process for forming the metal seed layer 140 may include any one of ion beam sputtering, DC sputtering, RF sputtering, and evaporation.
  • the metal seed layer 140 includes copper (Cu).
  • the metal catalyst layer 130a Activated by a heating process.
  • the activated metal catalyst layer 130a is formed between the hard substrate 110 and the metal seed layer 140 reduced by an electroplating process of forming a circuit pattern on the metal seed layer 140 in manufacturing a printed circuit board. Shorten the time it takes for adhesion to recover. In addition, by the surface treatment process, the adhesion between the rigid substrate 110 and the metal seed layer 140 may be enhanced.
  • FIG. 2 is a cross-sectional view showing a manufacturing process of the electroplating substrate 102 according to another embodiment of the present invention.
  • the manufacturing process of the electroplating substrate 102 is similar to the manufacturing process of the electroplating substrate 101 described above except for one difference. Therefore, in order to avoid duplication of description, the present embodiment will be described based on the difference between the manufacturing process of the electroplating substrates (102, 101).
  • the difference between the manufacturing processes of the electroplating substrates 102 and 101 is that in the manufacturing process of the electroplating substrate 102, as shown in FIG. 2C, the surface treatment of the rigid substrate 110 is performed.
  • metal catalyst layer 130b is formed continuously by a dry deposition process.
  • the metal catalyst layer 130b may be formed to a thickness of 40 nm or less according to the shape of the surface of the rigid substrate 110. Since the metal catalyst layer 130b is continuously formed on the surface treatment layer 120 of the rigid substrate 110, the metal seed layer 140 when the printed circuit board is manufactured using the electroplating substrate 102. The recovery time of the adhesive force between the rigid substrate 110 and the metal seed layer 140 after performing the electroplating process and the heating process on the N may be further shortened.
  • FIG. 3 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to an exemplary embodiment of the present invention.
  • the metal seed layer 140 of the electroplating substrate 101 (the electroplating substrate manufactured by the process shown in FIGS. 1A to 1D).
  • the dry film 210 is apply
  • the manufacturing process of the electroplating substrate 101 is the same as described above, its detailed description is omitted.
  • the dry film 210 is exposed and developed, and as a result, as shown in FIG. 3C, the metal seed layer of the portion corresponding to the set circuit wiring ( The dry film 210 is patterned so that the 140 is exposed to the outside. Thereafter, as illustrated in FIG. 3D, an electrolytic plating process is performed to form a plating layer 220 on the metal seed layer 140 exposed to the outside. As a result, a circuit wiring formed of the plating layer 220 is formed on the metal seed layer 140 exposed to the outside.
  • the circuit wiring may be a fine circuit pattern, and each may be a fine circuit pattern having a line and a space of 15 ⁇ m or less.
  • the rigid substrate 110 may be a substrate including a glass fiber reinforced epoxy resin.
  • the glass fiber reinforced epoxy resin may include, for example, flame retardant-4 (FR-4), bismaleimide triazine (BT), ajinomoto build-up film (ABF), or the like.
  • FR-4 flame retardant-4
  • BT bismaleimide triazine
  • ABSF ajinomoto build-up film
  • the maximum heating temperature may be set to a glass transition temperature (Tg), and the heating time may be set to 10 minutes to 120 minutes.
  • the printed circuit board 201 manufactured by the above-described process includes a metal catalyst layer 130a between the hard substrate 110 and the metal seed layer 141, and thus may be degraded due to the electroplating process.
  • the adhesion between the 110 and the metal seed layer 141 can be quickly recovered by the metal catalyst layer 130a activated by the heating process.
  • hydrogen is generated in the plating layer 220, and moisture is introduced into the plating layer 220, thereby reducing adhesion between the hard substrate 110 and the metal seed layer 141. Factors may occur in the plating layer 220.
  • the heating process is performed after the electrolytic plating process, the adhesion between the rigid substrate 110 and the metal seed layer 141 is reduced by the heating process and the metal catalyst layer 130a activated by the heating process. Various factors including hydrogen, moisture, and the like can be eliminated, and stress relaxation and stabilization of the electroplating film can be achieved. Since the activated metal catalyst layer 130a and the heating process remove various factors including hydrogen and moisture, the hard substrate 110 and the metal seed reduced by various factors including hydrogen and moisture. The recovery time of the adhesion between the layers 141 can be shortened.
  • FIG. 4 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to another exemplary embodiment of the present invention.
  • the manufacturing process of the printed circuit board 202 is similar to the manufacturing process of the printed circuit board 201 described above with one difference. Therefore, in order to avoid duplication of description, the present embodiment will be described based on the difference between the manufacturing process of the printed circuit boards (202, 201).
  • the difference between the manufacturing processes of the printed circuit boards 202 and 201 is that, in the manufacturing process of the printed circuit board 202, as shown in FIG. 4A, the electroplating substrate 102 (FIG. 2). Electroplating substrate prepared by the process shown in (a) to (d) of)) is used.
  • the electroplating substrate 102 includes a metal catalyst layer 130b continuously formed on the surface treatment layer 120 of the rigid substrate 110. Therefore, the adhesive force between the hard substrate 110 and the metal seed layer 140, which may be degraded by the electrolytic plating process, may be restored more quickly by the metal catalyst layer 130b activated by the heating process.
  • the activated metal catalyst layer 130b and the heating process various factors including hydrogen generated in the plating layer 220 and moisture introduced into the plating layer 220 are removed during the electrolytic plating process. Therefore, the recovery time of the adhesive force between the hard substrate 110 and the metal seed layer 141 reduced by various factors including hydrogen and moisture may be shortened.
  • the heating process and the metal catalyst layer 130b activated by the heating process stress relaxation and stabilization of the electroplating film can be achieved.
  • FIG. 5A is a cross-sectional view of an experimental printed circuit board electrolytically plated on the entire surface of the electroplating substrate shown in FIG. 1D and then heat treated
  • FIG. Fig. 1 is a sectional view of a printed circuit board which does not include a metal catalyst layer as a printed circuit board for checking with the printed circuit board shown in (a).
  • FIG. 6 is a table showing a configuration of the printed circuit board illustrated in FIGS. 5A and 5B and peel strengths according to respective process conditions.
  • electrolytic plating is performed on the entire surface of the metal seed layer 140 to form a copper plating layer 150 having a thickness of 20 ⁇ m.
  • Printed circuit boards were prepared. Peel strength between the hard substrate 110 and the metal seed layer 140 of the 14 printed circuit boards on which the copper plating layer 150 was formed was measured. Finally, 14 printed circuits are removed to reduce stress and stabilize the plating layer 150 by removing various factors including hydrogen generated in the plating layer 150 and moisture introduced into the plating layer 150. The substrate was heated at a heating temperature of 80 ° C. for 60 minutes. After the heating process, the peel strength between the rigid substrate 110 and the metal seed layer 140 of the 14 printed circuit boards was measured, respectively.
  • a metal catalyst layer 130a of an alloy of nickel / chromium or an alloy of nickel / copper is respectively fired on a thickness of about 1 or 3 nm on six rigid substrates using DC sputtering or ion beam sputtering. Deposited continuously. Thereafter, the metal seed layer 140 containing copper was dry deposited to a thickness of 500 nm on the eight rigid substrates by the same sputtering method as the method for forming the metal catalyst layer 130a.
  • electrolytic plating is performed on the entire surface of the metal seed layer 140 to form a copper plating layer 150 having a thickness of 20 ⁇ m.
  • Printed circuit boards were prepared. Peel strength between the hard substrate 110 and the metal seed layer 140 of the eight printed circuit boards on which the copper plating layer 150 was formed were respectively measured. Finally, eight printed circuits are removed to reduce stress and stabilize the plating layer 150 by removing various factors including hydrogen generated in the plating layer 150 and moisture introduced into the plating layer 150. The substrate was heated at a heating temperature of 80 ° C. for 60 minutes. After the heating process, the peel strength between the rigid substrate 110 and the metal seed layer 140 of the eight printed circuit boards was measured, respectively.
  • One of the eight rigid substrates comprising a flame retardant-4 (FR-4) raw material is not surface treated, and the rest is subjected to Ion Assist Reaction (IAR), as referenced in the table of FIG. 6. Surface treatment respectively.
  • IAR Ion Assist Reaction
  • an alloy of nickel, nickel / chromium, and nickel / copper having a thickness of about 1 or 3 nm using DC sputtering or ion beam sputtering
  • the metal catalyst layers 130a of were respectively discontinuously deposited.
  • the metal seed layer 140 containing copper was dry deposited to a thickness of 500 nm on the eight hard substrates by the same sputtering method as the method for forming the metal catalyst layer 130a.
  • electrolytic plating is performed on the entire surface of the metal seed layer 140 to form a copper plating layer 150 having a thickness of 20 ⁇ m.
  • Printed circuit boards were prepared. Peel strength between the hard substrate 110 and the metal seed layer 140 of the eight printed circuit boards on which the copper plating layer 150 was formed were respectively measured. Finally, the eight printed circuits are removed to reduce stress and stabilize the plating layer 150 by removing various factors including hydrogen generated in the plating layer 150 and moisture introduced into the plating layer 150.
  • the substrate was heated at a heating temperature of 80 ° C. for 60 minutes. After the heating process, the peel strength between the rigid substrate 110 and the metal seed layer 140 of the eight printed circuit boards was measured, respectively.
  • Peel strength measured in each of Experiments 1 to 3 is as shown in the table of FIG. 6.
  • the printed circuit board including the metal catalyst layer 130a has a greater peeling strength and is not subjected to the surface treatment process. It can be seen that the peeling strength of the printed circuit board subjected to the surface treatment process is greater than that of the circuit board. In addition, it can be seen that the peeling strength of the printed circuit board after the heating process is further increased as compared with before the heating process.
  • the reduction in adhesion between the hardened substrate and the metal seed layer appearing after electroplating by a metal catalyst layer continuously or discontinuously formed between the surface-treated hard substrate and the metal seed layer and the heating process is alleviated and complemented. It is possible to quickly restore and stabilize the adhesive force.
  • a printed circuit board including a fine circuit pattern each having a line and a space of 15 ⁇ m or less Manufacturing becomes possible.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

Disclosed are an electroplating substrate containing a metal catalyst layer and a metal seed layer, and a method for producing a printed circuit board using the same. The electroplating substrate comprises a rigid substrate, a metal catalyst layer, and a metal seed layer. The rigid substrate includes a surface treatment layer containing a reactive functional group. The metal catalyst layer is continuously or discontinuously formed on the surface treatment layer of the rigid substrate through a dry deposition process. Through the dry deposition process, the metal seed layer is formed on the front surface of the rigid substrate on which the metal catalyst layer is formed. The metal catalyst layer is activated by a heating process. Various factors such as hydrogen and moisture are removed by both the heating process and the metal catalyst layer activated by the heating process, wherein the hydrogen and moisture are formed on an electroplated film during an electroplating process for producing a printed circuit board and affect the degradation of adhesion between the metal seed layer and the rigid substrate. Accordingly, the invention can reduce the time required for restoring the adhesion between the metal seed layer and the rigid substrate degraded after electroplating, and can increase the adhesion between the metal seed layer and the rigid substrate.

Description

금속 촉매층 및 금속 시드층을 포함하는 전해도금용 기판, 및 이를 이용한 인쇄회로기판의 제조 방법Electrolytic plating substrate comprising a metal catalyst layer and a metal seed layer, and a method of manufacturing a printed circuit board using the same
본 발명은 인쇄회로기판(Printed Circuit Board)의 재료 및 인쇄회로기판의 제조 방법에 관한 것으로서, 더욱 상세하게는, 금속 촉매층 및 금속 시드층을 포함하는 전해도금용 기판, 및 이를 이용한 인쇄회로기판의 제조 방법에 관한 것이다.The present invention relates to a material of a printed circuit board and a method of manufacturing a printed circuit board, and more particularly, to an electroplating substrate including a metal catalyst layer and a metal seed layer, and a printed circuit board using the same. It relates to a manufacturing method.
최근, 반도체 제조 기술이 발달함에 따라 인쇄회로기판이 경박 단소화 되고 있다. 이로 인하여, 인쇄회로기판상의 금속 배선의 폭과, 반도체 소자가 접속되는 비아 홀(via hole)의 크기도 점점 작아지고 있고, 더욱 미세한 회로패턴을 형성하기 위한 방법이 요구되고 있는 실정이다. 통상적으로 인쇄회로기판의 제조 과정에는 텐팅(tenting) 방식과 세미어디티브(semiadditive) 방식이 사용되고 있다. 텐팅 방식은 기판상에 적층된 동박 층 중, 회로 배선을 제외한 나머지 부분의 동박 층을 습식 에칭으로 제거하여 회로 패턴을 형성하는 것이다. 하지만 텐팅 방식은 습식 에칭의 특성상 미세 회로 패턴을 형성하는 데에 한계가 있다. 따라서 텐팅 방식은 비교적 넓은 배선 폭을 갖는 회로 패턴을 형성하는 데에 주로 사용되고 있다.Recently, with the development of semiconductor manufacturing technology, printed circuit boards are becoming thin and short. For this reason, the width of the metal wiring on the printed circuit board and the size of the via hole to which the semiconductor element is connected are also getting smaller, and there is a demand for a method for forming a finer circuit pattern. In general, a tenting method and a semiadditive method are used in the manufacturing process of a printed circuit board. The tenting method is to form a circuit pattern by removing the copper foil layer of the remaining portion except the circuit wiring by wet etching among the copper foil layers laminated on the substrate. However, the tenting method has a limitation in forming a fine circuit pattern due to the nature of wet etching. Therefore, the tenting method is mainly used to form circuit patterns having a relatively wide wiring width.
한편, 텐팅 방식에 비하여 비교적 정교하고 세밀한 회로 패턴을 형성할 수 있는 세미어디티브 방식은 미세 회로 패턴을 형성하는 데에 주로 사용되고 있다. 일반적인 세미어디티브 방식을 이용하여 미세 회로 패턴을 형성하는 과정을 간략히 설명하면 다음과 같다. 먼저, 무전해 도금 공정 또는 건식 증착 공정에 의해 기판의 표면에 금속 시드층이 형성되고, 이 금속 시드층 위에 드라이필름이 도포된다. 그 후, 드라이필름이 노광 및 현상되어, 회로 배선에 대응하는 부분의 금속 시드층이 외부에 노출되도록, 드라이필름이 패터닝 된다.On the other hand, the semi-additive method that can form a relatively fine and detailed circuit pattern compared to the tenting method is mainly used to form a fine circuit pattern. A process of forming a fine circuit pattern using a general semi-additive method will be briefly described as follows. First, a metal seed layer is formed on the surface of the substrate by an electroless plating process or a dry deposition process, and a dry film is applied on the metal seed layer. Thereafter, the dry film is exposed and developed to pattern the dry film so that the metal seed layer in the portion corresponding to the circuit wiring is exposed to the outside.
이 후, 드라이필름이 패터닝 된 기판에 전해도금 공정이 실행되어, 외부에 노출된 금속 시드층 상에 도금층이 형성된다. 그 결과, 도금층으로 이루어진 회로 배선이 형성된다. 드라이필름이 제거된 후 플래시(flash) 에칭 공정이 실행되어, 회로 배선 하부의 금속 시드층을 제외한 나머지 부분의 금속 시드층이 제거되어, 기판상에 회로 배선이 남게 된다.Thereafter, an electroplating process is performed on the substrate on which the dry film is patterned, and a plating layer is formed on the metal seed layer exposed to the outside. As a result, circuit wiring made of a plating layer is formed. After the dry film is removed, a flash etching process is performed to remove the metal seed layer except for the metal seed layer under the circuit wiring, leaving the circuit wiring on the substrate.
여기에서, 무전해 도금 공정 또는 건식 증착 공정에 의해 형성된 금속 시드층과, 기판 간의 접착력은, 인쇄회로기판을 이루는 재료에 따라 다양하나, BT(bismaleimide triazine), ABF(ajinomoto build-up film)와 같은 유리섬유 강화 에폭시계의 경성 기판 표면에, 무전해 도금 또는 건식 증착에 의해 경성 기판과의 충분한 접착력을 갖는 금속 시드층을 형성하는 것은 어렵다. Here, the adhesion between the metal seed layer formed by the electroless plating process or the dry deposition process and the substrate is varied depending on the material of the printed circuit board, but the bismaleimide triazine (BT) and the ajinomoto build-up film (ABF) It is difficult to form a metal seed layer on the surface of the same glass fiber reinforced epoxy-based rigid substrate with sufficient adhesion to the rigid substrate by electroless plating or dry deposition.
따라서 금속 시드층과 기판 간의 접착력을 강화시키기 위한 다양한 표면처리 방법들이 개발되고 있다. 하지만 금속 시드층과 기판 간의 접착력을 강화시키기 위한 종래의 표면처리 방법들은 아직까지 금속 시드층과 기판 간의 충분한 접착력을 실현하지 못하고 있다. 한편, 금속 시드층 형성 공정 이후에 실행되는 전해 도금 공정으로 인하여 금속 시드층과 기판 간의 접착력이 더욱 저하되는 현상이 발생하는데 이로 인해 금속 시드층과 기판 간의 접착력이 더욱 감소하므로 기판 재료를 형성하는 것이 힘들다. 도금 공정으로 인하여 발생하는 접착력 저하 현상은 시간이 경과함에 따라 회복되지만, 기판을 이루는 재료와, 금속 시드층과 기판 간의 접착력을 강화시키는 표면처리 공정의 종류에 따라, 접착력의 회복 시간과 회복되는 접착력의 값이 다르기 때문에, 아직까지 종래의 세미어디티브 방식을 사용하여 기판상에 미세 회로 패턴을 형성하는 데에는 제약이 있다.Accordingly, various surface treatment methods have been developed to enhance adhesion between the metal seed layer and the substrate. However, conventional surface treatment methods for enhancing adhesion between the metal seed layer and the substrate have not yet realized sufficient adhesion between the metal seed layer and the substrate. On the other hand, due to the electroplating process performed after the metal seed layer forming process, the adhesive force between the metal seed layer and the substrate is further lowered. As a result, the adhesion between the metal seed layer and the substrate is further reduced. Hard. Adhesion deterioration caused by the plating process is recovered over time, but depending on the material of the substrate and the type of surface treatment process to enhance the adhesion between the metal seed layer and the substrate, the recovery time of the adhesive force and the restored adhesive strength Since the value of is different, there is still a limitation in forming a fine circuit pattern on a substrate using a conventional semi-additive method.
본 발명은 표면 처리되어 반응성 작용기가 형성된 경성 기판과, 금속 시드층 사이에 연속 또는 불연속적으로 형성된 금속 촉매층을 포함하는 전해도금용 기판을 제공한다.The present invention provides a substrate for electroplating comprising a hard substrate having a surface treated to form a reactive functional group and a metal catalyst layer continuously or discontinuously formed between the metal seed layers.
본 발명은 금속 시드층과 경성 기판 간의 접착력을 저하시키는데 큰 영향을 미치는 수소 및 수분 등을 포함한 여러 요인들을, 가열 공정 및 가열 공정에 의해 활성화된 금속 촉매층에 의해 제거하여, 전해 도금 후 저하되는 경성 기판과 금속 시드층 간의 접착력 회복 시간을 단축하고, 전해 도금 막의 스트레스를 완화시키고 안정화시킬 수 있는 인쇄회로기판의 제조 방법을 제공한다.The present invention removes a number of factors including hydrogen and moisture, which have a great influence on lowering the adhesion between the metal seed layer and the hard substrate, by removing the metal catalyst layer activated by the heating process and the heating process, thereby reducing the hardness after electrolytic plating. Provided is a method of manufacturing a printed circuit board which can shorten the recovery time of adhesion between the substrate and the metal seed layer, and can alleviate and stabilize the stress of the electroplating film.
본 발명에 따른 전해도금용 기판은 경성 기판, 금속 촉매 층, 및 금속 시드(seed) 층을 포함한다. 경성 기판은 표면 처리 공정에 의해 형성된, 반응성 작용기를 포함하는 표면 처리 층을 포함한다. 금속 촉매 층은 경성 기판의 표면 처리 층 상에, 건식 증착 공정에 의해, 연속적으로 또는 불연속적으로 형성된다. 금속 시드층은 금속 촉매 층이 형성된 경성 기판 전면에, 건식 증착 공정에 의해 형성된다. 금속 촉매 층은 가열 공정에 의해 활성화된다. 활성화된 금속 촉매 층은, 인쇄회로기판의 제조 시, 금속 시드층 상에 회로 패턴을 형성하는 전해 도금 공정 중, 전해 도금 층 내에 생성된 수소와, 상기 전해 도금 층 내에 유입된 수분을 제거함으로써, 상기 수소 및 수분에 의해 감소된 상기 경성 기판과 상기 금속 시드층간의 접착력의 회복 시간을 단축시킨다.The electroplating substrate according to the present invention comprises a rigid substrate, a metal catalyst layer, and a metal seed layer. The rigid substrate includes a surface treatment layer containing reactive functional groups formed by a surface treatment process. The metal catalyst layer is formed continuously or discontinuously by a dry deposition process on the surface treatment layer of the rigid substrate. The metal seed layer is formed by a dry deposition process on the entire surface of the rigid substrate on which the metal catalyst layer is formed. The metal catalyst layer is activated by a heating process. The activated metal catalyst layer may be formed by removing hydrogen generated in the electrolytic plating layer and moisture introduced into the electrolytic plating layer during the electroplating process of forming a circuit pattern on the metal seed layer in manufacturing the printed circuit board. The recovery time of adhesion between the hard substrate and the metal seed layer reduced by the hydrogen and moisture is shortened.
본 발명에 따른 인쇄회로기판의 제조 방법은 표면 처리 공정에 의해, 경성 기판의 표면에 반응성 작용기를 포함하는 표면 처리 층을 형성하는 단계; 상기 경성 기판의 상기 표면 처리 층 상에, 건식 증착 공정에 의해, 연속적으로 또는 불연속적으로 금속 촉매 층을 형성하는 단계; 상기 금속 촉매 층이 형성된 상기 경성 기판 전면에 건식 증착 공정에 의해 금속 시드층을 형성하는 단계; 상기 금속 시드층상에 드라이 필름을 도포하는 단계; 상기 드라이 필름을 노광 및 현상하여, 설정된 회로 배선에 대응하는 부분의 금속 시드층이 외부에 노출되도록, 상기 드라이 필름을 패터닝하는 단계; 전해 도금 공정을 실행하여, 외부로 노출된 금속 시드층상에 도금 층을 형성함으로써, 도금 층으로 이루어진 회로 배선을 형성하는 단계; 상기 드라이 필름 패턴을 제거한 후, 플래시 에칭(flash etching) 공정을 실행하여, 상기 도금 층 하부의 금속 시드층을 제외한 나머지 부분의 금속 시드층을 제거하는 단계; 및 상기 도금 층이 형성된 경성 기판을 가열하는 가열 공정을 실행하는 단계를 포함한다.A method of manufacturing a printed circuit board according to the present invention includes forming a surface treatment layer including a reactive functional group on a surface of a rigid substrate by a surface treatment process; Forming a metal catalyst layer, continuously or discontinuously, on the surface treatment layer of the rigid substrate by a dry deposition process; Forming a metal seed layer on the entire surface of the rigid substrate on which the metal catalyst layer is formed by a dry deposition process; Applying a dry film on the metal seed layer; Exposing and developing the dry film to pattern the dry film so that the metal seed layer in the portion corresponding to the set circuit wiring is exposed to the outside; Performing an electrolytic plating process to form a plating layer on the externally exposed metal seed layer, thereby forming circuit wiring made of the plating layer; Removing the dry film pattern, and then performing a flash etching process to remove the metal seed layer except for the metal seed layer under the plating layer; And performing a heating process of heating the rigid substrate on which the plating layer is formed.
본 발명에 따르면, 전해 도금 공정 중 전해 도금 막에 생성되어, 금속 시드층과 경성 기판 간의 접착력을 저하시키는데 큰 영향을 미치는 수소 및 수분 등을 포함한 여러 요인들이, 가열 공정과, 가열 공정에 의해 활성화된 금속 촉매층에 의해 제거될 수 있다. 그 결과, 전해 도금 후 저하되는 경성 기판과 금속 시드층 간의 접착력 회복 시간이 단축될 수 있고, 전해 도금 막의 스트레스가 완화되어 안정화될 수 있다.According to the present invention, various factors, including hydrogen and moisture, which are generated in the electrolytic plating film during the electroplating process and have a great influence on reducing the adhesion between the metal seed layer and the rigid substrate, are activated by the heating process and the heating process. It can be removed by the metal catalyst layer. As a result, the adhesion recovery time between the hard substrate and the metal seed layer, which are degraded after electrolytic plating, can be shortened, and the stress of the electroplating film can be alleviated and stabilized.
도 1은 본 발명의 일 실시예에 따른 전해도금용 기판의 제조 과정을 나타내는 단면도이다.1 is a cross-sectional view showing a manufacturing process of an electroplating substrate according to an embodiment of the present invention.
도 2는 본 발명의 다른 실시예에 따른 전해도금용 기판의 제조 과정을 나타내는 단면도이다.2 is a cross-sectional view showing a manufacturing process of an electroplating substrate according to another embodiment of the present invention.
도 3은 본 발명의 일 실시예에 따른 인쇄회로기판의 제조 과정을 나타내는 단면도이다.3 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to an exemplary embodiment of the present invention.
도 4는 본 발명의 다른 실시예에 따른 인쇄회로기판의 제조 과정을 나타내는 단면도이다.4 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to another exemplary embodiment of the present invention.
도 5는 실험용 인쇄회로기판의 단면도이다.5 is a cross-sectional view of an experimental printed circuit board.
도 6은 도 5에 도시된 인쇄회로기판의 구성 및 각 공정 조건에 따른 박리 강도를 나타내는 표를 도시한 도면이다.FIG. 6 is a table illustrating a configuration of the printed circuit board illustrated in FIG. 5 and peel strengths according to respective process conditions.
이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 설명하기로 한다. 그러나, 본 발명은 이하에서 개시되는 실시예에 한정되는 것이 아니라 서로 다른 다양한 형태로 구현될 수 있으며, 단지 본 실시예는 본 발명의 개시가 완전하도록 하며 통상의 지식을 가진 자에게 발명의 범주를 완전하게 알려주기 위해 제공되는 것이다.Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the present invention. However, the present invention is not limited to the embodiments disclosed below, but may be embodied in various different forms, and only the embodiments are intended to complete the disclosure of the present invention and to those skilled in the art. It is provided for complete information.
도 1은 본 발명의 일 실시예에 따른 전해도금용 기판(101)의 제조 과정을 나타내는 단면도이다. 도 1의 (a)에 도시된 것과 같이, 경성 기판(110)에 표면 처리 공정이 실행된다. 표면 처리 공정은 이온보조 반응법, 이온빔 처리법, 플라즈마 처리법 중 적어도 어느 하나를 포함할 수 있다. 즉, 이온보조 반응법, 이온빔 처리법, 플라즈마 처리법 중 어느 하나, 또는 둘 이상의 방법을 혼용하여, 상기 표면 처리 공정이 실행될 수 있다. 플라즈마 처리법은 상압 플라즈마 처리법, DC 플라즈마 처리법, RF 플라즈마 처리법 중 어느 하나를 포함할 수 있다. 또한, 상기 표면 처리 공정에서 사용되는 이온 입자는, 아르곤을 포함하는 불활성 가스들 중 하나, 또는 질소, 수소, 헬륨, 산소, 암모니아를 포함하는 반응성 가스들 중 하나, 또는 상기 불활성 가스들 및 상기 반응성 가스들 중 적어도 두 개를 포함하는 혼합물을 포함할 수 있다. 상기 표면 처리 공정에서 사용되는 반응성 가스는, 산소, 질소, 암모니아, 수소를 포함하는 활성 가스들 중 하나, 또는 상기 활성 가스들 중 적어도 두 개를 포함하는 혼합 가스를 포함할 수 있다. 상기 표면 처리 공정의 결과, 도 1의 (b)에 도시된 것과 같이, 경성 기판(110)의 표면에 반응성 작용기(미도시)를 포함하는 표면 처리 층(120)이 형성된다.1 is a cross-sectional view showing a manufacturing process of an electroplating substrate 101 according to an embodiment of the present invention. As shown in FIG. 1A, a surface treatment process is performed on the rigid substrate 110. The surface treatment process may include at least one of an ion assist reaction method, an ion beam treatment method, and a plasma treatment method. That is, the surface treatment process may be performed by using any one of an ion assist reaction method, an ion beam treatment method, a plasma treatment method, or a mixture of two or more methods. The plasma treatment method may include any one of an atmospheric pressure plasma treatment method, a DC plasma treatment method, and an RF plasma treatment method. In addition, the ion particles used in the surface treatment process, one of the inert gases containing argon, or one of the reactive gases containing nitrogen, hydrogen, helium, oxygen, ammonia, or the inert gases and the reactive It may comprise a mixture comprising at least two of the gases. The reactive gas used in the surface treatment process may include one of active gases including oxygen, nitrogen, ammonia and hydrogen, or a mixed gas including at least two of the active gases. As a result of the surface treatment process, as shown in FIG. 1B, a surface treatment layer 120 including reactive functional groups (not shown) is formed on the surface of the rigid substrate 110.
이 후, 도 1의 (c)에 도시된 것과 같이, 경성 기판(110)의 표면 처리 층(120) 상에, 건식 증착 공정에 의해, 불연속적으로 금속 촉매 층(130a)이 형성된다. 이때, 금속 촉매 층(130a)은 경성 기판(110)의 표면의 형상에 따라 약 1∼40㎚의 두께로 형성될 수 있다. 상기 금속 촉매 층(130a)을 형성하기 위한 건식 증착 공정은, 이온빔 스퍼터링법, DC 스퍼터링법, RF 스퍼터링법, 증발법(evaporation) 중 어느 하나를 포함할 수 있다. 금속 촉매 층(130a)은 니켈(Ni), 크롬(Cr), 니켈 합금, 크롬 합금 중 어느 하나를 포함할 수 있다. 또한, 금속 촉매 층(130a)은, 니켈(Ni), 크롬(Cr), 니켈 합금, 크롬 합금 중 어느 하나를 포함하는 금속의, 산화물 또는 질화물을 포함할 수 있다. 도 1의 (d)에 도시된 것과 같이, 금속 촉매 층(130a)이 형성된 경성 기판(110) 전면에 건식 증착 공정에 의해 금속 시드층(140)이 형성된다. 상기 금속 시드층(140)을 형성하기 위한 건식 증착 공정은, 이온빔 스퍼터링법, DC 스퍼터링법, RF 스퍼터링법, 증발법(evaporation) 중 어느 하나를 포함할 수 있다. 금속 시드층(140)은 구리(Cu)를 포함한다.Thereafter, as shown in FIG. 1C, the metal catalyst layer 130a is formed discontinuously on the surface treatment layer 120 of the rigid substrate 110 by a dry deposition process. In this case, the metal catalyst layer 130a may be formed to a thickness of about 1 to 40 nm according to the shape of the surface of the rigid substrate 110. The dry deposition process for forming the metal catalyst layer 130a may include any one of ion beam sputtering, DC sputtering, RF sputtering, and evaporation. The metal catalyst layer 130a may include any one of nickel (Ni), chromium (Cr), nickel alloys, and chromium alloys. In addition, the metal catalyst layer 130a may include an oxide or a nitride of a metal including any one of nickel (Ni), chromium (Cr), nickel alloy, and chromium alloy. As shown in FIG. 1D, the metal seed layer 140 is formed by a dry deposition process on the entire surface of the hard substrate 110 on which the metal catalyst layer 130a is formed. The dry deposition process for forming the metal seed layer 140 may include any one of ion beam sputtering, DC sputtering, RF sputtering, and evaporation. The metal seed layer 140 includes copper (Cu).
상술한 과정에 의해 제조된 전해도금용 기판(101)을 이용하여 인쇄회로기판을 제조할 때, 금속 시드층(140) 상에 전해 도금 공정 및 가열 공정을 실행하면, 금속 촉매 층(130a)이 가열 공정에 의해 활성화된다. 활성화된 금속 촉매 층(130a)은, 인쇄회로기판의 제조 시, 금속 시드층(140) 상에 회로 패턴을 형성하는 전해 도금 공정에 의해 감소된 경성 기판(110)과 금속 시드층(140)간의 접착력이 회복되는데 걸리는 시간을 단축시킨다. 또한, 상기 표면 처리 공정에 의해, 경성 기판(110)과 금속 시드층(140)간의 접착력이 증진될 수 있다.When manufacturing a printed circuit board using the electroplating substrate 101 manufactured by the above-described process, if the electroplating process and heating process is performed on the metal seed layer 140, the metal catalyst layer 130a Activated by a heating process. The activated metal catalyst layer 130a is formed between the hard substrate 110 and the metal seed layer 140 reduced by an electroplating process of forming a circuit pattern on the metal seed layer 140 in manufacturing a printed circuit board. Shorten the time it takes for adhesion to recover. In addition, by the surface treatment process, the adhesion between the rigid substrate 110 and the metal seed layer 140 may be enhanced.
도 2는 본 발명의 다른 실시예에 따른 전해도금용 기판(102)의 제조 과정을 나타내는 단면도이다. 전해도금용 기판(102)의 제조 과정은 한 가지 차이점을 제외하고 상술한 전해도금용 기판(101)의 제조 과정과 유사하다. 따라서 설명의 중복을 피하기 위해, 본 실시예에서는 전해도금용 기판들(102, 101)의 제조 과정들 간의 차이점을 중심으로 설명하기로 한다. 전해도금용 기판들(102, 101)의 제조 과정들 간의 차이점은, 전해도금용 기판(102)의 제조 과정에서, 도 2의 (c)에 도시된 것과 같이, 경성 기판(110)의 표면 처리 층(120) 상에, 금속 촉매 층(130b)이 건식 증착 공정에 의해, 연속적으로 형성되는 것이다. 이때, 금속 촉매 층(130b)은 경성 기판(110)의 표면의 형상에 따라 40㎚이하의 두께로 형성될 수 있다. 경성 기판(110)의 표면 처리 층(120) 상에, 금속 촉매 층(130b)이 연속적으로 형성되므로, 전해도금용 기판(102)을 이용하여 인쇄회로기판을 제조할 때, 금속 시드층(140) 상에 전해 도금 공정 및 가열 공정을 실행한 후의 경성 기판(110)과 금속 시드층(140)간의 접착력의 회복 시간이 더욱 단축될 수 있다.2 is a cross-sectional view showing a manufacturing process of the electroplating substrate 102 according to another embodiment of the present invention. The manufacturing process of the electroplating substrate 102 is similar to the manufacturing process of the electroplating substrate 101 described above except for one difference. Therefore, in order to avoid duplication of description, the present embodiment will be described based on the difference between the manufacturing process of the electroplating substrates (102, 101). The difference between the manufacturing processes of the electroplating substrates 102 and 101 is that in the manufacturing process of the electroplating substrate 102, as shown in FIG. 2C, the surface treatment of the rigid substrate 110 is performed. On layer 120, metal catalyst layer 130b is formed continuously by a dry deposition process. In this case, the metal catalyst layer 130b may be formed to a thickness of 40 nm or less according to the shape of the surface of the rigid substrate 110. Since the metal catalyst layer 130b is continuously formed on the surface treatment layer 120 of the rigid substrate 110, the metal seed layer 140 when the printed circuit board is manufactured using the electroplating substrate 102. The recovery time of the adhesive force between the rigid substrate 110 and the metal seed layer 140 after performing the electroplating process and the heating process on the N may be further shortened.
도 3은 본 발명의 일 실시예에 따른 인쇄회로기판의 제조 과정을 나타내는 단면도이다. 도 3의 (a)에 도시된 것과 같이, 전해도금용 기판(101)(도 1의 (a) 내지 (d)에 도시된 과정에 의해 제조된 전해도금용 기판)의 금속 시드층(140)상에 드라이 필름(210)이 도포된다. 여기에서, 전해도금용 기판(101)의 제조 과정은 상술한 것과 동일하므로, 그 상세한 설명은 생략된다.3 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to an exemplary embodiment of the present invention. As shown in FIG. 3A, the metal seed layer 140 of the electroplating substrate 101 (the electroplating substrate manufactured by the process shown in FIGS. 1A to 1D). The dry film 210 is apply | coated on it. Here, since the manufacturing process of the electroplating substrate 101 is the same as described above, its detailed description is omitted.
도 3의 (b)에 도시된 것과 같이, 드라이 필름(210)이 노광 및 현상되고, 그 결과, 도 3의 (c)에 도시된 것과 같이, 설정된 회로 배선에 대응하는 부분의 금속 시드층(140)이 외부에 노출되도록, 드라이 필름(210)이 패터닝(patterning) 된다. 이 후, 도 3의 (d)에 도시된 것과 같이, 전해 도금 공정이 실행되어, 외부로 노출된 금속 시드층(140) 상에 도금 층(220)이 형성된다. 그 결과, 외부에 노출된 금속 시드층(140) 상에 도금 층(220)으로 이루어진 회로 배선이 형성된다. 여기에서, 회로 배선은 미세 회로 패턴으로서, 라인(line) 및 스페이스(space) 각각이 15㎛ 이하인 미세 회로 패턴일 수 있다.As shown in FIG. 3B, the dry film 210 is exposed and developed, and as a result, as shown in FIG. 3C, the metal seed layer of the portion corresponding to the set circuit wiring ( The dry film 210 is patterned so that the 140 is exposed to the outside. Thereafter, as illustrated in FIG. 3D, an electrolytic plating process is performed to form a plating layer 220 on the metal seed layer 140 exposed to the outside. As a result, a circuit wiring formed of the plating layer 220 is formed on the metal seed layer 140 exposed to the outside. Here, the circuit wiring may be a fine circuit pattern, and each may be a fine circuit pattern having a line and a space of 15 μm or less.
도 3의 (e)에 도시된 것과 같이, 드라이 필름 패턴(211)이 제거된 후, 플래시 에칭(flash etching) 공정이 실행된다. 그 결과, 도 3의 (f)에 도시된 것과 같이, 도금 층(220)의 하부의 금속 시드층(140)을 제외한 나머지 부분의 금속 시드층(140)이 제거된다. 이때, 도금 층(220)의 상부 표면도 약간 식각된다.As shown in FIG. 3E, after the dry film pattern 211 is removed, a flash etching process is performed. As a result, as shown in FIG. 3F, the metal seed layer 140 in the remaining portions except for the metal seed layer 140 under the plating layer 220 is removed. At this time, the upper surface of the plating layer 220 is also slightly etched.
그 후, 도 3의 (g)에 도시된 것과 같이, 도금 층(220)이 형성된 경성 기판(110)을 가열하는 가열 공정이 실행된다. 경성 기판(110)은 유리섬유 강화 에폭시계의 수지를 포함하는 기판일 수 있다. 유리섬유 강화 에폭시계의 수지는 예를 들어, FR-4(flame retardant-4), BT(bismaleimide triazine), ABF(ajinomoto build-up film) 등을 포함할 수 있다. 상기 가열 공정에서 최고 가열 온도는 유리 전이 온도(Tg; glass transition temperature)로 설정될 수 있고, 가열 시간의 범위는 10분∼120분으로 설정될 수 있다.Thereafter, as shown in FIG. 3G, a heating step of heating the rigid substrate 110 on which the plating layer 220 is formed is performed. The rigid substrate 110 may be a substrate including a glass fiber reinforced epoxy resin. The glass fiber reinforced epoxy resin may include, for example, flame retardant-4 (FR-4), bismaleimide triazine (BT), ajinomoto build-up film (ABF), or the like. In the heating process, the maximum heating temperature may be set to a glass transition temperature (Tg), and the heating time may be set to 10 minutes to 120 minutes.
상술한 과정에 의해 제조된 인쇄회로기판(201)은 경성 기판(110)과 금속 시드층(141) 사이에 금속 촉매 층(130a)을 포함하므로, 상기 전해 도금 공정으로 인하여 저하될 수 있는 경성 기판(110)과 금속 시드층(141)간의 접착력이, 가열 공정에 의해 활성화된 금속 촉매 층(130a)에 의해 빠르게 회복될 수 있다. 상기 전해 도금 공정이 실행되는 동안, 도금 층(220) 내에 수소가 생성되고, 도금 층(220) 내에 수분이 유입되는 등의 경성 기판(110)과 금속 시드층(141)간의 접착력을 저하시키는 여러 요인들이 도금 층(220)내에 발생될 수 있다. 하지만 상기 전해 도금 공정 이 후, 가열 공정이 실행되므로, 가열 공정과, 가열 공정에 의해 활성화된 금속 촉매 층(130a)에 의해, 경성 기판(110)과 금속 시드층(141)간의 접착력을 저하시키는 수소와 수분 등을 포함하는 여러 요인들이 제거될 수 있고, 전해 도금 막의 스트레스 완화 및 안정화가 도모될 수 있다. 활성화된 금속 촉매 층(130a)과 상기 가열 공정에 의해, 수소와 수분 등을 포함하는 여러 요인들이 제거되므로, 수소 및 수분 등을 포함하는 여러 요인들에 의해 감소된 경성 기판(110)과 금속 시드층(141)간의 접착력의 회복 시간이 단축될 수 있다.The printed circuit board 201 manufactured by the above-described process includes a metal catalyst layer 130a between the hard substrate 110 and the metal seed layer 141, and thus may be degraded due to the electroplating process. The adhesion between the 110 and the metal seed layer 141 can be quickly recovered by the metal catalyst layer 130a activated by the heating process. During the electrolytic plating process, hydrogen is generated in the plating layer 220, and moisture is introduced into the plating layer 220, thereby reducing adhesion between the hard substrate 110 and the metal seed layer 141. Factors may occur in the plating layer 220. However, since the heating process is performed after the electrolytic plating process, the adhesion between the rigid substrate 110 and the metal seed layer 141 is reduced by the heating process and the metal catalyst layer 130a activated by the heating process. Various factors including hydrogen, moisture, and the like can be eliminated, and stress relaxation and stabilization of the electroplating film can be achieved. Since the activated metal catalyst layer 130a and the heating process remove various factors including hydrogen and moisture, the hard substrate 110 and the metal seed reduced by various factors including hydrogen and moisture. The recovery time of the adhesion between the layers 141 can be shortened.
도 4는 본 발명의 다른 실시예에 따른 인쇄회로기판의 제조 과정을 나타내는 단면도이다. 인쇄회로기판(202)의 제조 과정은 한 가지 차이점을 제외하고 상술한 인쇄회로기판(201)의 제조 과정과 유사하다. 따라서 설명의 중복을 피하기 위해, 본 실시예에서는 인쇄회로기판들(202, 201)의 제조 과정들 간의 차이점을 중심으로 설명하기로 한다. 인쇄회로기판들(202, 201)의 제조 과정들 간의 차이점은, 인쇄회로기판(202)의 제조 과정에서, 도 4의 (a)에 도시된 것과 같이, 전해도금용 기판(102)(도 2의 (a) 내지 (d)에 도시된 과정에 의해 제조된 전해도금용 기판)이 사용된 것이다. 전해도금용 기판(102)은 경성 기판(110)의 표면 처리 층(120) 상에, 연속적으로 형성된 금속 촉매 층(130b)을 포함한다. 따라서, 전해 도금 공정에 의해 저하될 수 있는 경성 기판(110)과 금속 시드층(140)간의 접착력이, 가열 공정에 의해 활성화된 금속 촉매 층(130b)에 의해 더욱 빠르게 회복될 수 있다. 4 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to another exemplary embodiment of the present invention. The manufacturing process of the printed circuit board 202 is similar to the manufacturing process of the printed circuit board 201 described above with one difference. Therefore, in order to avoid duplication of description, the present embodiment will be described based on the difference between the manufacturing process of the printed circuit boards (202, 201). The difference between the manufacturing processes of the printed circuit boards 202 and 201 is that, in the manufacturing process of the printed circuit board 202, as shown in FIG. 4A, the electroplating substrate 102 (FIG. 2). Electroplating substrate prepared by the process shown in (a) to (d) of)) is used. The electroplating substrate 102 includes a metal catalyst layer 130b continuously formed on the surface treatment layer 120 of the rigid substrate 110. Therefore, the adhesive force between the hard substrate 110 and the metal seed layer 140, which may be degraded by the electrolytic plating process, may be restored more quickly by the metal catalyst layer 130b activated by the heating process.
즉, 활성화된 금속 촉매 층(130b)과 상기 가열 공정에 의해, 상기 전해 도금 공정 중, 도금 층(220) 내에 생성된 수소와 도금 층(220) 내에 유입된 수분 등을 포함하는 여러 요인들이 제거되므로, 수소 및 수분 등을 포함하는 여러 요인들에 의해 감소된 경성 기판(110)과 금속 시드층(141)간의 접착력의 회복 시간이 단축될 수 있다. 또, 가열 공정과, 가열 공정에 의해 활성화된 금속 촉매 층(130b)에 의해, 전해 도금 막의 스트레스 완화 및 안정화가 도모될 수 있다.That is, by the activated metal catalyst layer 130b and the heating process, various factors including hydrogen generated in the plating layer 220 and moisture introduced into the plating layer 220 are removed during the electrolytic plating process. Therefore, the recovery time of the adhesive force between the hard substrate 110 and the metal seed layer 141 reduced by various factors including hydrogen and moisture may be shortened. In addition, by the heating process and the metal catalyst layer 130b activated by the heating process, stress relaxation and stabilization of the electroplating film can be achieved.
다음으로, 도 5를 참고하여, 경성 기판 및 금속 촉매 층의 재료와, 각 공정 조건에 따른 실험용 인쇄회로기판의 박리 강도를 설명한다. 도 5의 (a)는 도 1의 (d)에 도시된 전해도금용 기판의 전체 표면상에 전해 도금한 후 가열 처리한 실험용 인쇄회로기판의 단면도이고, 도 5의 (b)는 도 5의 (a)에 도시된 인쇄회로기판과의 대조를 위한 인쇄회로기판으로서 금속 촉매층을 포함하지 않는 인쇄회로기판의 단면도이다. 도 6은 도 5의 (a) 및 (b)에 도시된 인쇄회로기판의 구성 및 각 공정 조건에 따른 박리 강도를 나타내는 표를 도시한 도면이다.Next, the peeling strength of the material of the hard substrate and the metal catalyst layer and the test printed circuit board according to the process conditions will be described with reference to FIG. 5. FIG. 5A is a cross-sectional view of an experimental printed circuit board electrolytically plated on the entire surface of the electroplating substrate shown in FIG. 1D and then heat treated, and FIG. Fig. 1 is a sectional view of a printed circuit board which does not include a metal catalyst layer as a printed circuit board for checking with the printed circuit board shown in (a). FIG. 6 is a table showing a configuration of the printed circuit board illustrated in FIGS. 5A and 5B and peel strengths according to respective process conditions.
(실험 1)(Experiment 1)
BT(bismaleimide triazine) 원자재를 포함하는 9개의 경성 기판을, 도 6의 표에서 참고되는 것과 같이, 이온빔 보조 반응법(IAR; Ion Assist Reaction)에 의해 각각 표면 처리하거나 또는 표면 처리 없이, DC 스퍼터링법 또는 이온빔 스퍼터링법을 이용하여, 12개의 경성 기판상에 약 1∼40㎚의 두께로 니켈, 니켈/크롬의 합금, 니켈/구리의 합금의 금속 촉매 층(130a)을 각각 연속, 불연속적으로 증착하였다. 이 후, 금속 촉매 층(130a)을 형성하는 방법과 동일한 스퍼터링법에 의해, 14개의 경성 기판상에 구리를 포함하는 금속 시드층(140)을 500㎚의 두께로 건식 증착하였다. 그 후, 도 5의 (a) 또는 (b)에 도시된 것과 같이, 금속 시드층(140)의 전면에 전해 도금을 실행하여, 20㎛의 두께로 구리 도금 층(150)을 형성하여, 14개의 인쇄회로기판을 제조하였다. 구리 도금 층(150)이 형성된 14개의 인쇄회로기판들의 경성 기판(110)과 금속 시드층(140) 간의 박리 강도를 각각 측정하였다. 마지막으로, 도금 층(150)에 생성된 수소와, 도금 층(150)에 유입된 수분 등을 포함하는 여러 요인들을 제거하여, 도금 층(150)의 스트레스 완화 및 안정화를 위해, 14개의 인쇄회로기판을 가열 온도 80℃에서 60분 동안 가열하였다. 가열 공정 후, 14개의 인쇄회로기판들의 경성 기판(110)과 금속 시드층(140) 간의 박리 강도를 각각 측정하였다.Nine rigid substrates containing BT (bismaleimide triazine) raw materials were subjected to DC sputtering, respectively, with or without surface treatment by Ion Assist Reaction (IAR), as referenced in the table of FIG. 6. Or by depositing a metal catalyst layer 130a of nickel, an alloy of nickel / chromium, and an alloy of nickel / copper with a thickness of about 1 to 40 nm on 12 rigid substrates by using ion beam sputtering. It was. Thereafter, a metal seed layer 140 containing copper was dry deposited to a thickness of 500 nm on 14 rigid substrates by the same sputtering method as the method of forming the metal catalyst layer 130a. Thereafter, as shown in (a) or (b) of FIG. 5, electrolytic plating is performed on the entire surface of the metal seed layer 140 to form a copper plating layer 150 having a thickness of 20 μm. Printed circuit boards were prepared. Peel strength between the hard substrate 110 and the metal seed layer 140 of the 14 printed circuit boards on which the copper plating layer 150 was formed was measured. Finally, 14 printed circuits are removed to reduce stress and stabilize the plating layer 150 by removing various factors including hydrogen generated in the plating layer 150 and moisture introduced into the plating layer 150. The substrate was heated at a heating temperature of 80 ° C. for 60 minutes. After the heating process, the peel strength between the rigid substrate 110 and the metal seed layer 140 of the 14 printed circuit boards was measured, respectively.
(실험 2)(Experiment 2)
ABF(ajinomoto build-up film)와 BT(bismaleimide triazine) 원자재를 포함하는 8개의 경성 기판을, 도 6의 표에서 참고되는 것과 같이, 상압 플라즈마 처리법(APP; Atmospheric Pressure Plasma)에 의해 표면 처리하거나 또는 표면 처리 없이, DC 스퍼터링법 또는 이온빔 스퍼터링법을 이용하여, 6개의 경성 기판상에 약 1 또는 3㎚의 두께로 니켈/크롬의 합금 또는 니켈/구리의 합금의 금속 촉매 층(130a)을 각각 불연속적으로 증착하였다. 이 후, 금속 촉매 층(130a)을 형성하는 방법과 동일한 스퍼터링법에 의해, 8개의 경성 기판상에 구리를 포함하는 금속 시드층(140)을 500㎚의 두께로 건식 증착하였다. 그 후, 도 5의 (a) 또는 (b)에 도시된 것과 같이, 금속 시드층(140)의 전면에 전해 도금을 실행하여, 20㎛의 두께로 구리 도금 층(150)을 형성하여, 8개의 인쇄회로기판을 제조하였다. 구리 도금 층(150)이 형성된 8개의 인쇄회로기판들의 경성 기판(110)과 금속 시드층(140) 간의 박리 강도를 각각 측정하였다. 마지막으로, 도금 층(150)에 생성된 수소와, 도금 층(150)에 유입된 수분 등을 포함하는 여러 요인들을 제거하여, 도금 층(150)의 스트레스 완화 및 안정화를 위해, 8개의 인쇄회로기판을 가열 온도 80℃에서 60분 동안 가열하였다. 가열 공정 후, 8개의 인쇄회로기판들의 경성 기판(110)과 금속 시드층(140) 간의 박리 강도를 각각 측정하였다.Eight rigid substrates comprising an ajinomoto build-up film (ABF) and a bismaleimide triazine (BT) raw material were surface treated by an Atmospheric Pressure Plasma (APP), as referenced in the table of FIG. Without surface treatment, a metal catalyst layer 130a of an alloy of nickel / chromium or an alloy of nickel / copper is respectively fired on a thickness of about 1 or 3 nm on six rigid substrates using DC sputtering or ion beam sputtering. Deposited continuously. Thereafter, the metal seed layer 140 containing copper was dry deposited to a thickness of 500 nm on the eight rigid substrates by the same sputtering method as the method for forming the metal catalyst layer 130a. Thereafter, as shown in (a) or (b) of FIG. 5, electrolytic plating is performed on the entire surface of the metal seed layer 140 to form a copper plating layer 150 having a thickness of 20 μm. Printed circuit boards were prepared. Peel strength between the hard substrate 110 and the metal seed layer 140 of the eight printed circuit boards on which the copper plating layer 150 was formed were respectively measured. Finally, eight printed circuits are removed to reduce stress and stabilize the plating layer 150 by removing various factors including hydrogen generated in the plating layer 150 and moisture introduced into the plating layer 150. The substrate was heated at a heating temperature of 80 ° C. for 60 minutes. After the heating process, the peel strength between the rigid substrate 110 and the metal seed layer 140 of the eight printed circuit boards was measured, respectively.
(실험 3)(Experiment 3)
FR-4(flame retardant-4) 원자재를 포함하는 8개의 경성 기판 중 하나는 표면 처리하지 않고, 나머지는 도 6의 표에서 참고되는 것과 같이, 이온빔 보조 반응법(IAR; Ion Assist Reaction)에 의해 각각 표면 처리한다. 이 후, 표면 처리된 7개의 경성 기판 중 6개의 경성 기판상에, DC 스퍼터링법 또는 이온빔 스퍼터링법을 이용하여, 약 1 또는 3㎚의 두께로 니켈, 니켈/크롬의 합금, 니켈/구리의 합금의 금속 촉매 층(130a)을 각각 불연속적으로 증착하였다. 이 후, 금속 촉매 층(130a)을 형성하는 방법과 동일한 스퍼터링법에 의해, 8개의 경성 기판상에 구리를 포함하는 금속 시드층(140)을 500㎚의 두께로 건식 증착하였다. 그 후, 도 5의 (a) 또는 (b)에 도시된 것과 같이, 금속 시드층(140)의 전면에 전해 도금을 실행하여, 20㎛의 두께로 구리 도금 층(150)을 형성하여, 8개의 인쇄회로기판을 제조하였다. 구리 도금 층(150)이 형성된 8개의 인쇄회로기판들의 경성 기판(110)과 금속 시드층(140) 간의 박리 강도를 각각 측정하였다. 마지막으로, 도금 층(150)에 생성된 수소와, 도금 층(150)에 유입된 수분 등을 포함하는 여러 요인들을 제거하여, 도금 층(150)의 스트레스 완화 및 안정화를 위해, 8개의 인쇄회로기판을 가열 온도 80℃에서 60분 동안 가열하였다. 가열 공정 후, 8개의 인쇄회로기판들의 경성 기판(110)과 금속 시드층(140) 간의 박리 강도를 각각 측정하였다.One of the eight rigid substrates comprising a flame retardant-4 (FR-4) raw material is not surface treated, and the rest is subjected to Ion Assist Reaction (IAR), as referenced in the table of FIG. 6. Surface treatment respectively. Thereafter, on six of the seven surface-treated hard substrates, an alloy of nickel, nickel / chromium, and nickel / copper having a thickness of about 1 or 3 nm using DC sputtering or ion beam sputtering The metal catalyst layers 130a of were respectively discontinuously deposited. Thereafter, the metal seed layer 140 containing copper was dry deposited to a thickness of 500 nm on the eight hard substrates by the same sputtering method as the method for forming the metal catalyst layer 130a. Thereafter, as shown in (a) or (b) of FIG. 5, electrolytic plating is performed on the entire surface of the metal seed layer 140 to form a copper plating layer 150 having a thickness of 20 μm. Printed circuit boards were prepared. Peel strength between the hard substrate 110 and the metal seed layer 140 of the eight printed circuit boards on which the copper plating layer 150 was formed were respectively measured. Finally, the eight printed circuits are removed to reduce stress and stabilize the plating layer 150 by removing various factors including hydrogen generated in the plating layer 150 and moisture introduced into the plating layer 150. The substrate was heated at a heating temperature of 80 ° C. for 60 minutes. After the heating process, the peel strength between the rigid substrate 110 and the metal seed layer 140 of the eight printed circuit boards was measured, respectively.
상기의 실험 1 내지 실험 3에서 각각 측정된 박리 강도는 도 6의 표에 나타낸 것과 같다. 표에서 참고되는 것과 같이, 금속 촉매 층(130a)을 포함하지 않는 인쇄회로기판에 비하여, 금속 촉매 층(130a)을 포함하는 인쇄회로기판의 박리 강도가 더 크고, 표면 처리 공정을 실행하지 않은 인쇄회로기판에 비하여 표면 처리 공정을 실행한 인쇄회로기판의 박리 강도가 더 큰 것을 알 수 있다. 또한, 가열 공정을 실행하기 전에 비하여, 가열 공정을 실행한 후의 인쇄회로기판의 박리 강도가 더 증가한 것을 알 수 있다.Peel strength measured in each of Experiments 1 to 3 is as shown in the table of FIG. 6. As referred to in the table, compared to the printed circuit board not including the metal catalyst layer 130a, the printed circuit board including the metal catalyst layer 130a has a greater peeling strength and is not subjected to the surface treatment process. It can be seen that the peeling strength of the printed circuit board subjected to the surface treatment process is greater than that of the circuit board. In addition, it can be seen that the peeling strength of the printed circuit board after the heating process is further increased as compared with before the heating process.
상기한 실시 예들은 본 발명을 설명하기 위한 것으로서 본 발명이 이들 실시 예에 국한되는 것은 아니며, 본 발명의 범위 내에서 다양한 실시예가 가능하다. 또한 설명되지는 않았으나, 균등한 수단도 또한 본 발명에 그대로 결합되는 것이라 할 것이다. 따라서 본 발명의 진정한 보호범위는 아래의 특허청구범위에 의하여 정해져야 할 것이다.The above embodiments are for explaining the present invention, and the present invention is not limited to these embodiments, and various embodiments are possible within the scope of the present invention. In addition, although not described, equivalent means will also be referred to as incorporated in the present invention. Therefore, the true scope of the present invention will be defined by the claims below.
본 발명에 따르면, 표면 처리된 경성 기판과 금속 시드층 사이에 연속 또는 불연속적으로 형성된 금속 촉매 층과, 가열 공정에 의해, 전해 도금 후 나타나는 경성 기판과 금속 시드층간의 접착력 저하 현상이 완화 및 보완되고, 신속한 접착력의 회복 및 안정화가 가능해진다. 또한, 경성 기판과 금속 시드층간의 접착력이 강화된 전해도금용 기판을 이용하여 세미어디티브 방식으로, 라인(line) 및 스페이스(space) 각각이 15㎛ 이하인 미세 회로 패턴을 포함하는 인쇄회로기판의 제조가 가능해진다.According to the present invention, the reduction in adhesion between the hardened substrate and the metal seed layer appearing after electroplating by a metal catalyst layer continuously or discontinuously formed between the surface-treated hard substrate and the metal seed layer and the heating process is alleviated and complemented. It is possible to quickly restore and stabilize the adhesive force. In addition, in a semi-additive manner by using an electroplating substrate having enhanced adhesion between the rigid substrate and the metal seed layer, a printed circuit board including a fine circuit pattern each having a line and a space of 15 μm or less Manufacturing becomes possible.

Claims (13)

  1. 표면 처리 공정에 의해 형성된, 반응성 작용기를 포함하는 표면 처리 층을 포함하는 경성 기판;A rigid substrate comprising a surface treatment layer comprising a reactive functional group formed by a surface treatment process;
    상기 경성 기판의 상기 표면 처리 층 상에, 건식 증착 공정에 의해, 연속적으로 또는 불연속적으로 형성된 금속 촉매 층; 및A metal catalyst layer formed continuously or discontinuously on the surface treatment layer of the rigid substrate by a dry deposition process; And
    상기 금속 촉매 층이 형성된 상기 경성 기판 전면 상에, 건식 증착 공정에 의해 형성된 금속 시드(seed) 층을 포함하고,A metal seed layer formed by a dry deposition process on the entire surface of the rigid substrate on which the metal catalyst layer is formed,
    상기 금속 촉매 층은 가열 공정에 의해 활성화되고, 활성화된 금속 촉매 층은, 인쇄회로기판의 제조 시, 상기 금속 시드층 상에 회로 패턴을 형성하는 전해 도금 공정 중, 전해 도금 층 내에 생성된 수소와, 상기 전해 도금 층 내에 유입된 수분을 제거함으로써, 상기 수소 및 수분에 의해 감소된 상기 경성 기판과 상기 금속 시드층간의 접착력의 회복 시간을 단축시키는 전해도금용 기판.The metal catalyst layer is activated by a heating process, and the activated metal catalyst layer comprises hydrogen and hydrogen generated in the electrolytic plating layer during the electroplating process of forming a circuit pattern on the metal seed layer in manufacturing a printed circuit board. And removing the moisture introduced into the electrolytic plating layer, thereby shortening a recovery time of adhesion between the hard substrate and the metal seed layer reduced by the hydrogen and moisture.
  2. 제1항에 있어서,The method of claim 1,
    상기 금속 촉매 층은, 니켈(Ni), 크롬(Cr), 니켈 합금, 크롬 합금 중 어느 하나를 포함하는 전해도금용 기판.The metal catalyst layer is an electroplating substrate comprising any one of nickel (Ni), chromium (Cr), nickel alloy, and chromium alloy.
  3. 제1항에 있어서,The method of claim 1,
    상기 금속 촉매 층은, 니켈(Ni), 크롬(Cr), 니켈 합금, 크롬 합금 중 어느 하나를 포함하는 금속의, 산화물 또는 질화물을 포함하는 전해도금용 기판.The metal catalyst layer is an electroplating substrate comprising an oxide or nitride of a metal containing any one of nickel (Ni), chromium (Cr), nickel alloy, and chromium alloy.
  4. 제1항에 있어서,The method of claim 1,
    상기 금속 시드층은 구리(Cu)를 포함하는 전해도금용 기판.The metal seed layer is an electroplating substrate comprising copper (Cu).
  5. 표면 처리 공정에 의해, 경성 기판의 표면에 반응성 작용기를 포함하는 표면 처리 층을 형성하는 단계;Forming a surface treatment layer comprising reactive functional groups on the surface of the rigid substrate by a surface treatment process;
    상기 경성 기판의 상기 표면 처리 층 상에, 건식 증착 공정에 의해, 연속적으로 또는 불연속적으로 금속 촉매 층을 형성하는 단계;Forming a metal catalyst layer, continuously or discontinuously, on the surface treatment layer of the rigid substrate by a dry deposition process;
    상기 금속 촉매 층이 형성된 상기 경성 기판 전면 상에 건식 증착 공정에 의해 금속 시드층을 형성하는 단계;Forming a metal seed layer on a front surface of the rigid substrate on which the metal catalyst layer is formed by a dry deposition process;
    상기 금속 시드층상에 드라이 필름을 도포하는 단계;Applying a dry film on the metal seed layer;
    상기 드라이 필름을 노광 및 현상하여, 설정된 회로 배선에 대응하는 부분의 금속 시드층이 외부에 노출되도록, 상기 드라이 필름을 패터닝하는 단계;Exposing and developing the dry film to pattern the dry film so that the metal seed layer in the portion corresponding to the set circuit wiring is exposed to the outside;
    전해 도금 공정을 실행하여, 외부로 노출된 금속 시드층상에 도금 층을 형성함으로써, 도금 층으로 이루어진 회로 배선을 형성하는 단계;Performing an electrolytic plating process to form a plating layer on the externally exposed metal seed layer, thereby forming circuit wiring made of the plating layer;
    상기 드라이 필름 패턴을 제거한 후, 플래시 에칭(flash etching) 공정을 실행하여, 상기 도금 층 하부의 금속 시드층을 제외한 나머지 부분의 금속 시드층을 제거하는 단계; 및Removing the dry film pattern, and then performing a flash etching process to remove the metal seed layer except for the metal seed layer under the plating layer; And
    상기 도금 층이 형성된 경성 기판을 가열하는 가열 공정을 실행하는 단계를 포함하고,Performing a heating process of heating the rigid substrate on which the plating layer is formed,
    상기 가열 공정에 의해 활성화된 금속 촉매 층과 상기 가열 공정에 의해, 상기 전해 도금 공정 중, 상기 도금 층 내에 생성된 수소와 상기 도금 층 내에 유입된 수분이 제거됨으로써, 상기 수소 및 수분에 의해 감소된 상기 경성 기판과 상기 금속 시드층간의 접착력의 회복 시간이 단축되는 인쇄회로기판의 제조 방법.By the metal catalyst layer activated by the heating process and the heating process, hydrogen generated in the plating layer and moisture introduced into the plating layer are removed during the electrolytic plating process, thereby reducing the hydrogen and moisture. And a recovery time of adhesion between the rigid substrate and the metal seed layer is shortened.
  6. 제5항에 있어서,The method of claim 5,
    상기 경성 기판은 유리섬유 강화 에폭시계의 수지를 포함하는 기판이고,The rigid substrate is a substrate containing a glass fiber reinforced epoxy resin,
    상기 가열 공정의 최고 가열 온도는 유리 전이 온도(Tg; glass transition temperature)이고, 가열 시간의 범위는 10분∼120분인 인쇄회로기판의 제조 방법.The maximum heating temperature of the heating process is a glass transition temperature (Tg), the heating time range of 10 minutes to 120 minutes manufacturing method of a printed circuit board.
  7. 제5항에 있어서,The method of claim 5,
    상기 금속 촉매 층은, 니켈(Ni), 크롬(Cr), 니켈 합금, 크롬 합금 중 어느 하나를 포함하는 인쇄회로기판의 제조 방법.The metal catalyst layer, nickel (Ni), chromium (Cr), a nickel alloy, a method of manufacturing a printed circuit board containing any one of chromium alloy.
  8. 제5항에 있어서,The method of claim 5,
    상기 금속 촉매 층은, 니켈(Ni), 크롬(Cr), 니켈 합금, 크롬 합금 중 어느 하나를 포함하는 금속의, 산화물 또는 질화물을 포함하는 인쇄회로기판의 제조 방법.The metal catalyst layer is a method of manufacturing a printed circuit board comprising an oxide or nitride of a metal containing any one of nickel (Ni), chromium (Cr), nickel alloy, chromium alloy.
  9. 제5항에 있어서,The method of claim 5,
    상기 표면 처리 공정은, 이온보조 반응법, 이온빔 처리법, 플라즈마 처리법 중 적어도 어느 하나를 포함하는 인쇄회로기판의 제조 방법.The surface treatment process includes at least one of an ion assist reaction method, an ion beam treatment method, and a plasma treatment method.
  10. 제9항에 있어서,The method of claim 9,
    상기 표면 처리 공정에서 사용되는 이온 입자는, 아르곤을 포함하는 불활성 가스들 중 하나, 또는 질소, 수소, 헬륨, 산소, 암모니아를 포함하는 반응성 가스들 중 하나, 또는 상기 불활성 가스들 및 상기 반응성 가스들 중 적어도 두 개를 포함하는 혼합물을 포함하는 인쇄회로기판의 제조 방법.The ion particles used in the surface treatment process may include one of inert gases containing argon, or one of reactive gases including nitrogen, hydrogen, helium, oxygen, and ammonia, or the inert gases and the reactive gases. Method of manufacturing a printed circuit board comprising a mixture comprising at least two of them.
  11. 제9항에 있어서,The method of claim 9,
    상기 표면 처리 공정에서 사용되는 반응성 가스는, 산소, 질소, 암모니아, 수소를 포함하는 활성 가스들 중 하나, 또는 상기 활성 가스들 중 적어도 두 개를 포함하는 혼합 가스를 포함하는 인쇄회로기판의 제조 방법.The reactive gas used in the surface treatment process may include one of active gases including oxygen, nitrogen, ammonia and hydrogen, or a mixed gas including at least two of the active gases. .
  12. 제5항에 있어서,The method of claim 5,
    상기 금속 촉매 층 또는 상기 금속 시드층을 형성하기 위한 건식 증착 공정은, 이온빔 스퍼터링법, DC 스퍼터링법, RF 스퍼터링법, 증발법(evaporation) 중 어느 하나를 포함하는 인쇄회로기판의 제조 방법.The dry deposition process for forming the metal catalyst layer or the metal seed layer may include any one of an ion beam sputtering method, a DC sputtering method, an RF sputtering method, and an evaporation method.
  13. 제5항에 있어서,The method of claim 5,
    상기 금속 시드층은 구리(Cu)를 포함하는 인쇄회로기판의 제조 방법.The metal seed layer is a manufacturing method of a printed circuit board containing copper (Cu).
PCT/KR2009/001460 2008-04-29 2009-03-23 Electroplating substrate containing metal catalyst layer and metal seed layer, and method for producing printed circuit board using the same WO2009134009A2 (en)

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US10396007B2 (en) 2016-03-03 2019-08-27 Infineon Technologies Ag Semiconductor package with plateable encapsulant and a method for manufacturing the same
US11081417B2 (en) 2016-03-03 2021-08-03 Infineon Technologies Ag Manufacturing a package using plateable encapsulant

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