WO2009072421A1 - Ｃｍｏｓ半導体装置およびその製造方法 - Google Patents

Ｃｍｏｓ半導体装置およびその製造方法 Download PDF

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Publication number
WO2009072421A1
WO2009072421A1 PCT/JP2008/071392 JP2008071392W WO2009072421A1 WO 2009072421 A1 WO2009072421 A1 WO 2009072421A1 JP 2008071392 W JP2008071392 W JP 2008071392W WO 2009072421 A1 WO2009072421 A1 WO 2009072421A1
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Prior art keywords
insulating layer
semiconductor device
same
manufacturing
cmos semiconductor
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PCT/JP2008/071392
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English (en)
French (fr)
Inventor
Nobuyuki Mise
Takahisa Eimori
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Renesas Technology Corp.
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Publication date
Application filed by Renesas Technology Corp. filed Critical Renesas Technology Corp.
Priority to JP2009544638A priority Critical patent/JP5284276B2/ja
Priority to CN200880119004.4A priority patent/CN101884101B/zh
Priority to US12/745,638 priority patent/US20100258878A1/en
Publication of WO2009072421A1 publication Critical patent/WO2009072421A1/ja
Priority to US13/567,869 priority patent/US8698249B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823857—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
    • H01L29/4975—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 being a silicide layer, e.g. TiSi2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
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    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Composite Materials (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

　ｎ型ＭＯＳＦＥＴとｐ型ＭＯＳＦＥＴとを含むＣＭＯＳ半導体装置において、ｎ型ＭＯＳＦＥＴのゲート電極は、ｈｉｇｈ－ｋ材料からなる第１絶縁層と、第１絶縁層の上に設けられ金属材料からなる第１金属層を有し、ｐ型ＭＯＳＦＥＴのゲート電極は、ｈｉｇｈ－ｋ材料からなる第２絶縁層と、第２絶縁層の上に設けられ金属材料からなる第２金属層を有し、第１絶縁層と第２絶縁層が異なるｈｉｇｈ－ｋ材料からなり、第１金属層と第２金属層が同一の金属材料からなる。
PCT/JP2008/071392 2007-12-03 2008-11-26 Ｃｍｏｓ半導体装置およびその製造方法 WO2009072421A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2009544638A JP5284276B2 (ja) 2007-12-03 2008-11-26 Ｃｍｏｓ半導体装置およびその製造方法
CN200880119004.4A CN101884101B (zh) 2007-12-03 2008-11-26 Cmos半导体装置及其制造方法
US12/745,638 US20100258878A1 (en) 2007-12-03 2008-11-26 Cmos semiconductor device and method for manufacturing the same
US13/567,869 US8698249B2 (en) 2007-12-03 2012-08-06 CMOS semiconductor device and method for manufacturing the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-312010 2007-12-03
JP2007312010 2007-12-03

Related Child Applications (2)

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US12/745,638 A-371-Of-International US20100258878A1 (en) 2007-12-03 2008-11-26 Cmos semiconductor device and method for manufacturing the same
US13/567,869 Division US8698249B2 (en) 2007-12-03 2012-08-06 CMOS semiconductor device and method for manufacturing the same

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WO2009072421A1 true WO2009072421A1 (ja) 2009-06-11

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US (2) US20100258878A1 (ja)
JP (1) JP5284276B2 (ja)
CN (1) CN101884101B (ja)
TW (1) TWI492367B (ja)
WO (1) WO2009072421A1 (ja)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010135735A (ja) * 2008-07-01 2010-06-17 Panasonic Corp 半導体装置及びその製造方法
JP2010262977A (ja) * 2009-04-30 2010-11-18 Renesas Electronics Corp 半導体装置の製造方法
WO2010150332A1 (ja) * 2009-06-24 2010-12-29 パナソニック株式会社 半導体装置及びその製造方法
WO2010149058A1 (zh) * 2009-06-26 2010-12-29 中国科学院微电子研究所 控制器件阀值电压的cmosfet结构及其制造方法
DE102009031155A1 (de) * 2009-06-30 2011-01-05 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG Gleichmäßige Metallgatestapel mit großem ε durch Einstellen einer Schwellwertspannung für komplexe Transistoren durch Diffundieren einer Metallsorte vor der Gatestrukturierung
JP2011003664A (ja) * 2009-06-17 2011-01-06 Renesas Electronics Corp 半導体装置およびその製造方法
JP2011009321A (ja) * 2009-06-24 2011-01-13 Fujitsu Semiconductor Ltd 半導体装置の製造方法
JP2011009373A (ja) * 2009-06-24 2011-01-13 Renesas Electronics Corp 半導体装置の製造方法および半導体装置
JP2011029483A (ja) * 2009-07-28 2011-02-10 Renesas Electronics Corp 半導体装置およびその製造方法
JP2011035229A (ja) * 2009-08-04 2011-02-17 Fujitsu Semiconductor Ltd 半導体装置及びその製造方法
JP2011077421A (ja) * 2009-10-01 2011-04-14 Renesas Electronics Corp 半導体装置の製造方法
US8288221B2 (en) 2008-08-13 2012-10-16 Renesas Electronics Corporation Method of manufacturing semiconductor device and semiconductor device
JP2013506289A (ja) * 2009-09-28 2013-02-21 フリースケール セミコンダクター インコーポレイテッド 酸素拡散バリア層を有する半導体デバイスおよびそれを製造するための方法
JP5456150B2 (ja) * 2010-02-17 2014-03-26 パナソニック株式会社 半導体装置及びその製造方法

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8120126B2 (en) 2009-03-02 2012-02-21 Qualcomm Incorporated Magnetic tunnel junction device and fabrication
TWI488240B (zh) * 2009-09-28 2015-06-11 United Microelectronics Corp 半導體元件的製造方法
US8304836B2 (en) * 2009-11-17 2012-11-06 International Business Machines Corporation Structure and method to obtain EOT scaled dielectric stacks
KR101656444B1 (ko) * 2010-01-25 2016-09-09 삼성전자주식회사 상보형 ｍｏｓ 트랜지스터, 상기 상보형 ｍｏｓ 트랜지스터를 포함하는 반도체 장치, 및 상기 반도체 장치를 포함하는 반도체 모듈
KR101131891B1 (ko) * 2010-07-30 2012-04-03 주식회사 하이닉스반도체 매립게이트를 구비한 반도체 장치 제조방법
JP2012204652A (ja) * 2011-03-25 2012-10-22 Toshiba Corp 半導体装置の製造方法
US8440520B2 (en) 2011-08-23 2013-05-14 Tokyo Electron Limited Diffused cap layers for modifying high-k gate dielectrics and interface layers
US8633118B2 (en) 2012-02-01 2014-01-21 Tokyo Electron Limited Method of forming thin metal and semi-metal layers by thermal remote oxygen scavenging
US8865538B2 (en) 2012-03-30 2014-10-21 Tokyo Electron Limited Method of integrating buried threshold voltage adjustment layers for CMOS processing
US8865581B2 (en) 2012-10-19 2014-10-21 Tokyo Electron Limited Hybrid gate last integration scheme for multi-layer high-k gate stacks
KR102066851B1 (ko) 2013-02-25 2020-02-11 삼성전자 주식회사 반도체 장치 및 그 제조 방법
US10431583B2 (en) 2016-02-11 2019-10-01 Samsung Electronics Co., Ltd. Semiconductor device including transistors with adjusted threshold voltages
US10128347B2 (en) * 2017-01-04 2018-11-13 International Business Machines Corporation Gate-all-around field effect transistor having multiple threshold voltages
KR102495258B1 (ko) 2018-04-24 2023-02-03 삼성전자주식회사 반도체 장치
US10692734B2 (en) * 2018-10-25 2020-06-23 Applied Materials, Inc. Methods of patterning nickel silicide layers on a semiconductor device

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002280461A (ja) * 2001-03-22 2002-09-27 Mitsubishi Electric Corp 半導体装置及び半導体装置の製造方法
WO2005114718A1 (en) * 2004-05-12 2005-12-01 Freescale Semiconductor, Inc. Semiconductor process and integrated circuit having dual metal oxide gate dielectric with single metal gate electrode
JP2006024594A (ja) * 2004-07-06 2006-01-26 Nec Corp 半導体装置およびその製造方法
WO2006012311A1 (en) * 2004-06-30 2006-02-02 Intel Corporation Using different gate dielectrics with nmos and pmos transistors of a complementary metal oxide semiconductor integrated circuit
WO2006028577A2 (en) * 2004-07-28 2006-03-16 Intel Corporation Using different gate dielectrics with nmos and pmos transistors of a complementary metal oxide semiconductor integrated circuit
JP2006222385A (ja) * 2005-02-14 2006-08-24 Toshiba Corp Ｃｍｏｓ半導体装置
JP2007080913A (ja) * 2005-09-12 2007-03-29 Fujitsu Ltd 半導体装置およびその製造方法
JP2007243009A (ja) * 2006-03-10 2007-09-20 Renesas Technology Corp 半導体装置およびその製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100399356B1 (ko) * 2001-04-11 2003-09-26 삼성전자주식회사 듀얼 게이트를 가지는 씨모스형 반도체 장치 형성 방법
US7592678B2 (en) * 2004-06-17 2009-09-22 Infineon Technologies Ag CMOS transistors with dual high-k gate dielectric and methods of manufacture thereof
KR100653721B1 (ko) * 2005-06-30 2006-12-05 삼성전자주식회사 질소주입활성영역을 갖는 반도체소자 및 그 제조방법
US7807522B2 (en) * 2006-12-28 2010-10-05 Texas Instruments Incorporated Lanthanide series metal implant to control work function of metal gate electrodes
JP4406439B2 (ja) * 2007-03-29 2010-01-27 株式会社東芝 半導体装置の製造方法
JP2008306051A (ja) * 2007-06-08 2008-12-18 Rohm Co Ltd 半導体装置およびその製造方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002280461A (ja) * 2001-03-22 2002-09-27 Mitsubishi Electric Corp 半導体装置及び半導体装置の製造方法
WO2005114718A1 (en) * 2004-05-12 2005-12-01 Freescale Semiconductor, Inc. Semiconductor process and integrated circuit having dual metal oxide gate dielectric with single metal gate electrode
WO2006012311A1 (en) * 2004-06-30 2006-02-02 Intel Corporation Using different gate dielectrics with nmos and pmos transistors of a complementary metal oxide semiconductor integrated circuit
JP2006024594A (ja) * 2004-07-06 2006-01-26 Nec Corp 半導体装置およびその製造方法
WO2006028577A2 (en) * 2004-07-28 2006-03-16 Intel Corporation Using different gate dielectrics with nmos and pmos transistors of a complementary metal oxide semiconductor integrated circuit
JP2006222385A (ja) * 2005-02-14 2006-08-24 Toshiba Corp Ｃｍｏｓ半導体装置
JP2007080913A (ja) * 2005-09-12 2007-03-29 Fujitsu Ltd 半導体装置およびその製造方法
JP2007243009A (ja) * 2006-03-10 2007-09-20 Renesas Technology Corp 半導体装置およびその製造方法

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010135735A (ja) * 2008-07-01 2010-06-17 Panasonic Corp 半導体装置及びその製造方法
US8288221B2 (en) 2008-08-13 2012-10-16 Renesas Electronics Corporation Method of manufacturing semiconductor device and semiconductor device
JP2010262977A (ja) * 2009-04-30 2010-11-18 Renesas Electronics Corp 半導体装置の製造方法
JP2011003664A (ja) * 2009-06-17 2011-01-06 Renesas Electronics Corp 半導体装置およびその製造方法
JP2011009313A (ja) * 2009-06-24 2011-01-13 Panasonic Corp 半導体装置及びその製造方法
WO2010150332A1 (ja) * 2009-06-24 2010-12-29 パナソニック株式会社 半導体装置及びその製造方法
JP2011009321A (ja) * 2009-06-24 2011-01-13 Fujitsu Semiconductor Ltd 半導体装置の製造方法
JP2011009373A (ja) * 2009-06-24 2011-01-13 Renesas Electronics Corp 半導体装置の製造方法および半導体装置
WO2010149058A1 (zh) * 2009-06-26 2010-12-29 中国科学院微电子研究所 控制器件阀值电压的cmosfet结构及其制造方法
US8410555B2 (en) 2009-06-26 2013-04-02 Institute of Microelectronics, Chinese Academy of Sciences CMOSFET device with controlled threshold voltage and method of fabricating the same
WO2011008401A1 (en) * 2009-06-30 2011-01-20 Globalfoundries Inc. Uniform high-k metal gate stacks by adjusting threshold voltage for sophisticated transistors by diffusing a metal species prior to gate patterning
DE102009031155A1 (de) * 2009-06-30 2011-01-05 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG Gleichmäßige Metallgatestapel mit großem ε durch Einstellen einer Schwellwertspannung für komplexe Transistoren durch Diffundieren einer Metallsorte vor der Gatestrukturierung
US8445344B2 (en) 2009-06-30 2013-05-21 Globalfoundries Inc. Uniform high-k metal gate stacks by adjusting threshold voltage for sophisticated transistors by diffusing a metal species prior to gate patterning
DE102009031155B4 (de) * 2009-06-30 2012-02-23 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG Einstellen einer Schwellwertspannung für komplexe Transistoren durch Diffundieren einer Metallsorte in das Gatedielektrikum vor der Gatestrukturierung
JP2011029483A (ja) * 2009-07-28 2011-02-10 Renesas Electronics Corp 半導体装置およびその製造方法
JP2011035229A (ja) * 2009-08-04 2011-02-17 Fujitsu Semiconductor Ltd 半導体装置及びその製造方法
JP2013506289A (ja) * 2009-09-28 2013-02-21 フリースケール セミコンダクター インコーポレイテッド 酸素拡散バリア層を有する半導体デバイスおよびそれを製造するための方法
US8853792B2 (en) 2009-09-28 2014-10-07 Freescale Semiconductor, Inc. Transistors and semiconductor devices with oxygen-diffusion barrier layers
JP2011077421A (ja) * 2009-10-01 2011-04-14 Renesas Electronics Corp 半導体装置の製造方法
JP5456150B2 (ja) * 2010-02-17 2014-03-26 パナソニック株式会社 半導体装置及びその製造方法

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CN101884101A (zh) 2010-11-10
US20100258878A1 (en) 2010-10-14
CN101884101B (zh) 2017-06-13
US20130034953A1 (en) 2013-02-07
TW200935589A (en) 2009-08-16

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