WO2009026998A2 - Connexion d'une puce pourvue de surfaces de connexion et de bosses à un substrat pourvu de pistes conductrices métalliques - Google Patents

Connexion d'une puce pourvue de surfaces de connexion et de bosses à un substrat pourvu de pistes conductrices métalliques Download PDF

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Publication number
WO2009026998A2
WO2009026998A2 PCT/EP2008/006011 EP2008006011W WO2009026998A2 WO 2009026998 A2 WO2009026998 A2 WO 2009026998A2 EP 2008006011 W EP2008006011 W EP 2008006011W WO 2009026998 A2 WO2009026998 A2 WO 2009026998A2
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WO
WIPO (PCT)
Prior art keywords
chip
connection
substrate
compound according
conductor
Prior art date
Application number
PCT/EP2008/006011
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German (de)
English (en)
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WO2009026998A3 (fr
Inventor
Roger Wyss
Original Assignee
Att Technology Gmbh
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Publication date
Application filed by Att Technology Gmbh filed Critical Att Technology Gmbh
Publication of WO2009026998A2 publication Critical patent/WO2009026998A2/fr
Publication of WO2009026998A3 publication Critical patent/WO2009026998A3/fr

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    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
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    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
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    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
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    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
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    • G—PHYSICS
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the invention relates to a compound according to the preamble of claim 1.
  • connections in an RF chip or an electronic component with pads or bumps are provided with substrate equipped with metallic tracks, which are suitable for radiofrequency based transponder textile labels, transponder-the-TAG, transponder smart card, transponder inlays, chip modules and others similar IC circuits are used in superior quality.
  • frequency ranges from 1 to 3000 megahertz are provided.
  • Smart cards can be functioning transponders and consist of chip modules and antennas.
  • a chip module consists of at least one chip on a conductor track with an antenna connection.
  • Document EP-A-0 706 152 shows a solution for the construction of smart cards using a substrate with metallic wiring pattern layer (antenna) with chip bonded thereto in conventional bonding technique (US 6,259,408). Another chip-cut substrate is punched over the chip in chip thickness to accommodate the chip, followed by another two films. This is a very complex working process, which places the highest demands on the centering process (indexing of the foils) and on the gluing. The use of multiple substrate layers gives this solution a relatively large thickness, making it very stiff (undesirable in inlets and card making). Due to the above-mentioned problems and requirements, this solution is very costly and not suitable for economical use in environments with increased load and where card flexibility and card quality are required.
  • connection quality Due to the very small dimensions of the chips, the connecting surfaces / bump and the printed conductors, which lie in the micrometer range, the smallest unevenness and tolerances have a negative effect on the connection quality. The required quality is difficult to control and maintain. The profitability of the manufacturing process is thereby enormously impaired.
  • RFID Radio Frequency Identification
  • Such labels must e.g. also be suitable for cooking linen. Due to the moisture, the aforementioned conventional connection of the pads and bumps suffers from the corresponding traces. The plastic / adhesive surrounding the pads / bumps swells and can lift the connection feet by a few nanometers, resulting in a connection interruption. Due to the high temperature of the cooking laundry, thermal expansions are generated in the materials involved, which in turn generate the smallest displacements in the connection and also cause connection interruptions.
  • interconnects and the individual joints are very close to each other (distance about 100 microns) and are not limited, there is also a risk of short circuit on the conductive connection means of the adjacent joints.
  • the process of attaching the globtop is very difficult to control because, on the one hand, the droplet on the carrier, because it is not guided, widens, and on the other hand, contamination is created on both sides of the chipcard module, which can only be removed with difficulty. Furthermore, there is no guarantee that the thin, sensitive wire will actually lie inside the globtop dome, because the dome is lowered uncontrollably due to widening on the support surface.
  • the conductor track structure is prepared by punching before connecting the chip to the conductor track. Due to the many delicate process steps, the production costs for chip cards of this type are high. For these reasons, the design is not suitable for producing high-stress, high-quality and low-cost connections between microchip and interconnect structures on a polymer or leadframe laminate for use in harsh environments, for example for the production of transponders.
  • the document DE-A-195 00 925 shows another method for the production of smart cards.
  • the chip card for contactless data transmission has various steps and elements, According to this method, the separately molded or stamped plastic card body with the following openings: a) a separately finished manufactured transmission module is attached, which is an antenna in the form of at least one coil and / or in Has form of electrically conductive layers.
  • the separately finished transmission module consists of a single metallic printed circuit board (Lead) or can be combined in a special application applied to a carrier body made of plastic.
  • the transmission module has connection surfaces for electrical connection to the connection surfaces of the chip module through openings in the card body.
  • This intermediate product (card body with embedded transmission module without expensive chip module) can now optionally be printed and then visually inspected according to committee criteria. c) A separately finished chip module with chip and on carrier mounted connecting tracks. d) Subsequent connection of the positions a and b and finally the assembly and connection of the position c with functional checks.
  • a transmission module with antenna is to be created separately from the chip module and card body
  • a card body is to be made by spraying or punching
  • the transmission module must be fixed together with the card body
  • the chip module must be installed in the card body with the transmission module.
  • connection chip module with transmission module For the use of chip cards with the chip module and rougher operation (high bending load, elevated temperature and increased pressure and humidity), several problems arise with the connection chip module with transmission module, in particular: a) NCP glued connections that produce contacts only on a pressure basis, are sufficient limited in this case, since the glue swells due to absorption of moisture and creates a contact interruption gap, which leads to functional errors. b) Compounds with conductive glue are not possible for these solutions with a chip module, since the contact distances of the chip are too close to each other. - A -
  • the card body is for reasons of stiffness a relatively thick plastic part made of a polymer such as PET or PEN or PEI.
  • the required heat of soldering is around 232 0 C.
  • the contact on the surface of the plastic must be addressed with about 280 0 C.
  • PEN plastic melt 250oC. So it must be an expensive polyimide plastic having a melting point above 300 0 C used.
  • the transmission module For wirebending the transmission module must be executed in any case with a closed carrier with transmission tracks.
  • the carrier must also be made of a polyimide plastic because of the relatively high bonding temperature. This also leads to high costs, on the one hand Wirebondieri are already higher than soldering costs and on the other hand, the costs for the closed carrier in addition and because polyimide must be used, high.
  • An economical production is not given. A punched lead without a closed support can not be used for this method, because the required adhesive sealant for the additional necessary fixation of the chip module in the card body through the openings in the punch runs out and can be cleaned later only by large expenses. Also, the production facilities are heavily affected by pollution and cause further costs.
  • the antenna structures of the transmission module with the openings in the card body must be designed precisely matching each other prior to connection to the chip module, which makes enormous demands on the indexing (match tolerance) of the layers.
  • the invention has for its object to provide a compound of the type mentioned above, which has an improved connection quality, and in the negative effects of bumps and tolerances of the chips, the pads / bumps and the interconnects as well as the negative temperature and pressure influences can be largely eliminated.
  • the invention aims for a clear, cost-effective production with high quality. This object is achieved according to the invention by a compound having the features of claim 1.
  • openings are made in which the chip or the chip connection area is at least partially immersed.
  • Electrically conductive connecting means are present in the openings and, or as an order on the pads / bumps.
  • connecting means soft solders, metal wires, adhesive and / or sealant are provided.
  • the metal foil is structured and serves as an electrical conductor.
  • the pads / bump no longer need to be placed exactly on the corresponding tracks, but they are introduced with at least part of their height in the openings with connecting means and are anchored stable in position through the walls of the openings and the cured connection means.
  • the connection feet for the connection, but the unevenness or other dimensional deviations no longer matter.
  • the economy and quality of the manufacturing process is thus significantly improved.
  • an intermetallic compound is created at the transition points between the trace, the solder and the connection feet.
  • the entire chip with pads / bumps in the opening in the substrate can be completely immersed and connected with connecting means to the track and be poured with plastic compound, which results in a special protection against pressure, heat and moisture.
  • FIG. 1 shows a section through bonding of a chip provided with connection surfaces with a substrate provided with metallic interconnects according to the prior art
  • Fig. 2 is a sectional view of an embodiment of the invention
  • connection according to the invention in section, with openings made in the polymeric substrate for chip pads or bumps containing connecting means,
  • 5 shows an embodiment in section, in which the chip and the pads or bumps at least partially embedded in the opening of the substrate (4) and are partially encapsulated with sealant
  • 6 shows a section of a variant in which the chip and the connection surfaces or bumps are completely embedded in the opening of the substrate and completely encapsulated with sealing compound
  • the connecting means is a metallic, electrically conductive wire which is connected to the bumps and the interconnects intermetallically in the Wirebond method
  • FIG. 8 shows a section of a variant in which the connecting means is connected in a wire-bonding process to a metallic, electronically conductive wire which extends intermetallically at the connecting surfaces or bumps and at the conductor tracks over at least part of the spirally laid turns.
  • FIG. 9 is a plan view of the embodiment of FIG. 8, without cover sheets and
  • FIG. 10a and FIG. 10b HF smartcard in plan view and side view with the connection according to the invention according to FIG. 7 or FIG. 8, FIG.
  • FIG. 11a and 11b a second application of the connection according to the invention according to FIG. 5 or FIG. 6 for a UHF smartcard in top view and side view, respectively, FIG.
  • FIG. 12a a third application of the solution according to the invention according to FIG. 5 or FIG. 6 for a strap chip module in plan view or longitudinal section along the line G-G according to FIG. 12a, FIG.
  • FIG. 13a and 13b show a fourth application of the connection according to FIG. 4, FIG. 5 or FIG. 6 in a UHF foil inlay in plan view or in longitudinal section,
  • Fig. 14b a side view.
  • FIG. 1 shows a prior art conventional connection of a chip (1, 2) provided with connecting surfaces (2, 2 ') with a polymeric substrate (4) of the laminate (26) provided with metallic conductor tracks (3, 3').
  • the chip (1) may for example have a size of 400x400x150 microns.
  • the conductor tracks (3, 3 ') are preferably made of copper.
  • the chip (1) is placed on the corresponding conductor tracks (3, 3 ') with the, for example, gold-plated connection surfaces (2, T), and the connection feet (2, 2') are materially connected to the conductor tracks (3, 3 ') , usually by a non-conductive adhesive.
  • the corresponding connection means is designated in FIG. 1 with (6).
  • the chip (1) itself is connected to the substrate 4 and the conductor tracks (3, 3 ') cohesively, usually by means of the non-conductive adhesive (6).
  • the result is the case that the adhesive (6) does not dry out to the desired line (dot-dashed line 24), but expands widely on the laminate (26), indicated by arrows D and D " Adhesive quality and there is a risk of moisture penetration into the joints (swelling of the adhesive 6) .
  • connection feet and the conductor tracks the smallest unevenness and tolerances can have a negative effect on the connection quality, which in FIG. 1 does not affect the connection foot (2 ') Conductor track (3 ') "sits", indicated (arrow C). Also, the "lifting" of the pad (2 1 ) (which may cause a connection interruption) may be due to temperature, or caused by swelling of the adhesive 6.
  • Fig. 1 the possible skipping of the conductive connecting means of very close to each other lying joints is indicated by an arrow A, which means a risk of short circuit.
  • FIG. 2 shows a connection according to the invention of the same chip (1) to the substrate (4) and the conductor tracks (3, 3 ').
  • the conductor tracks (3, 3 ') have openings (10, 10') which are open on the chip side and contain electrically conductive connection means (11) (soft solders or conductive adhesives).
  • the connecting surfaces (2, 2 ') are immersed in the connecting means (11) at least with part of their height.
  • connection feet (2, 2 ') available for the connection, but the unevenness or other dimensional deviations no longer matter.
  • the economy of the manufacturing process is thus significantly improved. Even with temperature-related small shifts, there is no connection interruption. Since now the electrically conductive connecting means (1 1) in the openings (10, 10 ') and not on the conductor surface are present, the risk of short circuit is eliminated or at least reduced.
  • connection feet (2, 2 ') with the corresponding conductor tracks (3, 3') via the electrically conductive connection means (1 1) are additionally solidified by a protective coating (15) (preferably a plastic compound, epoxy paint or an adhesive) and covered moisture-proof.
  • a chip (1a) which may be, for example, an RFID (Radio Frequency Identification) chip generation 2, and its connection to the conductor track (3), on a polymeric substrate 4a is laminated.
  • the substrate may e.g. made of PE or PET, PI or PEI, or made of impregnated with epoxy resin fabric.
  • the copper interconnects (3a, 3a ') are mounted on the side of the substrate 4a facing away from the chip (1a). In the substrate 4a through openings (10a, 10a ') per pad or bump (2) are made.
  • connection feet (2a, 2a ', 11d) are immersed at least part of their height.
  • the connecting means (11) as Lötbump (11 d) with the chip pads or bump (2) is supplied; this is such that a soldering tin is applied to the end face (2d ') of the connection surface (2d) of the chip (1).
  • a stored in the opening connection means is therefore no longer mandatory.
  • the conductor track (3) is open on the opposite side of the chip pad.
  • the required Lötsammlung, 220 0 C are optimally supplied to the junction. This via metal (copper) and chip quartz without going over the polymeric substrate.
  • the soldering times are significantly shortened due to metallic heat conduction.
  • the laminate bonding is significantly less stressed. This allows the use of less expensive substrates such as PE and less expensive laminate adhesives.
  • the chip (1 a) is connected to the substrate (4a) by means of an additional adhesive (16a), which may be mixed with soldering flux.
  • the compound is solidified with an additional protective coating (15) and covered moisture-proof, preferably in the form of a plastic film, or an epoxy paint coating or adhesive.
  • the development of the conductor track structure of the conductor foil on the laminate is carried out by etching or by a laser plasma method.
  • 4 shows a chip (1) with a connection surface (2d) which is equipped with an additional solder bump (1 1 d), in such a way that a soldering tin is provided on the end face (2d ') of the connection surface (2d) of the chip (1) (1 1 d) is applied.
  • An embedded in the opening (10a) connecting means (11) is thus no longer mandatory.
  • Fig. 5 shows a second embodiment according to the invention, in which the entire base of the chip (1) with bumps (2) with at least ei nem part of its height in the chip-side opening (1Of) of the substrate (4) dipped is and the pads or bumps (2) of the chip (1) with connecting means (11, 11d) in the recess with the conductor track (3) are connected.
  • the opening (10f) is open on the chip side and bounded on the opposite side of the chip (1) by the conductor track.
  • the conductor track (3) is freely open on the opposite side of the chip pad in this example.
  • the difference from the previous embodiment according to the invention lies in the fact that the chip (1), the connection surfaces and bumps (2) and the affected conductor track part (3) with connecting means (11, 11d) lie in the opening (10f) and with plastic sealant (6,16, 16c) are moisture-proof over at least a part of their heights.
  • the chip is precisely positioned and firmly anchored to the laminate by the chip and connection means guide in the opening.
  • Fig. 6 shows a third embodiment according to the invention and analogous to FIG. 5, in which the chip (1) and its pads or bumps (2, 2 ') immersed entirely in the substrate (4) and with plastic sealant (16 ) are completely poured.
  • the difference from the embodiment according to FIG. 5 lies in the fact that the chip with the connection surfaces and bumps are completely immersed in the substrate and completely surrounded by plastic sealing compound (6, 16, 16c).
  • the connection surfaces or bumps (2) are connected to the conductor track (3) in an intermetallic manner in a particularly rigid, firm and secure manner.
  • the whole chip (1) is completely immersed in the opening (10f) with plastic sealing compounds (6, 16, 16c) and surrounded.
  • the chip is accurately positioned and firmly anchored by the chip potting compound in the opening with the laminate.
  • the conductor track (3) is at least partially exposed on the opposite side of the chip pad freely.
  • the required soldering heat of approximately 220 0 C can be optimally supplied to the junction, this via metal (copper) and chip quartz without going over the polymeric substrate.
  • the soldering times are significantly shortened.
  • the laminate bonding is significantly less stressed. This allows the use of inexpensive substrate such as PE and inexpensive laminate adhesive.
  • the formation of the antenna conductor / antenna structure (3) by etching or lasing can also take place here after complete connection of the chip to the conductor foil and casting of the opening 10f with sealing compound (6, 16, 16c). This procedure •,. is preferred so that the opening, without polluting the plant, shed clean and can then be dried.
  • This design withstands chip, bumps and joints for increased pressure, temperature and humidity loads. These have an advantageous effect for continuous use in laundries (passing through calender rolls is made possible, etc.), high temperature pressure and humidity environment.
  • connection means (27; ).
  • the chip (1) is positioned in the opening (1 Of) with Die Attach adhesive (20) and glued to the conductor foil (3).
  • the chip (1) and the connection surfaces / bumps (2) with the connecting wires (21) are completely embedded in the opening (10f) of the substrate (4) and completely molded with plastic sealant (16).
  • the chip is exactly positioned, and firmly anchored by the chip potting compound in the opening (10f) with the laminate (26).
  • the conductor track (3) is at least partially exposed on the opposite side of the chip pad.
  • the required heat of welding temperature above 220 0 C
  • the laminate bonding is significantly less thermally stressed.
  • the wirebond process can be greatly accelerated.
  • this inventive method allows the use of less expensive substrates such as PE and less expensive laminate adhesive.
  • the formation of the antenna conductor (3) / antenna structure (22) by etching, laser or plasma method can also advantageously after complete connection of the chip to the antenna conductor, and after pouring the opening (10) with the sealant (6, 16) This is analogous to Fig. 2, Fig. 4, Fig. 5.
  • a hundred percent controlled sealing compound order is guaranteed and the connection is of the highest quality.
  • the chip, the bumps and joints with the wire (21) withstand increased pressure, temperature and humidity loads.
  • Fig. 8 shows a fifth embodiment in which a metallically electrically conductive wire (21) with the pads / bumps (2,2 ') and the interconnects (3) is intermetallically connected (Wirebondvon).
  • the chip (1) is positioned in the opening (10f) with Die attach adhesive (20) and glued to the conductor foil (3).
  • the chip (1) and the connecting surfaces / bumps (2,2 ') with the connecting wires (21) are completely embedded in the opening (10f) of the substrate (4) and completely encapsulated with plastic sealant (6, 16).
  • plastic sealant (6, 16) plastic sealant
  • the conductor track (3) is embodied here as a spiral antenna / coil antenna, as used for the production of HF smartcads (FIG. 9).
  • FIG. 8 illustrates how the connection of the start and end of the spiral antenna antenna track (3) with the pads / bumps) of the chip (1) through the connecting wire (21) in Wirebond compiler in the simplest, most universal and cost-effective manner is solved. Furthermore, it is clearly visible how the loops of the antenna cross the chips and how the beginning and the end of the coil antenna (3) are connected to the chip (1).
  • the formation of the antenna conductor (3) / antenna structure (3; 31) by etching, laser or plasma method can also be advantageously carried out after complete connection of the chip to the antenna conductor foil and after pouring the opening (10f) with sealing compound (6,16). This is one to one hundred percent Controlled sealing compound ensures and the connection is of the highest quality.
  • the chip, the bumps and the joints with the wire (21) are resistant to elevated pressure, temperature and humidity loads. These have an advantageous effect for continuous use at high temperatures and or high pressure and or high humidity.
  • FIG. 9 shows a top view of the solution according to the invention of FIG. 8.
  • the cover films and the sealant (16) have been omitted here for the sake of simplicity.
  • the optimal solution possibility of the connecting means (27, 28) and the simple bridging of the chip (1) over the antenna loops (3) by using the connecting wire (21), which allows a great flexibility with regard to the connection distances, are apparent.
  • FIG. 10a and 10b show an application for HF smart card (35), which is constructed according to the invention of FIG. 8 and FIG.
  • the spiral antenna (3) is made up of the antenna layer which is integrated (connected) to the substrate (4).
  • the entire smart card (35) is realized from a thickness of 0.1 mm and upwards. Again, the simple and inexpensive bridging of the antenna loop is clearly visible.
  • the two cover sheets (23) required for smart cards are applied to the laminate (26) by lamination.
  • the cover sheets are made of paper or polymer films and can be provided with fonts and logos before or after lamination.
  • FIG. 11a and 11b show an application for UHF smart card (36), which is constructed according to the invention according to FIG. 6 and FIG.
  • the dipole antenna is made up of the antenna layer (3) which is integrated with the substrate (4).
  • the entire smartcard (36) has a thickness from 0.1 mm. Again, the simple and inexpensive and thus optimal connection (40) of the antennas (trace) (3) to the chip pad (2) is clearly visible.
  • the two cover sheets (23) required for smart cards are applied to the laminate (26) by lamination.
  • the cover sheets (23) are made of paper or polymer films and can be provided with fonts and logos, before or after lamination. Smart card with UHF antennas respond to a greater distance than HF antennas. The choice of antenna type is made according to their requirement.
  • FIGs 12a and 12b show an application for UHF chip modules (37). These can be found in separately fabricated antennas, e.g. Metal antennas woven into textile or large antennas made in plastic application.
  • the connection to the antenna track (3) can be soldered or glued or mechanical.
  • This embodiment is constructed analogously as in FIG. 5 or FIG. 6 or FIG. 7 in the context of the invention and constructed in a thickness of the chip module from 0.1 mm. Also, the simple and inexpensive construction is clearly perceptible.
  • the chip (1) is completely covered by the substrate (4).
  • the chip module is suitable for heavy loads (laundry machines, high temperatures and pressures).
  • FIGS. 13a and 13b show an application for UHF inlay (38), which is constructed analogously to the connection according to FIG. 5 or FIG. 6 or FIG.
  • the dipole antenna is formed from the antenna layer (3) integrated with the substrate (4).
  • the total inlet thickness is realized from 0.1 mm. Also, the simple and inexpensive construction is clearly visible.
  • Figures 14a and 14b show an application for RF inlay (39) constructed in accordance with the invention of Figures 8 and 9.
  • the spiral antenna is formed of the antenna layer (3) integrated with the substrate (4). Again, the simple and inexpensive bridging of the antenna loop and thus the simple design of the solution is well visible.
  • the connection variants according to the invention described above are examples and, compared with the conventional connection solutions, have a significantly improved quality of connection and are much easier to manufacture, more cost-effective and usable in harsh and damp environments, such as in laundries.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

Une connexion d'une puce RF (1) pourvue de surfaces de connexion (2, 2'') est réalisée du fait que les surfaces de connexion (2, 2'') sont connectées à un substrat et à des pistes conductrices dans l'ouverture (10a, 10f) d'un laminé. La connexion est réalisée par connexion des surfaces de connexion de puce (2) aux pistes conductrices (3, 31) intégrées au substrat (4). Après achèvement de la connexion, l'ouverture (10, 10', 10f), la puce et les surfaces de connexion sont scellées avec une masse de scellement augmentant la résistance à la compression de l'ensemble du module de puce. La formation des structures de pistes conductrices est de préférence réalisée après connexion complète de la puce (1). La rentabilité et la qualité de la puce et des processus de fabrication sont ainsi améliorées et facilitées, et une connexion sûre et durable entre la puce et les pistes conductrices est optimisée. Ces connexions sont adaptées à une utilisation dans des environnements difficiles tels que des blanchisseries etc.
PCT/EP2008/006011 2007-08-27 2008-07-23 Connexion d'une puce pourvue de surfaces de connexion et de bosses à un substrat pourvu de pistes conductrices métalliques WO2009026998A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CH13382007 2007-08-27
CH01338/07 2007-08-27

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WO2009026998A3 WO2009026998A3 (fr) 2009-04-23

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2290590A3 (fr) * 2009-08-14 2011-07-27 Giesecke & Devrient GmbH Support de données portatif
DE102010041917A1 (de) * 2010-10-04 2012-04-05 Smartrac Ip B.V. Schaltungsanordnung und Verfahren zu deren Herstellung

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Publication number Priority date Publication date Assignee Title
US5048179A (en) * 1986-05-23 1991-09-17 Ricoh Company, Ltd. IC chip mounting method
EP1048483A1 (fr) * 1997-12-22 2000-11-02 Hitachi, Ltd. Dispositif a semi-conducteur
WO2002069385A2 (fr) * 2001-02-27 2002-09-06 Infineon Technologies Ag Ensemble comportant une puce pourvue d'un circuit integre et un support ou un element de support
EP1394734A1 (fr) * 2001-06-07 2004-03-03 Sony Corporation Carte a circuit integre
WO2005062246A1 (fr) * 2003-12-19 2005-07-07 Axalto Sa Document d'identification

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Publication number Priority date Publication date Assignee Title
US5048179A (en) * 1986-05-23 1991-09-17 Ricoh Company, Ltd. IC chip mounting method
EP1048483A1 (fr) * 1997-12-22 2000-11-02 Hitachi, Ltd. Dispositif a semi-conducteur
WO2002069385A2 (fr) * 2001-02-27 2002-09-06 Infineon Technologies Ag Ensemble comportant une puce pourvue d'un circuit integre et un support ou un element de support
EP1394734A1 (fr) * 2001-06-07 2004-03-03 Sony Corporation Carte a circuit integre
WO2005062246A1 (fr) * 2003-12-19 2005-07-07 Axalto Sa Document d'identification

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2290590A3 (fr) * 2009-08-14 2011-07-27 Giesecke & Devrient GmbH Support de données portatif
EP2595095A1 (fr) * 2009-08-14 2013-05-22 Giesecke & Devrient GmbH Support de données portable
DE102010041917A1 (de) * 2010-10-04 2012-04-05 Smartrac Ip B.V. Schaltungsanordnung und Verfahren zu deren Herstellung
DE102010041917A8 (de) * 2010-10-04 2012-06-21 Smartrac Ip B.V. Schaltungsanordnung und Verfahren zu deren Herstellung
DE102010041917B4 (de) * 2010-10-04 2014-01-23 Smartrac Ip B.V. Schaltungsanordnung und Verfahren zu deren Herstellung

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