WO2008155845A1 - 演算処理装置 - Google Patents

演算処理装置 Download PDF

Info

Publication number
WO2008155845A1
WO2008155845A1 PCT/JP2007/062445 JP2007062445W WO2008155845A1 WO 2008155845 A1 WO2008155845 A1 WO 2008155845A1 JP 2007062445 W JP2007062445 W JP 2007062445W WO 2008155845 A1 WO2008155845 A1 WO 2008155845A1
Authority
WO
WIPO (PCT)
Prior art keywords
command
completion
commands
thread
target register
Prior art date
Application number
PCT/JP2007/062445
Other languages
English (en)
French (fr)
Inventor
Atsushi Fusejima
Takashi Suzuki
Toshio Yoshida
Yasunobu Akizuki
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to JP2009520199A priority Critical patent/JP5136553B2/ja
Priority to PCT/JP2007/062445 priority patent/WO2008155845A1/ja
Priority to EP07767283.0A priority patent/EP2159685B1/en
Publication of WO2008155845A1 publication Critical patent/WO2008155845A1/ja
Priority to US12/633,108 priority patent/US8001362B2/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/88—Monitoring involving counting

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Debugging And Monitoring (AREA)

Abstract

　複数の命令を有するスレッドを実行するための演算処理装置が、命令の実行による各種のイベントを測定するイベント測定回路と、実行した命令の完了を制御するコミットスタックエントリとを備え、複数の命令を有するスレッドを実行する複数のスレッド実行部と、スレッド実行部が実行することにより、コミットスタックエントリに格納された完了候補の命令を格納すると共に、スレッドに含まれる命令の完了処理を行う命令完了対象レジスタと、命令完了対象レジスタに格納された命令の命令完了処理を行う場合は、命令完了対象レジスタに格納された命令の命令完了イベントを、当該命令に対応するスレッド実行部が備えるイベント測定回路に送信するスレッド選択手段とを有する。
PCT/JP2007/062445 2007-06-20 2007-06-20 演算処理装置 WO2008155845A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2009520199A JP5136553B2 (ja) 2007-06-20 2007-06-20 演算処理装置及び演算処理装置の制御方法
PCT/JP2007/062445 WO2008155845A1 (ja) 2007-06-20 2007-06-20 演算処理装置
EP07767283.0A EP2159685B1 (en) 2007-06-20 2007-06-20 Processor
US12/633,108 US8001362B2 (en) 2007-06-20 2009-12-08 Processing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/062445 WO2008155845A1 (ja) 2007-06-20 2007-06-20 演算処理装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/633,108 Continuation US8001362B2 (en) 2007-06-20 2009-12-08 Processing unit

Publications (1)

Publication Number Publication Date
WO2008155845A1 true WO2008155845A1 (ja) 2008-12-24

Family

ID=40156011

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/062445 WO2008155845A1 (ja) 2007-06-20 2007-06-20 演算処理装置

Country Status (4)

Country Link
US (1) US8001362B2 (ja)
EP (1) EP2159685B1 (ja)
JP (1) JP5136553B2 (ja)
WO (1) WO2008155845A1 (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2489708B (en) * 2011-04-05 2020-04-15 Advanced Risc Mach Ltd Thread selection for multithreaded processing
US10977075B2 (en) * 2019-04-10 2021-04-13 Mentor Graphics Corporation Performance profiling for a multithreaded processor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10275100A (ja) * 1997-03-11 1998-10-13 Internatl Business Mach Corp <Ibm> マルチスレッド・プロセッサ内でパフォーマンスを監視する方法およびシステム
JP2006040174A (ja) * 2004-07-29 2006-02-09 Fujitsu Ltd 命令リトライ検証機能付き情報処理装置および命令リトライ検証方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6076157A (en) * 1997-10-23 2000-06-13 International Business Machines Corporation Method and apparatus to force a thread switch in a multithreaded processor
US6052709A (en) 1997-12-23 2000-04-18 Bright Light Technologies, Inc. Apparatus and method for controlling delivery of unsolicited electronic mail
US6535905B1 (en) * 1999-04-29 2003-03-18 Intel Corporation Method and apparatus for thread switching within a multithreaded processor
JP3512678B2 (ja) 1999-05-27 2004-03-31 富士通株式会社 キャッシュメモリ制御装置および計算機システム
US6791367B2 (en) * 2002-03-19 2004-09-14 Broadcom Corporation Hardware and software programmable fuses for memory repair
US7472258B2 (en) * 2003-04-21 2008-12-30 International Business Machines Corporation Dynamically shared group completion table between multiple threads
US7657893B2 (en) * 2003-04-23 2010-02-02 International Business Machines Corporation Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor
US7360062B2 (en) 2003-04-25 2008-04-15 International Business Machines Corporation Method and apparatus for selecting an instruction thread for processing in a multi-thread processor
US20050138333A1 (en) * 2003-12-19 2005-06-23 Samra Nicholas G. Thread switching mechanism
US20050183065A1 (en) * 2004-02-13 2005-08-18 Wolczko Mario I. Performance counters in a multi-threaded processor
JP2005284749A (ja) * 2004-03-30 2005-10-13 Kyushu Univ 並列処理コンピュータ
JP4327008B2 (ja) * 2004-04-21 2009-09-09 富士通株式会社 演算処理装置及び演算処理装置の制御方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10275100A (ja) * 1997-03-11 1998-10-13 Internatl Business Mach Corp <Ibm> マルチスレッド・プロセッサ内でパフォーマンスを監視する方法およびシステム
JP2006040174A (ja) * 2004-07-29 2006-02-09 Fujitsu Ltd 命令リトライ検証機能付き情報処理装置および命令リトライ検証方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2159685A4 *

Also Published As

Publication number Publication date
US8001362B2 (en) 2011-08-16
JPWO2008155845A1 (ja) 2010-08-26
EP2159685A4 (en) 2010-12-08
EP2159685A1 (en) 2010-03-03
JP5136553B2 (ja) 2013-02-06
US20100088491A1 (en) 2010-04-08
EP2159685B1 (en) 2013-08-21

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