WO2008153245A2 - Semiconductor package module using anodized oxide layer and manufacturing method thereof - Google Patents

Semiconductor package module using anodized oxide layer and manufacturing method thereof Download PDF

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Publication number
WO2008153245A2
WO2008153245A2 PCT/KR2007/004610 KR2007004610W WO2008153245A2 WO 2008153245 A2 WO2008153245 A2 WO 2008153245A2 KR 2007004610 W KR2007004610 W KR 2007004610W WO 2008153245 A2 WO2008153245 A2 WO 2008153245A2
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WO
WIPO (PCT)
Prior art keywords
oxide layer
substrate
semiconductor device
semiconductor
package module
Prior art date
Application number
PCT/KR2007/004610
Other languages
French (fr)
Other versions
WO2008153245A3 (en
Inventor
Young-Se Kwon
Kyoung-Min Kim
Original Assignee
Wavenics, Inc.
Korea Advanced Institute Of Science And Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020070094584A external-priority patent/KR100894247B1/en
Application filed by Wavenics, Inc., Korea Advanced Institute Of Science And Technology filed Critical Wavenics, Inc.
Publication of WO2008153245A2 publication Critical patent/WO2008153245A2/en
Publication of WO2008153245A3 publication Critical patent/WO2008153245A3/en

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Definitions

  • the present invention relates a semiconductor package module using a anodized oxide layer and a manufacturing method thereof, and more particularly, to a semiconductor package module using a anodized oxide layer, in which a lead line for a semiconductor device is formed to extend to an edge thereof and an opening used for receiving and emitting light is formed, and a manufacturing method thereof.
  • a package process is carried out to protect a semiconductor chip from external environments, to shape a semiconductor chip in a to-be-easily-used form, and to protect operational functions of the semiconductor chip so as to improve reliability of the semiconductor device.
  • the packaging process has tended to be changed from a process that is suitable for a small number of pins of a package to a process that is suitable for a large number of pins of the package.
  • a conventional structure for mounting the package on a printed circuit board (PCB) has been replaced with a surface mounting structure.
  • a package with the surface mounting structure many types have been proposed, for example a small outline package (SOP), a plastic leaded chip carrier (PLCC), a quad flat package (QFP), a ball grid array (BGA), and a chip scale package (CSP).
  • SOP small outline package
  • PLCC plastic leaded chip carrier
  • QFP quad flat package
  • BGA ball grid array
  • CSP chip scale package
  • a base substrate used for a chip carrier or a PCB associated with the semiconductor device needs to have thermal, electrical, and mechanical stability.
  • the base substrate used for the chip carrier or the PCB expensive ceramic substrates or resin substrates made of a polyimide-based resin, a fluoride-based resin, or a silicon- based resin have been used.
  • the ceramic substrate or the resin substrate is an insulator, no insulating material needs to be applied after a through-hole process.
  • the resin substrate is expensive and has poor water-resistance and heat-resistance, the resin substrate has a problem in that the resin substrate is not usable for a chip-carrier substrate.
  • the ceramic substrate has better heat resistance than the resin substrate, the ceramic substrate has problems in that it is expensive and hard to process and has a high production cost.
  • a metal substrate In order to overcome the problems of the ceramic or resin substrates, a metal substrate has been proposed.
  • the metal substrate is inexpensive and easy to process, and has a good thermal reliability.
  • an insulating process needs to be performed on the metal substrate.
  • a metal core having a function of a heat sink or a heat spreader needs to be attached on an upper or lower potion of the substrate.
  • the cavities have been formed by drilling a resin substrate. According to the method, cavity processing time and cost are increased. In addition, since a deviation of the processed cavities is large, parts mounted therein may be easily slanted, so that it is difficult to maintain a predetermine flatness of the substrate. Moreover, since the resin used for the substrate has poor thermal and mechanical characteristics, if the parts are mounted in the cavities formed in the resin substrate, serious stress and deformation may occur in the resin substrate.
  • Korean Patent No. 10-0656300 there is disclosed a three-dimensional package module in which cavities for mounting parts on a substrate are vertically formed, and that is capable of obtaining thermal, electrical, and mechanical stability and that easily maintains flatness of the substrate.
  • a method of disposing a second device such as a passive device, a pad, or the like on an organic insulating layer and an aluminum oxide layer and connecting a first device such as a power amplifier (PA), a low-noise amplifier (LNA), a phase shifter, a mixer, an oscillator, and a voltage controlled oscillator (VCO) to the second device through a wire line has been disclosed.
  • a power amplifier PA
  • LNA low-noise amplifier
  • VCO voltage controlled oscillator
  • the present invention has been made in an effort to provide a semiconductor package module using a anodized oxide layer, in which a lead line is formed to extend to an edge portion (corner portion) and a portion of an organic material layer is removed, and a manufacturing method thereof having advantages of being able to be effectively used for a light-receiving device or a light-emitting device.
  • An exemplary embodiment of the present invention provides a semiconductor package module using a anodized oxide layer, including: a substrate made of a material that is capable of forming the anodized oxide layer; an oxide layer that is formed on the substrate to have at least one opening; a semiconductor device that is mounted in the opening of the oxide layer; an organic material layer that is formed to cover the oxide layer and the semiconductor device; and a lead line that is formed on an upper surface of the organic material layer or the oxide layer and to be connected to the semiconductor device.
  • the semiconductor package module mounted in the opening of the oxide layer may be a photonic device, and a portion of the organic material layer may be removed so as to expose an upper surface of the photonic device.
  • Another embodiment of the present invention provides a method of manufacturing a semiconductor package module using a anodized oxide layer, including: preparing a substrate by using a material that is capable of forming the anodized oxide layer; forming an oxide layer by performing anodic oxidation on a surface (upper surface) of the substrate to a predetermined depth; forming a plurality of openings in the oxide layer by forming a mask pattern on a surface of the oxide layer and performing chemical etching; removing the mask pattern; mounting a semiconductor device in the opening of the oxide layer; forming an organic insulating layer on upper surfaces of the semiconductor device and the oxide layer; and forming a lead line on the organic insulating layer and the oxide layer to extend to an edge portion of the organic insulating layer.
  • an anti-oxidation mask pattern may be formed on the lower surface of the substrate in order to prevent oxidation.
  • the lead line is formed to extend to the edge portion of the organic insulating layer or the oxide layer, it is possible to effectively connect to other neighboring semiconductor devices, photonic devices, circuits, or the like.
  • the organic insulating layer a portion of the upper surface of the semiconductor device, that is, the photonic device
  • the photonic device such as a light-receiving or a light-emitting device
  • the photonic device such as a light-receiving or a light-emitting device
  • the semiconductor device is mounted at an inner portion of the substrate and the semiconductor device is electrically connected to external devices by using via-holes or plating, the thickness of the package module can be greatly reduced. Since a metal substrate or a silicon substrate can be used, heat releasing efficiency can be greatly improved.
  • the oxide layer is an insulator, a possibility of occurrence of a short-circuit to a bottom electrode can be substantially reduced.
  • the substrate can be constructed with a silicon substrate.
  • active and passive devices are formed by using a CMOS process, and then another semiconductor device can be packaged according to the present invention.
  • FIG. 1 is a cross-sectional view illustrating a first embodiment of a semiconductor package module using a anodized oxide layer according to the present invention.
  • FIG. 2 is a top plan view illustrating the first embodiment of the semiconductor package module using the anodized oxide layer according to the present invention.
  • FIG. 3 is a cross-sectional view illustrating a second embodiment of the semiconductor package module using a anodized oxide layer according to the present invention.
  • FIG. 4 is a cross-sectional view taken along line A-A of FIG. 3.
  • FIG. 5 is a cross-sectional view illustrating a state that electrodes are separately conn ected to upper and lower surfaces of a semiconductor device in the second embodiment of the semiconductor package module using a anodized oxide layer according to the present invention.
  • FIG. 6 is a cross-sectional view illustrating a state in which electrodes are connected to the lower surface of the semiconductor device in the second embodiment of the semiconductor package module using a anodized oxide layer according to the present invention.
  • FIG. 7 is a block diagram illustrating an embodiment of a method of manufacturing a semiconductor package module using a anodized oxide layer according to the present invention.
  • FIG. 8 is a flowchart illustrating processes of the method of manufacturing a semiconductor package module using a anodized oxide layer according to the present invention. Best Mode for Carrying Out the Invention
  • an oxide layer 12 is formed on a substrate 10 through anodic oxidation.
  • the substrate 10 is made of a material having excellent thermal conductivity in comparison to a synthetic resin or a ceramic.
  • the substrate 10 is formed with a thickness of about 0.1 to 5mm, and preferably with a thin thickness of about 0.15 to 1.0mm.
  • the substrate 10 is made of a material that is capable of forming a anodized oxide layer.
  • a metal such as aluminum (Al), magnesium (Mg), and titanium (Ti), a semiconductor such as silicon (Si), gallium arsenide (GaAs), or the like, can be used.
  • the substrate 10 may have an arbitrary shape, for example a shape of a plate or a wafer.
  • the substrate 10 is formed so that a printing circuit technique or a semiconductor process can be applied thereto.
  • an aluminum oxide layer is formed as the oxide layer 12 through the anodic oxidation.
  • the oxide layer 12 is subjected to patterning and chemical etching, so that a plurality of openings 14 are formed to having sidewalls that are vertically formed with respect to an upper surface (top surface) of the substrate 10.
  • Semiconductor devices 16 such as a power amplifier (PA), a low-noise amplifier
  • the oxide layer 12 is formed to have a thickness corresponding to a height of the semiconductor device 16 mounted in the opening 14.
  • the thickness of the oxide layer 12 is about 0.25 to 0.5 times the height of the semiconductor device 16.
  • the thickness of the oxide layer 12 is suitably defined so that a lower end portion of the semiconductor device 16 or the entire portion of the semiconductor device 16 can be inserted into the opening 14.
  • Electrode terminals 18 that are made of a conductive metal such as copper (Cu) and gold (Au) are formed on the upper surface of the semiconductor device 16.
  • An organic insulation layer 20 is formed on the substrate 10 and the semiconductor device 16 including the electrode terminals 18.
  • the organic insulating layer 20 is formed by using, for example, benzocyclobutene
  • Contact holes 22 for electrical connection between the semiconductor device 16 and lead lines 26 that are formed thereon are formed in the organic insulating layer 20.
  • the contact holes 22 are filled with a conductor for the electrical connection.
  • the lead lines 26 are formed on the organic insulating layer 20 and the oxide layer 12 to be connected to the semiconductor device 16.
  • Each of the lead lines 26 is formed to extend to an edge portion (corner portion) of the organic insulating layer 20 or the oxide layer 12 so as to be connected to neighboring semiconductor devices or photonic devices, driving circuits, signal lines, or the like.
  • a photonic device such as a light-receiving device and a light-emitting device is used.
  • the electrode terminal 18 formed on the upper surface is directly connected to the lead line 26, and the electrode terminal 18 formed on the lower surface is electrically connected to the substrate 10 through the contact hole 19 filled with a conductor, where the substrate 10 is used as the other electrode.
  • the contact hole 19 may be formed by partially removing the adhesive material 17 that is used to mount the semiconductor device 16. Alternatively, the contact hole 19 may be formed by not applying the adhesive material 17 to the corresponding portion in the vicinity of the electrode terminal 18 formed on the lower surface of the semiconductor device 16. The contact hole 19 is filled with a conductor for electrical connection.
  • the semiconductor device 16 and the substrate 10 can be electrically connected to each other without the contact hole 19.
  • both electrode terminals 18 are formed on the lower surface of the semiconductor device 16, that is, the photonic device, as shown in FIG. 6, one electrode terminal 18 is electrically connected to the substrate 10 through the contact hole 19 filled with a conductor where the substrate 10 is used as the one electrode, and the other electrode terminal 18 is electrically connected to the lead line 26 formed on the organic insulating layer 20 through a contact hole 27 filled with a conductor or the wire line.
  • the contact hole 27 is formed on the organic insulating layer 20 so as not to be short- circuited to the substrate 10.
  • the contact hole 27 is filled with a conductor for the electrical connection, and the lead line 26 is connected to the upper portion of the contact hole 27.
  • the method includes a step PlO of preparing a substrate 10, a step P20 of forming an anti- oxidation mask pattern 44 on the entire lower surface of the substrate 10, a step P30 of performing anodic oxidation on the substrate 10 to a predetermined depth to form an oxide layer 12, a step P40 of forming a mask pattern 42 on a surface of the oxide layer 12 and performing chemical etching to form a plurality of openings 14 in the oxide layer 12, a step P50 of removing the mask pattern 42 and the anti-oxidation mask pattern 44, a step P60 of mounting a semiconductor device 16 in the opening of the oxide layer 12, a step P70 of forming an organic insulating layer 20 on upper surfaces of the semiconductor device 16 and the oxide layer 12, and a step P80 of forming lead lines 26 on the organic insulating layer 20 and the oxide layer 12.
  • the substrate 10 is made of a material that is capable of forming a anodized oxide layer.
  • a metal such as aluminum (Al), magnesium (Mg), and titanium (Ti), a semiconductor such as silicon (Si), gallium arsenide (GaAs), or the like, can be used.
  • the substrate 10 is made of silicon, in the step PlO of preparing the substrate 10, passive devices and active devices such as a memory and an analog device are formed on the silicon substrate by using a semiconductor process such as a CMOS process, and then the subsequent steps according to the present invention are performed, so that another semiconductor device 16 can be packaged.
  • the step of forming the anti-oxidation mask pattern 44 can be omitted.
  • the anti-oxidation mask pattern 44 is used so as to prevent the anodic oxidation of the lower surface of the substrate 10, if the anodic oxidation can be prevented by using a suitable method, the anti-oxidation mask pattern 44 is not needed.
  • the oxide layer 12 is formed to have a thickness corresponding to a height of the semiconductor device 16 mounted in the opening 14.
  • the thickness of the oxide layer 12 is about 0.25 to 0.5 times the height of the semiconductor device 16.
  • the opening 14 is formed to have sidewalls that are vertically formed with respect to the upper surface of the substrate 10.
  • the semiconductor device 16 is mounted in the opening 14 on the substrate 10 by using the adhesive material 17.
  • PA power amplifier
  • LNA low noise amplifier
  • a phase shifter or the like
  • Electrode terminals 18 are formed on the semiconductor device 16.
  • the organic insulating layer 20 is formed on the semiconductor device 16 and the oxide layer 12 by using benzocyclobutene (BCB), polyimide, or the like.
  • BCB benzocyclobutene
  • Lead lines 26 are formed on the organic insulating layer 20 to be connected to the contact holes 22.
  • Each of the lead lines 26 is formed to extend to an edge portion (corner portion) of the organic insulating layer 12 so as to be connected to another semiconductor device or an external apparatus.
  • a photonic device such as a light-receiving device and a light-emitting device may be used as the to-be-mounted semiconductor device 16, and in the step P70 of forming the organic insulating layer, after the organic insulating layer 20 is formed, a portion of the organic insulating layer 20 may be removed so as to expose the upper surface of the semiconductor device 16.
  • the semiconductor device 16 is a photonic device
  • the electrodes are formed on only one surface of the semiconductor device 16
  • an arbitrary adhesive material can be used. If the electrodes are separately formed on both surfaces of the semiconductor device 16, a conductive adhesive material can be used, the substrate 10 may be constructed with a metal substrate, and the substrate 10 can be used as the other electrode.

Abstract

A semiconductor package module that is capable of effectively functioning even in the case of using a light-receiving device or a light-emitting device and that is easily connected to other semiconductor devices or parts is provided. The semiconductor package module includes a substrate (10) made of a material that is capable of forming the anodized oxide layer, an oxide layer (12) that is formed on the substrate to have at least one opening (14), a semiconductor device (16) that is mounted in the opening (14) of the oxide layer (12), an organic material layer (20) that is formed to cover the oxide layer (12) and the semiconductor device (16), and a lead line (26) that is formed on an upper surface of the organic material layer (20) or the oxide layer (12) and to be connected to the semiconductor device (16).

Description

Description
SEMICONDUCTOR PACKAGE MODULE USING ANODIZED OXIDE LAYER AND MANUFACTURING METHOD THEREOF
Technical Field
[1] The present invention relates a semiconductor package module using a anodized oxide layer and a manufacturing method thereof, and more particularly, to a semiconductor package module using a anodized oxide layer, in which a lead line for a semiconductor device is formed to extend to an edge thereof and an opening used for receiving and emitting light is formed, and a manufacturing method thereof. Background Art
[2] Among semiconductor device manufacturing processes, a package process is carried out to protect a semiconductor chip from external environments, to shape a semiconductor chip in a to-be-easily-used form, and to protect operational functions of the semiconductor chip so as to improve reliability of the semiconductor device.
[3] Recently, as the degree of integration of the semiconductor device has increased and various functions have been provided to the semiconductor device, the packaging process has tended to be changed from a process that is suitable for a small number of pins of a package to a process that is suitable for a large number of pins of the package. In addition, a conventional structure for mounting the package on a printed circuit board (PCB) has been replaced with a surface mounting structure. As a package with the surface mounting structure, many types have been proposed, for example a small outline package (SOP), a plastic leaded chip carrier (PLCC), a quad flat package (QFP), a ball grid array (BGA), and a chip scale package (CSP).
[4] A base substrate used for a chip carrier or a PCB associated with the semiconductor device needs to have thermal, electrical, and mechanical stability. Conventionally, as the base substrate used for the chip carrier or the PCB, expensive ceramic substrates or resin substrates made of a polyimide-based resin, a fluoride-based resin, or a silicon- based resin have been used.
[5] Since the ceramic substrate or the resin substrate is an insulator, no insulating material needs to be applied after a through-hole process. However, since the resin substrate is expensive and has poor water-resistance and heat-resistance, the resin substrate has a problem in that the resin substrate is not usable for a chip-carrier substrate. Although the ceramic substrate has better heat resistance than the resin substrate, the ceramic substrate has problems in that it is expensive and hard to process and has a high production cost.
[6] In order to overcome the problems of the ceramic or resin substrates, a metal substrate has been proposed. The metal substrate is inexpensive and easy to process, and has a good thermal reliability. However, unlike the aforementioned ceramic and resin substrates, an insulating process needs to be performed on the metal substrate. In addition, in order to effectively release heat, a metal core having a function of a heat sink or a heat spreader needs to be attached on an upper or lower potion of the substrate.
[7] On the other hand, recently, as products have tended to be manufactured in a small- sized thin type, a chip carrier or a PCB having a thin thickness and a flat surface has been demanded. As an approach for implementing such a thin and flat product, cavities are formed on predetermined portions of the substrate, and the chips or parts are mounted in the cavities.
[8] In a conventional method of forming the cavities, the cavities have been formed by drilling a resin substrate. According to the method, cavity processing time and cost are increased. In addition, since a deviation of the processed cavities is large, parts mounted therein may be easily slanted, so that it is difficult to maintain a predetermine flatness of the substrate. Moreover, since the resin used for the substrate has poor thermal and mechanical characteristics, if the parts are mounted in the cavities formed in the resin substrate, serious stress and deformation may occur in the resin substrate.
[9] As an approach for overcoming the problem, in Korean Patent No. 10-0656300, there is disclosed a three-dimensional package module in which cavities for mounting parts on a substrate are vertically formed, and that is capable of obtaining thermal, electrical, and mechanical stability and that easily maintains flatness of the substrate.
[10] The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art. Disclosure of Invention Technical Problem
[11] For a conventional three-dimensional aluminum package module, a method of disposing a second device such as a passive device, a pad, or the like on an organic insulating layer and an aluminum oxide layer and connecting a first device such as a power amplifier (PA), a low-noise amplifier (LNA), a phase shifter, a mixer, an oscillator, and a voltage controlled oscillator (VCO) to the second device through a wire line has been disclosed.
[12] However, for a case where the second device is not disposed on the organic insulating layer and the aluminum oxide layer, a wiring method has not been specifically disclosed. [13] In addition, since the organic material layer is formed to cover a semiconductor device, the conventional method cannot be directly used for a light-receiving or a light- emitting device.
[14] The present invention has been made in an effort to provide a semiconductor package module using a anodized oxide layer, in which a lead line is formed to extend to an edge portion (corner portion) and a portion of an organic material layer is removed, and a manufacturing method thereof having advantages of being able to be effectively used for a light-receiving device or a light-emitting device. Technical Solution
[15] An exemplary embodiment of the present invention provides a semiconductor package module using a anodized oxide layer, including: a substrate made of a material that is capable of forming the anodized oxide layer; an oxide layer that is formed on the substrate to have at least one opening; a semiconductor device that is mounted in the opening of the oxide layer; an organic material layer that is formed to cover the oxide layer and the semiconductor device; and a lead line that is formed on an upper surface of the organic material layer or the oxide layer and to be connected to the semiconductor device.
[16] In the above embodiment, the semiconductor package module mounted in the opening of the oxide layer may be a photonic device, and a portion of the organic material layer may be removed so as to expose an upper surface of the photonic device.
[17] Another embodiment of the present invention provides a method of manufacturing a semiconductor package module using a anodized oxide layer, including: preparing a substrate by using a material that is capable of forming the anodized oxide layer; forming an oxide layer by performing anodic oxidation on a surface (upper surface) of the substrate to a predetermined depth; forming a plurality of openings in the oxide layer by forming a mask pattern on a surface of the oxide layer and performing chemical etching; removing the mask pattern; mounting a semiconductor device in the opening of the oxide layer; forming an organic insulating layer on upper surfaces of the semiconductor device and the oxide layer; and forming a lead line on the organic insulating layer and the oxide layer to extend to an edge portion of the organic insulating layer.
[18] In the above embodiment, before the anodic oxidation is performed on the substrate, an anti-oxidation mask pattern may be formed on the lower surface of the substrate in order to prevent oxidation.
Advantageous Effects
[19] According to the semiconductor package module using a anodized oxide layer and the manufacturing method according to the present invention, since the lead line is formed to extend to the edge portion of the organic insulating layer or the oxide layer, it is possible to effectively connect to other neighboring semiconductor devices, photonic devices, circuits, or the like.
[20] In addition, since a portion of the organic insulating layer (a portion of the upper surface of the semiconductor device, that is, the photonic device) is removed, even in the case of using the photonic device such as a light-receiving or a light-emitting device as the semiconductor device, the light-receiving or light-emitting functions can be effectively obtained.
[21] In addition, since the semiconductor device is mounted at an inner portion of the substrate and the semiconductor device is electrically connected to external devices by using via-holes or plating, the thickness of the package module can be greatly reduced. Since a metal substrate or a silicon substrate can be used, heat releasing efficiency can be greatly improved.
[22] In addition, since the oxide layer is an insulator, a possibility of occurrence of a short-circuit to a bottom electrode can be substantially reduced.
[23] In addition, the substrate can be constructed with a silicon substrate. In this case, active and passive devices are formed by using a CMOS process, and then another semiconductor device can be packaged according to the present invention. Brief Description of the Drawings
[24] FIG. 1 is a cross-sectional view illustrating a first embodiment of a semiconductor package module using a anodized oxide layer according to the present invention.
[25] FIG. 2 is a top plan view illustrating the first embodiment of the semiconductor package module using the anodized oxide layer according to the present invention.
[26] FIG. 3 is a cross-sectional view illustrating a second embodiment of the semiconductor package module using a anodized oxide layer according to the present invention.
[27] FIG. 4 is a cross-sectional view taken along line A-A of FIG. 3.
[28] FIG. 5 is a cross-sectional view illustrating a state that electrodes are separately conn ected to upper and lower surfaces of a semiconductor device in the second embodiment of the semiconductor package module using a anodized oxide layer according to the present invention.
[29] FIG. 6 is a cross-sectional view illustrating a state in which electrodes are connected to the lower surface of the semiconductor device in the second embodiment of the semiconductor package module using a anodized oxide layer according to the present invention.
[30] FIG. 7 is a block diagram illustrating an embodiment of a method of manufacturing a semiconductor package module using a anodized oxide layer according to the present invention.
[31] FIG. 8 is a flowchart illustrating processes of the method of manufacturing a semiconductor package module using a anodized oxide layer according to the present invention. Best Mode for Carrying Out the Invention
[32] Hereinafter, exemplary embodiments of a semiconductor package module using a anodized oxide layer according to the present invention are described in detail with reference to the accompanying drawings. The exemplary embodiments of the present invention can be modified in various manners, and the present invention is not limited to the below-described exemplary embodiments. The exemplary embodiments of the present invention are provided so that the ordinarily skilled in the related art can understand the present invention. In the drawings, shapes of elements may be exemplified and exaggerated for the convenience of description. In the drawings, the same reference numerals denote the same elements.
[33] In a first embodiment of a semiconductor package module using a anodized oxide layer according to the present invention, as shown in FIGS. 1 and 2, an oxide layer 12 is formed on a substrate 10 through anodic oxidation.
[34] The substrate 10 is made of a material having excellent thermal conductivity in comparison to a synthetic resin or a ceramic. For example, the substrate 10 is formed with a thickness of about 0.1 to 5mm, and preferably with a thin thickness of about 0.15 to 1.0mm.
[35] The substrate 10 is made of a material that is capable of forming a anodized oxide layer.
[36] As the material that is capable of forming the anodized oxide layer, a metal such as aluminum (Al), magnesium (Mg), and titanium (Ti), a semiconductor such as silicon (Si), gallium arsenide (GaAs), or the like, can be used.
[37] The substrate 10 may have an arbitrary shape, for example a shape of a plate or a wafer. The substrate 10 is formed so that a printing circuit technique or a semiconductor process can be applied thereto.
[38] In a case where the substrate 10 is made of aluminum, an aluminum oxide layer is formed as the oxide layer 12 through the anodic oxidation.
[39] The oxide layer 12 is subjected to patterning and chemical etching, so that a plurality of openings 14 are formed to having sidewalls that are vertically formed with respect to an upper surface (top surface) of the substrate 10.
[40] Semiconductor devices 16 such as a power amplifier (PA), a low-noise amplifier
(LNA), a phase shifter, a mixer, an oscillator, and a voltage controlled oscillator (VCO) are mounted in the openings 14 with an adhesive material 17. [41] The oxide layer 12 is formed to have a thickness corresponding to a height of the semiconductor device 16 mounted in the opening 14. The thickness of the oxide layer 12 is about 0.25 to 0.5 times the height of the semiconductor device 16.
[42] For example, when the opening 14 is formed in the oxide layer 12 by etching and the semiconductor device 16 is mounted in the opening 14, the thickness of the oxide layer 12 is suitably defined so that a lower end portion of the semiconductor device 16 or the entire portion of the semiconductor device 16 can be inserted into the opening 14.
[43] Electrode terminals 18 that are made of a conductive metal such as copper (Cu) and gold (Au) are formed on the upper surface of the semiconductor device 16.
[44] An organic insulation layer 20 is formed on the substrate 10 and the semiconductor device 16 including the electrode terminals 18.
[45] The organic insulating layer 20 is formed by using, for example, benzocyclobutene
(BCB), polyimide, or the like.
[46] Contact holes 22 for electrical connection between the semiconductor device 16 and lead lines 26 that are formed thereon are formed in the organic insulating layer 20. The contact holes 22 are filled with a conductor for the electrical connection.
[47] The lead lines 26 are formed on the organic insulating layer 20 and the oxide layer 12 to be connected to the semiconductor device 16.
[48] Each of the lead lines 26 is formed to extend to an edge portion (corner portion) of the organic insulating layer 20 or the oxide layer 12 so as to be connected to neighboring semiconductor devices or photonic devices, driving circuits, signal lines, or the like.
[49] In a second embodiment of the semiconductor package module using a anodized oxide layer according to the present invention, as shown in FIGS. 3 and 4, a portion of the organic insulating layer 20 is removed so as to expose an upper surface of the semiconductor device 16.
[50] As the semiconductor device 16, a photonic device such as a light-receiving device and a light-emitting device is used.
[51] Due to the exposed upper surface of the photonic device 16 obtained by removing a portion of the organic insulating layer 20, light can be effectively emitted and transmitted, and the photonic device can be efficiently operated.
[52] In FIGS. 3 and 4, all the lead lines 26 are connected on the upper surface of the photonic device 16. Namely, in this case, both electrode terminals 18 are formed on the upper surface of the photonic device 16.
[53] In a case where the electrode terminals 18 are separately formed on the upper and lower surfaces of the semiconductor device 16, that is, the photonic device, as shown in FIG. 5, the electrode terminal 18 formed on the upper surface is directly connected to the lead line 26, and the electrode terminal 18 formed on the lower surface is electrically connected to the substrate 10 through the contact hole 19 filled with a conductor, where the substrate 10 is used as the other electrode.
[54] The contact hole 19 may be formed by partially removing the adhesive material 17 that is used to mount the semiconductor device 16. Alternatively, the contact hole 19 may be formed by not applying the adhesive material 17 to the corresponding portion in the vicinity of the electrode terminal 18 formed on the lower surface of the semiconductor device 16. The contact hole 19 is filled with a conductor for electrical connection.
[55] In addition, in a case where a conductive device material is used as the adhesive material 17, the semiconductor device 16 and the substrate 10 can be electrically connected to each other without the contact hole 19.
[56] In a case where both electrode terminals 18 are formed on the lower surface of the semiconductor device 16, that is, the photonic device, as shown in FIG. 6, one electrode terminal 18 is electrically connected to the substrate 10 through the contact hole 19 filled with a conductor where the substrate 10 is used as the one electrode, and the other electrode terminal 18 is electrically connected to the lead line 26 formed on the organic insulating layer 20 through a contact hole 27 filled with a conductor or the wire line.
[57] The contact hole 27 is formed on the organic insulating layer 20 so as not to be short- circuited to the substrate 10. The contact hole 27 is filled with a conductor for the electrical connection, and the lead line 26 is connected to the upper portion of the contact hole 27.
[58] In an embodiment of a method of manufacturing a semiconductor package module using a anodized oxide layer according to the present invention, as shown in Fig. 7, the method includes a step PlO of preparing a substrate 10, a step P20 of forming an anti- oxidation mask pattern 44 on the entire lower surface of the substrate 10, a step P30 of performing anodic oxidation on the substrate 10 to a predetermined depth to form an oxide layer 12, a step P40 of forming a mask pattern 42 on a surface of the oxide layer 12 and performing chemical etching to form a plurality of openings 14 in the oxide layer 12, a step P50 of removing the mask pattern 42 and the anti-oxidation mask pattern 44, a step P60 of mounting a semiconductor device 16 in the opening of the oxide layer 12, a step P70 of forming an organic insulating layer 20 on upper surfaces of the semiconductor device 16 and the oxide layer 12, and a step P80 of forming lead lines 26 on the organic insulating layer 20 and the oxide layer 12.
[59] The substrate 10 is made of a material that is capable of forming a anodized oxide layer. As the material capable that is of forming the anodized oxide layer, a metal such as aluminum (Al), magnesium (Mg), and titanium (Ti), a semiconductor such as silicon (Si), gallium arsenide (GaAs), or the like, can be used. [60] In a case where the substrate 10 is made of silicon, in the step PlO of preparing the substrate 10, passive devices and active devices such as a memory and an analog device are formed on the silicon substrate by using a semiconductor process such as a CMOS process, and then the subsequent steps according to the present invention are performed, so that another semiconductor device 16 can be packaged.
[61] Due to the anti-oxidation mask pattern 44 formed on the lower surface of the substrate 10, only the upper surface of the substrate 100 is oxidized during the anodic oxidation so that the oxide layer 12 is formed on only the upper surface of the substrate 10.
[62] Alternatively, in a case where the lower surface of the substrate 10 may be protected so as to not be oxidized by using an apparatus or a tool during the anodic oxidation of the substrate 10, the step of forming the anti-oxidation mask pattern 44 can be omitted. In other words, since the anti-oxidation mask pattern 44 is used so as to prevent the anodic oxidation of the lower surface of the substrate 10, if the anodic oxidation can be prevented by using a suitable method, the anti-oxidation mask pattern 44 is not needed.
[63] The oxide layer 12 is formed to have a thickness corresponding to a height of the semiconductor device 16 mounted in the opening 14. The thickness of the oxide layer 12 is about 0.25 to 0.5 times the height of the semiconductor device 16.
[64] The opening 14 is formed to have sidewalls that are vertically formed with respect to the upper surface of the substrate 10.
[65] The semiconductor device 16 is mounted in the opening 14 on the substrate 10 by using the adhesive material 17.
[66] As the semiconductor device 16, a power amplifier (PA), a low-noise amplifier
(LNA), a phase shifter, or the like can be used.
[67] Electrode terminals 18 are formed on the semiconductor device 16.
[68] The organic insulating layer 20 is formed on the semiconductor device 16 and the oxide layer 12 by using benzocyclobutene (BCB), polyimide, or the like.
[69] Contact holes 22 are formed at predetermined portions of the organic insulating layer
20 by using a photolithography process or a pattern forming process.
[70] Lead lines 26 are formed on the organic insulating layer 20 to be connected to the contact holes 22.
[71] Each of the lead lines 26 is formed to extend to an edge portion (corner portion) of the organic insulating layer 12 so as to be connected to another semiconductor device or an external apparatus.
[72] In the embodiment of the method of manufacturing a semiconductor package module using a anodized oxide layer according to the present invention, in the step P60 of mounting the semiconductor device, a photonic device such as a light-receiving device and a light-emitting device may be used as the to-be-mounted semiconductor device 16, and in the step P70 of forming the organic insulating layer, after the organic insulating layer 20 is formed, a portion of the organic insulating layer 20 may be removed so as to expose the upper surface of the semiconductor device 16.
[73] In the process of removing a portion of the organic insulating layer 20 to expose the upper surface of the semiconductor device 16, that is, the photonic device, in a case where the organic insulating layer 20 is made of a photosensitive material, a lithography process is preferably used. On the other hand, in a case where the organic insulating layer 20 is made of a material other than the photosensitive material, a dry etching process together with a pattern forming process is preferably used.
[74] In a case where the semiconductor device 16 is a photonic device, if the electrodes are formed on only one surface of the semiconductor device 16, an arbitrary adhesive material can be used. If the electrodes are separately formed on both surfaces of the semiconductor device 16, a conductive adhesive material can be used, the substrate 10 may be constructed with a metal substrate, and the substrate 10 can be used as the other electrode.
[75] Although a semiconductor package module using a anodized oxide layer according to the present invention is described in connection with exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

Claims
[1] A semiconductor package module using a anodized oxide layer, comprising: a substrate made of a material that is capable of forming the anodized oxide layer; an oxide layer that is formed on the substrate to have at least one opening; a semiconductor device that is mounted in the opening of the oxide layer; an organic material layer that is formed to cover the oxide layer and the semiconductor device; and a lead line that is formed on an upper surface of the organic material layer or the oxide layer and to be connected to the semiconductor device.
[2] The semiconductor package module of claim 1 , wherein the substrate is made of a metal or semiconductor material.
[3] The semiconductor package module of claim 2, wherein the semiconductor material is made of a silicon or gallium arsenide.
[4] The semiconductor package module of claim 1 , wherein the semiconductor device mounted in the opening of the oxide layer is a photonic device comprising a light-receiving device and a light-emitting device, and wherein a portion of the organic material layer is removed so as to expose an upper surface of the photonic device.
[5] The semiconductor package module of claims 1 or 4, wherein the oxide layer is formed to have a thickness of 0.25 to 2.5 times the height of the mounted semiconductor device.
[6] The semiconductor package module of claims 1 or 4, wherein a contact hole is formed on the organic material layer to electrically connect the lead line to the semiconductor device.
[7] The semiconductor package module of claim 1 or 4, wherein electrode terminals are formed on upper and lower surfaces of the semiconductor device, and wherein the electrode terminal formed on the upper surface is electrically connected to the lead line, and the electrode terminal formed on the lower surface is electrically connected to the substrate.
[8] The semiconductor package module of claim 7, wherein the electrode terminal formed on the upper surfaces of the semiconductor device is electrically connected to the lead line through a wire line.
[9] The semiconductor package module of claim 1 or 4, wherein all electrode terminals are formed on a lower surface of the semi- conductor device, and wherein some electrode terminal is electrically connected to the substrate, and the other electrode terminal is electrically connected to the lead line formed on the organic insulating layer or the oxide layer. [10] A method of manufacturing a semiconductor package module using a anodized oxide layer, comprising: preparing a substrate; forming an oxide layer by performing anodic oxidation on a surface of the substrate to a predetermined depth; forming a plurality of openings in the oxide layer by forming a mask pattern on a surface of the oxide layer and performing chemical etching; removing the mask pattern; mounting a semiconductor device in the opening of the oxide layer; forming an organic insulating layer on upper surfaces of the semiconductor device and the oxide layer; and forming a lead line on the organic insulating layer and the oxide layer. [11] The method of claim 10, wherein the oxide layer is formed to have a thickness of 0.25 to 2.5 times the height of the mounted semiconductor device. [ 12] The method of claim 10, wherein, in the mounting of the semiconductor device, a photonic device is used as the semiconductor device, and wherein, in the forming of the organic insulating layer, a portion of the formed organic material layer is removed so as to expose an upper surface of the semiconductor device. [13] The method of claim 10, wherein a semiconductor substrate is used as the substrate, and wherein, in the preparing of the substrate, an active device and a passive device are further formed on the semiconductor substrate.
PCT/KR2007/004610 2007-06-11 2007-09-20 Semiconductor package module using anodized oxide layer and manufacturing method thereof WO2008153245A2 (en)

Applications Claiming Priority (4)

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KR20070056899 2007-06-11
KR10-2007-0056899 2007-06-11
KR10-2007-0094584 2007-09-18
KR1020070094584A KR100894247B1 (en) 2007-06-11 2007-09-18 Semiconductor Package Module Using Anodized Oxide Layer and Manufacturing Method Thereof

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Cited By (2)

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CN103594462A (en) * 2013-11-07 2014-02-19 昆山开威电子有限公司 LED integration packaging structure and packaging method thereof
EP3518280A1 (en) * 2018-01-25 2019-07-31 Murata Manufacturing Co., Ltd. Electronic products having embedded porous dielectric, related semiconductor products, and their methods of manufacture

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Publication number Priority date Publication date Assignee Title
JPS5917272A (en) * 1982-07-20 1984-01-28 Matsushita Electric Ind Co Ltd Semiconductor device and manufacture thereof
JPS604229A (en) * 1983-06-23 1985-01-10 Nec Corp Mounting method of semiconductor element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5917272A (en) * 1982-07-20 1984-01-28 Matsushita Electric Ind Co Ltd Semiconductor device and manufacture thereof
JPS604229A (en) * 1983-06-23 1985-01-10 Nec Corp Mounting method of semiconductor element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103594462A (en) * 2013-11-07 2014-02-19 昆山开威电子有限公司 LED integration packaging structure and packaging method thereof
EP3518280A1 (en) * 2018-01-25 2019-07-31 Murata Manufacturing Co., Ltd. Electronic products having embedded porous dielectric, related semiconductor products, and their methods of manufacture
WO2019145289A1 (en) * 2018-01-25 2019-08-01 Murata Manufacturing Co., Ltd. Electronic products having embedded porous dielectric, related semiconductor products, and their methods of manufacture

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