WO2008152697A1 - コンフィグレーション装置 - Google Patents
コンフィグレーション装置 Download PDFInfo
- Publication number
- WO2008152697A1 WO2008152697A1 PCT/JP2007/061826 JP2007061826W WO2008152697A1 WO 2008152697 A1 WO2008152697 A1 WO 2008152697A1 JP 2007061826 W JP2007061826 W JP 2007061826W WO 2008152697 A1 WO2008152697 A1 WO 2008152697A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- fpgas
- interface
- configuration
- interface sections
- configuration data
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17748—Structural details of configuration resources
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17748—Structural details of configuration resources
- H03K19/17764—Structural details of configuration resources for reliability
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
- Stored Programmes (AREA)
- Communication Control (AREA)
Abstract
複数のFPGAにコンフィグレーションデータを供給するコンフィグレーション装置は、複数のFPGAへ供給されるコンフィグレーションデータを記憶するメモリと、メモリから読み出されたコンフィグレーションデータをそれぞれ固有のコンフィグレーション形式にしたがって出力する複数のインタフェース部と、複数のFPGAについてそのコンフィグレーションに使用すべきインタフェース部を複数のインタフェース部から選択するインタフェース選択部と、インタフェース選択部の選択に従ってFPGAとインタフェース部との間を接続する回線の回線交換を行う回線交換部と、を備える。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009519092A JP4847585B2 (ja) | 2007-06-12 | 2007-06-12 | コンフィグレーション装置 |
PCT/JP2007/061826 WO2008152697A1 (ja) | 2007-06-12 | 2007-06-12 | コンフィグレーション装置 |
US12/625,730 US7847589B2 (en) | 2007-06-12 | 2009-11-25 | Configuration data feeding device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2007/061826 WO2008152697A1 (ja) | 2007-06-12 | 2007-06-12 | コンフィグレーション装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/625,730 Continuation US7847589B2 (en) | 2007-06-12 | 2009-11-25 | Configuration data feeding device |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008152697A1 true WO2008152697A1 (ja) | 2008-12-18 |
Family
ID=40129315
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2007/061826 WO2008152697A1 (ja) | 2007-06-12 | 2007-06-12 | コンフィグレーション装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7847589B2 (ja) |
JP (1) | JP4847585B2 (ja) |
WO (1) | WO2008152697A1 (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8373434B2 (en) | 2010-06-14 | 2013-02-12 | Samsung Electronics Co., Ltd. | Control board for connection between FPGA boards and test device thereof |
JP2013038741A (ja) * | 2011-08-11 | 2013-02-21 | Nippon Signal Co Ltd:The | コンフィグレーション装置及びコンフィグレーション方法 |
JP2013534786A (ja) * | 2010-06-28 | 2013-09-05 | ザイリンクス インコーポレイテッド | マルチダイ集積回路の設定 |
KR20130121730A (ko) * | 2012-04-27 | 2013-11-06 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 프로그래머블 lsi |
JP2017519449A (ja) * | 2014-08-13 | 2017-07-13 | メタマコ テクノロジー エルピーMetamako Technology Lp | 低レイテンシスイッチング装置および方法 |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7426678B1 (en) | 2004-07-20 | 2008-09-16 | Xilinx, Inc. | Error checking parity and syndrome of a block of data with relocated parity bits |
GB2501757A (en) * | 2012-05-04 | 2013-11-06 | Ibm | Instrumentation of software applications for configuration thereof |
KR101920719B1 (ko) * | 2012-11-19 | 2019-02-13 | 삼성전자주식회사 | 논리 장치, 논리 장치를 포함하는 디지털 필터 및 논리 장치를 제어하는 방법 |
CN105981116B (zh) | 2013-10-01 | 2019-09-06 | 埃1023公司 | 磁增强的能量存储***及方法 |
KR101929049B1 (ko) * | 2016-02-04 | 2019-03-12 | 한국전자통신연구원 | 가속 시스템 및 그 구동 방법 |
US10326651B1 (en) | 2017-04-18 | 2019-06-18 | Amazon Technologies, Inc. | Client configurable hardware logic and corresponding signature |
US10540200B2 (en) | 2017-11-10 | 2020-01-21 | Advanced Micro Devices, Inc. | High performance context switching for virtualized FPGA accelerators |
TWI689818B (zh) * | 2018-08-28 | 2020-04-01 | 其陽科技股份有限公司 | 可變式電子裝置 |
US10447273B1 (en) * | 2018-09-11 | 2019-10-15 | Advanced Micro Devices, Inc. | Dynamic virtualized field-programmable gate array resource control for performance and reliability |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000278116A (ja) * | 1999-03-19 | 2000-10-06 | Matsushita Electric Ind Co Ltd | Fpga用コンフィギュレーションインターフェース |
JP2003044303A (ja) * | 2001-07-27 | 2003-02-14 | Kyushu Ando Denki Kk | コンピュータ装置 |
JP2004343158A (ja) * | 2003-05-12 | 2004-12-02 | Nec Saitama Ltd | コンフィグレーション装置、方法及びプログラム |
JP2005259053A (ja) * | 2004-03-15 | 2005-09-22 | Nec Saitama Ltd | コンフィグレーションデータ設定方法およびコンピュータシステム |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5452231A (en) * | 1988-10-05 | 1995-09-19 | Quickturn Design Systems, Inc. | Hierarchically connected reconfigurable logic assembly |
JPH11144662A (ja) | 1997-11-05 | 1999-05-28 | Hitachi Ltd | 画像処理装置 |
US7640155B2 (en) * | 2004-06-01 | 2009-12-29 | Quickturn Design Systems, Inc. | Extensible memory architecture and communication protocol for supporting multiple devices in low-bandwidth, asynchronous applications |
US7554357B2 (en) * | 2006-02-03 | 2009-06-30 | Lattice Semiconductor Corporation | Efficient configuration of daisy-chained programmable logic devices |
-
2007
- 2007-06-12 WO PCT/JP2007/061826 patent/WO2008152697A1/ja active Application Filing
- 2007-06-12 JP JP2009519092A patent/JP4847585B2/ja not_active Expired - Fee Related
-
2009
- 2009-11-25 US US12/625,730 patent/US7847589B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000278116A (ja) * | 1999-03-19 | 2000-10-06 | Matsushita Electric Ind Co Ltd | Fpga用コンフィギュレーションインターフェース |
JP2003044303A (ja) * | 2001-07-27 | 2003-02-14 | Kyushu Ando Denki Kk | コンピュータ装置 |
JP2004343158A (ja) * | 2003-05-12 | 2004-12-02 | Nec Saitama Ltd | コンフィグレーション装置、方法及びプログラム |
JP2005259053A (ja) * | 2004-03-15 | 2005-09-22 | Nec Saitama Ltd | コンフィグレーションデータ設定方法およびコンピュータシステム |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8373434B2 (en) | 2010-06-14 | 2013-02-12 | Samsung Electronics Co., Ltd. | Control board for connection between FPGA boards and test device thereof |
JP2013534786A (ja) * | 2010-06-28 | 2013-09-05 | ザイリンクス インコーポレイテッド | マルチダイ集積回路の設定 |
JP2013038741A (ja) * | 2011-08-11 | 2013-02-21 | Nippon Signal Co Ltd:The | コンフィグレーション装置及びコンフィグレーション方法 |
KR20130121730A (ko) * | 2012-04-27 | 2013-11-06 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 프로그래머블 lsi |
JP2013243657A (ja) * | 2012-04-27 | 2013-12-05 | Semiconductor Energy Lab Co Ltd | プログラマブルlsi |
US9654107B2 (en) | 2012-04-27 | 2017-05-16 | Semiconductor Energy Laboratory Co., Ltd. | Programmable LSI |
KR102047553B1 (ko) * | 2012-04-27 | 2019-11-21 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 프로그래머블 lsi |
JP2017519449A (ja) * | 2014-08-13 | 2017-07-13 | メタマコ テクノロジー エルピーMetamako Technology Lp | 低レイテンシスイッチング装置および方法 |
US10630608B2 (en) | 2014-08-13 | 2020-04-21 | Metamako Technology Lp | Apparatus and method for low latency switching |
US11228538B2 (en) | 2014-08-13 | 2022-01-18 | Arista Networks, Inc. | Apparatus and method for low latency switching |
Also Published As
Publication number | Publication date |
---|---|
JP4847585B2 (ja) | 2011-12-28 |
US7847589B2 (en) | 2010-12-07 |
US20100066408A1 (en) | 2010-03-18 |
JPWO2008152697A1 (ja) | 2010-08-26 |
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