WO2008147139A2

WO2008147139A2 - Method of transmitting and receiving a signal and apparatus for transmitting and receiving a signal

Info

Publication number: WO2008147139A2
Application number: PCT/KR2008/003055
Authority: WO
Inventors: Woo Suk Ko; Sang Chul Moon
Original assignee: Lg Electronics Inc.
Priority date: 2007-05-30
Filing date: 2008-05-30
Publication date: 2008-12-04
Also published as: KR20080105356A; WO2008147139A3

Abstract

An apparatus for transmitting/receiving a signal and a method of transmitting/receiving a signal are disclosed. In particular, an apparatus for transmitting/receiving a signal and a method of transmitting/receiving a signal, which are capable of increasing a data transfer rate, are disclosed. Symbols are mapped according to a plurality of symbol mapping methods such that gaps between neighboring symbols are identical. The mapped symbol data is modulated and transmitted. Accordingly, it is possible to improve a data transfer rate on the basis of a SNR gain and improve signal transmission/reception performance of a transmitting/receiving system. If a multi-mapping method or a multi-coding method is used, a relationship between a necessary SNR and a transfer rate is adjusted so as to improve transmission efficiency.

Description

METHOD OF TRANSMITTING AND RECEIVING A SIGNAL AND APPARATUS FOR TRANSMITTING AND RECEIVING A

SIGNAL

Technical Field

[1] The present invention relates to a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal, and more particularly to a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal, which are capable of increasing a data transfer rate. Background Art

[2] As a digital broadcasting technology has been developed, a broadcasting signal including a high definition (HD) moving image and high-quality digital sound can be transmitted/received. With continuous development of a compression algorithm and high performance of hardware, a digital broadcasting system has been rapidly developed. A digital television (DTV) system can receive a digital broadcasting signal and provide a variety of supplementary services to users as well as a video signal and an audio signal.

[3] As a digital broadcast has come into wide use, a demand for a service such as a more excellent video and audio signal has been increased and the size of data or the number of broadcasting channels, which are desired by users, has been gradually increased. Disclosure of Invention Technical Problem

[4] However, in the existing method of transmitting/receiving a signal, the quantity of transmitted/received data or the number of broadcasting channels cannot be increased. Accordingly, there is a need for a new method of transmitting/receiving a signal, which is capable of improving channel bandwidth efficiency and reducing cost consumed for constructing a network for transmitting/receiving the signal, compared with the existing method of transmitting/receiving the signal.

[5] An object of the present invention is to provide a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal, which are capable of increasing a data transfer rate and using the existing network for transmitting/receiving the signal. Technical Solution

[6] The object of the present invention can be achieved by providing an apparatus for transmitting a signal, the apparatus including a forward error correction (FEC) encoder which FEC-encodes input data, a mapper which maps the FEC-encoded data to symbols according to at least two symbol mapping methods, the data being mapped such that gaps between the symbols are identical according to a first symbol mapping method and the data being mapped such that gaps between symbols are identical according to a second symbol mapping method, among the symbol mapping methods, and a transmitter which modulates and transmits the mapped symbol data, and a method of transmitting the signal in the apparatus.

[7] The mapper may include a bitstream distributor which distributes the FEC-encoded data to at least two bitstreams; a first mapper which maps the symbols according to the first symbol mapping method; a second mapper which maps the symbols according to the second symbol mapping method; and a symbol merger which merges the symbol data mapped by the first mapper and the second mapper.

[8] The symbol merger may interleave the symbol data by the first mapper and the second mapper and output one symbol data stream.

[9] According to another aspect of the invention, there is provided an apparatus for receiving a signal, the apparatus including, a demodulator which demodulates the received signal, a frame parser which parses a frame of the demodulated signal and outputs the parsed data, a demapper which, if symbol data included in the data output from the frame parser includes symbols which are arranged such that gaps between the neighboring symbols are identical according to a first symbol mapping method and symbols which are arranged such that gaps between the neighboring symbols are identical according to a second symbol mapping method different from the first symbol mapping method, demaps the symbol data so as to correspond the first symbol mapping method and the second symbol mapping method and outputs the demapped symbol data, and a forward error correction (FEC) decoder which FEC-decodes the demapped symbol data, and a method of receiving the signal in the apparatus.

[10] The demapper may include a symbol distributor which distributes the received symbol data to at least one demapper, a first demapper which demaps the distributed symbol data according to the first symbol mapping method, a second demapper which demaps the distributed symbol data according to the second symbol mapping method, and a bitstream merger which outputs bitstreams demapped by the first demapper and the second demapper.

[11] The bitstream merger may deinterleave the bitstreams demapped by the first demapper and the second demapper and output the demapped bitstream.

[12] The demapper may decide whether the symbol data is positioned in a rectangular region formed by two sides of a hexagon included in a decision boundary region.

Advantageous Effects [13] According to a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal of the present invention, it is possible to facilitate the switching of a signal transmitting/receiving system using the existing signal transmitting/receiving network and reduce cost.

[14] In addition, it is possible to improve a data transfer rate such that a SNR gain can be obtained and estimate a channel with respect to a transmission channel having a long delay spread property so as to increase a signal transmission distance. Accordingly, it is possible to improve the signal transmission/reception performance of the tr ansmitting/receiving system.

[15] If a multi-mapping method or a multi-coding method is used, it is possible to adjust a relationship between a necessary SNR gain and a capacity gain so as to increase transmission efficiency. Brief Description of the Drawings

[16] The accompanying drawings, which are included to provide a further understanding of the invention, illustrate embodiments of the invention and together with the description serve to explain the principle of the invention.

[17] In the drawings :

[18] FIG. 1 is a schematic block diagram showing an apparatus for transmitting a signal according to an embodiment of the present invention.

[19] FIG. 2 is a schematic block diagram showing a multi-mapper according to an embodiment of the present invention.

[20] FIG. 3 is a view showing a bitstream distributing method according to an embodiment of the present invention.

[21] FIG. 4 is a schematic view showing the positions of points of an optimal constellation according to an embodiment of the present invention.

[22] FIG. 5 is a flowchart illustrating a method of deciding points of an optimal constellation according to an embodiment of the present invention.

[23] FIG. 6 is a schematic view showing an optimal constellation having 16 points according to an embodiment of the present invention.

[24] FIG. 7 is a schematic view showing an optimal constellation having 64 points according to an embodiment of the present invention.

[25] FIG. 8 is a schematic view showing an optimal constellation having 256 points according to an embodiment of the present invention.

[26] FIG. 9 is a schematic view showing another optimal constellation having 256 points according to an embodiment of the present invention.

[27] FIG. 10 is a block diagram showing an apparatus for receiving a signal according to an embodiment of the present invention. [28] FIG. 11 is a schematic block diagram showing a multi-demapper according to an embodiment of the present invention.

[29] FIG. 12 is a schematic block diagram showing decision boundaries of the optimal constellation having 64 points.

[30] FIG. 13 is a schematic block diagram showing a symbol demapper for demapping a received optimal constellation symbol according to an embodiment of the present invention.

[31] FIG. 14 is a schematic block diagram showing another symbol demapper for demapping a received optimal constellation symbol according to an embodiment of the present invention.

[32] FIG. 15 is a schematic view showing a process of demapping a received optimal constellation symbol according to an embodiment of the present invention.

[33] FIG. 16 is a schematic view showing a process of demapping a received optimal constellation symbol of an edge region according to an embodiment of the present invention.

[34] FIG. 17 is a schematic block diagram showing another example of an apparatus for transmitting a signal using multi-encoding according to an embodiment of the present invention.

[35] FIG. 18 is a schematic block diagram showing a multi-encoder according to an embodiment of the present invention.

[36] FIG. 19 is a schematic block diagram showing an apparatus for receiving a multi- encoded signal according to an embodiment of the present invention.

[37] FIG. 20 is a schematic block diagram showing a multi-decoder according to an embodiment of the present invention.

[38] FIG. 21 is a schematic block diagram showing an apparatus for transmitting a signal using a multi-encoding method and a multi-mapping method according to an embodiment of the present invention.

[39] FIG. 22 is a schematic block diagram showing an apparatus for receiving a multi- encoded and multi-mapped signal according to an embodiment of the present invention.

[40] FIG. 23 is a schematic block diagram showing another example of an apparatus for receiving a multi-encoded and multi-mapped signal according to an embodiment of the present invention.

[41] FIG. 24 is a schematic block diagram showing a channel estimator according to an embodiment of the present invention.

[42] FIG. 25 is a schematic block diagram showing an equalizer according to an embodiment of the present invention.

[43] FIG. 26 is a schematic block diagram showing an apparatus for transmitting a signal by a data symbol channel estimation method according to an embodiment of the present invention. [44] FIG. 27 is a schematic block diagram showing an apparatus for receiving a signal by a data symbol channel estimation method according to an embodiment of the present invention. [45] FIG. 28 is a schematic block diagram showing another example of an apparatus for transmitting a signal by a data symbol channel estimation method according to an embodiment of the present invention. [46] FIG. 29 is a schematic block diagram showing another example of an apparatus for receiving a signal by a data symbol channel estimation method according to an embodiment of the present invention. [47] FIG. 30 is a schematic block diagram showing another example of an apparatus for transmitting a signal according to an embodiment of the present invention. [48] FIG. 31 is a schematic block diagram showing a forward error correction encoder according to an embodiment of the present invention. [49] FIG. 32 is a view showing an interleaver for interleaving input data according to an embodiment of the present invention. [50] FIG. 32 is a schematic block diagram showing a linear pre-coder according to an embodiment of the present invention. [51] FIGs. 34 to 36 are views showing a code matrix for dispersing input data according to an embodiment of the present invention. [52] FIG. 37 is a view showing the structure of a transmission frame according to an embodiment of the present invention. [53] FIG. 38 is a schematic block diagram showing an apparatus for transmitting a signal using a plurality of transmission paths according to an embodiment of the present invention. [54] FIGs. 39 to 43 are views showing examples of a 2x2 code matrix for dispersing input symbols according to an embodiment of the present invention. [55] FIG. 44 is a view showing an example of an interleaver according to an embodiment of the present invention. [56] FIG. 45 is a view showing a detailed example of the interleaver of FIG. 44 according to an embodiment of the present invention. [57] FIG. 46 is a view showing an example of a multi-input/output encoding method according to an embodiment of the present invention. [58] FIG. 47 is a view showing a structure of a pilot symbol interval according to an embodiment of the present invention. [59] FIG. 48 is a view showing another structure of the pilot symbol interval according to an embodiment of the present invention. [60] FIG. 49 is a schematic block diagram showing another example of an apparatus for receiving a signal according to an embodiment of the present invention.

[61] FIG. 50 is a schematic block diagram showing an example of a linear pre-coding decoder according to an embodiment of the present invention.

[62] FIG. 51 is a schematic block diagram showing another example of the linear pre- coding decoder according to an embodiment of the present invention.

[63] FIGs. 52 to 54 are views showing examples of a 2x2 code matrix for restoring dispersed symbols according to an embodiment of the present invention.

[64] FIG. 55 is a schematic block diagram showing a forward error correction decoder according to an embodiment of the present invention.

[65] FIG. 56 is a schematic block diagram showing an apparatus for receiving a signal using a plurality of reception paths according to an embodiment of the present invention.

[66] FIG. 57 is a view showing an example of a multi-input/output decoding method according to an embodiment of the present invention.

[67] FIG. 58 is a view showing a detailed example of FIG. 57 according to an embodiment of the present invention.

[68] FIG. 59 is a flowchart illustrating a method of transmitting a signal according to an embodiment of the present invention.

[69] FIG. 60 is a flowchart illustrating a method of receiving a signal according to an embodiment of the present invention. Best Mode for Carrying Out the Invention

[70] A method of transmitting/receiving a signal and an apparatus for transmitting/ receiving a signal according to the present invention will be described in detail with reference to the accompanying drawings.

[71] FIG. 1 is a schematic block diagram showing an apparatus for transmitting a signal according to an embodiment of the present invention. The signal transmitting apparatus of FIG. 1 may be a signal transmitting system for transmitting video data such as a broadcasting signal, for example, a signal transmitting system according to a digital video broadcasting (DVB) system. The signal transmitting system according to the embodiment of the present invention now will be described with reference to FIG. 1.

[72] The embodiment of FIG. 1 includes an outer encoder 100, an inner encoder 110, a first interleaver 120, a multi-mapper 130, a linear pre-coder 140, a second interleaver 150, a frame builder 160, a modulator 170 and a transmitter 180.

[73] The outer coder 100 and the inner coder 110 code respective input signals and output the encoded signals such that an error generated in transmitted data is detected and corrected by the receiver. That is, the outer coder 100 and the inner coder 110 configure a forward error correcting (FEC) encoder.

[74] The outer coder 100 codes the input data in order to prevent a transmission error in the input signal, that is, improve transmission performance of the input signal, and the inner coder 110 codes the signal to be transmitted again in order to prevent an error from occurring in the transmitted signal. The types of the encoders vary according to the coding methods used in the signal transmission system.

[75] The first interleaver 120 shuffles the data stream to random positions so as to become robust against a burst error which occurs in the data when the signal output from the inner coder 110 is transmitted. For example, the first interleaver 120 may use a convolution interleaver or a block interleaver. The type of the first interleaver 120 may be changed according to the method used in the signal transmitting system.

[76] The multi-mapper 130 maps the data interleaved by the first interleaver 120 to symbols according to the transmitting method. The multi-mapper 130 maps the input data to symbol data using a mixture of a plurality of mapping methods. As the mapping method, a quadrature amplitude modulation (QAM), a quadrature phase shift keying (QPSK), an amplitude phase shift keying (APSK), a pulse amplitude modulation (PAM) or an optimal constellation may be used.

[77] Using the multi-mapping method, a signal-to-noise ratio (SNR) gain can be obtained by a method of mapping to a small constellation size and a capacity gain can be obtained by a method of mapping to a large constellation size. Accordingly, it is possible to adjust the SNR gain and the capacity gain and increase transmission efficiency by adjusting the mixture ratio of the mapping methods.

[78] The linear pre-coder 140 disperses input symbol data into several pieces of output symbol data so as to decrease a probability that all information is lost due to fading when experiencing frequency- selective fading of a channel.

[79] The second interleaver 150 interleaves the symbol data output from the linear pre- coder 140 again such that the symbol data does not experience the same frequency- selective fading. The second interleaver 150 may use a convolution interleaver or a block interleaver.

[80] The frame builder 160 inserts a pilot signal into a data interval to build a frame such that the interleaved signal is modulated by an orthogonal frequency division multiplex (OFDM) method.

[81] The modulator 170 inserts a guard interval into the data output from the frame builder 160 and modulates the inserted data such that the data is transmitted in a state of being carried in OFDM subcarriers. The transmitter 180 converts the digital signal having the guard interval and the data interval, which is output from the modulator 170, into an analog signal and transmits the converted analog signal.

[82] FIG. 2 is a schematic block diagram showing the multi-mapper according to the embodiment of the present invention. The multi-mapper 130 includes a bitstream distributor 131, a first mapper 132, a second mapper 133, ..., an N mapper 134 and a symbol interleaver 135.

[83] The bitstream distributor 131 distributes the input bit data into several mappers. The bitstream distributor 131 distributes a necessary number of bit data in order to map the bit data to the symbols according to the mapping methods of the mappers.

[84] The bit data distributed by the bitsream distributor 131 is output to the mappers (the first mapper 132 to the N mapper 134). The first mapper 132 to the N mapper 134 map the input bit data to the symbol data. The mappers map the input bit data to the symbol data according to the respective mapping methods. As the mapping methods, the QAM, the QPSK, the APSK, the PAM, and the optimal constellation may be used. Here, the optimal mapping method includes all methods of mapping symbols to mapping points in consideration of the transmission powers of the symbols in order to optimally transmit the symbols on the constellation.

[85] The mappers (the first mapper 132 to the N mapper 134) map the input data to the symbol and output the mapped symbol according to the optimal constellation mapping method having a predetermined number of points.

[86] The mappers (the first mapper 132 to the N mapper 134) may be equal to one another in the mapping method and different from one another in the number of bit data included in one symbol or may be different from one another in the mapping method. For example, while all the first mapper 132 to the N mapper 134 use the QAM method, the first mapper 132 may map the symbol by the 16QAM method, the second mapper 133 may map the symbol by the 64QAM method, and the N mapper 134 may map the symbol by the 256QAM method. Alternatively, the first mapper 132 may map the symbol by the QAM method and the N mapper 134 may map the symbol by the optimal constellation method. This may vary according to the implementation examples.

[87] The symbol interleaver 135 interleaves and aligns the symbol data output from the mappers to one symbol stream and outputs the symbol stream. As the interleaving method, a block interleaving method, a convolution interleaving method or an interleaving method using bit-reversed addressing, which sets the symbols to one block and outputs the addresses corresponding to the order of the block in bit-reversed order, may be used. Alternatively, the symbol data output from the mappers may be aligned and output without interleaving the symbol data. This may vary according to the implementation examples.

[88] Hereinafter, for convenience of description, the case where the mappers (the first mapper 132 to the N mapper 134) are different from one another in the number of bit data included in one symbol while the optimal constellation method is used will be described. For example, the first mapper 132 may use a 16-point optimal constellation, the second mapper 133 may use a 64-point optimal constellation, and the N mapper 134 may use a 256-point optimal constellation.

[89] FIG. 3 is a view showing a bitstream distributing method according to an embodiment of the present invention. That is, the bitstream distributing method is an example of the method of distributing the bitstream by the bitstream distributor 131.

[90] In the bitstream distributing method of FIG. 3, the input bit data is stored in a memory space having a matrix shape in a predetermined pattern and the data is read and output in a pattern different from the storage pattern. In this case, the bitstream distributor 131 may perform a virtual interleaver function.

[91] For convenience of description, it is assumed that the number of mappers to which the input bit data will be distributed is 2. For example, if the length of one block input to the bitstream distributor 131 is MxN bits (M and N are natural numbers), the block is divided by M and data is stored in the memory space from a first row and a first column. The data is stored from the first row of the first column to an M' row of the first column and, when all the rows of the first column are filled up, the data is stored from the first row to the M rth row of a next column (second column). The data may be stored in the above-described order up to the M row of an N column. At this time, the position of a most significant bit (MSB) of the memory space is an uppermost left part and the position of a least significant bit (LSB) thereof is a lowermost right part.

[92] In the two mappers, if a ratio of bits to symbols of the first mapper and the second mapper is M-R:R, the data stored in the memory space is divided into M-R rows and R rows. The divided bit data is output in a row direction. That is, the data is read and output from the first row and the first column to the first row and the N column and, when all the data of the row is read, the data is read and output from the first column of a next row (the second row) in the right direction. The data is read in the above- described order up to the M-R row and is output to the first mapper. Even with respect to the R rows, the data is read in the row direction and is output to the second mapper.

[93] In the present embodiment, the size of the block, the storage pattern, and the read pattern are only exemplary and may vary according to the implementation examples. For example, the input bit data can be distributed to the mappers in input order.

[94] FIG. 4 is a schematic view showing the positions of points of an optimal constellation according to an embodiment of the present invention. For optimal constellation mapping, the above-described constellation points may be used. The numerals described on the constellation points indicate powers of the points.

[95] The x-axis (horizontal axis of y=0) values of the optimal constellation points may be odd numbers (1, 3, 5, ...) or even numbers (2, 4, 6, ...) and the y-axis (vertical axis of x=0) values thereof may be an integral multiple of "3

[96] For example, the points positioned on the x axis have the odd numbers of 1, 3, 5, . and the powers thereof are 1, 9, 25, ... The points positioned on the y axis have the values of

S^

3 V 3

5V^

, ... and the powers thereof are 3, 27, 75, .... In the point having a power of 13, the x- axis value is 1 and the y-axis value is

2V 3

. In the point having a power of 7, the x-axis value is 2 and the y-axis value is "3

[97] As shown, the transmission power of the symbols can be efficiently used by arranging points close to a circle form and arranging points as far as possible from a DC position.

[98] Instead of the positions of the points shown in FIG. 4, the positions obtained by symmetrically arranging the points with respect to the x axis, the y axis or the original point may be used. Alternatively, the positions obtained by rotating the points about the original point by any angle may be used. This may vary according to implementation examples.

[99] FIG. 5 is a flowchart illustrating a method of deciding points of an optimal constellation according to an embodiment of the present invention. A necessary number of optimal constellation points are obtained from the constellation points shown in FIG. 4.

[100] First, constellation points having a smallest power are selected from the constellation points shown in FIG. 4 (S500). The number of constellation points selected is compared with the number of necessary constellation points (S510). If the number of constellation points selected is smaller than the number of necessary constellation points, the step S500 is performed again such that constellation points having a smallest power are selected from the points which are not previously selected. If the number of constellation points selected is larger than the number of necessary constellation points, the constellation points are removed in descending order of the power by the excessive number of points (S520). A desired number of constellation points can be obtained by the above-described process, and the input data can be mapped to symbol data using the obtained constellation points.

[101] FIGs. 6 to 9 are schematic views showing optimal constellations having points selected by the above-described process, according to the embodiments of the present invention. That is, FIGs. 6 to 9 are schematic views showing optimal constellations having 16 points, 64 points, 256 points and 256 points, respectively. FIG. 8 shows another embodiment having positions different from the constellation point positions shown in FIG. 4, in which the constellation points are close to the DC position.

[102] As described above, instead of the point positions of FIGs. 6 to 9, the positions obtained by symmetrically arranging points with respect to the x axis, the y axis or the original point may be used. Alternatively, the positions obtained by rotating the points about the original point by any angle may be used. This may vary according to implementation examples.

[103] FIG. 10 is a schematic block diagram showing an apparatus for receiving a signal according to an embodiment of the present invention. The embodiment of FIG. 10 may be included in a DVB system.

[104] The embodiment of FIG. 10 includes a receiver 1000, a synchronizer 1010, a demodulator 1020, a frame parser 1030, a first deinterleaver 1040, a linear pre-coding decoder 1050, a multi-demapper 1060, a second deinterleaver 1070, an inner decoder 1080 and an outer decoder 1090.

[105] The receiver 1000 down-converts the frequency band of a received RF signal, converts the signal into a digital signal, and outputs the digital signal. The synchronizer 1010 acquires synchronization of the received signal output from the receiver 1000 in a frequency domain and a time domain and outputs the synchronization. The synchronizer 1010 may use an offset result of the data output from the demodulator 1020 in the frequency domain, for acquiring the synchronization of the signal in the frequency domain.

[106] The demodulator 1020 demodulates the received data output from the synchronizer 1010 and removes the guard interval. The demodulator 1020 may convert the received data into the frequency domain and decode data values dispersed into the subcarriers to the values allocated to subcarriers. The frame parser 1030 may output symbol data of the data symbol interval excluding the pilot symbol according the frame structure of the signal demodulated by the demodulator 1020.

[107] The first deinterleaver 1040 deinterleaves the data stream output from the frame parser 1030 and restores the data into the sequence of the data before interleaving. The first deinterleaver 1040 deinterleaves the data stream according to a method corresponding to the interleaving method of the second interleaver 150 shown in FIG. 1 and restores the sequence of the data stream.

[108] The linear pre-coding decoder 1050 performs an inverse process of the linear pre- coding process of dispersing the data in the apparatus for transmitting the signal and restores original data dispersed in the data input to the linear pre-coding decoder 1050.

[109] The multi-demapper 1060 may restore the symbol data restored by the linear pre- coding decoder 1050 into a bitstream. As the demapping method of the multi- dempaper 1060, a method corresponding to the mapping method used by the symbol mapper 130 included in the apparatus for transmitting the signal shown in FIG. 1 is used. As described above, it is assumed that the multi-mapper 130 of FIG. 1 multi- maps the data to the symbol data having different bit numbers according to the optimal constellation mapping method.

[110] The second deinterleaver 1070 performs the inverse process of the interleaving process of the bit data stream demapped by the multi-demapper 1060. The second deinterleaver 1070 performs the deinterleaving process corresponding to the first interleaver 120 of FIG. 1. The inner decoder 1080 may decode the deinterleaved data and correct the error included in the data. The outer decoder 1090 performs an error correction decoding process with respect to the bit data decoded by the inner decoder 1080 and outputs the decoded bit data. The inner decoder 1080 and the outer decoder 1090 decode the data according to the decoding methods corresponding to the inner encoder 110 and the outer encoder 100 of FIG. 1.

[I l l] FIG. 11 is a schematic block diagram showing the multi-demapper according to the embodiment of the present invention. The multi-demapper 1060 includes a symbol deinterleaver 1061, a first demapper 1062, a second demapper 1063, ..., an N demapper 1064, and a bitstream merger 1065.

[112] The symbol deinterleaver 1061 deinterleaves the input symbol data and restores an original symbol data sequence. The deinterleaving method of the deinterleaver 1061 corresponds to the interleaving method of the symbol interleaver 135 in the multi- mapper 130 of FIG. 2. The symbol deinterleaver 1061 transmits the deinterleaved symbol data to the demappers corresponding to the mapping methods.

[113] The demappers (the first demapper 1062 to the N demapper 1064) convert the received symbol data into bit data according to the respective demapping methods. The first demapper 1062 to the N demapper 1064 configure the demapper for demapping the input symbol data to the bit data. The demapping methods of the first demapper 1062 to the N demapper 1064 correspond to the mapping methods of the first mapper 132 to the N mapper 134 of FIG. 2, respectively. [114] The bitstream merger 1065 receives the bit data output from the demappers and outputs one bitstream. The bitstream merger 1065 merges the bit data to the bitstream using the method corresponding to the method distributed by the bit stream distributor

131 of FIG. 2.

[115] FIG. 12 is a schematic block diagram showing decision boundaries of the optimal constellation having 64 points. In the case where one of the mappers (the first mapper

132 to the N mapper 134) of FIG. 2 maps the data to the symbols according to the 64-point optimal constellation method, the demapper of the receiving apparatus corresponding to the mapper demaps the received symbol data using the decision boundaries shown in FIG. 12. In the optimal constellation mapping method, the constellation has a honeycomb shape in order to efficiently use the transmission power, and, in the demapper, each symbol has a hexagonal decision boundary as shown in FIG. 12. Each of symbols corresponding to points positioned at outermost sides has a decision boundary of which one side is opened, instead of the hexagonal decision boundary.

[116] If it is decided that the input symbol data is positioned in a specific hexagonal boundary among the decision boundaries shown in FIG. 12, the demapper demaps the input symbol data to a symbol of the point corresponding to the specific hexagonal boundary.

[117] FIG. 13 is a schematic block diagram showing the symbol demapper for demapping a received optimal constellation symbol according to an embodiment of the present invention.

[118] The demapper may demap the symbol using all the decision boundaries of the optimal constellation shown in FIG. 12 at a time or may demap the symbol using a rectangular decision boundary like the symbol demapper of FIG. 13A or 13B.

[119] The symbol demapper of FIG. 13 includes a first decision unit 1300, a second decision unit 1302, a first rotation unit 1304, a third decision unit 1306, a fourth decision unit 1308, a second rotation unit 1310, a fifth decision unit 1312, a sixth decision unit 1314, and a bit converter 1316.

[120] When the symbol data is input to the demapper, the first decision unit 1300 decides whether the input symbol data is positioned in a rectangular decision boundary region using the rectangular decision boundary region formed by two opposite sides of each of hexagonal decision boundary regions. The second decision unit 1302 decides whether the symbol is positioned in a decision boundary region denoted by a solid line among edge regions of the constellation, which will be described in detail with reference to FIG. 15. The second decision unit 1302 decides whether the symbol is positioned in the decision boundary region denoted by the solid line among the edge regions of the constellation. The first decision unit 1300 and the second decision unit 1302 decide the position of the input symbol data using the decision boundaries which are not rotated.

[121] The first rotation unit 1304 rotates all the decision boundaries used in the first decision unit 1300 and the second decision unit 1302 by 60 degrees. The data output from the first rotation unit 1304 is input to the third decision unit 1306. The third decision unit 1306 decides whether the input symbol data is positioned in the rectangular decision boundary region using the rectangular decision boundary region formed by two opposite sides of each of the hexagonal decision boundary regions among all the decision boundary regions rotated by 60 degrees. The fourth decision unit 1308 decides whether the input symbol data is positioned in the constellation edge region. The fourth decision unit 1308 decides whether the symbol is positioned in a decision boundary region denoted by a dashed dotted line, among the constellation edge regions, which will be described in detail with reference to FIG. 15. The third decision unit 1306 and the fourth decision unit 1308 decide the position of the input symbol data using the decision boundaries rotated one time (decision boundaries rotated by 60 degrees).

[122] The second rotation unit 1310 rotates all the decision boundaries used by the third decision unit 1006 and the fourth decision unit 1308 by 60 degrees. The data output from the second rotation unit 1310 is input to the fifth decision unit 1312. The fifth decision unit 1312 decides whether the input symbol data is positioned in the rectangular decision boundary using the rectangular decision boundary formed by two opposite sides in each of the hexagonal decision boundary regions among all the decision boundary regions rotated by 60 degrees again. The sixth decision unit 1314 decides whether the input symbol data is positioned in the constellation edge region. The sixth decision unit 1314 decides whether the symbol is positioned in a decision boundary region denoted by a dotted line, among the constellation edge regions. The example of the decision region decided by the sixth decision unit 1314 will be described in detail with reference to FIG. 15. The fifth decision unit 1312 and the sixth decision unit 1314 may decide the position of the input symbol data using the decision boundaries rotated two times, that is, using the decision boundaries rotated from the original decision boundaries by 120 degrees.

[123] If the constellation edge regions are decided by the second decision unit 1302, the fourth decision unit 1308 and the sixth decision unit 1314, the decision of the position parallel to the x axis and the y axis is performed using a saturation method and the decision of the position of an oblique line is performed using a linear equation corresponding to the oblique line.

[124] The bit converter 1316 converts the information decided by the decision units, that is, the value decided to the symbol of the point corresponding to the input symbol data, into bit data corresponding to the decided symbol value.

[125] All the two times of rotation processes and the six times of decision processes may be performed. Alternatively, if the symbol of the point corresponding to the received symbol data is decided by a specific decision of six times of decision processes, the decision information may be output to the bit converter 1316 and may be converted into the bit data without further performing the rotation or decision process. This may vary according to implementation examples.

[126] FIG. 14 is a schematic block diagram showing another symbol demapper for demapping a received optimal constellation symbol according to an embodiment of the present invention. The symbol demapper of FIG. 14 uses a recursive decoding method using a feedback.

[127] The symbol demapper of FIG. 14 includes a buffer 1320, a selector 1322, a first decision unit 1324, a second decision unit 1326, a rotation unit 1328, and a bit converter 1330.

[128] The buffer 1320 temporarily stores and outputs the input symbol data. The selector 1322 receives the symbol data output from the buffer 1320 and the symbol data output from the rotation unit 1328 and outputs one piece of symbol data. The selector 1322 outputs the symbol data fed back from the rotation unit 1328 when the recursive decoding method is performed and outputs the symbol data received from the buffer 1320 when a decision process is performed with respect to new symbol data.

[129] The first decision unit 1324 decides whether the input symbol data is positioned in the rectangular decision boundary region using the rectangular decision boundary region formed by two opposite sides in each of the hexagonal decision boundary regions. The second decision unit 1326 decides whether the input symbol data is positioned in a constellation edge region, that is, an edge region, of which one side is opened, in the decision boundaries shown in FIG. 12. The second decision unit 1326 decides whether the input symbol data is positioned in a decision boundary region denoted by a solid line (non-rotation), a dashed dotted line (one time of rotation), or a dotted line (two times of rotation) according to the number of times of rotation. The rotation unit 1328 may rotate the decision boundaries used by the first decision unit 1324 and the second decision 1326 by 60 degrees.

[130] The bit converter 1330 converts the information decided by the decision units, that is, the value decided to the symbol of the point corresponding to the input symbol data, into bit data corresponding to the decided symbol value.

[131] The symbol demapper of FIG. 14 may perform all the two times of rotation processes and the six times of decision processes. Alternatively, if the symbol of the point corresponding to the received symbol data is decided by the first decision unit 1324 and the second decision unit 1326 during the recursive decoding process, the decision in- formation may be output to the bit converter 1330 and may be converted into the bit data. This may vary according to implementation examples.

[132] FIG. 15 is a schematic view showing a process of demapping a received optimal constellation symbol according to an embodiment of the present invention.

[133] FIG. 15 shows four hexagonal decision boundary regions in all the decision boundaries. FIG. 15 shows a deciding process of a decision unit which decides whether the symbol data is positioned in the rectangular decision boundary region using the rectangular decision boundary region formed by two opposite sides in the hexagonal boundary region, among the decision units of FIG. 13 or 14.

[134] First, in a first decision boundary form which is not rotated, it is decided whether the input symbol data is positioned in the rectangular decision boundary region, using the rectangular decision boundary region formed by two opposite sides of each of the hexagonal decision boundary regions. If the decision is completed, all the decision boundaries are rotated by 60 degrees and it is decided whether the input symbol data is included in the rectangular decision boundary region, using the rectangular decision boundary region formed by two opposite right and left sides of each of the hexagonal decision boundary regions. Then, all the decision boundaries are rotated by 60 degrees again and it is decided whether the input symbol data is included in the rectangular decision boundary region, using the rectangular decision boundary region formed by two opposite right and left sides of each of the hexagonal decision boundary regions. In a second decision boundary form and a third decision boundary form of FIG. 15, regions which are subjected to the decision process while performing the rotation process overlap with each other.

[135] By two times of rotation processes, the rectangular decision boundary regions cover the whole hexagonal region. Accordingly, each of the hexagonal decision boundary regions can be demapped to the symbols corresponding to the points having the hexagonal decision boundary region.

[136] According to the implementation example, if it is determined that the input symbol data is positioned in the rectangular decision boundary region, the decision process may be completed without further performing the rotation and the decision. Although the rectangular decision boundary region formed by two opposite right and left sides of the hexagon is used in the above description, a region using two opposite sides other than the right and left sides, for example, a parallelogram decision boundary region may be first used or a rectangular decision boundary region formed by two upper and lower sides may be first used.

[137] FIG. 16 is a schematic view showing a process of demapping a received optimal constellation symbol in an edge region of the decision boundaries according to an embodiment of the present invention. [138] FIG. 16 is a view showing all the decision boundaries of a 64-point optimal constellation mapping method. FIG. 16 shows a deciding process of the decision unit which decides whether input symbol data is positioned in the constellation edge region, that is, the edge region of which one side is opened, among the decision units of FIGs. 13 and 14.

[139] First, in a first decision boundary form which is not rotated, it is decided whether the input symbol data is positioned in a region denoted by a solid line among the constellation boundary regions. If the decision is completed, all the decision boundaries are rotated by 60 degrees and it is decided whether the input symbol data is included in a region denoted by a dashed dotted line among the constellation boundary regions. Then, all the decision boundaries are rotated by 60 degrees again and it is decided whether the input symbol data is included in a region denoted by a dotted line among the constellation boundary regions.

[140] According to the implementation example, the sequence of the region denoted by the solid line, the region denoted by the dashed dotted line and the region denoted by the dotted line may be changed. For example, after the region denoted by the dotted line is decided in the first decision boundary form of FIG. 15, the region denoted by the solid line (one time of rotation) and the region denoted by the dashed dotted line (two times of rotation) may be decided.

[141] FIG. 17 is a schematic block diagram showing an apparatus for transmitting a signal using multi-encoding according to an embodiment of the present invention. The embodiment of FIG. 17 includes an outer encoder 1600, a multi-encoder 1610, a first interleaver 1620, a trellis coded modulator 1630, a linear pre-coder 1640, a second in- terleaver 1650, a frame builder 1660, a modulator 1670 and a transmitter 1680.

[142] The outer coder 1600 and the inner coder 1610 code respective input signals and output the encoded signals such that an error generated in transmitted data is detected and corrected by the receiver. That is, the outer coder 1600 and the inner coder 1610 perform FEC encoding.

[143] The outer coder 1600 codes the input data in order to improve transmission performance of the input signal. The types of the encoder vary according to the coding methods used in the signal transmission system.

[144] The multi-encoder 1610 codes the data encoded by the outer encoder 1600 again in order to prevent an error from being generated in the transmitting process. The multi- encoder 1610 codes the input data by using a mixture of a plurality of encoding methods. For example, as the encoding method, at least two of channel coding methods such as a convolution coding method, a Reed- Solomon coding method, a low density parity check (LDPC) coding method, and a turbo coding method.

[145] Using the multi-encoding method, a SNR gain can be obtained by an encoding method having a lower code rate and a capacity gain can be obtained by an encoding method having a high code rate. Accordingly, it is possible to adjust the SNR gain and the capacity gain and increase transmission efficiency by adjusting the mixture ratio of the encoding methods.

[146] The first interleaver 1620 shuffles the data stream to random positions so as to become robust against a burst error which occurs in the data when the signal output from the multi-encoder 1610 is transmitted. For example, the first interleaver 1620 can use a convolution interleaver or a block interleaver. The type of the first interleaver 1620 may be changed according to the method used in the signal transmitting system.

[147] The trellis coded modulator 1630 maps the bit data received from the first interleaver 1620 to the trellis coded symbol data. In the case where the symbol mapper for arranging the symbols is used instead of the trellis coded modulator 1630, the bit data may be mapped to the symbol using the mapping method such as a QAM, a QPSK, an APSK, or a PAM.

[148] The linear pre-coder 1640 disperses input symbol data into several pieces of output symbol data so as to decrease a probability that all information is lost due to fading when experiencing frequency- selective fading of a channel.

[149] The second interleaver 1650 interleaves the symbol data output from the linear pre- coder 1640 again such that the symbol data does not experience the same frequency- selective fading. The second interleaver 1650 may use a convolution interleaver or a block interleaver.

[150] The frame builder 1660 inserts a pilot signal into a data interval to build a frame such that the interleaved signal is modulated by an orthogonal frequency division multiplex (OFDM) method.

[151] The modulator 1670 inserts a guard interval into the data output from the frame builder 1660 and modulates the inserted data such that the data is transmitted in a state of being carried in OFDM subcarriers. The transmitter 1680 converts the digital signal having the guard interval and the data interval, which is output from the modulator 1670, into an analog signal and transmits the converted analog signal.

[152] FIG. 18 is a schematic block diagram showing the multi-encoder according to the embodiment of the present invention. The multi-encoder 1610 includes a bitstream distributor 1611, a first encoder 1612, a second encoder 1613, ..., an N encoder 1614 and a bitstream merger 1615.

[153] The bitstream distributor 1611 distributes the input bit data into several encoders.

The bitstream distributor 1611 distributes a necessary number of bit data according to the encoding methods of the encoders. The bitstream distributor 1611 may distribute the input bit data to the encoders according to the bitstream distributing method of FIG. 3 or in the input order of the input bit data. The distributing method may vary according to the implementation examples.

[154] The bit data distributed by the bitsream distributor 1611 is output to the encoders (the first encoder 1612 to the N encoder 1614). The first encoder 1612 to the N encoder 1614 configure an encoding unit for encoding the input bit data and outputting the encoded data. The encoders encode the input bit data according to the respective encoding methods. As the encoding methods, the channel coding methods such as the convolution coding method, the RS coding method, the LDPC coding method and the turbo coding method may be used.

[155] The encoders (the first encoder 1612 to the N encoder 1614) may be equal to one another in the encoding method and different from one another in the code rate or may be different from one another in the encoding method. For example, while all the first encoder 1612 to the N mapper 1614 use the LDPC method, the code rates of the encoders may be different from one another. Alternatively, the first encoder 1612 may encode the data using the LDPC and the N encoder 1614 may encode the data using the turbo coding method. This example may vary according to the implementation examples.

[156] The bitstream merger 1615 receives the bit data output from the encoders and merges the bit data to one bit data stream. The bitstream merger 1615 may merge the bit data to one bit data stream in the manner inverse to the distributing method of the bitstream distributor 1615 or another predetermined rule. This may vary according to the implementation examples, and the virtual interleaving effect can be obtained according to the merging method.

[157] FIG. 19 is a schematic block diagram showing an apparatus for receiving a multi- encoded signal according to an embodiment of the present invention. The embodiment of FIG. 19 may be included in a DVB system.

[158] The embodiment of FIG. 19 includes a receiver 1800, a synchronizer 1810, a demodulator 1820, a frame parser 1830, a first deinterleaver 1840, a linear pre-coding decoder 1850, a trellis coded decoder 1860, a second deinterleaver 1870, a multi- decoder 1880 and an outer decoder 1890.

[159] The components of the receiving apparatus of FIG. 19 are substantially similar to those of the receiving apparatus shown in FIG. 10. Hereinafter, the portions different from those of FIG. 10 will be described.

[160] The trellis coded decoder 1860 may restore the symbol data restored by the linear pre-coding decoder 1850 to a bitstream. The trellis coded decoder 1860 demaps the symbol data using the method corresponding to the mapping method of the trellis coded modulator 1630 of FIG. 17.

[161] The multi-decoder 1880 receives the bit data deinterleved by the second deinterleaver 1870 and decodes the bit data according to the methods corresponding to the encoding methods of the transmitting apparatus.

[162] The outer decoder 1890 performs an error correction decoding process with respect to the bit data decoded by the multi-decoder 1880 and outputs the decoded data. That is, the multi-decoder 1880 and the outer decoder 1890 decode the data by the decoding methods corresponding to the multi-encoder 1610 and the outer encoder 1600 of FIG. 17.

[163] FIG. 20 is a schematic block diagram showing the multi-decoder according to the embodiment of the present invention. The multi-decoder 1880 includes a bitstream distributor 1881, a first decoder 1882, a second decoder 1883, ..., an N decoder 1884, and a bitstream merger 1885.

[164] The bitstream distributor 1881 distributes the input bit data into several decoders. The bitstream distributor 1881 distributes the bit data according to the method corresponding to the method of merging the bit data to one bit data stream by the bitstream merger 1615 of the multi-encoder of FIG. 18. That is, the bitstream distributor 1881 distributes the bit data in the manner inverse to the method of receiving and merging the bit data to the bit data stream by the bitstream merger 1615 of the multi-encoder.

[165] The bit data distributed by the bitstream distributor 1881 is output to the decoders (the first decoder 1882 to the N* decoder 1884). The first decoder 1882 to the N* decoder 1884 configure a decoder for decoding the input bit data and outputting the decoded data. The decoders decode the input bit data according to the respective decoding methods. The decoding methods correspond to the encoding methods of the multi-encoder of FIG. 18.

[166] The bitstream merger 1885 receives the bit data output from the decoders and merges the bit data to one bit data stream. The bitstream merger 1885 merges the bit data in the manner inverse to the method of distributing the bit data by the bitstream distributor 1611.

[167] FIG. 21 is a schematic block diagram showing an apparatus for transmitting a signal using a multi-encoding method and a multi-mapping method according to an embodiment of the present invention. As shown in FIG. 21, the signal transmitting apparatus can be implemented using both the multi-encoding method and the multi- mapping method described in FIGs. 17 and 19.

[168] The signal transmitting apparatus shown in FIG. 21 includes an outer encoder 2000, a multi-encoder 2010, a first interleaver 2020, a multi-mapper 2030, a linear pre-coder 2040, a second interleaver 2050, a frame builder 2060, a modulator 2070, and a transmitter 2080. The blocks are equal to those of FIGs. 1 and 18 and thus the description thereof will be omitted.

[169] FIG. 22 is a schematic block diagram showing an apparatus for receiving a multi- encoded and multi-mapped signal according to an embodiment of the present invention. The signal receiving apparatus of FIG. 22 corresponds to the signal transmitting apparatus of FIG. 21 and includes a receiver 2100, a synchronizer 2110, a demodulator 2120, a frame parser 2130, a first deinterleaver 2140, a linear pre-coding decoder 2150, a multi-demapper 2160, a second deinterleaver 2170, a multi-decoder 2180 and an outer decoder 2190. Similarly, the blocks of the signal receiving apparatus are equal to those of FIGs. 10 and 18 and thus the description thereof will be omitted.

[170] FIG. 23 is a schematic block diagram showing another example of an apparatus for receiving a multi-encoded and multi-mapped signal according to an embodiment of the present invention. The signal receiving apparatus includes a receiver 2200, a synchronizer 2210, a demodulator 2220, a frame parser 2230, a first deinterleaver 2240, an equalizer 2250, a linear pre-coding decoder 2260, a multi-demapper 2270, a channel estimator 2280, a second deinterleaver 2290, a multi-decoder 2292 and an outer decoder 2294.

[171] In a system using a multi-mapping method, a symbol having a small constellation size has a minimum required SNR which is relatively lower than that of a symbol having a large constellation size at the time of mapping the symbols. Accordingly in order to further increase the capacity, the symbol having the small constellation size can be utilized as a pilot symbol. That is, if separate pilot signals are not used or the function of some of the pilot symbols is performed using the symbol having the small constellation size, the capacity is increased by the number of pilot signals removed. In the case where the symbol having the small constellation size is used, the channel is estimated on the basis of a value decided by receiving the symbol.

[172] The minimum required SNR of the symbol having the large constellation size is relatively higher than that of the symbol having the small constellation size. Accordingly, since the reliability of the symbol having the small constellation size is relatively high in the SNR period in which the symbol having the large constellation size is decoded, the symbol having the small constellation size may be used as the pilot symbol.

[173] The distinguishment between the symbol having the small constellation size and the symbol having the large constellation size may vary according to the implementation examples. For example, in the case where the symbol having at least a predetermined number of constellation points is recognized as the symbol having the large constellation size, the number of points which is a criterion for distinguishing between the symbols may vary according to the implementation examples.

[174] In the case where the symbol data having the small constellation size and the symbol data having the large constellation size are multi-mapped, the signal transmitting apparatus can insert the pilot into the multi-mapped symbol data and transmit the inserted symbol data. As described above, in the case where the symbol data having the small constellation size is used as the pilot symbol, the signal transmitting apparatus may insert the symbol data having the small constellation size into the pilot insertion position instead of the pilot and may transmit the inserted data.

[175] In the case where the symbol data having the small constellation size is inserted into the pilot insertion position, the symbol data having the small constellation size may be inserted into the overall pilot insertion position or the symbol data having the small constellation size may be inserted into a portion of the pilot insertion position and the pilot may be inserted into the remaining portion of the pilot insertion position.

[176] For example, in the signal transmitting apparatus of FIG. 21, the frame builder 2060 may insert the symbol data having the small constellation size into the overall the pilot insertion position of the frame so as to build the frame. Alternatively, the frame builder 2060 may insert the symbol data having the small constellation size into a portion of the pilot insertion position of the frame and insert the pilot into the remaining portion of the frame, thereby building the frame. In consideration of a channel state and the transmitting/receiving system, any one of the above-described methods may be selected and implemented.

[177] Although the multi-encoding method is used in FIG. 21, the inner encoding method using only one encoding method may be used instead of the multi-encoding method using the plurality of encoding methods.

[178] FIG. 23 is a view showing the apparatus for receiving and processing the signal in the case where the signal transmitting apparatus of FIG. 21 transmits the signal using the symbol data having the small constellation size as the pilot symbol.

[179] Hereinafter, for convenience of description, the blocks of FIG. 23 which do not overlap with the blocks of FIG. 22 will be described.

[180] The frame parser 2230 parses the frame data demodulated by the demodulator 2220. In the case where the symbol data having the small constellation size is inserted into the overall pilot insertion position so as to build the frame in the signal transmitting apparatus, the frame parser 2230 extracts the symbol data inserted into the pilot position ad restores the symbol data together with the remaining symbol data. If the symbol data having the small constellation size is inserted into a portion of the pilot insertion position and the pilot is inserted into the remaining portion so as to build the frame in the signal transmitting apparatus, the frame parser 2230 extracts the pilot and the symbol data having the small constellation size and restores the symbol data.

[181] Hereinafter, for convenience of description, the case where the symbol data having the small constellation size is inserted into a portion of the pilot insertion position and the pilot is inserted into the remaining portion so as to build the frame will be described. [182] The channel estimator 2280 estimates a transmission channel using the input/output information of the multi-demapper 2270 and the pilot output from the frame parser 2230. In the case where the channel is estimated using the pilot output from the frame parser 2230, if the pilot carried in a k carrier is P (k) and the promised pilot known by r the receiver is P (k), a channel transfer function (CTF) is expressed by Math Figure 1. [183] MathFigure 1 [Math.l]

[184] H (k) denotes a CTF estimated using the pilot.

P

[185] In the case where the channel is estimated using the symbol data having the small constellation size, which is inserted into the pilot insertion position, if the received symbol data, that is, the symbol data input to the multi-demapper 2270, is Y r (k) and the decided symbol data, that is, the symbol data output from the multi-demapper 2270, is Y (k), the CTF is expressed by Math Figure 2. [186] MathFigure 2 [Math.2]

YIk)

[187] In Math Figure 2, H d (k) denotes a CTF estimated using the symbol data having the small constellation size. The division may be performed by designing a divider, by computing the reciprocal of a denominator or multiplying a numerator by the reciprocal of the denominator. Alternatively, the division may be performed by referring to a ROM table for storing the reciprocal of the denominator and multiplying the numerator by the reciprocal of the denominator. The division may be performed by multiplying the denominator and the numerator by a conjugate complex number of the denominator, obtaining the reciprocal of the denominator multiplied by the conjugate complex number using the ROM table and multiplying the numerator multiplied by the conjugate complex number of the denominator by the reciprocal. This may vary according to the implementation examples.

[188] In the case where the pilot symbol is not used in the signal transmitting apparatus, only the CTF using the symbol data having the small constellation size expressed by Math Figure 2 can be obtained.

[189] The CTF estimated by Math Figures 1 and 2 may be used for channel equalization. In the receiver, the channel may be equalized by selecting one of the estimated values or by interpolating the two estimated values. For example, the selecting method may vary according to the implementation examples, that is, one estimated value may be selected in consideration of the channel state. The other estimated value may be selected and used if a specific estimated value is rapidly changed. Alternatively, the channel may be equalized by a value obtained by interpolating the two estimated values by linear interpolation.

[190] The first deinterleaver 2240 deinterleaves the symbol data output from the frame parser 2230 and restores the sequence of the symbol data. The deinterleaved data is output to the equalizer 2250. The equalizer 2250 compensates for transmission channel distortion of the symbol data, of which the sequence is restored, using the CTF of the channel estimated by the channel estimator 2280.

[191] For example, the equalizer 2250 may use a zero forcing equalizing method for compensating for the channel distortion. Since the symbol received by the receiver can be expressed by a product of the transmitted symbol and the CTF, the transmitted symbol data value can be restored by dividing the received symbol by the estimated CTF. That is, if the received symbol data value is Y (k) and the estimated CTF is H(k), the restored symbol data value Y (k) is expressed by Math Figure 3.

[192] MathFigure 3 [Math.3]

[193] The detailed embodiment of the equalizer 2250 will be described with reference to FIG. 25.

[194] The symbol data equalized by the equalizer 2250 is output to the linear pre-coding decoder 2260. The linear pre-coding decoder 2260 restores the dispersed symbol data and outputs the restored symbol data. The restored symbol data is input to the mult i- demapper 2270 and the channel estimator 2280.

[195] The multi-demapper 2270 demaps the received symbol data using the demappers and outputs the bit data corresponding thereto. The multi-demapper 2270 transmits the symbol data value which is decided with respect to the symbol data having the small constellation size to the channel estimator 2280. Alternatively, the bit data demapped with respect to the symbol data having the small constellation size may be output to the channel estimator 2280. Since the estimation of the channel is performed in units of symbol data, in the case where the bit data demapped with respect to the symbol data having the small constellation size is output to the channel estimator 2280, the decision unit 2300 of FIG. 24 decides the symbol data corresponding to the received bit data again.

[196] The second deinterleaver 2290 deinterleaves the bit data received from the multi- demapper 2270 and restores the sequence of the bit data. The multi-decoder 2292 multi-decodes the bit data, of which the sequence is restored, according to the multi- encoding method and outputs the multi-encoded data. If one encoding method is used in the signal transmitting apparatus instead of the multi-encoding method, the multi- decoder is not used and one decoding method corresponding to the encoding method is used.

[197] FIG. 24 is a schematic block diagram showing a channel estimator according to an embodiment of the present invention. The channel estimator includes a decision unit 2300, a first operation unit 2310, a first multiplier 2320, a second multiplier 2330, a second operation unit 2340, a pilot generator 2350, a third operation unit 2360, a third multiplier 2370, a fourth multiplier 2380, and a fourth operation unit 2390. If the method which does not insert the pilot symbol is used, the pilot generator 2350, the third operation unit 2360, the third multiplier 2370, the fourth multiplier 2380 and the fourth operation unit 2390 are not used.

[198] The channel estimator of FIG. 24 multiplies the denominator and the numerator by the conjugate complex number of the denominator so as to obtain the reciprocal of the denominator multiplied by the conjugate complex number and multiplies the numerator multiplied by the conjugate complex number of the denominator by the reciprocal so as to obtain the CTF.

[199] First, the pilot symbol data (the symbol data having the small constellation size in the above example) input to the symbol demapper 2270 and the pilot symbol data output from the symbol demapper 2270 are input to the decision unit 2300. The decision unit 2300 outputs the symbol data output from the symbol demapper 2270 to the first operation unit 2310 and the first multiplier 2320.

[200] The first operation unit 2310 obtains the conjugate complex number of the received input data and outputs the conjugate complex number to the first multiplier 2320 and the second multiplier 2330. The first multiplier 2320 multiplies the symbol data output from the decision unit 2300 by the conjugate complex number output from the first operation unit 2310 and outputs the multiplied value to the second operation unit 2340. The second multiplier 2330 multiplies the symbol data input to the symbol demapper 2270 in the symbol data input to the decision unit 2300 by the conjugate complex number output from the first operation unit 2310 and outputs the multiplied value to the second operation unit 2340.

[201] The second operation unit 2340 obtains the reciprocal of the value output from the first multiplier 2320, multiplies the value output from the second multiplier 2330 by the reciprocal, and outputs the multiplied value. [202] In the case where the CTF is estimated using the pilot symbol, the pilot symbol extracted by the frame parser 2230 is used. The pilot generator 2350 generates the pilot symbol which is previously promised with the transmitter. The generated pilot symbol is output to the third operation unit 2360 and the third multiplier 2370.

[203] The third operation unit 2360 obtains the conjugate complex number of the received pilot symbol and outputs the conjugate complex number to the third multiplier 2370 and the fourth multiplier 2380. The third multiplier 2370 multiplies the pilot symbol output from the pilot generator 2350 by the conjugate complex number output from the third operation unit 2360 and outputs the multiplied value to the fourth operation unit 2390. The fourth multiplier 2380 multiplies the pilot symbol extracted from the frame parser 2230 by the conjugate complex number output from the third operation unit 2360 and outputs the multiplied value to the fourth operation unit 2390.

[204] The fourth operation unit 2390 obtains the reciprocal of the value output from the third multiplier 2370, multiplies the value output from the fourth multiplier 2380 by the reciprocal, and outputs the multiplied value.

[205] FIG. 25 is a schematic block diagram showing an equalizer according to an embodiment of the present invention. The equalizer 2250 includes an interpolator 2400, a fifth operation unit 2410, a fifth multiplier 2420, a sixth multiplier 2430, and a sixth operation unit 2440. The equalizer of FIG. 25 is an example of implementing the zero forcing equalization method described in Math Figure 3.

[206] The division may be performed by various methods as described above and the equalizer of FIG. 25 uses the same process as the division of FIG. 24.

[207] The interpolator 2400 interpolates the received CTF value with the value of the whole bandwidth. The CTF value interpolated by the interpolator 2400 is output to the fifth operation unit 2410 and the fifth multiplier 2420. The fifth operation unit 2410 computes the conjugate complex number of the CTF output from the interpolator 2400 and outputs the conjugate complex number.

[208] The fifth multiplier 2420 multiplies the CTF value output from the interpolator 2440 by the conjugate complex number of the CTF output from the fifth operation unit 2410 and outputs the multiplied value to the sixth operation unit 2440. The sixth multiplier 2430 multiplies the conjugate complex number output from the fifth operation unit 2410 by the received symbol data and outputs the multiplied value to the sixth operation unit 2440.

[209] The sixth operation unit 2440 obtains the reciprocal of the value output from the fifth multiplier 2420, multiplies the value output from the sixth multiplier 2430 by the reciprocal, and outputs the multiplied value.

[210] Since the estimation of the channel is performed in the units of symbol data, in the case where the bit data demapped with respect to the symbol data having the small constellation size is output to the channel estimator 2280, the decision unit 2300 of FIG. 24 decides the symbol data corresponding to the received bit data again.

[211] FIG. 26 is a schematic block diagram showing an apparatus for transmitting a signal by a data symbol channel estimation method according to an embodiment of the present invention. The signal transmitting apparatus includes an outer encoder 2500, an inner encoder 2510, a first interleaver 2520, a trellis coded modulator 2530, a linear pre-coder 2540, a second interleaver 2550, a frame builder 2560, a modulator 2570 and a transmitter 2580.

[212] In the case where the symbol data having the small constellation size is inserted into the overall pilot insertion position or the symbol data having the small constellation size is inserted into a portion of the pilot insertion position and the pilot is inserted into the remaining portion of the pilot insertion position as described above, the channel may be estimated on the basis of the decided symbol data. By the above-described method, if the pilot symbols are not used or some of the pilot symbols are used, it is possible to improve the channel estimation performance and increase the capacity of the system.

[213] However, if a decision error occurs in a low SNR environment, an error may occur in the channel estimation. The error of the data compensated for by the channel estimation value having an error is further increased and thus an error propagation phenomenon occurs.

[214] In order to prevent the error propagation phenomenon, the channel can be estimated using only a decision value having high reliability among the decision values of the received symbol data.

[215] For example, it is assumed that the symbol data having the small constellation size is inserted into the overall pilot insertion position in the signal transmitting apparatus of FIG. 26. The blocks of the signal transmitting apparatus of FIG. 26 are equal to those of the signal transmitting apparatus of FIG. 21, except that the trellis coded modulator 2530 for mapping the symbol by a trellis coded modulation method is used instead of the multi-mapper for multi-mapping the symbol. The trellis coded modulation method is only exemplary and other symbol mapping method such as a QAM method, a QPSK or an optimal constellation may be used. The signal transmitting apparatus of FIG. 26 is similar to the signal transmitting apparatus of FIG. 21 and thus the description thereof will be omitted.

[216] Since the frame builder 2560 of FIG. 26 does not insert the pilot and inserts the symbol data having the small constellation size to the pilot insertion position, the symbol data inserted into the pilot insertion position is extracted and is restored together with the remaining symbol data.

[217] FIG. 27 is a schematic block diagram showing an apparatus for receiving a signal by a data symbol channel estimation method according to an embodiment of the present invention. The signal receiving apparatus includes a receiver 2600, a synchronizer 2602, a demodulator 2604, a frame parser 2608, a first deinterleaver 2610, an equalizer 2612, a linear pre-coding decoder 2614, a trellis coded decoder 2616, a channel state estimator 2618, a channel estimator 2620, a second deinterleaver 2622, an inner decoder 2624, and an outer decoder 2627. The signal receiving apparatus of FIG. 27 receives and processes the signal transmitted by the signal transmitting apparatus of FIG. 26.

[218] The signal receiving apparatus of FIG. 27 corresponds to the signal receiving apparatus of FIG. 23 and, for convenience of description, the difference between FIG. 27 and FIG. 23 will be described.

[219] Since the pilot is not inserted and the symbol data having the small constellation size is inserted into the pilot insertion position in the received frame data, the frame parser 2608 of FIG. 27 extracts the symbol data inserted into the pilot insertion position and restores the symbol data together with the remaining symbol data.

[220] The channel state estimator 2618 estimates the symbol data position, that is, the state of the transmission channel of the subcarriers. In order to estimate the channel state, a log-likelihood ratio (LLR) value used for the decision of the symbol data or the SNR of the channel may be used. The subcarriers for estimating the channel state may be subcarriers for transmitting the symbol data inserted into the pilot insertion position or subcarriers for transmitting the other symbol data included in the frame.

[221] The channel estimator 2620 determines a channel having a good state using the states of the channels estimated by the channel state estimator 2618 and estimates the channel using the symbol data received via the channel having the good state. For example, in the channel having the good state, the SNR of the channel is high and the LLR value is large. If high reliability is applied to the channel via which the symbol data having the small constellation size or the symbol data coded at a low code rate is received in addition to the above information, a channel estimation error can be reduced.

[222] The channel estimator 2620 can obtain the channel estimation function using the symbol data decided by the trellis coded decoder 2616 and the symbol data received via the channel having the good state. The equalizer 2612 compensates for the channel distortion of the received symbol data using the channel estimation function output from the channel estimator 2620.

[223] The multi-encoding method or the multi-mapping method may be used together with the method of estimating the channel using the decided symbol data. That is, any one or both of the multi-encoding method and the multi-mapping method may be used together with the method of estimating the channel using the decided symbol data. [224] FIG. 28 is a schematic block diagram showing another example of an apparatus for transmitting a signal by a data symbol channel estimation method according to an embodiment of the present invention. FIG. 29 is a schematic block diagram showing another example of an apparatus for receiving a signal by a data symbol channel estimation method according to an embodiment of the present invention.

[225] The signal transmitting apparatus of FIG. 28 includes an outer encoder 2700, a multi- encoder 2710, a first interleaver 2720, a multi-mapper 2730, a linear pre-coder 2740, a second interleaver 2750, a frame builder 2760, a modulator 2770, and a transmitter 2780, and the signal receiving apparatus of FIG. 29 includes a receiver 2800, a synchronizer 2802, a demodulator 2804, a frame parser 2806, a first deinterleaver 2808, an equalizer 2180, a linear pre-coding decoder 2812, a multi-demapper 2814, a channel state estimator 2816, a channel estimator 2818, a second deinterlever 2820, a multi- decoder 2822, and an outer decoder 2824.

[226] In the examples of FIGs. 28 and 29, both the multi-encoding method and the multi- mapping method are used together with the method of estimating the channel using the decided symbol data. The blocks are equal to those of the above-described embodiments and thus the description thereof will be omitted.

[227] In the above-described embodiments, a multi input multi output (MIMO) technology may be used. Hereinafter, for convenience of description, only an example of applying the MIMO technology to the signal transmitting apparatus of FIG. 1 will be described.

[228] FIG. 30 is a schematic block diagram showing another example of an apparatus for transmitting a signal according to an embodiment of the present invention. The transmitting apparatus of FIG. 30 corresponds to the case where the MIMO method is applied to the transmitting apparatus shown in FIG. 1. Hereinafter, the embodiment of the signal transmitting system according to the present invention will be described with reference to FIG. 29.

[229] The embodiment of FIG. 30 includes a forward error correction (FEC) encoder 2900, a first interleaver 2910, a symbol mapper 2920, a linear pre-coder 2930, a second interleaver 2940, a multi- input/output encoder 2950, a frame builder 2960, a modulator 2970, and a transmitter 2980. The embodiment of FIG. 29 will be described concentrating on the process of processing the signal in the signal transmitting system.

[230] The FEC encoder 2900 encodes the received signal and outputs the encoded signal such that an error generated in the transmitted data is detected and corrected by the receiver. The FEC encoder 2900 corresponds to the outer encoder 100 and the inner encoder 110 of FIG. 1.

[231] The first interleaver 2910 shuffles the data stream output from the FEC encoder 2900 to random positions so as to become robust against a burst error which occurs at the time of transmitting the data. For example, the first interleaver 2910 can use a convolution interleaver or a block interleaver, which may vary according to the transmitting system.

[232] The data interleaved by the first interleaver 2910 is input to the symbol mapper 2920. The symbol mapper 2920 may use the above-described optimal constellation mapping method.

[233] The linear pre-coder 2930 disperses input symbol data into several pieces of output symbol data so as to decrease a probability that all information is lost due to fading when experiencing frequency- selective fading of a channel.

[234] The second interleaver 2940 interleaves the symbol data output from the linear pre- coder 2930 again such that the symbol data output from the linear pre-coder 2930 does not experience the same frequency-selective fading. The second interleaver 2940 may use a convolution interleaver or a block interleaver.

[235] The linear pre-coder 2930 and the second interleaver 2940 process the data to be transmitted so as to become robust against the frequency- selective fading of the channel and configure the frequency-selective fading coder.

[236] The multi-input/output encoder 2950 encodes the data interleaved by the second interleaver 2940 so as to be transmitted via a plurality of transmission antennas. The multi-input/output encoding method is largely classified into a spatial multiplexing method and a spatial diversity method. In the spatial multiplexing method, since a transmitter and a receiver may simultaneously transmit/receive different data using a plurality of antennas, the data can be transmitted at a high speed without further increasing the bandwidth of the system. In the spatial diversity method, data having the same information is transmitted by a plurality of transmission antennas so as to obtain transmission diversity.

[237] At this time, as the multi-input/output encoder 2950 of the spatial diversity method, a space-time block code (STBC), a space-frequency block code (SFBC), or a space-time trellis code (STTC) may be used. As the multi-input/output encoder 2950 of the spatial multiplexing method, a method of dividing a data stream by the number of transmission antennas and transmitting the divided data, a full-diversity full-rate (FDFR) code, a linear dispersion code (LDC), a Vertical-Bell Lab layered space-time (V-BLAST), or a diagonal-BLAST (D-BLAST) may be used.

[238] The frame builder 2960 inserts a pilot signal into the data so as to build a frame such that the pre-coded signal is modulated by the OFDM method.

[239] The modulator 2970 inserts the guard interval into the data output from the frame builder 2960 and modulates the inserted data such that the data is transmitted in a state of being carried in the OFDM subcarriers. The transmitter 2980 converts the digital signal having the guard interval and the data interval, which is output from the modulator 2970, into an analog signal and transmits the converted analog signal. [240] FIG. 31 is a schematic block showing a FEC encoder according to an embodiment of the present invention. The FEC encoder of FIG. 31 may be used in the transmitting system of FIG. 29. The FEC encoder includes a Bose-Chaudhuri-Hocquenghem (BCH) encoder 2902 and a low density parity check (LDPC) encoder 2904 as an outer encoder and an inner encoder, respectively.

[241] A LDPC code is an error correction code which can reduce a probability that data information is lost. The LDPC encoder 2904 encodes the signal in a state in which the length of an encoding block is large such that the transmitted data is robust against a transmission error. In order to prevent hardware complexity from being increased due to the increase of the block size, the density of the parity bit is decreased so as to decrease the complexity of the encoder.

[242] In order to prevent an error floor from occurring in the output data of the receiver, the BCH encoder 2902 is concatenated in front of the LDPC encoder 2904 as the additional outer encoder. If an ignorable error floor occurs even when only the LDPC encoder 2904 is used, the BCH encoder 2902 may not be used. Alternatively, other encoders may be used as the outer encoder, instead of the BCH encoder.

[243] The data which is FEC-encoded by the BCH encoder 2902 and the LDPC encoder 2904 is output to the first interleaver 2910.

[244] FIG. 32 is a view showing an interleaver for interleaving input data according to an embodiment of the present invention. The interleaver of FIG. 32 is a block interleaver, which is an example of the interleaver which can be used in the first interleaver 2910.

[245] The interleaver of FIG. 32 stores input data in a matrix-shaped memory space in a predetermined pattern and reads and outputs the data in a pattern different from the pattern used for storing the data. For example, the interleaver of FIG. 32 has an NrxNc memory space composed of Nr rows and Nc columns and the data input to the interleaver is filled from a position corresponding to a first row and a first column of the memory space. The data is stored from the first row and the first column to an Nr row and the first column and, if the first column is filled up, is then stored from the first th row to the Nr row of a next column (second column). In this sequence, the data may be stored up to the Nr row of an Nc column (i.e. the data are stored column- wise). [246] In the case that the stored data is read, the data is read and output from the first row and the first column to the first row and the Nc column. If all the data of the first row is read, the data is read and output from the first column of a next row (second row) in th the column direction. In this sequence, the data may be read and output up to the Nc th column of the Nr row (i.e. the data are read out row- wise). At this time, the position of a most significant bit (MSB) of the data block is a left uppermost side and the position of a least significant bit (LSB) thereof is a right lowermost side. [247] The size of the memory block, the storage pattern and the read pattern of the in- terleaver are only exemplary and may be changed according to implementation embodiments.

[248] FIG. 33 is a schematic block diagram showing the linear pre-coder. The linear pre- coder 130 may include a serial/parallel converter 2932, an encoder 2934 and a parallel/ serial converter 2936.

[249] The serial/parallel converter 2932 converts the input data into parallel data. The encoder 2934 disperses the values of the converted parallel data into several pieces of data via the operation of an encoding matrix.

[250] An encoding matrix is designed by comparing a transmission symbol with a reception symbol such that a pairwise error probability (PEP) that the two symbols are different from each other is minimized. If the encoding matrix is designed such that the PEP is minimized, a diversity gain and a coding gain obtained via the linear pre-coding are maximized.

[251] If a minimum Euclidean distance of the linearly pre-coded symbol is maximized via the encoding matrix, an error probability can be minimized when the receiver uses a maximum likelihood (ML) decoder.

[252] The parallel/serial converter 2936 converts the data received by the encoder 2934 into serial data and outputs the serial data.

[253] FIG. 34 is a view showing an embodiment of the encoding matrix , that is, a code matrix for dispersing input data. FIG. 34 shows an example of the encoding matrix for dispersing the input data into several pieces of output data, which is also called a vanderMonde matrix.

[254] The input data may be arranged in parallel by the length of the number (L) of output data.

[255] Θof the matrix may be expressed by the following equation and may be defined by other methods. If the vanderMonde matrix is used as the encoding matrix, a matrix element may be determined according to Math Figure 4.

[256] The encoding matrix 4 rotates the input data by the phase of Math Figure 4 corresponding to input data and generates the output data. Accordingly, the values input according to the characteristics of the matrix may be dispersed in at least two output values.

[257] MathFigure 4 [Math.4]

, π(4k-3) θ.= exp(/ \ _r ⁷ X k = 1,2,3. 2L

[258] In Math Figure 4 , L denotes the number of the output data. If an input data group input to the encoder of FIG. 33 is x and a data group which is encoded and output by the encoder 2934 using the matrix of Math Figure 4 is y, y is expressed by Math Figure 5.

[259] MathFigure 5 [Math.5] y = ® x

[260] FIG. 35 shows another example of the encoding matrix. FIG. 35 shows another example of the encoding matrix for dispersing the input data into several pieces of output data, which is also called a Hadamard matrix. The matrix of FIG. 35 is a matrix having a general form, in which L is expanded by 2 . Here, L denotes the number of output symbols into which the input symbols will be dispersed.

[261] The output symbols of the matrix can be obtained by a sum and a difference among L input symbols. In other words, the input symbols may be dispersed into the L output symbols, respectively.

[262] Even in the matrix of FIG. 35, if an input data group input to the encoder 2934 of FIG. 33 is x and a data group which is encoded and output by the encoder 2934 using the above-described matrix is y, y is a product of the above-described matrix and x.

[263] FIG. 36 shows another example of the encoding matrix for dispersing the input data. FIG. 36 shows another example of the encoding matrix for dispersing the input data into several pieces of output data, which is also called a Golden code. The Golden code is a 4x4 matrix having a special form. Alternatively, two different 2x2 matrixes may be alternately used.

[264] C of FIG. 36 denotes a code matrix of the Golden code and xl, x2, x3 and x4 in the code matrix denote symbol data which can be input to the encoder 2934 5 in parallel. Constants in the code matrix may decide the characteristics of the code matrix, and the values of the rows and the columns computed by the constants of the code matrix and the input symbol data may be expressed by the output symbol data. The output sequence of the symbol data may vary according to the implementation embodiments.

[265] FIG. 37 is a view showing a structure of a transfer frame. The transfer frame formed according to the present embodiment may include a pilot symbol including pilot carrier information and a data symbol including data information.

[266] In the example of FIG. 37, a frame includes M (M is a natural number) intervals and is divided into M- 1 data symbol intervals and a pilot symbol interval which is used as a preamble. The frame having the above-described structure is repeated.

[267] Each symbol interval includes carrier information by the number of OFDM subcarriers. The pilot carrier information of the pilot symbol interval is composed of random data in order to decrease a peak- to- average power ratio (PAPR). An autocorrelation value of the pilot carrier information has an impulse shape in a frequency domain.

[268] The pilot carrier information may not be included in the data symbol intervals, accordingly, it is possible to increase a data capacity. In the DVB, for example, since a percentage of pilot carriers in all the valid carriers is about 10%, the increasing rate of the data capacity is expressed by Math Figure 6.

[269] MathFigure 6 [Math.6]

[270] In Math Figure 6, Δ denotes the increasing rate and M denotes the number of intervals included in a frame.

[271] FIG. 38 is a block diagram showing a signal transmitting apparatus, which processes signals using a plurality of transmission paths, according to another embodiment of the present invention. Hereinafter, convenience of description, it is assumed that the number of transmission paths is two.

[272] The embodiment of FIG. 38 includes a forward error correction (FEC) encoder 3500, a first interleaver 3510, a symbol mapper 350, a linear pre-coder 3530, a second in- terleaver 3540, a multi-input/output encoder 3550, a first frame builder 3560, a second frame builder 3565, a first modulator 3570, a second modulator 3575, a first transmitter 3580, and a second transmitter 3585.

[273] The FEC encoder 3500, the first interleaver 3510, the symbol mapper 3520, the linear pre-coder 3530, the second interleaver 3540, and the multi-input/output encoder 3550 perform the same functions as those of FIG. 30.

[274] The FEC encoder 3500 includes a BCH encoder and a LDPC encoder. The FEC encoder 3500 FEC-encodes input data and outputs the encoded data. The output data is interleaved by the first interleaver 3510 such that the sequence of the data stream is changed. As the first interleaver 3510, a convolution interleaver or a block interleaver may be used.

[275] The symbol mapper 3520 maps the received data to the symbol data according to the optimal constellation mapping method.

[276] The linear pre-coder 3530 includes a serial/parallel converter, an encoder and a parallel/serial converter.

[277] The second interleaver 3540 interleaves the symbol data output from the linear pre- coder 3530. As the second interlever 3540, a convolution interleaver or a block in- terleaver may be used. The second interleaver 3540 interleaves the symbol data such that the symbol data which is dispersed into the data output from the linear pre-coder 3530 is not subjected to the same frequency selective fading. The interleaving method may vary according to the implementation embodiments.

[278] If the block interleaver is used, the length of the interleaver may vary according to the implementation embodiments. If the length of the interleaver is smaller than or equal to that of the OFDM symbol, the interleaving is performed only in one OFDM symbol and, if the length of the interleaver is larger than that of the OFDM symbol, the interleaving may be performed over several symbols.

[279] The interleaved data is output to the multi-input/output encoder 3550 and the multi- input/output encoder 3550 encodes the input symbol data and outputs the encoded data such that the data is transmitted via a plurality of transmission antennas. For example, if two transmission paths exist, the multi-input/output encoder 3550 outputs the pre- coded data to the first frame builder 3560 or the second frame builder 3565.

[280] In a spatial diversity method, the data having the same information is output to the first frame builder 3560 and the second frame builder 3565, If the encoding is performed by the spatial multiplexing method, different data is output to the first frame builder 3560 and the second frame builder 3565.

[281] The first frame builder 3560 and the second frame builder 3565 build frames, into which the pilot signals are inserted, such that the received signals are modulated by the OFDM method.

[282] The first modulator 3570 and the second modulator 3575 modulate the data output from the first frame builder 3560 and the second frame builder 3565 such that the modulated data is transmitted in the OFDM subcarriers, respectively.

[283] The first transmitter 3580 and the second transmitter 3585 convert the digital signals having the guard interval and the data interval, which are output from the first modulator 3570 and the second modulator 3575, into analog signals and transmit the converted analog signals.

[284] FIGs. 39 to 43 are views showing an example of a 2x2 code matrix for dispersing input symbols as an example of the encoding matrix of the linear pre-coder. The code matrixes of FIGs. 39 to 43 disperse two pieces of data input to the encoding unit of the linear pre-decoder 3530 to two pieces of output data.

[285] The matrix of FIG. 39 is an example of the vanderMonde matrix described with reference to FIG. 34

[286] In the matrix of FIG. 39, first input data and second input data, of which phase is rotated by 45 degrees ( JZ^~

-4

), of the two pieces of input data are added and first output data is output. Then, first input data and second input data, of which phase is rotated by 225 degrees (

5π

4

), are added and second output data is output. The output data is divided by

so as to be scaled. [287]

[288] The code matrix of FIG. 40 is an example of the Hadamard matrix. [289] In the matrix of FIG. 40, first input data and second input data of the two pieces of input data are added and first output data is output. Then, second input data are subtracted from first input data and second output data is output. The output data is divided by

so as to be scaled. [290] [291] FIG. 41 shows another example of the code matrix for dispersing the input symbols.

The matrix of FIG. 41 is an example of a code matrix different from the matrix described with reference to FIGs. 34 to 36. [292] In the matrix of FIG. 41, first input data, of which phase is rotated by 45 degrees (

4

), and second input data, of which phase is rotated by -45 degrees (-

), of the two pieces of input data are added and first output data is output. Then, second input data, of which phase is rotated by -45 degrees, is subtracted from first input data, of which phase is rotated by 45 degrees, and second output data is output. The output data is divided by so as to be scaled. [293] [294] FIG. 42 is a view showing another example of the code matrix for dispersing the input symbols. The matrix of FIG. 42 is different from the matrixes shown in FIGs. 34 to 36. [295] In the matrix of FIG. 42, first input data which is multiplied by 0.5 and second input data are added and first output data is output. Then, second input data which is multiplied by 0.5 is subtracted from first input data and second output data is output.

The output data is divided by

^/1 .25

[296] FIG. 43 shows another example of the code matrix for dispersing the input symbols. The matrix of FIG. 43 is an example of a code matrix different from the matrix described with reference to FIGs. 34 to 36. "*" of FIG. 14 denotes a complex conjugate of the input data.

[297] In the matrix of FIG. 43, first input data, of which phase is rotated by 90 degrees ( π T

), and second input data of the two pieces of input data are added and first output data is output. Then, the complex conjugate of first input data and the complex conjugate of second input data, of which phase is rotated by -90 degrees ( π 2

), are added, and second output data is output. The output data is divided by

so as to be scaled. [298] FIG. 44 is a view showing an example of an interleaving method of the interleaver.

The interleaving method of FIG. 44 is an example of the interleaver of the OFDM system having a symbol length N, which can be used in the second interleaver 3540 of the transmitting apparatus shown in FIG. 38. [299] N denotes the length of the interleaver and i has a value corresponding to the length of the interleaver, that is, an integer from 0 to N-I. n denotes the number of valid transmission carriers in a transmitting system. π(i) denotes a permutation obtained by a modulo-N operation, and dn has a π(i) value which is located in a valid transmission carrier area excluding a value N/2 in sequence, k denotes an index value of an actual transmission carrier. N/2 is subtracted from dn such that the center of the transmission bandwidth becomes DC. P denotes a permutation constant which may vary according to implementation embodiments.

[300] FIG. 45 is a view showing a variable which varies according to the interleaving method of FIG. 44. In the example of FIG. 45, the length of the OFDM symbol and the length N of the interleaver are set to 2048 and the number of valid transmission carriers are set to 1536 (1792-256).

[301] Accordingly, i is an integer from 0 to 2047 and n is an integer from 0 to 1535. Il(i) denotes a permutation obtained by a modulo-2048 operation, dn has a FI(i) value with respect to a value 256<FI(i)<1792 excluding a value 1024(N/2) in sequence, k denotes a value obtained by subtracting 1024 from dn. P has a value of 13.

[302] Using the interleaver according to the above-described method, data corresponding to the sequence i of the input data may be changed to the sequence k of the interleaved data with respect to the length N of the interleaver.

[303] FIG. 46 is a view showing an example of the encoding method of the multi- input/output encoder. The embodiment of FIG. 46 is the STBC which is one of the multi-input/output encoding methods and may be used in the transmitting apparatus shown in FIG. 38.

[304] In the example of the STBC encoder, T denotes a symbol transmission period, s denotes an input symbol to be transmitted, and y denotes an output symbol. "*" denotes a complex conjugate, and a first antenna (Tx #1) and a second antenna (Tx #2) denote a first transmission antenna and a second transmission antenna 2, respectively.

[305] In the example of FIG. 46, at a time t, the first antenna Tx #1 transmits s0 and the second antenna Tx #2 transmits si. At a time t+T, the first antenna Tx #1 transmits - si* and the second antenna Tx #2 transmits sθ*. The transmission antennas transmit data having the same information of s0 and si in the transmission period. Accordingly, the receiver can obtain spatial diversity effect using the signals output from the multi- input/output encoder according to the method shown in FIG. 46.

[306] The signals transmitted by the first antenna and the second antenna shown in FIG. 46 are examples of the multi-input/output encoded signals. When FIG. 46 is described from a different viewpoint, the signals transmitted by the first antenna and the second antenna may be transmitted by a multi-input single-output method.

[307] In the example of FIG. 46, it may be considered that two temporally consecutive signals s0 and -si* are input to a path of the first antenna and signals si and sθ* are input to a path of the second antenna. Accordingly, since the signals s0 and -si* are consecutively output to the first antenna and the signals s 1 and sθ* are output to the second antenna, it may be considered that the output symbols are transmitted by the multi-input single-output method. FIG. 46 shows a simplest example using two antennas. The signals may be transmitted according to the method shown in FIG. 46 using more antennas.

[308] That is, when the example of FIG. 46 is described by the multi-input single-output method, the consecutive first and second symbols are multi- input and a minus of a complex conjugate of the second symbol(sO, -si*) and a complex conjugate^ 1, sθ*) of the first symbol are simultaneously output. The multi-input symbols may be encoded according to an Alamouti algorithm and the encoded symbols may be output.

[309] The multi-input/output encoder may transmit the signals which are interleaved by the second interleaver in the frequency domain, by the multi-input single-output method. The multi-input/output (including the multi-input single-output) shown in FIG. 46 may be not applied to the pilot symbol interval shown in FIGs. 47 and 48 and may be applied to only the data symbol interval.

[310] FIG. 47 is a view showing a structure of the pilot carriers in the pilot symbol intervals built by the first and second frame builders of FIG. 38. The pilot symbol intervals built by the frame builders of FIG. 38 may be output as shown in FIG. 47.

[311] The pilot carriers included in the frames output from the first and second frame builders are output to the first and second antennas, respectively. Accordingly, FIG. 31 shows the respective pilot symbols built by the first and second frame builders as the signals output from the first and second antennas.

[312] The pilot carriers included in the frames output from the first and second frame builders are output to the first and second antennas, respectively. Accordingly, FIG. 38 shows the respective pilot symbols built by the first and second frame builders as the signals output from the first and second antennas.

[313] For example, only the even-numbered pilot carrier information of the generated pilot carriers is included in the pilot symbol interval built by the first frame builder and is transmitted via the first antenna #1. Only the odd- numbered pilot carrier information of the generated pilot carriers is included in the pilot symbol interval built by the second frame builder and is transmitted via the second antenna. Accordingly, the receiver can distinguish between the transmission paths using the carrier indexes of the pilot symbol intervals received via the two signal paths. The structure of the pilot symbol interval of FIG. 31 may be used when the multi-input/output encoding is performed so as to have the two transmission paths as shown in FIG. 38.

[314] In the embodiment of FIG. 47, a channel corresponding to a subcarrier of a half of a frame may be estimated from a symbol. Accordingly, high channel estimation performance can be obtained with respect to a transmission channel having a short coherence time.

[315] FIG. 48 is a view showing another structure of the pilot carriers in the pilot symbol intervals built by the first and second frame builders of FIG. 9. Even in the example of FIG. 48, different pilot carriers are transmitted to the pilot symbol intervals with respect to the paths according to the multi-input/output encoding method.

[316] The pilot carrier transmission structure of the pilot symbol intervals shown in FIG.

48 is called a Hadamard type pilot carrier transmission structure. In the embodiment of FIG. 48, Hadamard conversion is performed in the unit of a symbol interval in order to distinguish between the two transmission paths. For example, pilot carriers obtained by adding the two pieces of pilot carrier information for the transmission paths are transmitted to the even-numbered symbol interval and a difference between the two pieces of pilot carrier information is transmitted to the odd-numbered symbol interval.

[317] It can be explained along with the pilot symbol intervals including even-numbered intervals and odd-numbered intervals. In even-numbered intervals, antenna #0 and #1 transmit the same pilot carriers, respectively and in odd- numbered intervals, antenna #0 and #1 transmit the pilot carriers of which phases are opposite each other. The receiver can use sum and difference of the pilot carriers respectively transmitted through two paths.

[318] The odd- numbered symbol of the pilot carrier is transmitted via a first path (first antenna (denoted by antenna #0)) and the pilot carrier having a phase difference of 180 degrees with respect to the odd-numbered symbol is transmitted via a second path (second antenna (denoted by antenna #1)). Accordingly, the receiver can recognize the sum of or the difference between the two pieces of pilot carrier information via the received pilot index so as to distinguish between the transmission paths.

[319] In this embodiment, a channel corresponding to all subcarriers can be estimated and the estimation length of delay spread of the channel which can be processed by each transmission path can be extended by a symbol length.

[320] The example of FIG. 48 is shown for facilitating the distinguishment between the two pieces of pilot carrier information and shows both the two pieces of pilot carrier information in the frequency domain. In the even-numbered symbol interval and the odd-numbered symbol interval, impulses of the two pieces of pilot carrier information are located at the same frequency point.

[321] The embodiments of FIGs. 47 and 48 are examples of having two transmission paths. If the number of transmission paths is larger than 2, the pilot carrier information may be divided so as to be distinguished by the number of transmission paths similar to FIG. 47 or may be subjected to Hadamard conversion in the unit of a symbol interval and the converted information may be transmitted similar to FIG. 48.

[322] FIG. 49 is a schematic block diagram showing another example of an apparatus for receiving a signal according to an embodiment of the present invention. The embodiment of FIG. 49 is the receiving apparatus for receiving the signal transmitted according to the multi-input/output method. The receiving apparatus of FIG. 49 corresponds to the case where the multi-input/output method is applied to the receiving apparatus of FIG. 10.

[323] The embodiment of FIG. 49 includes a receiver 4100, a synchronizer 4110, a demodulator 4120, a frame parser 4130, a multi-input/output decoder 4140, a first dein- terleaver 4150, a linear pre-coding decoder 4160, a symbol demapper 4170, a second deinterleaver 4180, and a forward error correction (FEC) decoder 4190. The embodiment of FIG. 49 will be described concentrating on a process of processing the signal by the signal receiving system.

[324] The receiver 4100 down-converts the frequency band of a received RF signal, converts the signal into a digital signal, and outputs the digital signal. The synchronizer 4110 acquires synchronization of the received signal output from the receiver 4100 in a frequency domain and a time domain and outputs the synchronization. The synchronizer 4110 may use an offset result of the data output from the demodulator 4120 in the frequency domain, for acquiring the synchronization of the signal in the frequency domain.

[325] The demodulator 4120 demodulates the received data output from the synchronizer 4110 and removes the guard interval. The demodulator 4120 may convert the reception data into the frequency domain and obtain data values dispersed into the subcarriers.

[326] The frame parser 4130 may output symbol data of the data symbol interval excluding the pilot symbol according the frame structure of the signal demodulated by the demodulator 4120.

[327] The multi-input/output decoder 4140 receives the data output from the frame parser 1330, decodes the data, and outputs a data stream. The multi- input/output decoder 4140 decodes the data stream received via the plurality of transmission antennas according to a method corresponding to the transmitting method of the multi- input/output encoder shown in FIG. 30 and outputs a data stream.

[328] The first deinterleaver 4150 deinterleaves the data stream output from the multi- input/output decoder 4140 and decodes the data into the sequence of the data before interleaving. The first deinterleaver 4150 deinterleaves the data stream according to a method corresponding to the interleaving method of the second interleaver shown in FIG. 29 and restores the sequence of the data stream.

[329] The linear pre-coding decoder 4160 performs an inverse process of the process of dispersing the data in the apparatus for transmitting the signal.

[330] The symbol demapper 4170 may restore the coded symbol data output from the linear pre-coding decoder 4160 into a bit stream. The symbol demapper 4170 performs the inverse process of the symbol mapping process using the symbol mapper.

[331] The second deinterleaver 4180 deinterleaves the data stream output from the symbol mapper 4170 and restores the data into the sequence of the data before interleaving. The second deinterleaver 4180 deinterleaves the data according to a method corresponding to the interleaving method of the first interleaver 2910 shown in FIG. 29 and restores the sequence of the data stream.

[332] The FEC decoder 4190 FEC-decodes the data, in which the sequence of the data stream is restored, detects an error which occurs in the received data, and corrects the error.

[333] FIG. 50 is a schematic block diagram showing an example of the linear pre-coding decoder. The linear pre-coding decoder 4160 includes a serial/parallel converter 4162, a first decoder 4164 and a parallel/serial converter 4166.

[334] The serial/parallel converter 4162 converts the input data into parallel data. The first decoder 4164 may restore the data, which is linearly pre-coded and is dispersed into the parallel data, as the original data via a decoding matrix. The decoding matrix for performing decoding becomes an inverse matrix of the encoding matrix of the apparatus for transmitting the signal. For example, when the apparatus for transmitting the signal performs the encoding operation using the vanderMonde matrix, the Hadamard matrix and the Golden code shown in FIGs. 5 to 7, the first decoder 4164 restores the dispersed data as the original data using the inverse matrixes of the matrixes.

[335] The parallel/serial converter 4166 converts the parallel data received by the first decoder 4164 into the serial data and outputs the serial data.

[336] FIG. 51 is a schematic block diagram showing another example of the linear pre- coding decoder. The linear pre-coding decoder 4160 includes a serial/parallel converter 4161, a second decoder 4163 and a parallel/serial converter 4165.

[337] The serial/parallel converter 4161 converts the input data into parallel data, the parallel/serial converter 4165 converts the parallel data received from the second decoder 1363 into serial data and outputs the serial data. The second decoder 4163 may restore the original data, which is linearly pre-coded and is dispersed into the parallel data output from the serial/parallel converter 4161, using maximum likelihood (ML) decoding.

[338] The second decoder 4163 is the ML decoder for decoding the data according to the transmitting method of the transmitter. The second decoder 1363 ML-decodes the received symbol data according to the transmitting method and restores the data dispersed in the parallel data to the original data. That is, the ML decoder ML-decodes the received symbol data according to the encoding method of the transmitter.

[339] FIGs. 52 to 54 are views showing examples of a 2x2 code matrix for restoring the dispersed symbols. The code matrixes of FIGs. 52 to 54 show inverse matrixes corresponding to the 22 encoding matrixes of FIGs. 41 to 43. According to FIGs. 252 to 54, the code matrixes restore data which is dispersed into two pieces of data input to the decoding unit of the linear pre-coding decoder 4160 and output the restored data.

[340] FIG. 52 is a view showing an example of a 2x2 code matrix according to an embodiment of the present invention. In more detail, the 2x2 code matrix of FIG. 52 is a decoding matrix corresponding to the encoding matrix of FIG. 41.

[341] In the matrix of FIG. 52, first input data, of which phase is rotated by -45 degrees (-

4

), and second input data, of which phase is rotated by -45 degrees (-

), of the two pieces of input data are added and first output data is output. Then, second input data, of which phase is rotated by -45 degrees, is subtracted from first input data, of which phase is rotated by 45 degrees, and second output data is output. The output data is divided by

so as to be scaled.

[342] FIG. 53 shows another example of the 2x2 code matrix. The matrix of FIG. 53 is a decoding matrix corresponding to the encoding matrix of FIG. 42. In the matrix of FIG. 53, first input data which is multiplied by 0.5 and second input data are added and first output data is output. Then, second input data which is multiplied by 0.5 is subtracted from first input data and second output data is output. The output data is divided by

so as to be scaled. [343] FIG. 54 shows another example of the 22 code matrix. The matrix of FIG. 54 is a decoding matrix corresponding to the encoding matrix of FIG. 43. "*"of FIG. 54 denotes a complex conjugate of the input data. [344] In the matrix of FIG. 54, first input data, of which phase is rotated by -90 degrees ( π ~2 ), and the complex conjugate of second input data are added and first output data is output. Then, the first input data and the complex conjugate of second input data, of which phase is rotated by -90 degrees (

2

), are added, and second output data is output. The output data is divided by

so as to be scaled.

[345] FIG. 55 is a schematic block diagram showing the FEC decoder. The FEC decoder 4190 corresponds to the FEC encoder 2900 of FIG. 30. As an inner decoder and an outer decoder, a LDPC decoder 4192 and a BCH decoder 4194 are included, respectively.

[346] The LDPC decoder 4192 detects a transmission error which occurs in a channel and corrects the error, and the BCH decoder 4194 corrects the remaining error of the data decoded by the LDPC decoder 1392 and removes an error floor.

[347] FIG. 56 is a block diagram showing a signal receiving apparatus according to another embodiment of the signal receiving apparatus. Hereinafter, for convenience of description, a case that the number of reception paths is two will be described.

[348] The embodiment of FIG. 56 includes a first receiver 4500, a second receiver 4505, a first synchronizer 4510, a second synchronizer 4515, a first demodulator 4520, a second demodulator 4525, a first frame parser 4530, a second frame parser 4535, a multi-input/output decoder 4540, a third deinterleaver 4550, a linear pre-coding decoder 4560, a symbol demapper 4570, a fourth deinterleaver 4580 and a FEC decoder 4590.

[349] The first receiver 4500 and the second receiver 4505 receive RF signals, down- convert frequency bands, convert the signals into digital signals, and output the digital signals, respectively. The first synchronizer 4510 and the second synchronizer 4515 acquire synchronizations of the received signals output from the first receiver 4500 and the second receiver 4505 in the frequency domain and the time domain and output the synchronizations, respectively. The first synchronizer 4510 and the second synchronizer 4515 may use offset results of the data output from the first demodulator 4520 and the second demodulator 4525 in the frequency domain, for acquiring the synchronizations of the signal in the frequency domain, respectively.

[350] The first demodulator 4520 demodulates the received data output from the first synchronizer 4510. The first demodulator 4520 converts the received data into the frequency domain and decodes the data dispersed in the subcarriers to the data allocated to the subcarriers. The second demodulator 4525 demodulates the received data output from the second synchronizer 4515.

[351] The first frame parser 4530 and the second frame parser 4535 distinguish between the reception paths according to the frame structures of the signals demodulated by the first demodulator 4520 and the second demodulator 4525 and output symbol data of the data symbol interval excluding the pilot symbol, respectively.

[352] The multi-input/output decoder 4540 receives the data output from the first frame parser 4530 and the second frame parser 4535, decodes the data, and outputs a data stream.

[353] FIG. 57 is a view showing an example of a decoding method of the multi- input/output decoder. That is, FIG. 57 shows a decoding example of the receiver when the transmitter multi-input/output encodes data by the STBC method and transmits the encoded data. The transmitter may use two transmission antennas. This is only exemplary and another multi-input/output method may be applied.

[354] In the equation, r(k), h(k), s(k) and n(k) represent a symbol received by the receiver, a channel response, a symbol value transmitted by the transmitter, and channel noise, respectively. Subscripts s, i, 0 and 1 represent a s' transmission symbol, an i reception antenna, 0 transmission antenna and 1^st transmission antenna, respectively. "*" represents a complex conjugate. For example, h (k) represents a response of a channel experienced by the transmitted symbol when a s symbol transmitted via the first transmission antenna is received by the i reception antenna. R (k) represents a s+l,i s+1 reception symbol received by the i reception antenna. [355] According to the equation of FIG. 57, r (k) which is a s reception symbol received by the ith reception antenna becomes a value obtained by adding the sth symbol value transmitted from the 0 transmission antenna to the i reception antenna via the channel, the s symbol value transmitted from the 1^st transmission antenna to the i reception antenna via the channel and a sum n (k) of the channel noises of the channels. [356]

[357] FIG. 58 is a view showing a detailed example of the reception symbol FIG. 57. FIG. 58 shows a decoding example when the transmitter multi- input/output encodes data by the STBC method and transmits the encoded data, that is, shows an equation which can obtain the received symbol when the data is transmitted using two transmission antennas and the data transmitted via the two transmission data is received using one antenna.

[358] The transmitter transmits a signal using two transmission antennas and the receiver receives the signal using one transmission antenna, the number of transmission channels may be two. In the equation, hO and sO respectively represent a transmission channel response from the θ' transmission antenna to the reception antenna and a symbol transmitted from the Oth transmission antenna, and hi and si respectively represent a transmission channel response from the 1st transmission antenna to the reception antenna and a symbol transmitted from the 1^st transmission antenna. "*" represents a complex conjugate and sO' and si' of the following equation represent restored symbols.

[359] In addition, r and r respectively represent a symbol by the reception antenna at a time t and a symbol received by the reception antenna at a time t+T after a transmission period T is elapsed, and n and n represent values of sums of channel noises of the transmission paths at reception times.

[360] The signal (r , r ) received via the reception antenna may be expressed by a value obtained by adding a value in which the signals transmitted via the transmission antennas are distorted by the respective transmission channels. The restored symbol (s ' may be calculated using the received signal (r , r ) and the channel response value (h

! h ).

[361] The signals r and r received by the reception antenna may be represented by values obtained by adding the signals transmitted by the transmission antennas and values distorted by the transmission channels. The restored symbols sO' and si' are calculated using the received signals r and r and the channel response values h and h .

[362] FIG. 59 is a flowchart illustrating a method of transmitting a signal according to an embodiment of the present invention. This flowchart corresponds to the case where the multi-input mapping method is applied to one of the above-described embodiments. For convenience of description, the description of the remaining embodiments will be omitted.

[363] Input data is FEC-encoded such that a transmission error of transmitted data is found and corrected (S4800). For FEC-encoding, an LDPC encoding method may be used as an inner encoder. A BCH encoding method may be used as an outer encoder for preventing error floor.

[364] The encoded data is interleaved so as to be robust against a burst error of a transmission channel, and the interleaved data is mapped to symbol data according to the multi-mapping method (S4810). As the multi- mapping method, a mixture of various mapping methods may be used.

[365] In order to enable the symbol data to be robust against frequency selective fading of the channel, the mapped symbol data is pre-coded so as to be dispersed into several output symbols in the frequency domain (S4820) and the pre-coded symbol data is interleaved (S4830).

[366] Accordingly, it is possible to reduce a probability that all information is lost due to fading when experiencing frequency- selective fading of a channel and disable the dispersed symbol data to experience the same frequency selective fading. In the interleaving, a convolution interleaver or a block interleaver may be used. This may vary according to the implementation examples.

[367] The interleaved data is converted into a transmission frame, the transmission frame is modulated, and the modulated frame is transmitted (S4840). For example, in the method of estimating the channel using the decided symbol data, the frame data may be built without inserting the pilot symbol or by inserting the pilot symbol into only the symbol data having the large constellation size in the frame converting step.

[368] In the case where the present embodiment is applied to a signal transmitting/ receiving system using the multi- input/output method instead of a signal transmitting/ receiving system using the single input/output method, the interleaved symbol data is multi-input/output encoded and converted into the transmission frame so as to be transmitted via a plurality of antennas. The number of antennas may be equal to the number of transmission paths. Data having the same information is transmitted via the paths in a spatial diversity method and different data is transmitted via the paths in a spatial multiplexing method.

[369] FIG. 60 is a flowchart illustrating an embodiment of a method of receiving a signal. This flowchart is an example of the receiving method corresponding to the signal transmitting method of FIG. 59.

[370] In the apparatus for receiving the signal, the signal transmitted from the signal transmitting apparatus is received and synchronized and the synchronized signal is demodulated to frame data (S4900).

[371] After the demodulated data frame is parsed, the parsed data is deinterleaved in a manner inverse to the interleaving method of the signal transmitting apparatus (S4910). In the case where the channel is estimated using the decided symbol data, the pilot symbol may not be inserted into the frame data or the pilot symbol may be inserted into only the symbol data having the large constellation size. In this case, the pilot symbol may not be extracted from the frame data or the pilot symbol may be extracted from the symbol data having the large constellation size. The channel may be estimated using the received symbol data and the decided symbol data, and an equalization process for compensating for the channel distortion may be performed.

[372] The data stream of which the sequence is restored is decoded in a manner inverse to the pre-coding method and original symbol data dispersed in several pieces of symbol data in the frequency domain is restored (S4920). [373] The restored symbol data is multi-demapped so as to be restored to bit data corresponding thereto and the bit data is deinterleaved so as to be restored to the original sequence (S4930).

[374] The data of which the sequence is restored is FEC-decoded so as to detect and correct the transmission error (S4940). For FEC-encoding, the LDPC decoding method may be used. As the outer decoder for preventing error floor, the BCH decoding method may be performed.

[375] In the case where the present embodiment is applied to a signal transmitting/ receiving system using the multi- input/output method instead of a signal transmitting/ receiving system using the single input/output method, the parsed frame data is multi- input/output decoded and the decoded data is then deinterleaved. In this case, the frame data is multi-input/output decoded in a state in which the transmission paths of the received data are distinguished.

[376] The method of transmitting/receiving the signal and the apparatus for transmitting/ receiving the signal are not limited to the above examples and are applicable to all signal transmitting/receiving systems such as broadcast or communication.

[377] It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents. Mode for the Invention

[378] The embodiments of the invention are described in the best mode of the invention. Industrial Applicability

[379] A method of transmitting/receiving a signal and an apparatus for transmitting/ receiving a signal of the present invention can be used in broadcast and communication fields.

Claims

[1] An apparatus for transmitting a signal, the apparatus comprising: a forward error correction (FEC) encoder which FEC-encodes input data; a mapper which maps the FEC-encoded data to symbols according to at least two symbol mapping methods, the data being mapped such that gaps between the symbols are identical according to a first symbol mapping method and the data being mapped such that gaps between symbols are identical according to a second symbol mapping method, among the symbol mapping methods; and a transmitter which modulates and transmits the mapped symbol data.

[2] The apparatus according to claim 1, wherein the mapper includes: a bitstream distributor which distributes the FEC-encoded data to at least two bitstreams; a first mapper which maps the symbols according to the first symbol mapping method; a second mapper which maps the symbols according to the second symbol mapping method; and a symbol merger which merges the symbol data mapped by the first mapper and the second mapper.

[3] The apparatus according to claim 2, wherein the symbol merger interleaves the symbol data by the first mapper and the second mapper and outputs one symbol data stream.

[4] A method of transmitting a signal, the method comprising: forward error correction (FEC)-encoding input data; mapping the FEC-encoded data to symbols according to at least two symbol mapping methods, the data being mapped such that gaps between the symbols are identical according to a first symbol mapping method and the data being mapped such that gaps between symbols are identical according to a second symbol mapping method, among the symbol mapping methods; and modulating and transmitting the mapped symbol data.

[5] The method according to claim 4, wherein the mapping step includes: distributing the FEC-encoded data to at least two bitstreams; mapping the symbols according to the first symbol mapping method; mapping the symbols according to the second symbol mapping method; and merging the symbol data mapped according to the first symbol mapping method and the symbol data mapped according to the second symbol mapping method.

[6] The method according to claim 5, wherein the step of merging the symbol data includes interleaving the symbol data mapped according to the first symbol mapping method and the symbol data mapped according to the second symbol mapping method and outputting one symbol data stream.

[7] An apparatus for receiving a signal, the apparatus comprising: a demodulator which demodulates the received signal; a frame parser which parses a frame of the demodulated signal and outputs the parsed data; a demapper which, if symbol data included in the data output from the frame parser includes symbols which are arranged such that gaps between the neighboring symbols are identical according to a first symbol mapping method and symbols which are arranged such that gaps between the neighboring symbols are identical according to a second symbol mapping method different from the first symbol mapping method, demaps the symbol data so as to correspond the first symbol mapping method and the second symbol mapping method and outputs the demapped symbol data; and a forward error correction (FEC) decoder which FEC-decodes the demapped symbol data.

[8] The apparatus according to claim 7, wherein the demapper includes: a symbol distributor which distributes the received symbol data to at least one demapper; a first demapper which demaps the distributed symbol data according to the first symbol mapping method; a second demapper which demaps the distributed symbol data according to the second symbol mapping method; and a bitstream merger which outputs bitstreams demapped by the first demapper and the second demapper.

[9] The apparatus according to claim 8, wherein the bitstream merger deinterleaves the bitstreams demapped by the first demapper and the second demapper and outputs the demapped bitstream.

[10] The apparatus according to claim 7, wherein the demapper decides whether the symbol data is positioned in a rectangular region formed by two sides of a hexagon included in a decision boundary region.

[11] A method of receiving a signal, the method comprising: demodulating the received signal; parsing a frame of the demodulated signal and outputting the parsed data; if symbol data included in the parsed data includes symbols which are arranged such that gaps between the neighboring symbols are identical according to a first symbol mapping method and symbols which are arranged such that gaps between the neighboring symbols are identical according to a second symbol mapping method different from the first symbol mapping method, demapping the symbol data so as to correspond the first symbol mapping method and the second symbol mapping method and outputting the demapped symbol data; and forward error correction (FEC)-decoding the demapped symbol data.

[12] The method according to claim 11, wherein the demapping step includes: distributing the received symbol data to at least two demappers; demapping the distributed symbol data according to a method corresponding to the first symbol mapping method; demapping the distributed symbol data according to a method corresponding to the second symbol mapping method; and outputting bitstreams demapped by the methods corresponding to the first symbol mapping method and the second symbol mapping method.

[13] The method according to claim 12, wherein the step of outputting the bitstreams includes deinterleaving the bitstream demapped by the methods corresponding to the first symbol mapping method and the second symbol mapping method and outputting one bitstream.

[14] The method according to claim 11, wherein the demapping method includes deciding whether the symbol data is positioned in a rectangular region formed by two sides of a hexagon included in a decision boundary region.