WO2006120203A2

WO2006120203A2 - Priority switch for solving collision problems with signalling on a bus

Info

Publication number: WO2006120203A2
Application number: PCT/EP2006/062178
Authority: WO
Inventors: Koen Dereu
Original assignee: Unitron
Priority date: 2005-05-09
Filing date: 2006-05-09
Publication date: 2006-11-16
Also published as: WO2006120203A3

Abstract

Priority switch for solving collision problems with signalling on a bus The invention relates to a priority switch for managing the control signalling on a common control signal bus between at least two control signal source devices and a control signal destination device. The priority switch comprises monitoring means for monitoring which of the source devices intends to send control signals towards the destination device; prioritising means, connected to said monitoring means, for prioritising one of the control signal sources among those which intend to send control signals, over the others, switching means, connected to said prioritising means, for connecting the prioritised source device through to the common control signal bus, and busy signal generating means, connected to said prioritising means, for informing the other source devices that the common control signal bus is occupied. The invention further relates to an RF/IF signal handling device incorporating the priority switch and a corresponding method for managing the control signalling on a common control signal bus. The control signals can be based on the DiSEqC protocol, the destination device can be a satellite channel router, source devices could be satellite receivers.

Description

Priority switch for solving collision problems with signalling on a bus

Field of the invention

The invention relates to a priority switch and a method for managing the control signalling on a common control signal bus between at least two control signal source devices and a control signal destination device. As an example, the invention can be incorporated in an RF/IF signal handling device, such as for example a splitter for connecting a plurality of RF/IF-receivers on a single coax cable towards an antenna.

Background of the invention

In the early days of satellite receivers (so called REC, STB, IRD, ...), an example of which is shown in Fig. 1 , the communication signals between the Outdoor Unit (ODU, like a Low Noise Block (LNB), switch, ...) or accessories and the receiver was based on simple signalling. The idea was to control the selection of 2 or more different satellite bands (for instance 2 frequency bands and 2 polarities), which was done by setting the voltage and tone on the coax from REC to ODU. For instance, 13V means vertical polarity, 18V means horizontal, OkHz means lowband, 22kHz means highband.

Later, multiple LNBs or accessories had to be addressed by 1 REC, as shown in Fig. 2, so extra signalling was necessary. Therefore, DiSEqC (Digital Satellite Equipment Control) was introduced, which puts digital data on top of the 22kHz. Different DiSEqC-standards were used, like Tone burst, DiSEqCLO, DiSEqd .1 , DiSEqC2.0. This last DiSEqC2.0 uses also return path information, which means for instance that the LNB has to acknowledge the signalling coming from the REC. The forward path uses, as in all DiSEqC-standards, voltage modulation, while the return path uses current modulation. For more information on DiSEqC, refer to the Eutelsat DiSEqC standard, which is incorporated herein by reference in its entirety.

Last important "revolutionary" development are the integrated circuits (for instance the SatCRI from ST Microelectronics) which make it possible to filter out only the useful bandwidth and put it on the coax. The standard satellite IF-band (in Europe 1200MHz wide) with all its transponders is replaced by only the wanted transponder, as shown in Fig. 3. This means less occupied bandwidth per REC or, in other words stated, the possibility to put more than 1 REC on the same coax. This sharing of the coax between different RECs also means the signalling has to be able to set up multipoint-to-multipoint communication, while DiSEqC has been developed for point-to-(multi)point communication. With DiSEqC, 2 masters on the same coax can result in collision problems, and the probability of collision only gets worse with more than 2 masters. This is illustrated in Fig. 4: for example in an application where 8 receivers send signalling each second, the tuning latency (delay) can take up to 1.5 seconds at the standard rate of 22 kHz. In theory, this latency could be reduced by increasing the signalling rate to 44 kHz or 66 kHz, but this is undesirable since then all the receivers and other equipment would have to be hardware adapted or replaced.

ST have designed a new signalling standard for their chipset, based on DiSEqCLx, which includes the use of multiple RECs. In a typical application, as shown in Fig. 5, where 4 RECs are connected with 1 common ODU, equipped with 4 SatCRI 's, through the same coax, all RECs put 13V on the coax. The REC with the biggest voltage (due to tolerance on the 4 powersupplies, ...) will have to power the system. Whenever a REC wants to control the ODU, this REC raises his voltage on the coax to 18V, which means he becomes master on the coax and he can start sending his DiSEqd .x-string to the ODU. At the end, he releases the coax by dropping the voltage back to 13V, making it available for other RECs. This means that a REC will occupy the coax for around 50ms to 100ms, each time it wants to signal to the ODU (or equivalent equipment like multiswitches). In the event a REC has raised his voltage and starts transmitting his command string, it is still possible that a second REC will also raise his voltage to 18V, making all communication impossible for both RECs.

With this new standard, ST has made it possible to use the chipset in multipoint-to-multipoint applications, but the collision is still not solved. It can even be stated that this problem is the biggest challenge to be solved before the "revolutionary" chipset can have a wide application in the field.

Disclosure of the invention

It is an aim of the invention to provide a priority switch with which collision of control signals on a common control signal bus can be avoided.

This aim is achieved with the priority switch comprising the technical features of claim 1.

The priority switch of the invention is intended for managing the control signalling on a common control signal bus, which extends between at least two control signal source devices and one or more control signal destination devices. The priority switch comprises the following components:

- monitoring means for monitoring which of the source devices intends to send control signals towards the destination device, - prioritising means for prioritising one of the control signal sources among those which intend to send control signals, over the others,

- switching means for connecting the prioritised source device through to the common control signal bus, and

- busy signal generating means for informing the other source devices that the common control signal bus is occupied.

With the priority switch of the invention, one of the source devices among those which intend to send control signals over the common control signal bus towards the destination device is prioritised, while the others are informed that the common control signal bus is occupied by means of a busy signal. Furthermore, only the prioritised source device is connected through to the common control bus. In this way, it can be avoided that control signals originating from two source devices appear simultaneously on the common control signal bus. By sending the busy signal to the non-prioritised source devices, these are put on hold. In this way, it can be avoided that they send control signals while the bus is occupied. Otherwise, these control signals would be lost as they would not be passed on by the priority switch and they would have to be resent.

In a preferred embodiment of the priority switch of the invention, the monitoring means comprise a polling system for consecutively polling the source devices. This means that the source devices are polled one by one to check if they intend to send control signals to the destination device. As soon as an upcoming control signal is detected, the busy signal is generated to put the other source devices on hold. In this way, it can be avoided that collision can occur if two source devices would intend to send control signals substantially simultaneously. In other words, this has the advantage that the risk of collision can be further minimised.

The prioritising means, which decide which of the source devices is connected through to the destination device based on the monitoring, is preferably a microcontroller. This has the advantage that the prioritisation can be programmed, i.e. adapted to the circumstances or updated. However, any other analog or digital components known to the person skilled in the art which can fulfil the same function may also be used.

In a preferred embodiment, the priority switch comprises at least two first ports for connecting the signal source devices and a second port for connecting the common control signal bus. In this embodiment, a control signal line extends between each first port and the second port with the switching means being part of the control signal lines. Preferably in this embodiment, the monitoring means comprise voltage detection circuitry connected to each control signal line, so that for example a change in the voltage on the control signal line, which is indicative of the intention to send control signals, can be detected. Preferably in this embodiment, the busy signal generating means comprise a tone generator and switches for applying the tone to each of the control signal lines. In this way, a separate connection towards the source devices for monitoring their intention and for informing them of the occupation of the common bus can be avoided.

The priority switch of the invention can for example be applied in any RF/IF signal handling device which is provided for passing on control signals in an upstream direction from multiple receivers to one or more outdoor units. However, since the control signals are not manipulated by the priority switch, the invention may also be applied in other fields.

The RF/IF signal handling device can for example be a device which is provided for passing on RF/IF signals in a downstream direction from the outdoor unit(s) to the receivers, such as for example a splitter.

In a preferred embodiment of such an RF/IF signal handling device, an RF/IF signal splitting section is connected between the first and second ports, parallel over the control signal lines. This means that the same cable is used for both the RF/IF signals in downstream direction and the control signals in upstream direction. However, separate cables or other connections may also be used for the control signals.

For RF/IF equipment, the busy signal generating means are preferably provided for current modulating a voltage with a tone of a given frequency, such as for example a frequency of about 22 kHz. This exploits the property that most common receivers can detect such a tone, so that the busy signal can inform most common receivers without requiring a hardware upgrade or replacement.

It is further an aim of the invention to provide a method with which collision of control signals on a common control signal bus can be avoided.

This aim is achieved with the method comprising the steps of claim 11. The explanation of the operation of the priority switch given above also applies to this method.

Brief description of the drawings

The invention will be further elucidated by means of the following description and the appended drawings.

Figure 1 shows a prior art satellite receiver system.

Figure 2 shows another prior art satellite receiver system.

Figure 3 shows the prior art principle of integrated circuits which make it possible to filter out only the useful bandwidth.

Figure 4 shows the relation between the total number of tuning requests and the tuning latency of prior art satellite receiver systems.

Figure 5 shows a prior art satellite receiver system with multiple receivers connected with a common outdoor unit.

Figure 6 shows a block diagram of a preferred embodiment of a smart splitter which incorporates a priority switch according to the invention. Figure 7 shows a satellite receiver system with a smart splitter according to the invention.

Figure 8 shows typical timing diagram for the smart splitter of figure 6.

Figure 9 shows a satellite receiver system with a cascade of smart splitters according to the invention.

Figure 10 shows a possible algorithm for the decision making process of the smart splitter of figure 6.

Figure 11 shows the underlying circuitry of the embodiment of the smart splitter of figure 6.

Modes for carrying out the invention

The present invention will be described with respect to particular embodiments and with reference to certain drawings but the invention is not limited thereto but only by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not necessarily correspond to actual reductions to practice of the invention.

Furthermore, the terms first, second, third and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a sequential or chronological order. The terms are interchangeable under appropriate circumstances and the embodiments of the invention can operate in other sequences than described or illustrated herein.

Moreover, the terms top, bottom, over, under and the like in the description and the claims are used for descriptive purposes and not necessarily for describing relative positions. The terms so used are interchangeable under appropriate circumstances and the embodiments of the invention described herein can operate in other orientations than described or illustrated herein.

The term "comprising", used in the claims, should not be interpreted as being restricted to the means listed thereafter; it does not exclude other elements or steps. It needs to be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, or groups thereof. Thus, the scope of the expression "a device comprising means A and B" should not be limited to devices consisting only of components A and B. It means that with respect to the present invention, the only relevant components of the device are A and B.

Figure 1 shows a classic satellite receiver system comprising an outdoor unit (ODU) 1 and a receiver (REC) 3, connected via a coaxial cable 2. The outdoor unit 1 puts the whole bandwidth on the coaxial cable 2. In order to control the selection of two or more different satellite bands (for instance two frequency bands and two polarities), the voltage and tone on the coax is set from REC to ODU. For instance, 13V means vertical polarity, 18V means horizontal, OkHz means lowband, 22kHz means highband.

Figure 2 shows a prior art satellite receiver system in which the ODU 1 comprises multiple blocks such as for example low noise blocks (LNBs). A switch 4 ensures that the REC 3 gets the signal from the right LNB. Extra signalling was necessary to control the switch 4, to which end DiSEqC (Digital Satellite Equipment Control) was introduced, which puts digital data on top of the 22kHz. Different DiSEqC-standards were used, like Tone burst, DiSEqCLO, DiSEqd .1 , DiSEqC2.0. This last DiSEqC2.0 uses also return path information, which means for instance that the LNB has to acknowledge the signalling coming from the REC. The forward path uses, as in all DiSEqC-standards, voltage modulation, while the return path uses current modulation. For more information on DiSEqC, refer to the Eutelsat DiSEqC standard, which is incorporated herein by reference in its entirety.

Figure 3 shows the prior art principle of integrated circuits which make it possible to filter out only the useful bandwidth. The standard satellite IF-band (in Europe 1200MHz wide) with all its transponders is replaced by only the wanted transponder. This means less occupied bandwidth per REC 3 or, in other words stated, the possibility to put more than one REC 3 on the same coax. This sharing of the coax 2 between different RECs 3 also means the signalling has to be able to set up multipoint-to-multipoint communication, while DiSEqC has been developed for point-to-(multi)point communication. With DiSEqC, 2 masters on the same coax can result in collision problems, and the probability of collision only gets worse with more than 2 masters. This is illustrated in Fig. 4, which shows the relation between the total number of tuning requests and the tuning latency. For example in an application where 8 receivers send signalling each second, the tuning latency (delay) can take up to 1.5 seconds at the standard rate of 22 kHz. In theory, this latency could be reduced by increasing the signalling rate to 44 kHz or 66 kHz, but this is undesirable since then all the receivers and other equipment would have to be hardware adapted or replaced.

Figure 5 shows a prior art satellite receiver system with multiple receivers 3A-D connected with a common outdoor unit 1 via a switch 4, a common coaxial cable 2, which also serves as common control signal bus, and a splitter 5. In the normal operating mode, all active RECs put 13V on the coax. In view of tolerance on this voltage, one of the RECs will put the highest voltage on the coax. The voltage of this REC is used to power the system. Whenever a REC wants to control the ODU, this REC raises his voltage on the coax to 18V, which means he becomes master on the coax and he can start sending his DiSEqd .x-string to the ODU. At the end, he releases the coax by dropping the voltage back to 13V, making it available for other RECs. This means that a REC will occupy the coax for around 50ms to 100ms, each time it wants to signal to the ODU (or equivalent equipment like multiswitches). In the event a REC has raised his voltage and starts transmitting his command string, it is still possible that a second REC will also raise his voltage to 18V, making all communication impossible for both RECs.

The idea of the present invention is to make a priority switch at the level of the signalling. See Fig. 6. This means that on the bus 2 there are certain points where decisions have to be made who gets priority and who gets put on hold. A busy tone is generated to indicate to the receivers 3A- D who do not have priority, or generally the control signal source devices, that they are put on hold.

For use in Europe, the priority switch is preferably DiSEqC compatible, which involves a DiSEqC compatible busy tone. This is because the European market wants to keep DiSEqC as the basis of the new standards. However, the priority switch of the invention is also applicable outside Europe, in connection with other standards and in all multipoint-to-(multi)point communication systems, where it may not be necessary to have a DiSEqC compatible busy tone. Generally, the priority switch of the invention can be applied in all systems with control signalling between multiple control signal source devices and one or more control signal destination devices, in which a part of the control signal bus is common.

With the invention, it is possible to keep the signalling level separate from the RF/IF signal level. As a result, the priority switch of the invention can be incorporated in any RF/IF signal handling device, such as for example a splitter, a tap, an amplifier, a diplexer, or any other RF/IF signal handling device known to the person skilled in the art. A possible embodiment of the invention is a device which is herein called a « smart splitter », which is a combination of satellite RF-splitter with the priority switch of the invention. In the next paragraphs, the function of a 2-way smart splitter is explained, but it is clear that the principle can be implemented in any kind of splitter, like a 4-way smart splitter or above.

Figure 6 shows a 2-way smart splitter according to the invention. The smart splitter comprises two REC ports A, B and one ODU port C for respectively connecting two RECs 3A, 3B and the ODU 1. Internally, these connectors are on the one hand connected via control signal lines 15, 16, which form part of a priority switch according to the invention, and on the other hand via an RF signal splitting section which comprises a ferrite splitter 12. The RF signal coming from the ODU is equally divided via the RF signal splitting section to the two RECs 3A, 3B, no difference with a standard splitter as shown in Fig. 5. So the difference is in the incorporated priority switch, which comprises the control signal lines 15, 16 with switches S3, S4, the voltage detection circuitry 13, 14 for monitoring the voltage on the control signal lines 15, 16, the microcontroller 11 which decides which REC is connected through to the ODU and the busy tone generators 17, 18 with current switches S1 , S2 under control of the microcontroller 11.

The operation is explained by reference to figure 8, which shows a typical timing diagram for the smart splitter of figure 6. The voltages outputted by the two receivers 3A, 3B, the busy tones generated by the smart splitter towards the two receivers, and the priority given by the smart splitter to the receivers (= DC pass) are plotted on the same time scale. If a microcontroller is provided in the priority switch, as in figure 6 or figure 11 , the priority can be programmed as desired. In the embodiment of Fig. 8, there is always one REC connected through to the coax to for instance power the ODU. This is shown by the fact that always either S3 or S4 is closed. Altemaively, if an external power source is used, S3 and S4 do not have to be operated in such a complementary way.

According to Fig. 8, the first REC to raise its voltage above the threshold of for example 16V gets the priority. Alternatively, for example REC 3A could be always prioritised, meaning the REC 3B would lose its connection when REC 3A requests the common control signal bus 2. In any case, the signal path (from now on the signal path will be called the DC-path, although signalling may also comprise an AC component) from the REC 3A, 3B to the ODU 1 is controlled by the priority switch in a way that only one REC 3A, 3B at a time is connected to the ODU 1 via the common coaxial cable 2, so that collision is effectively prevented.

As shown in figure 8, the RECs 3A, 3B can have 3 voltage levels on their LNB output (their control signal output), which may for example comprise the following values:

- OV = switched off / standby mode,

- 13V = REC is ON but the REC does not send or receive a DiSEqC command,

- 18V = REC is ON and is in a mode for transmitting or receiving a DiSEqC command.

The operation is as follows. By means of the voltage detection 13, 14, RECs 3A, 3B are monitored. The detected values are inputted into the microcontroller 11 , which controls the current switches S1-S4 on the basis thereof. As shown in figure 8, when the voltage of one REC 3A, 3B becomes 18V, the microcontroller closes the corresponding switch S3, S4 to connect the REC 3A, 3B to the ODU 1 if there was no other REC already connected. Once a REC 3A, 3B is connected to the ODU 1 , a busy tone is applied to the other REC by the closing of current switch S1 or S2.

For DiSEqC, the busy signal generators 17, 18 current modulate the voltage with a 22kHz tone. This informs the RECs 3A or 3B that the ODU 1 is already connected with the other REC 3B or 3A, so the 22kHz tone is a kind of busy signal putting the REC 3B on hold.

When a REC 3A, 3B intends to send a DiSEqC command, it brings the voltage from 13V to 18V and then monitors if there is a busy tone. This is possible since commonly used RECs can detect current modulation. If there is no tone then the REC 3A, 3B can send his DiSEqC command, if there is a busy tone then the software running on the REC can choose between different options, such as for example:

1. Keep the voltage high and monitor the busy tone, if the tone gets removed by the smart splitter 5, he can send his DiSEqC-command.

2. Drop the voltage back to 13V, then wait for a (pseudo)- random time and try it again, but this could be more time-consuming.

To reduce the reaction time of the switch it is preferred that the microcontroller is always up and running, which means that the powering is preferably always ON. In case of cascaded switchers, it is desirable that every switch is transferring the power from the REC port to the ODU port. For the solution shown in Fig. 9, there is a voltage drop of about 2.3V @50mA load, therefore the number of switches which can be placed in cascade, will be limited. The powering should at least be 5V, hence the amount of smart splitters will in this case be limited to 4 (2.3V * 3 = 7V + 5V limit voltage = 12V). In most cases there will not be more then 3 switches in cascade, so this should not be a problem. However, future developments may lead to a reduced voltage drop over each smart splitter, so that a higher number of cascades is possible.

A 2-way smart splitter may typically have the following specifications:

- switch reaction time OV to 18V transition <100msec (=power on time)

- switch reaction time 13V to 18V transition < 10Oμsec

- Low level input range = 12V to 15V - High level input range = 16V to 20V

- Power consumption @13V = 2OmA

- Power consumption @18 V = 35mA

- Max current from REC to ODU port = 8OmA

- Low level drop @ 5OmA load = 2.3V

- High level voltage drop @ 7OmA load = 0.45V

- Loss frequency range 5MHz to 2150MHz = 3.5 - 6 dB

- Typical return loss at each port > 1OdB

The satellite receiver system of figure 9 comprises three smart splitters 21 , 22, 23 in cascade. To visualize the operation of the present invention, two green leds and two red leds are mounted on the splitters. The green led indicates when the REC port is connected to the ODU port, the red led is on when the smart splitter is generating a busy tone on the REC port.

For the first smart splitter 21 , which switches RECs 3A or 3B through to splitter 23, the green led on the left is on. This implies that REC 3A outputs a voltage level of 18V and is connected through whereas REC 3B outputs a voltage level of 13V. For the second smart splitter 22, which switches RECs 3C or 3D through to splitter 23, the green led on the right and the red led on the left are on. This implies that both RECs 3C and 3D output a voltage level of 18V, but that only REC 3D is connected through whereas REC 3C receives a busy signal. In other words, splitter 22 has given priority to REC 3D, which in accordance with the diagram of Fig. 8 means that REC 3D has first raised its voltage level before REC 3C. For the third splitter 23, which switches either splitter 21 or splitter 22 through to the ODU 1 , the green led on the left and the red led on the right are on. This implies that splitter 21 is connected through to the ODU whereas splitter 22 receives a busy signal. In summary, in the condition shown in Fig. 9, REC 3A is given priority and is connected through to the ODU 1 , REC 3B is not requesting the common coaxial cable 2, REC 3C is put on hold by splitter 22 and REC 3D is put on hold by splitter 23. As a result, three of the RECs or control signal source devices have requested the common bus to communicate control signals to the ODU or control signal destination device, but only one has access to the common bus while the other two are informed that it is occupied. This shows how with the priority switch of the invention, collision of control signals on the common bus can effectively be eliminated.

The decision making process as illustrated by means of the above description is also shown in the flowchart of figure 10, which is related to the block diagram of figure 6. As shown, when no signaling is initiated, the process remains in a closed loop while monitoring the receiver voltages. As soon as one goes to 18V, the associated switch is closed, which in fact gives the priority to the receiver who initiated the signaling. This switch remains closed until the voltage drops below the threshold of for example 16V. If during this period, the other receiver wants to initiate signaling, a busy tone is generated to put it on hold.

Instead of several 2-way smart splitters, other smart splitters, like 3-way or even bigger smart splitters, are developed and the principle still stands.

In the above detailed description, the RF-part was always a splitter. But with the seperation of the signaling level (DC-path) from the satellite TV-signal (RF-path), the smart splitter can also be a smart tap, a smart amplifier, a smart diplexer, or other. Especially the smart tap can be useful in cascading multiple RECs, where the REC manufacturers often use taps to go from REC1 to REC2 to REC3... with a single coaxial line (bus). The same principle as above with the cascaded smart splitters, can be applied as it has been proven that the priority switch can work in cascaded systems.

As mentioned before, the busy tone does not have to be 22kHz. It can be any frequency or even any arbitrary waveform. It is clear that the principle of the smart splitter (or piority switch) also applies to these alternative busy tones.

The principle also works with DiSEqC 2.x signaling, where the REC expects an acknowledgement from the ODU or accessory. This is done by the fact that the REC should keep his voltage at 18V until he receives the acknowledgement, meaning he keeps his priority as long as needed.

The solution of the invention as proposed above involves no hardware modification of the RECs, only software upgrade. As a result, the priority switch and the smart splitter can be implemented in existing applications.

As the smart splitter version described above can only conduct small currents, this switch is preferably used in combination with a power inserter. Other splitters can be designed according to the invention which are able to conduct higher currents, especially in low voltage mode.

As already mentioned, the splitter can be designed to have less low voltage drop, for example such that the low voltage drop is equal to the high level voltage drop : +/- 0.4V. This raises the maximum number of Smart Splitters which can be in cascade.

If necessary (depending on the short circuit behaviour of the RECs), a short circuit protection can be included in the smart splitter.

If the output voltage of the REC is less than 17.5V and the cable between the REC and ODU is long, then the number of Smart Splitters is limited to 2 due to the fact that the high level voltage is not above 16V anymore at the ODU port of the second Smart Splitter. In the current version of the Smart Splitter, the high level voltage detection is hardware set to 16V, but it is clear that this can be made software adaptable with minor effort, so the number of smart splitters in cascade can be higher, even when long cables are used.

If a REC locks up or a « smart splitter non-compatible REC » is connected to the system and the REC keeps the output voltage at 18V, then the system will be completely blocked. To avoid this a maximum connection time can be introduced, if for example a REC keeps the voltage longer than 5 sec at 18V then this REC will be DC-disconnected from the smart splitter and will be ignored until his output voltage drops to 13V or OV (standby), so the other RECs can have access again to the bus even when a REC keeps the LNB output voltage at 18V.

The DiSEqC signal is not manipulated by the priority switch, so that other frequencies than 22kHz or other standards than DiSEqC can be used.

Claims

1. Priority switch for managing the control signalling on a common control signal bus between at least two control signal source devices and a control signal destination device, the priority switch comprising

- monitoring means for monitoring which of the source devices intends to send control signals towards the destination device,

- prioritising means, connected to said monitoring means, for prioritising one of the control signal sources among those which intend to send control signals, over the others,

- switching means, connected to said prioritising means, for connecting the prioritised source device through to the common control signal bus, and

- busy signal generating means, connected to said prioritising means, for informing the other source devices that the common control signal bus is occupied.

2. Priority switch according to claim 1 , characterised in that the monitoring means comprise a polling system for consecutively polling the source devices.

3. Priority switch according to claim 1 or 2, characterised in that said prioritising means is a microcontroller.

4. Priority switch according to any one of the previous claims, characterised in that the priority switch comprises at least two first ports for connecting the signal source devices and a second port for connecting the common control signal bus, a control signal line extending between each first port and the second port, said switching means being part of the control signal lines.

5. Priority switch according to claim 4, characterised in that said monitoring means comprise voltage detection circuitry connected to each control signal line.

6. Priority switch according to claim 4 or 5, characterised in that said busy signal generating means comprise a tone generator and switches for applying said tone to each of the control signal lines.

7. RF/IF signal handling device which is provided for passing on control signals in an upstream direction from multiple receivers to an outdoor unit, the device comprising a priority switch according to any one of the previous claims for managing the control signals.

8. RF/IF signal handling device according to claim 7, characterised in that the device is further provided for passing on RF/IF signals in a downstream direction from the outdoor unit to the receivers.

9. RF/IF signal handling device according to claim 8 comprising a priority switch according to claim 4, 5 or 6, characterised in that the device further comprises an RF/IF signal splitting section connected between the first and second ports, parallel over the control signal lines.

10. RF/IF signal handling device according to any one of the claims 7-9, characterised in that said busy signal generating means are provided for current modulating a voltage with a tone of a given frequency.

11. Method for managing the control signalling on a common control signal bus between at least two control signal source devices and a control signal destination device, the method comprising the steps of: a) monitoring which of the source devices intends to send control signals towards the destination device, b) prioritising one of the control signal sources among those which intends to send control signals, over the others, c) connecting the prioritised source device through to the common control signal bus, and d) generating a busy signal for the other source devices, informing them that the common control signal bus is occupied.

12. Method according to claim 11 , characterised in that the method further comprises the steps of: e) maintaining the connection established in step c) until the prioritised source device stops sending control signals, and f) ending the busy signal for informing the source devices that the common control signal bus is no longer occupied.