WO2006060495A1 - Bga to lga interposer - Google Patents

Bga to lga interposer Download PDF

Info

Publication number
WO2006060495A1
WO2006060495A1 PCT/US2005/043345 US2005043345W WO2006060495A1 WO 2006060495 A1 WO2006060495 A1 WO 2006060495A1 US 2005043345 W US2005043345 W US 2005043345W WO 2006060495 A1 WO2006060495 A1 WO 2006060495A1
Authority
WO
WIPO (PCT)
Prior art keywords
interposer
conductive pad
grid array
substrate
array device
Prior art date
Application number
PCT/US2005/043345
Other languages
French (fr)
Inventor
Lily T.C. Chang
Samuel C. Ramey
Michael S. Bean
Original Assignee
Molex Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Molex Incorporated filed Critical Molex Incorporated
Publication of WO2006060495A1 publication Critical patent/WO2006060495A1/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113Via provided in pad; Pad over filled via
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10719Land grid array [LGA]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/244Finish plating of conductors, especially of copper conductors, e.g. for pads or lands

Definitions

  • the present invention relates to an interposer for connecting a land grid array (LGA) socket to a ball grid array (BGA) chip.
  • LGA land grid array
  • BGA ball grid array
  • the present invention overcomes these problems with the prior art by providing an interposer that allows the IC chip manufacture to have the same BGA interface for its IC chips, regardless of whether the IC chip will be directly mounted to the circuit board or to the circuit board through an LGA socket connector.
  • the present invention allows an LGA connector to be mounted to a circuit board without the added expense of having to put gold conductive pads directly on the circuit board.
  • the use of the interposer of the present invention allows customers desiring a BGA type attachment to the circuit board thorugh a socket connector (as compared to directly mounting the IC chip directly to the circuit board) to use the finer, LGA interface to interface with the IC chip BGA interface.
  • the present invention provides an interposer, the interposer having an insulative substrate, at least one via provided through the substrate, the via having a first end and a second end for providing an electrical path through the substrate.
  • a conductive pad is located on each end of the via.
  • the conductive pads on each end of the via are formed of different materials.
  • One conductive pad is formed of solder material and the other conductive pad is formed of gold.
  • the interposer includes at least one standoff on the side of the interposer have a conductive pad formed of solder material.
  • FIG. 1 is a side elevational view of an assembly which includes an interposer connecting a land grid array socket to a ball grid array chip;
  • FIG. 2 is an enlarged side elevational view of a portion of the assembly shown in FIG. i;
  • FIG. 3 is a perspective view of the land grid array socket which can be used in the assembly
  • FIG. 4 is an enlarged perspective view of a portion of the land grid array socket of FIG. 3;
  • FIG. 5 is a perspective view of the ball grid array socket which can be used in the assembly
  • FIG. 6 is an enlarged perspective view of a portion of the ball grid array socket of FIG. 5;
  • FIG. 7 is a perspective view of the interposer used in the assembly;
  • FIG. 8 is an enlarged perspective view of a portion of the interposer
  • FIG. 9 is an enlarged perspective view of a portion of the interposer from a second side thereof;
  • FIG. 10 is a cross-sectional view of the interposer. Detailed Description of the Illustrated Embodiment:
  • An interposer 20 is used to connect a land grid array (LGA) socket 22 to a ball grid array (BGA) chip 24 to form an assembly 26.
  • the LGA socket 22 is known in the art.
  • the LGA socket 22 provides an array of conductive terminals 28 which extend through apertures in an insulative substrate 30, such as a film or a plastic.
  • the substrate 30 is mounted in a stiffening frame 32.
  • the frame 32 is generally rectangular-shaped, and may be formed from plastic.
  • the terminals 28 extend through the substrate 30 and extend outwardly therefrom on both sides thereof such that a first arm 34 is provided on a first side of the substrate 30 and a second arm 36 is provided on a second side of the substrate 30.
  • the second arm 36 is connected to a conductive pad on a printed wiring board 38 by suitable known means, such as a solder ball 40.
  • the BGA chip 24 is known in the art.
  • the BGA chip 24 includes an insulative substrate 42 in which conductive wiring (not shown) is provided. An end of each wire is terminated to a solder ball 44 on one side of the substrate 42. The solder balls 44 form an array. The other end of the wiring is suitably connected to other known electronic components. Because the BGA chip 24 has solder balls 44, and the LGA socket 22 has conductive terminals 28, it will not be able to mate the BGA chip 24 directly to the LGA socket 22. As such, an interposer 20 is used to make the connection between the BGA chip 24 and the LGA socket 22.
  • the interposer 20 is formed of an insulative substrate 46 having a first side 48 and a second side 50.
  • the substrate 46 is preferably formed from FR4 laminate (flame retardant woven glass reinforced epoxy resin), polycarbonate or other plastic which can be plated with a conductive material. As shown, the substrate 46 is planar and is generally rectangular.
  • a plurality of vias 52 are provided through the substrate 46 such that each via 52 extends from the first side 48 to the second side 50 of the substrate 46.
  • Each via 52 is plated by known means with a conductive material, preferably copper.
  • a first conductive pad is formed on the first side 48 of the substrate 46 proximate the end of the via 52 and a second conductive pad is formed on the second side 50 of the substrate 46 proximate the end of the via 52.
  • a conductive post (not shown) can be provided within each via 52 and extend outwardly therefrom.
  • a solder pad 54 is provided on the first side 48 of the substrate 46 and covers the first conductive pad.
  • the solder pad 54 is applied to the respective first conductive pad by known means.
  • Each resulting solder pad 54 is flat.
  • the solder pads 54 may sit against the first side 48 of the substrate 46 or be recessed into the first side 48 of the substrate 46. As a result, an array of solder pads 54 are provided on the first side 48 of the substrate 46.
  • a conductive pad 56 preferably formed from gold, is provided on the second side 50 of the substrate 46.
  • the conductive pad 56 is applied to the respective second conductive pad by known means.
  • Each resulting conductive pad 56 is flat.
  • the conductive pads 56 may sit against the second side 50 of the substrate 46 or be recessed into the second side 50 of the substrate 46.
  • an array of conductive pads 56 are provided on the second side 50 of the substrate 46 and respective conductive pads 56 align with respective solder pads 54.
  • a standoff 58 is provided at each corner of the insulative substrate 46 and extends outwardly from the first side 48 of the substrate 46.
  • the standoffs 58 extend outwardly from the substrate a greater distance than the conductive pads 54 extends therefrom.
  • the standoffs 58 are formed of an insulative material, such as plastic.
  • the standoffs 58 may be integrally formed with the substrate 46 or may be formed as separate members that are suitable attached to the substrate 46, for example by a drilled hole in the substrate 46.
  • each solder pad 54 on the interposer 20 is soldered to a respective solder ball 44 on the BGA chip 24 and each conductive pad 56 on the interposer 20 engages against the second end 34 of the respective terminal 28 in the LGA socket 22.
  • an electrical path is provide by the solder ball 44 on the BGA chip 24, the solder pad 54, the conductive means in the via 52, the conductive pad 56 and the terminal 28 in the LGA socket 22.
  • the standoff 58 controls the solder ball 44 collapse during the soldering process to prevent solder bridging between the solder pads 54 on the interposer 20.

Abstract

The present invention provides an interposer that allows a BGA devise to interface with an LGA device. The interposer has an insulative substrate, at least one via provided through the substrate, the via having a first end and a second end for providing an electrical path through the substrate. A conductive pad is located on each end of the via. The conductive pads may be formed of different materials, such as solder material on one side of the interposer and gold on the other side of the interposer. The interposer may also include one or more standoffs on the side of the interposer having the conductive pads formed of a solder material.

Description

BGA TO LGA INTERPOSER
Field of the Invention:
The present invention relates to an interposer for connecting a land grid array (LGA) socket to a ball grid array (BGA) chip.
Background of the Invention:
With existing IC chips having a ball grid array, mounting to a circuit substrate generally meant directly connecting the IC chip to the circuit substrate. These IC chips, having a BGA interface, were not easily or reliably able to be electrically interconnected to a socket having LGA terminals to interface with the IC chip BGA interface. Thus, if the IC chips were required to be mated to an LGA terminal, a different design of the IC chip mating interface was required.
In addition, it was also not cost effective to mount an LGA socket connector directly to a circuit substrate, such as a circuit board, due to the high cost associated with putting gold conductive pads on the circuit board to mate with the LGA socket connector. IC chip BGA interfaces are also generally on a finer pitch than is possible on a BGA socket connector.
The present invention overcomes these problems with the prior art by providing an interposer that allows the IC chip manufacture to have the same BGA interface for its IC chips, regardless of whether the IC chip will be directly mounted to the circuit board or to the circuit board through an LGA socket connector. In addition, the present invention allows an LGA connector to be mounted to a circuit board without the added expense of having to put gold conductive pads directly on the circuit board. Finally, since it is easier to reduce the pitch on an LGA socket connector than a BGA socket connector, the use of the interposer of the present invention allows customers desiring a BGA type attachment to the circuit board thorugh a socket connector (as compared to directly mounting the IC chip directly to the circuit board) to use the finer, LGA interface to interface with the IC chip BGA interface.
Summary of the Invention:
An object of the present invention is to provide a means for easily and reliably electrically interconnecting a BGA type device to an LGA type device. Another object of the present invention is to provide an interposer to electrically connect a BGA chip to an LGA socket.
In order to achieve these objects, the present invention provides an interposer, the interposer having an insulative substrate, at least one via provided through the substrate, the via having a first end and a second end for providing an electrical path through the substrate. A conductive pad is located on each end of the via.
In another embodiment, the conductive pads on each end of the via are formed of different materials. One conductive pad is formed of solder material and the other conductive pad is formed of gold. In yet another embodiment, the interposer includes at least one standoff on the side of the interposer have a conductive pad formed of solder material.
Brief Description of the Drawings:
The organization and manner of the structure and operation of the invention, together with further objects and advantages thereof, may best be understood by reference to the following description, taken in connection with the accompanying drawings, wherein like reference numerals identify like elements in which:
FIG. 1 is a side elevational view of an assembly which includes an interposer connecting a land grid array socket to a ball grid array chip; FIG. 2 is an enlarged side elevational view of a portion of the assembly shown in FIG. i;
FIG. 3 is a perspective view of the land grid array socket which can be used in the assembly;
FIG. 4 is an enlarged perspective view of a portion of the land grid array socket of FIG. 3;
FIG. 5 is a perspective view of the ball grid array socket which can be used in the assembly;
FIG. 6 is an enlarged perspective view of a portion of the ball grid array socket of FIG. 5; FIG. 7 is a perspective view of the interposer used in the assembly;
FIG. 8 is an enlarged perspective view of a portion of the interposer;
FIG. 9 is an enlarged perspective view of a portion of the interposer from a second side thereof;
FIG. 10 is a cross-sectional view of the interposer. Detailed Description of the Illustrated Embodiment:
While the invention may be susceptible to embodiment in different forms, there is shown in the drawings, and herein will be described in detail, a specific embodiment with the understanding that the present disclosure is to be considered an exemplification of the principles of the invention, and is not intended to limit the invention to that as illustrated and described herein.
An interposer 20 is used to connect a land grid array (LGA) socket 22 to a ball grid array (BGA) chip 24 to form an assembly 26. The LGA socket 22 is known in the art. Generally, the LGA socket 22 provides an array of conductive terminals 28 which extend through apertures in an insulative substrate 30, such as a film or a plastic. The substrate 30 is mounted in a stiffening frame 32. As shown, the frame 32 is generally rectangular-shaped, and may be formed from plastic. The terminals 28 extend through the substrate 30 and extend outwardly therefrom on both sides thereof such that a first arm 34 is provided on a first side of the substrate 30 and a second arm 36 is provided on a second side of the substrate 30. The second arm 36 is connected to a conductive pad on a printed wiring board 38 by suitable known means, such as a solder ball 40.
The BGA chip 24 is known in the art. Generally, the BGA chip 24 includes an insulative substrate 42 in which conductive wiring (not shown) is provided. An end of each wire is terminated to a solder ball 44 on one side of the substrate 42. The solder balls 44 form an array. The other end of the wiring is suitably connected to other known electronic components. Because the BGA chip 24 has solder balls 44, and the LGA socket 22 has conductive terminals 28, it will not be able to mate the BGA chip 24 directly to the LGA socket 22. As such, an interposer 20 is used to make the connection between the BGA chip 24 and the LGA socket 22.
The interposer 20 is formed of an insulative substrate 46 having a first side 48 and a second side 50. The substrate 46 is preferably formed from FR4 laminate (flame retardant woven glass reinforced epoxy resin), polycarbonate or other plastic which can be plated with a conductive material. As shown, the substrate 46 is planar and is generally rectangular. A plurality of vias 52 are provided through the substrate 46 such that each via 52 extends from the first side 48 to the second side 50 of the substrate 46. Each via 52 is plated by known means with a conductive material, preferably copper. During the plating process, a first conductive pad is formed on the first side 48 of the substrate 46 proximate the end of the via 52 and a second conductive pad is formed on the second side 50 of the substrate 46 proximate the end of the via 52. Alternatively, a conductive post (not shown) can be provided within each via 52 and extend outwardly therefrom.
A solder pad 54 is provided on the first side 48 of the substrate 46 and covers the first conductive pad. The solder pad 54 is applied to the respective first conductive pad by known means. Each resulting solder pad 54 is flat. The solder pads 54 may sit against the first side 48 of the substrate 46 or be recessed into the first side 48 of the substrate 46. As a result, an array of solder pads 54 are provided on the first side 48 of the substrate 46.
A conductive pad 56, preferably formed from gold, is provided on the second side 50 of the substrate 46. The conductive pad 56 is applied to the respective second conductive pad by known means. Each resulting conductive pad 56 is flat. The conductive pads 56 may sit against the second side 50 of the substrate 46 or be recessed into the second side 50 of the substrate 46. As a result, an array of conductive pads 56 are provided on the second side 50 of the substrate 46 and respective conductive pads 56 align with respective solder pads 54. A standoff 58 is provided at each corner of the insulative substrate 46 and extends outwardly from the first side 48 of the substrate 46. The standoffs 58 extend outwardly from the substrate a greater distance than the conductive pads 54 extends therefrom. The standoffs 58 are formed of an insulative material, such as plastic. The standoffs 58 may be integrally formed with the substrate 46 or may be formed as separate members that are suitable attached to the substrate 46, for example by a drilled hole in the substrate 46.
In use, each solder pad 54 on the interposer 20 is soldered to a respective solder ball 44 on the BGA chip 24 and each conductive pad 56 on the interposer 20 engages against the second end 34 of the respective terminal 28 in the LGA socket 22. As a result, an electrical path is provide by the solder ball 44 on the BGA chip 24, the solder pad 54, the conductive means in the via 52, the conductive pad 56 and the terminal 28 in the LGA socket 22. The standoff 58 controls the solder ball 44 collapse during the soldering process to prevent solder bridging between the solder pads 54 on the interposer 20.
While a preferred embodiment of the present invention is shown and described, it is envisioned that those skilled in the art may devise various modifications of the present invention. For example, and not by way of limitation, one could also use a similar type interposer to interconnect an LGA socket connector to a circuit substrate by soldering the solder pad 54 of the interposer to conductive pads on a circuit substrate, and the conductive pads 56 of the interposer are electrically connected to LGA terminals of the LGA socket.

Claims

CLAIMS:What is claimed is:
1. An interposer for connecting a land grid array device to a ball grid array device, the interposer comprising: an insulative substrate; at least one via provided through said substrate, said via having a first end and a second end, said via having means for providing an electrical path therethrough; a first conductive pad attached to and in electrical communication with said means for providing an electrical path at said first end of said via; and a second conductive pad attached to and in electrical communication with said means for providing an electrical path at said second end of said via, wherein the first conductive pad is capable of being electrically interconnected to one of the land grid array device and the ball grid array device and the second conductive pad is capable of being electrically interconnected to the other of the land grid array device and the ball grid array device.
2. The interposer of claim 1 , wherein said first conductive pad is formed of solder and said second conductive pad is formed of gold.
3. The interposer of claim 1 , further including at least one standoff provided on said first side of said substrate.
4. The interposer of claim 1 , wherein the land grid array device is a land grid array socket connector and the ball grid array device is an IC chip package.
5. The interposer of claim 2, wherein the first conductive pad is mounted on a circuit board and the second conductive pad is mated with a land grid array connector.
6. An assembly comprising: an interposer, said interposer including an insulative substrate, at least one via provided through said substrate, said via having a first end and a second end, said via having means for providing an electrical path therethrough, a first conductive pad attached to and in electrical communication with said means for providing an electrical path at said first end of said via, and a second conductive pad attached to and in electrical communication with said means for providing an electrical path at said second end of said via; a land grid array device having a terminal provided therethrough, said terminal being in electrical communication with said first conductive pad; and a ball grid array device having a ball provided thereon, said solder ball being in electrical communication with said second conductive pad.
7. The assembly of claim 6, wherein said first conductive pad is formed of solder and said second conductive pad is formed of gold.
8. The assembly of claim 6, further including at least one standoff provided on said first side of said substrate.
9. The assembly of claim 6, wherein the land grid array device is a land grid array socket connector and the ball grid array device is an IC chip package.
10. The assembly of claim 7, wherein the first conductive pad is mounted on a circuit board and the second conductive pad is mated with a land grid array connector.
PCT/US2005/043345 2004-12-01 2005-12-01 Bga to lga interposer WO2006060495A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US63209204P 2004-12-01 2004-12-01
US60/632,092 2004-12-01

Publications (1)

Publication Number Publication Date
WO2006060495A1 true WO2006060495A1 (en) 2006-06-08

Family

ID=36000638

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/043345 WO2006060495A1 (en) 2004-12-01 2005-12-01 Bga to lga interposer

Country Status (1)

Country Link
WO (1) WO2006060495A1 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030146017A1 (en) * 2000-08-24 2003-08-07 Zhineng Fan A Method of Forming A HiGH RELIABILITY INTERPOSER FOR LOW COST HIGH RELIABILITY APPLICATIONS

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030146017A1 (en) * 2000-08-24 2003-08-07 Zhineng Fan A Method of Forming A HiGH RELIABILITY INTERPOSER FOR LOW COST HIGH RELIABILITY APPLICATIONS

Similar Documents

Publication Publication Date Title
US6493240B2 (en) Interposer for connecting two substrates and resulting assembly
US6884086B1 (en) System and method for connecting a power converter to a land grid array socket
US5593322A (en) Leadless high density connector
US4489999A (en) Socket and flexible PC board assembly and method for making
US20030151147A1 (en) Electrical assembly with vertical multiple layer structure
US6992395B2 (en) Semiconductor device and semiconductor module having external electrodes on an outer periphery
US8116097B2 (en) Apparatus for electrically coupling a semiconductor package to a printed circuit board
KR100763059B1 (en) Power delivery apparatus, systems, and methods
KR100386018B1 (en) Stacked Semiconductor Device Package
US20060097370A1 (en) Stepped integrated circuit packaging and mounting
US6461169B1 (en) Interconnecting circuit modules to a motherboard using an edge connector with conductive polymer contacts
US6924556B2 (en) Stack package and manufacturing method thereof
US6320249B1 (en) Multiple line grids incorporating therein circuit elements
US20070238324A1 (en) Electrical connector
KR20050026030A (en) Printed circuit board assembly having a bga connection
US6815614B1 (en) Arrangement for co-planar vertical surface mounting of subassemblies on a mother board
WO2006060495A1 (en) Bga to lga interposer
US20040068867A1 (en) Land-side mounting of components to an integrated circuit package
WO2000004595A2 (en) Land-side mounting of components to an integrated circuit package
US7145085B2 (en) Enhanced connection arrangement for co-planar vertical surface mounting of subassemblies on a mother board
KR100486531B1 (en) Apparatus for testing ic package
US6950315B2 (en) High frequency module mounting structure in which solder is prevented from peeling
WO2008117213A2 (en) An assembly of at least two printed circuit boards and a method of assembling at least two printed circuit boards
US20030122238A1 (en) Integrated circuit package capable of improving signal quality
KR20020028038A (en) Stacking structure of semiconductor package and stacking method the same

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KM KN KP KR KZ LC LK LR LS LT LU LV LY MA MD MG MK MN MW MX MZ NA NG NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU LV MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 05826084

Country of ref document: EP

Kind code of ref document: A1