WO2006060015A1

WO2006060015A1 - Method for forming a photoresist pattern

Info

Publication number: WO2006060015A1
Application number: PCT/US2004/040237
Authority: WO
Inventors: Christopher J. Smith; Steven M. Hues; Cassandra M. Jordan Hawk; Amanda M. Kroll; Andrew G. Nagy; Paul M. Winebarger
Original assignee: Freescale Semiconductor, Inc.
Priority date: 2004-11-30
Filing date: 2004-11-30
Publication date: 2006-06-08
Also published as: CN101044599A; CN100468642C; TW200625405A; JP2008522403A; TWI383431B

Abstract

A method for forming a photoresist pattern includes placing a semiconductor wafer having condensable species in a chemically filtered photolithography system and desorbing the chemical species from the semiconductor wafer in the chemically filtered photolithography system. After desorbing the chemical species, photoresist is applied to the semiconductor wafer in the chemically filtered photolithography system. Next, the photoresist is exposed to energy to form a photoresist pattern in the chemically filtered photolithography system.

Description

METHOD FOR FORMING A PHOTORESIST PATTERN Field of the Invention

[0001] This invention relates generally to forming a photoresist pattern, and more specifically, to removing condensable species to form a photoresist pattern.

Background

[0002] One common method for forming features of semiconductor devices is to form a photoresist pattern on the semiconductor device and to reproduce the pattern in underlying layers. Any defects in the photoresist pattern will be transferred to the underlying layers and may cause reduced yield. Thus, it is important that the photoresist pattern includes the desired pattern with minimal defects. One defect that may occur is the absence of a via or a partial via in a large dense array of vias, which undesirably reduce yield.

[0003] Often the defects are formed by contamination from processing. To reduce such contamination an ash process is typically performed to clean the semiconductor wafer before the photoresist is deposited. However, both full and partial vias are often still missing. Thus, a need exists to prevent the missing vias in large dense arrays of vias to increase yield.

Description of the Drawings

[0004] The present invention is illustrated by way of example and is not limited by the accompanying figures, in which like references indicate similar elements.

[0005] Figure illustrates a process flow of forming a photoresist pattern in accordance with an embodiment of the present invention.

[0006] Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve the understanding of the embodiments of the present invention.

Detailed Description of the Drawings

[0007] The inventors have discovered that portions of vias or entire vias themselves are missing from big dense arrays due to resist poisoning occurring at the via location from molecular airborne contamination. The presence of condensable species neutralizes acids and causes the resist poisoning by reducing the amplification of a photochemical reaction when the photoresist is exposed to radiation. While the prior art cleans organics and condensable species off a semiconductor wafer using an ash process, the inventors have discovered the ash is not sufficient. Furthermore, the inventors believe that containing the semiconductor wafers in a container, such as a Standard Mechanical Interface (SMIF Pod), will not be sufficient to prevent missing full or partial vias in dense areas because the undesirable condensable species that cause the resist poisoning may be able to leak into the container. This problem will become amplified the longer the semiconductor wafer(s) are left in the container and not processed to apply a photoresist layer.

[0008] To prevent the printability of vias, condensable species are desorbed within a chemically filtered environment and without exposing the semiconductor wafer to an environment where the condensable species can be formed, the photoresist is deposited on the semiconductor wafer. A more detailed understanding of the process can be better understood by turning to an embodiment of the present invention shown in FIG. 1

[0010] First, a semiconductor wafer 12 is exposed to a plasma environment, which in one embodiment is an ash process 14. The semiconductor wafer 12 can be a wafer of any dimension (e.g., 200 or 300 millimeter wafers) and may be any type of wafer, such as monocrystalline silicon, gallium germanium, silicon-on-insulator (SOI), the like, and combinations of the above. Furthermore, the semiconductor wafer 12 can be at any stage in the manufacturing flow of semiconductor devices where a photoresist layer is used. For example, the semiconductor wafer 12 can be at a stage where a photoresist layer is needed to form vias or gates. Thus, the semiconductor wafer 12 may have many layers and potentially even semiconductor devices formed on and within it.

[0011] In the ash stage 14, an oxygen plasma is used to remove organic and condensable species. The prior art believed that this process protected against molecular airborne contamination, however, the inventors have discovered that condensable species appear to redeposit on the semiconductor wafer when the semiconductor wafer is being transported to a photolithography tool. Furthermore, even if the ash tool is part of the photolithography tool, condensable species may still be formed on the semiconductor wafer and hence it may still be desirable to desorb such species. If the time period between the ash stage 14 and the subsequent first heating process 16 is too great (e.g., greater than approximately six hours or greater than approximately four hours) it may be desirable to repeat the ash stage 14 as too many contaminants may form on the semiconductor wafer 12 during the time the semiconductor wafer 12 is waiting after the ash stage 14.

[0012] As used herein condensable species can be any airborne molecule that chemically interferes with the photolithography process. Condensable species can be distinguished from what is herein referred to as particles. Particles are matter than mechanically interferes with the photolithography process. Often, particles are on a semiconductor wafer because they fall from a tool or another apparatus in the manufacturing environment onto the semiconductor wafer. Condensable species include dioctyl phthalate (DOP) whose chemical formula is C₆H₄(COOC₈Hn)₂ and _twhose structure can be illustrated as shown below.

[0013] Also the condensable species can include amines, such as ammonia, which has a chemical formula Of NH₃, or n-methyl-2-pyrrolidone (NMP), which has the chemical formula C₅H₉NO and can be illustrate by the structure shown below.

[0014] In addition, condensable species can include other chemicals such as siloxanes, which have a backbone of alternating silicon and oxygen atoms. Organic groups, such as methyl, phenyl or vinyl, may be attached to the silicon. For example, Poly Di-Ethyl Siloxane is a siloxane.

[0015] To thermally desorb the condensable species the semiconductor wafer is placed in a chemically filtered environment 10, which in one embodiment is a photolithography tool that chemically filters the air within the tool so that is purer than the environment outside the photolithography tool. When within the chemically filtered environment 10, the semiconductor wafer 12 is exposed to a first heating process 16, which can be termed a pre-bake. In one embodiment, the heating process 16 occurs at a temperature greater than or equal to approximately 150 degrees Celsius or more specifically, greater than or equal to approximately 170 degrees Celsius, or even more specifically, greater than or equal to approximately 180 degrees Celsius. However, temperatures greater than approximately 180 degrees Celsius may not be needed as the increase in temperature may not provide any improvements and instead, may undesirably require more energy and thus, may increase the cost of manufacturing. Therefore, in one embodiment, the temperature for heating is between approximately 150 to 180 degrees Celsius or more specifically, between approximately 170 and 180 degrees Celsius. In one embodiment, all the heating stages herein heat the semiconductor wafer 12 using a hot plate and the prescribed temperatures are the temperatures measured at or near the hot plate. The length of the time for heating can be chosen based on the timing of the other stages in the process. For example, approximately 60 seconds may be desirable if the other semiconductor wafers are transported to another stage in the process after approximately 60 seconds. In one embodiment, this 60 seconds is the time at which the chamber is at approximately a constant temperature; in other words, the 60 seconds does not include a ramping up and ramping down of temperature. Timing the heating process to be approximately equal to the other process stages, if possible, prevents the semiconductor wafer 12 from having to wait for the next stage after the heating stage and also prevents the heating process from slowing down the overall process by being the bottle neck (i.e., the slowest stage) in the process.

[0016] After the first heating stage 16, a cooling stage 17 may be needed. The photolithography tool used may have a robotic arm that can be used to remove or place the semiconductor wafer 12 in a hot chamber (a "hot robotic arm") and another robotic arm that can be used to remove or place the semiconductor wafer 12 in a cool chamber (a "cool robot arm"). Although the hot robotic arm can enter the chamber for the heating stage 16, the photolithography tool may prevent the hot robotic arm from entering the chamber for the adhesion stage 18 because it may be a safety hazard to have hot semiconductor wafer 12 in the chamber for the adhesion stage 18. (The adhesion layer may be volatile when deposited on a hot semiconductor wafer.) Thus, a cooling stage 17 may be used to cool the semiconductor wafer 12. The hot robotic arm should be able to transfer the semiconductor wafer 12 from the chamber for the heating stage 16 to the chamber for the cooling stage 17. Afterwards, the cool robotic arm can transfer the cooled semiconductor wafer to the adhesion stage 18. In one embodiment, the cooled semiconductor wafer is cooled until it reaches approximately room temperature (approximately 21 degrees Celsius.) In one embodiment, the semiconductor wafer 12 is cooled for approximately 45 seconds. In one embodiment, all cooling stages are herein performed by using a cool or chill plate. However, like the heating stage 16, the time can be chosen to suit the specific overall photolithographic process.

[0017] After cooling the semiconductor wafer 12, the semiconductor wafer 12 is transported, in one embodiment, by a robotic arm, which is most likely the cool robotic arm, to the adhesion stage 18. During the adhesion stage 18, a pre-resist coating or adhesion layer is deposited on the semiconductor wafer 12 to improve adhesion. In one embodiment, the adhesion layer is a silylating priming agent, such as hexamethyldisilazane (HMDS). HMDS chemically reacts to remove any surface OH groups. Due to the presence of heat, the HMDS reacts with oxygen to form a trimethylsilyl (Si[CHs]₃) that bonds to the semiconductor wafer 12. In one embodiment, the temperature of the adhesion stage 18 is approximately 100 degrees Celsius or greater, such as approximately 120 degrees Celsius. In one embodiment, the adhesion stage is approximately 50 to 70 seconds, or preferably approximately 60 seconds.

[0018] After forming the adhesion layer on the semiconductor wafer 12, the semiconductor wafer 12 may be cooled to prevent bubbling and melting of the subsequently applied photoresist. Hence, the semiconductor wafer 12 may be transported, in one embodiment, by the cooling robotic arm, to a chamber for a second cooling stage 20. In one embodiment, the semiconductor wafer 12 is cooled to approximately room temperature for approximately 45 seconds.

[0019] After being cooled, the semiconductor wafer 12 is transported to the resist application stage 22, for example, by one of the robotic arms. In one embodiment, at the resist application stage 22, the resist is spin-coated onto the semiconductor wafer 12. After the resist solution is applied to the semiconductor wafer 12 from the dispenser 23, the semiconductor wafer 12 is spun or rotated to uniformly apply the resist to the entire semiconductor wafer 12. The spinning may continue until the photoresist is substantially dry. If a bead of dried photoresist occurs along the circumference of the semiconductor wafer 12, the dried photoresist should be removed to avoid the bead from flaking off and creating particles that may cause contamination problems. In one embodiment, a chemically amplified photoresist, such as a deep ultra-violet (DUV) resist may be used. In addition, an ESCAP (environmentally safe/stable chemically altered photoresist) can be used; however, any photoresist material can be used.

[0020] After applying the photoresist, the semiconductor wafer 12 is transported, for example, by a robotic arm to a second heating stage 24, which may be termed a soft-bake or post-apply bake. The soft bake is performed to cross-link the molecules in the photoresist. The soft-bake may also remove any solvent from the photoresist and may improve adhesion of the photoresist by decreasing stress in the photoresist. In one embodiment, the soft bake occurs at a temperature of approximately 130 degrees Celsius for approximately 60 seconds; however, other temperature and times may be used.

[0021] After the soft-bake the semiconductor wafer 12 may be cooled so that it is not at too high a temperature during subsequent process for various reasons, such as for ease of handling. Hence, the semiconductor wafer 12 may be transported to a chamber for a third cooling stage 26. In one embodiment, the semiconductor wafer 12 is cooled to approximately room temperature for approximately 45 seconds.

[0022] In one embodiment, the stepper or scanner is used to align and expose the semiconductor wafer 12 one area at a time. For instance, the semiconductor wafer 12 will be aligned and exposed in a particular area (usually called a reticle field) and then the stepper stage or scanner stage will move the semiconductor wafer 12 to the appropriate portions of the tool so that a different area is aligned and exposed. Thus, once the stepper has aligned the semiconductor wafer 12 , the semiconductor wafer 12 will be subsequently exposed.

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[0023] During alignment and expose stage 30, a mask 31 is placed above the semiconductor wafer 12 and radiation is used to expose the photoresist based on the pattern of the mask 31. The radiation creates a photochemical reaction or transformation in the photoresist. If resist poisoning has occurred the amplification of the reaction will be decreased. The radiation can be any desirable radiation, such as light with a wavelength of 248 orl93 nanometers. After one area of the semiconductor wafer 12 is exposed in the stepper, the stepper then moves the mask in relation to the semiconductor wafer 12 in order to expose another (usually adjacent) portion of the semiconductor wafer 12. The use of the stepper in the alignment and expose stage 30 are repeated to eventually create a grid of areas that are exposed. [0024] A third heating stage 32, which may be termed a post exposure bake, is performed after the all desirable areas of the semiconductor wafer 12 are exposed. The post exposure bake excites acid catalysts to form the latent image within the photoresist. In one embodiment, the post bake exposure occurs at a temperature of approximately 130 degrees Celsius for approximately 60 seconds.

[0025] After the latent image is formed in the post exposure bake, the semiconductor wafer 12 may be cooled. Hence, the semiconductor wafer 12 may be transported to a chamber for a fourth cooling stage 34. In one embodiment, the semiconductor wafer 12 is cooled to approximately room temperature for approximately 45 seconds.

[0026] For the latent image to become a final image in the photoresist, the semiconductor wafer 12 undergoes a development stage 36 after being cooled in the fourth cooling stage 34. In one embodiment, the development stage 36 is performed using a spray development system where a nozzle 37 sprays developer 39 onto the semiconductor wafer 12, which is spinning. Although not show, a subsequent rinse, dry, and heating processes may be performed after the development stage 36 to remove the developer.

[0027] After the final image is formed in the photoresist, the semiconductor wafer 12 may leave the chemically filtered environment 10. In one embodiment, to verify that the final image is as desired an after develop inspection (ADI) 40 is performed. During the ADI 40 a tool, such as an optical microscope, scanning electron microscope (SEM), or laser system, may be used to inspect the photoresist pattern. Characteristics of the photoresist that are likely to be determined during inspection include the quality of the film, image quality, and defects. For example, dense arrays of vias can be inspected to determine if any vias or portions of vias are missing. If the results of the photolithography process are acceptable (e.g., all the vias are present in the dense array), the semiconductor wafer 12 is sent on for subsequent processing where the photoresist pattern will be used to etch underlying layers. If instead, the pattern is not acceptable, the photoresist layer can be removed (stripped) and the photolithography process can be repeated.

[0028] By now it should be appreciated that there has been provided a method for thermally desorbing airborne contaminants, such as condensable species, in situ. Furthermore, the semiconductor wafer is processed in a contamination-free environment that greatly reduces or eliminates the potential for missing vias caused by contamination. The decrease in missing vias (or other photolithographic patterns or portions of patterns) increases yield.

[0029] In the foregoing specification, the invention has been described with reference to specific embodiments. However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of the present invention. Benefits, other advantages, and solutions to problems have been described above with regard to specific embodiments. However, the benefits, advantages, solutions to problems, and any element(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential feature or element of any or all the claims.

[0030] Moreover, the terms "front", "back", "top", "bottom", "over", "under" and the like in the description and in the claims, if any, are used for descriptive purposes and not necessarily for describing permanent relative positions. It is understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in other orientations than those illustrated or otherwise described herein. As used herein, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The terms "a" or "an", as used herein, are defined as one or more than one.

Claims

CLAIMSWhat is claimed is:

1. A method for forming a photoresist pattern, wherein the method comprises: providing a semiconductor wafer; exposing the semiconductor wafer to a plasma environment; desorbing condensable species from a top surface of the semiconductor wafer after exposing the semiconductor wafer to the plasma environment; applying a photoresist to the top surface of the semiconductor wafer after desorbing the condensable species; and exposing the photoresist to energy to form a photoresist pattern.

2. The method of claim 1, wherein desorbing the condensable species comprises heating the semiconductor wafer.

3. The method of claim 2, wherein heating the semiconductor wafer comprises heating the semiconductor wafer to a temperature greater than approximately 150 degrees Celsius. i

4. The method of claim 2, further comprising cooling the semiconductor wafer after heating the semiconductor wafer and before applying the photoresist to the semiconductor wafer.

5. The method of claim 1, further comprising depositing an adhesion layer after heating the semiconductor wafer and before applying the photoresist to the top surface semiconductor wafer.

6. The method of claim 1, wherein desorbing the condensable species; applying the photoresist, and exposing the semiconductor wafer to energy are performed within a chemically filtered photolithography system.

7. A method for forming a photoresist pattern, wherein the method comprises: placing a semiconductor wafer having condensable species in a chemically filtered photolithography system; desorbing the chemical species from the semiconductor wafer in the chemically filtered photolithography system; applying photoresist to the semiconductor wafer in the chemically filtered photolithography system after desorbing the chemical species; and exposing the photoresist to energy to form a photoresist pattern in the chemically filtered photolithography system.

8. The method of claim 7, wherein desorbing the condensable species comprises heating the semiconductor wafer.

9. The method of claim 8, wherein heating the semiconductor wafer comprises heating the semiconductor wafer to a temperature greater than approximately 150 degrees Celsius.

10. The method of claim 7, further comprising depositing an adhesion layer after heating the semiconductor wafer and before applying the photoresist to the top surface semiconductor wafer.

11. The method of claim 7, further comprising exposing the semiconductor wafer to a plasma environment prior to desorbing the chemical species.

12. A method of forming a photoresist pattern, the method comprising: providing a semiconductor wafer having condensable species; heating the semiconductor wafer to desorb condensable species, wherein the heating occurs in a tool; applying photoresist to the semiconductor wafer in the tool; and exposing the photoresist to energy to form a photoresist pattern.

13. The method of claim 12, wherein desorbing the condensable species comprises heating the semiconductor wafer.

14. The method of claim 13, wherein heating the semiconductor wafer comprises heating the semiconductor wafer to a temperature greater than approximately 150 degrees Celsius.

15. The method of claim 12, further comprising depositing an adhesion layer after heating the semiconductor wafer and before applying the photoresist to the top surface semiconductor wafer.

16. The method of claim 12, further comprising exposing the semiconductor wafer to a plasma environment prior to desorbing the chemical species.