WO2006053846A1 - Halbleiterschaltmodul - Google Patents
Halbleiterschaltmodul Download PDFInfo
- Publication number
- WO2006053846A1 WO2006053846A1 PCT/EP2005/055821 EP2005055821W WO2006053846A1 WO 2006053846 A1 WO2006053846 A1 WO 2006053846A1 EP 2005055821 W EP2005055821 W EP 2005055821W WO 2006053846 A1 WO2006053846 A1 WO 2006053846A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- power semiconductor
- switching module
- semiconductor element
- semiconductor switching
- module
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/467—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing gases, e.g. air
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2405—Shape
- H01L2224/24051—Conformal with the semiconductor or solid-state device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
Definitions
- the present invention relates to a semiconductor switching module according to the preamble of claim 1.
- Semiconductor switch modules are used when switching several tens of amperes at operating voltages of a few hundred volts frequently and almost silently.
- a semiconductor switching module is in Depending ⁇ ness of used power semiconductor chips for a ⁇ be approved operating voltage and current range and specified for a certain maximum switching capacity. , Must, during scarf ⁇ least generated heat to be dissipated in a suitable manner to be able to maintain these electrical specifications fturien even at high Heidelbergou ⁇ .
- Semiconductor switch modules can be produced, for example, by the so-called bonding technology.
- the actual power semiconductor element consisting of a connected base substrate and attached thereto Leis ⁇ processing semiconductor chip and other components, over-reaching entspre ⁇ bonding wires with connection elements.
- connection elements are guided through the module housing of the semiconductor switching module ⁇ to the outside, so that a corresponding circuit can be made.
- a large part of the interior of the module housing is filled with an insulating potting compound.
- the power semiconductor element of such a semiconductor switching module can also be constructed according to the so-called planar technology.
- planar construction of a Power semiconductor element is known for example from WO 03/030247.
- the components are sissubstrat a Ba ⁇ , the copper layers applied from a ceramic base having both sides thereof ⁇ is applied.
- the components can then advantage surface area and without additional wires kontak ⁇ and connected to connecting elements.
- the use of such power semiconductor elements embodied in Planar technology eliminates the wiring required in bonding technology.
- the insulation between the components and the electrically conductive layers is also produced here alone by the electrically insulating layers, so that can be dispensed with an additional potting compound.
- semiconductor switching modules can be less on ⁇ compliant and thus made easier.
- the object of the present invention is to provide such a semiconductor switching module in which, in addition, the heat dissipation is improved.
- the dimensioning of a heat sink can be smaller or completely eliminated by this additional cooling, which ultimately leads to a simplification and leads to smaller overall dimensions of the semiconductor switching module.
- the openings are preferably arranged on opposite side walls of the module housing. Since ⁇ by creating a flow of air as close as possible to the surface of the power semiconductor element, so that an optimized surface cooling of the power semiconductor chip and thus of the power semiconductor element is achieved.
- an additional printed circuit board in particular a Lei ⁇ terplatte, such as a control board, so arranged in the module ⁇ housing, that a flow channel is formed to L predominantlyströmung between the openings between its surface and the surface of the semiconductor device, a higher air flow and thus a further improved cooling of the power semiconductor chip can be achieved.
- a fan can also be arranged on one of the openings in the module housing.
- the air flow can be increased wei ⁇ ter, so that even at low politiciansverlus ⁇ th, that is, can be dispensed with entirely on a heat sink at low switching performance.
- FIG. 1 schematically shows a power semiconductor module embodied in planar technology
- FIG.2 shows schematically a first embodiment of he ⁇ inventive power semiconductor module
- 3 schematically shows a further embodiment of the power semiconductor module according to the invention
- the semiconductor switching module 1 shown in FIG 1 shows the Leis ⁇ tung semiconductor element 110 with an applied on one side of Ba sissubstrats 111 power semiconductor chip 112.
- a correspondingly sized heat sink 160 is provided to cool the Leis ⁇ is on the opposite side tung semiconductor element 110 .
- the power semiconductor element 110 is completely enclosed on at least one side 10 by a module housing 120.
- the power semiconductor chip 112 is connected to the connection elements 150.
- This An ⁇ locking elements 150 are for interconnecting the Halbleitermo- duls performed with other modules through the module housing 120 to .
- FIG. 2 shows the same construction as FIG.l with the difference that according to the invention openings 220 and 220 ⁇ ⁇ ⁇ are provided in the module housing 220th Due to the special arrangement of the openings, in particular in two opposite Wan ⁇ compounds of the module housing 220, as can additional heat ⁇ dissipation on the side of the power semiconductor chips can be achieved.
- preferred of the openings 220 ⁇ and 220 ⁇ ⁇ is a direct possible sweeping the upper ⁇ surface and thus achieved an additional cooling to the side of the power semiconductor element, on which the egg ⁇ gentliche heat source, namely the power semiconductor chip is located.
- the cooling body 260 can thus be dimensioned correspondingly smaller than the embodiment shown in FIG.
- FIG. 3 shows a second embodiment of a system constructed in planar technology semiconductor switching module 1.
- an additional printed circuit board assembly as in ⁇ the control board game as 330 for controlling the power semiconductor element 310 is disposed in the module housing 320th This, together with the power semiconductor element 310, forms a flow channel which effects a guided air flow between the openings 320 ⁇ and 320 ⁇ ⁇ .
- a fan 340 is provided at the openings 320 ⁇ ⁇ in order to further increase the air flow and thus the cooling effect.
- FIG 2 and FIG 3 show only two possible embodiments of the present invention. Of the present invention, but also all other embodiments are intended to be encompassed as long as they are the same basic principle under ⁇ that substantially opposite points of the module housing has an opening at two each at least provided so as to cool the cataloggurleiterele ⁇ ments an air flow over the side of the cataloggurlei- terelements on which the power semiconductor chip befin ⁇ det, is effected.
- the openings 420 ⁇ and 420 ⁇ ⁇ in the cover of the module housing 420 may be arranged at two entge ⁇ gengresen places (Figure 4).
- the openings 520 vorgese ⁇ might 520 ⁇ and 520 ⁇ ⁇ also on two adjoining walls (FIG 5) of the module housing to be hen, it again being necessary to take care that these are provided at far apart points, and thus an air flow between the Openings at least large parts of the surface of the power semiconductor element sweeps over.
- the cover instead of a printed circuit board, the cover itself may be formed so that the semiconductor device is formed Strömungska ⁇ nal to Lmonströmung between the openings between its surface and the surface a.
- the openings, in particular the opening 520 ⁇ ⁇ may be provided with a grid. In particular, all combinations of the proposed Embodiments of the present invention should be included.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05811182A EP1844497A1 (de) | 2004-11-19 | 2005-11-08 | Halbleiterschaltmodul |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200410056111 DE102004056111A1 (de) | 2004-11-19 | 2004-11-19 | Halbleiterschaltmodul |
DE102004056111.7 | 2004-11-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006053846A1 true WO2006053846A1 (de) | 2006-05-26 |
Family
ID=35695860
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2005/055821 WO2006053846A1 (de) | 2004-11-19 | 2005-11-08 | Halbleiterschaltmodul |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1844497A1 (de) |
DE (1) | DE102004056111A1 (de) |
WO (1) | WO2006053846A1 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2148367A1 (de) * | 2008-07-24 | 2010-01-27 | Semikron Elektronik GmbH & Co. KG Patentabteilung | Leistungshalbleitermodul |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102012216086B4 (de) * | 2012-09-11 | 2017-01-05 | Siemens Aktiengesellschaft | Leistungselektronikmodul |
DE102020112809A1 (de) | 2020-05-12 | 2021-11-18 | Lisa Dräxlmaier GmbH | Kühlanordnung |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07240487A (ja) | 1994-02-28 | 1995-09-12 | Toshiba Corp | 電気回路の冷却装置 |
US5856913A (en) * | 1996-04-29 | 1999-01-05 | Semikron Elektronik Gmbh | Multilayer semiconductor device having high packing density |
EP1035586A1 (de) | 1997-10-20 | 2000-09-13 | Hitachi, Ltd. | Halbleitesmodul und leistungswandler damit |
DE10205408A1 (de) | 2001-04-06 | 2002-10-17 | Siemens Ag Oesterreich | Halbleitermodul |
WO2003030247A2 (de) | 2001-09-28 | 2003-04-10 | Siemens Aktiengesellschaft | Verfahren zum kontaktieren elektrischer kontaktflächen eines substrats und vorrichtung aus einem substrat mit elektrischen kontaktflächen |
US20030205806A1 (en) * | 2002-05-01 | 2003-11-06 | The Boeing Company | Integrated power module with reduced thermal impedance |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE29610284U1 (de) * | 1996-06-12 | 1996-09-05 | Doepke Schaltgeräte GmbH & Co. KG, 26506 Norden | Reiheneinbaugerät mit Zwangsbelüftung |
US6650559B1 (en) * | 2000-10-31 | 2003-11-18 | Fuji Electric Co., Ltd. | Power converting device |
-
2004
- 2004-11-19 DE DE200410056111 patent/DE102004056111A1/de not_active Withdrawn
-
2005
- 2005-11-08 EP EP05811182A patent/EP1844497A1/de not_active Withdrawn
- 2005-11-08 WO PCT/EP2005/055821 patent/WO2006053846A1/de active Application Filing
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07240487A (ja) | 1994-02-28 | 1995-09-12 | Toshiba Corp | 電気回路の冷却装置 |
US5856913A (en) * | 1996-04-29 | 1999-01-05 | Semikron Elektronik Gmbh | Multilayer semiconductor device having high packing density |
EP1035586A1 (de) | 1997-10-20 | 2000-09-13 | Hitachi, Ltd. | Halbleitesmodul und leistungswandler damit |
DE10205408A1 (de) | 2001-04-06 | 2002-10-17 | Siemens Ag Oesterreich | Halbleitermodul |
WO2003030247A2 (de) | 2001-09-28 | 2003-04-10 | Siemens Aktiengesellschaft | Verfahren zum kontaktieren elektrischer kontaktflächen eines substrats und vorrichtung aus einem substrat mit elektrischen kontaktflächen |
US20030205806A1 (en) * | 2002-05-01 | 2003-11-06 | The Boeing Company | Integrated power module with reduced thermal impedance |
Non-Patent Citations (2)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 01 31 January 1996 (1996-01-31) * |
See also references of EP1844497A1 * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2148367A1 (de) * | 2008-07-24 | 2010-01-27 | Semikron Elektronik GmbH & Co. KG Patentabteilung | Leistungshalbleitermodul |
CN101651123A (zh) * | 2008-07-24 | 2010-02-17 | 赛米控电子股份有限公司 | 功率半导体模块 |
CN101651123B (zh) * | 2008-07-24 | 2013-11-13 | 赛米控电子股份有限公司 | 功率半导体模块 |
Also Published As
Publication number | Publication date |
---|---|
EP1844497A1 (de) | 2007-10-17 |
DE102004056111A1 (de) | 2006-06-01 |
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