WO2006045773A3 - Vorrichtung und verfahren zur modusumschaltung bei einem rechnersystem mit wenigstens zwei ausführungseinheiten - Google Patents
Vorrichtung und verfahren zur modusumschaltung bei einem rechnersystem mit wenigstens zwei ausführungseinheiten Download PDFInfo
- Publication number
- WO2006045773A3 WO2006045773A3 PCT/EP2005/055495 EP2005055495W WO2006045773A3 WO 2006045773 A3 WO2006045773 A3 WO 2006045773A3 EP 2005055495 W EP2005055495 W EP 2005055495W WO 2006045773 A3 WO2006045773 A3 WO 2006045773A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- execution units
- switching
- computer system
- modes
- mode
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1654—Error detection by comparing the output of redundant processing systems where the output of only one of the redundant processing components can drive the attached hardware, e.g. memory or I/O
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
- G06F2201/845—Systems in which the redundancy can be transformed in increased performance
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
Abstract
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
RU2007119317/09A RU2007119317A (ru) | 2004-10-25 | 2005-10-25 | Способ и устройство для переключения в вычислительной системе, включающей в себя по меньшей мере два исполнительных блока |
EP05803464A EP1807764A2 (de) | 2004-10-25 | 2005-10-25 | Vorrichtung und verfahren zur modusumschaltung bei einem rechnersystem mit wenigstens zwei ausführungseinheiten |
JP2007537288A JP2008518296A (ja) | 2004-10-25 | 2005-10-25 | 少なくとも2つの実行ユニットを備えるコンピュータシステムで切換をする方法及び装置 |
US11/666,409 US20070255875A1 (en) | 2004-10-25 | 2005-10-25 | Method and Device for Switching Over in a Computer System Having at Least Two Execution Units |
Applications Claiming Priority (12)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200410051950 DE102004051950A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren und Vorrichtung zur Taktumschaltung bei einem Mehrprozessorsystem |
DE200410051952 DE102004051952A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren zur Datenverteilung und Datenverteilungseinheit in einem Mehrprozessorsystem |
DE102004051937.4 | 2004-10-25 | ||
DE102004051950.1 | 2004-10-25 | ||
DE200410051992 DE102004051992A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren und Vorrichtung zur Verzögerung von Zugriffen auf Daten und/oder Befehle eines Mehrprozessorsystems |
DE102004051.952.8 | 2004-10-25 | ||
DE102004051964.1 | 2004-10-25 | ||
DE200410051937 DE102004051937A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren und Vorrichtung zur Synchronisierung in einem Mehrprozessorsystem |
DE102004051992.7 | 2004-10-25 | ||
DE200410051964 DE102004051964A1 (de) | 2004-10-25 | 2004-10-25 | Verfahren und Vorrichtung zur Überwachung einer Speichereinheit in einem Mehrprozessorsystem |
DE200510037229 DE102005037229A1 (de) | 2005-08-08 | 2005-08-08 | Verfahren und Vorrichtung zur Umschaltung bei einem Rechnersystem mit wenigstens zwei Ausführungseinheiten |
DE102005037229.5 | 2005-08-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2006045773A2 WO2006045773A2 (de) | 2006-05-04 |
WO2006045773A3 true WO2006045773A3 (de) | 2006-06-29 |
Family
ID=36046411
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2005/055495 WO2006045773A2 (de) | 2004-10-25 | 2005-10-25 | Vorrichtung und verfahren zur modusumschaltung bei einem rechnersystem mit wenigstens zwei ausführungseinheiten |
Country Status (6)
Country | Link |
---|---|
US (1) | US20070255875A1 (de) |
EP (1) | EP1807764A2 (de) |
JP (1) | JP2008518296A (de) |
KR (1) | KR20070083760A (de) |
RU (1) | RU2007119317A (de) |
WO (1) | WO2006045773A2 (de) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20070085278A (ko) * | 2004-10-25 | 2007-08-27 | 로베르트 보쉬 게엠베하 | 적어도 2개의 실행 유닛을 구비한 컴퓨터 시스템의 전환방법 및 그 전환 장치 |
DE102005037230A1 (de) * | 2005-08-08 | 2007-02-15 | Robert Bosch Gmbh | Verfahren und Vorrichtung zur Überwachung von Funktionen eines Rechnersystems |
DE102006048169A1 (de) * | 2006-10-10 | 2008-04-17 | Robert Bosch Gmbh | Verfahren zur Überwachung einer Funktionsfähigkeit einer Steuerung |
CN101580073B (zh) * | 2008-05-12 | 2012-01-25 | 卡斯柯信号有限公司 | 计算机联锁***码位级冗余方法 |
JP4709268B2 (ja) * | 2008-11-28 | 2011-06-22 | 日立オートモティブシステムズ株式会社 | 車両制御用マルチコアシステムまたは内燃機関の制御装置 |
US8375250B2 (en) * | 2009-03-04 | 2013-02-12 | Infineon Technologies Ag | System and method for testing a module |
DE102011086530A1 (de) * | 2010-11-19 | 2012-05-24 | Continental Teves Ag & Co. Ohg | Mikroprozessorsystem mit fehlertoleranter Architektur |
JP5796311B2 (ja) | 2011-03-15 | 2015-10-21 | オムロン株式会社 | 制御装置およびシステムプログラム |
DE102012201185A1 (de) | 2012-01-27 | 2013-08-01 | Siemens Aktiengesellschaft | Verfahren zum Betreiben mindestens zweier Datenverarbeitungseinheiten mit hoher Verfügbarkeit, insbesondere in einem Fahrzeug, und Vorrichtung zum Betreiben einer Maschine |
EP2866147B1 (de) | 2012-06-25 | 2016-08-31 | Fujitsu Limited | Informationsverarbeitungsvorrichtung und verfahren zur fehlerdetektion einer informationsverarbeitungsvorrichtung |
JP6693400B2 (ja) * | 2016-12-06 | 2020-05-13 | 株式会社デンソー | 車両用制御システム |
US10635831B1 (en) * | 2018-01-06 | 2020-04-28 | Ralph Crittenden Moore | Method to achieve better security using a memory protection unit |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3864670A (en) * | 1970-09-30 | 1975-02-04 | Yokogawa Electric Works Ltd | Dual computer system with signal exchange system |
US20020073357A1 (en) * | 2000-12-11 | 2002-06-13 | International Business Machines Corporation | Multiprocessor with pair-wise high reliability mode, and method therefore |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4049957A (en) * | 1971-06-23 | 1977-09-20 | Hitachi, Ltd. | Dual computer system |
US4029952A (en) * | 1973-11-06 | 1977-06-14 | Westinghouse Electric Corporation | Electric power plant having a multiple computer system for redundant control of turbine and steam generator operation |
US5428769A (en) * | 1992-03-31 | 1995-06-27 | The Dow Chemical Company | Process control interface system having triply redundant remote field units |
US5544077A (en) * | 1994-01-19 | 1996-08-06 | International Business Machines Corporation | High availability data processing system and method using finite state machines |
US5537583A (en) * | 1994-10-11 | 1996-07-16 | The Boeing Company | Method and apparatus for a fault tolerant clock with dynamic reconfiguration |
WO1999030528A2 (en) * | 1997-12-11 | 1999-06-17 | Telefonaktiebolaget Lm Ericsson | Redundancy termination for dynamic fault isolation |
DE19815263C2 (de) * | 1998-04-04 | 2002-03-28 | Astrium Gmbh | Vorrichtung zur fehlertoleranten Ausführung von Programmen |
US6550017B1 (en) * | 1999-06-29 | 2003-04-15 | Sun Microsystems, Inc. | System and method of monitoring a distributed fault tolerant computer system |
US6615366B1 (en) * | 1999-12-21 | 2003-09-02 | Intel Corporation | Microprocessor with dual execution core operable in high reliability mode |
US6550018B1 (en) * | 2000-02-18 | 2003-04-15 | The University Of Akron | Hybrid multiple redundant computer system |
-
2005
- 2005-10-25 KR KR1020077009145A patent/KR20070083760A/ko not_active Application Discontinuation
- 2005-10-25 RU RU2007119317/09A patent/RU2007119317A/ru not_active Application Discontinuation
- 2005-10-25 WO PCT/EP2005/055495 patent/WO2006045773A2/de active Application Filing
- 2005-10-25 US US11/666,409 patent/US20070255875A1/en not_active Abandoned
- 2005-10-25 JP JP2007537288A patent/JP2008518296A/ja active Pending
- 2005-10-25 EP EP05803464A patent/EP1807764A2/de not_active Ceased
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3864670A (en) * | 1970-09-30 | 1975-02-04 | Yokogawa Electric Works Ltd | Dual computer system with signal exchange system |
US20020073357A1 (en) * | 2000-12-11 | 2002-06-13 | International Business Machines Corporation | Multiprocessor with pair-wise high reliability mode, and method therefore |
Non-Patent Citations (2)
Title |
---|
MOU HU ET AL: "FAULT-TOLERANT SYSTEM USING 3-VALUE LOGIC CIRCUITS", IEEE TRANSACTIONS ON RELIABILITY, IEEE SERVICE CENTER, PISCATAWAY, NJ, US, vol. 36, no. 2, 1 June 1987 (1987-06-01), pages 227 - 231, XP000008987, ISSN: 0018-9529 * |
See also references of EP1807764A2 * |
Also Published As
Publication number | Publication date |
---|---|
WO2006045773A2 (de) | 2006-05-04 |
JP2008518296A (ja) | 2008-05-29 |
EP1807764A2 (de) | 2007-07-18 |
KR20070083760A (ko) | 2007-08-24 |
US20070255875A1 (en) | 2007-11-01 |
RU2007119317A (ru) | 2008-12-10 |
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