WO2006035869A1 - データ通信システム、データ再生装置及びデータ再生方法 - Google Patents
データ通信システム、データ再生装置及びデータ再生方法 Download PDFInfo
- Publication number
- WO2006035869A1 WO2006035869A1 PCT/JP2005/017942 JP2005017942W WO2006035869A1 WO 2006035869 A1 WO2006035869 A1 WO 2006035869A1 JP 2005017942 W JP2005017942 W JP 2005017942W WO 2006035869 A1 WO2006035869 A1 WO 2006035869A1
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- WO
- WIPO (PCT)
- Prior art keywords
- data
- audio signal
- oscillation frequency
- unit
- amount
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 24
- 238000004891 communication Methods 0.000 title claims abstract description 23
- 230000010355 oscillation Effects 0.000 claims abstract description 35
- 238000012544 monitoring process Methods 0.000 claims abstract description 29
- 230000005540 biological transmission Effects 0.000 claims description 28
- 230000007423 decrease Effects 0.000 claims description 7
- 230000005236 sound signal Effects 0.000 abstract description 142
- 230000000007 visual effect Effects 0.000 abstract description 8
- 238000010586 diagram Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 4
- 230000001360 synchronised effect Effects 0.000 description 4
- 238000012545 processing Methods 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/54—Systems for transmission via power distribution lines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
- H04J3/0632—Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L13/00—Details of the apparatus or circuits covered by groups H04L15/00 or H04L17/00
- H04L13/02—Details not particular to receiver or transmitter
- H04L13/08—Intermediate storage means
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2203/00—Indexing scheme relating to line transmission systems
- H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
- H04B2203/5429—Applications for powerline communications
- H04B2203/545—Audio/video application, e.g. interphone
Definitions
- the present invention relates to a data communication system, a data reproducing apparatus, and a data reproducing method for transmitting / receiving continuous data such as an audio signal and a visual signal.
- Patent Document 1 Conventionally, a technique described in Patent Document 1 is known as a technique for preventing a data delay caused by a network path difference when performing data communication.
- This technology is used for transmission of visual signals, etc., in a communication environment where clock synchronization between transmission / reception devices such as packet switching and ATM (Asynchronous Transfer Mode) networks with many data delay fluctuations is not established. It relates to a method for preventing data delay.
- Patent Document 1 uses a power line to synchronize each device by receiving the clock supplied from the transmitting device via the transmission path at the receiving device. For this reason, there is a problem that it cannot be used in power line communication for transmitting and receiving data.
- Patent Document 1 Japanese Patent Laid-Open No. 2002-368726
- the present invention has been made in view of the above circumstances, and an object of the present invention is to provide an apparatus for transmitting and receiving continuously reproduced data such as audio signals and visual signals using a power line. It is an object of the present invention to provide a data communication system, a data reproducing apparatus, and a data reproducing method for synchronizing the above and compensating for a data delay.
- the invention according to claim 1 is a data communication system in which data transmitted from a data transmission device via a power line is received by the data reproduction device, wherein the data transmission device transmits to the data reproduction device.
- a data output unit for outputting an analog signal to be A reference oscillator that outputs an electrical signal having an oscillation frequency, an AZD converter that converts an analog signal output from the data output unit into a digital signal based on the electrical signal output from the reference oscillator, and the AZD converter
- a data receiving unit that has a data transmission unit that transmits data converted into a digital signal to the data reproduction device via a power line, and in which the data reproduction device receives data transmitted from the data transmission device
- the oscillation frequency is increased and the data amount is within the predetermined threshold range.
- a data communication comprising: a DZA converter that reads out data stored in the data buffer and converts a digital signal power into an analog signal; and a data reproduction unit that reproduces data output from the DZA converter.
- the invention according to claim 2 is a data reproduction device that receives data transmitted from a data transmission device via a power line, and receives data transmitted from the data transmission device.
- a data receiving unit a data buffer for temporarily storing data received by the data receiving unit, a data amount monitoring unit for monitoring a data amount of data stored in the data buffer, and the data amount monitoring
- the oscillation frequency is increased.
- the predetermined oscillation frequency is maintained, and the predetermined threshold range is maintained.
- a data reproducing apparatus comprising: a DZA converter that reads out data that has been read and converts the digital signal into an analog signal; and a data reproducing unit that reproduces data output from the DZA converter.
- the invention according to claim 3 is a data transmitted from the data transmission apparatus via the power line.
- a data reproduction method for receiving and reproducing data by a data reproduction device comprising: a data reception unit; a first step of receiving data transmitted from the data transmission device; and a data notifier comprising the first step A second step for temporarily storing the data received in the step, a third step for the data amount monitoring unit to monitor the amount of data stored in the data buffer in the second step, and a voltage controlled oscillator
- the oscillation frequency is increased, and when the data amount is within the predetermined threshold range.
- the data received by the data reproducing device is temporarily stored in the data buffer, and the data amount of the data stored in the data buffer is monitored by the data amount monitoring unit.
- the data buffer also increases the amount of data to be read
- the data buffer power also decreases the amount of data to be read.
- the data reproduction devices can be synchronized.
- FIG. 1 is a block diagram showing a configuration of an audio signal reproduction device 3 according to the present embodiment.
- FIG. 2 is a diagram showing a configuration of a data communication system 10 according to the present embodiment.
- FIG. 3 is a block diagram showing a configuration of an audio signal transmission device 2 according to the present embodiment.
- FIG. 4 is a flow chart showing a processing flow of the data communication system 10 according to the embodiment of the present invention.
- FIG. 2 is a diagram showing a configuration of the data communication system 10 according to the embodiment of the present invention.
- the data communication system 10 includes one audio signal transmission device 2 and two audio reproduction devices 3a and 3b.
- the audio signal transmitting device 2 and the audio signal reproducing devices 3a and 3b are each connected to the power line 1.
- the power line 1 supplies power for driving the audio signal transmitting device 2 and the audio signal reproducing devices 3a and 3b.
- data can be transmitted and received between the audio signal transmission device 2 and the audio signal reproduction devices 3a and 3b via the power line 1.
- the audio signal transmitting device 2 transmits left audio and right audio signals of stereo sound to the audio signal reproducing devices 3a and 3b, respectively, and the audio signal reproducing device 3a.
- the left audio of stereo audio is played back and the right audio of stereo audio is played back by the audio signal playback device 3b.
- the force described in the case where a total of two audio signal reproduction apparatuses 3 (3a, 3b) are connected to the power line 1 is not limited to this.
- FIG. 3 is a block diagram showing the configuration of the audio signal transmitting apparatus 2 according to the present embodiment.
- the audio signal transmission device 2 includes an audio signal output unit 21, an AZD converter 22, a reference oscillator 23, and an audio signal transmission unit 24.
- the audio signal output unit 21 outputs an audio signal such as classical music that is continuously played back to the AZD converter 22.
- the reference oscillator 23 oscillates at a predetermined frequency to output an electric signal having a predetermined period to the AZD converter 22.
- the AZD converter 22 converts the audio signal output from the audio signal output unit 21 from an analog signal to a digital signal based on an electric signal having a predetermined frequency output from the reference oscillator 23.
- the audio signal converted into the digital signal in the AZD converter 22 is output to the audio signal transmission unit 24.
- the audio signal transmission unit 24 transmits the audio signal output from the AZD converter 22 to the audio signal reproduction devices 3a and 3b (FIG. 2) via the power line 1.
- FIG. 1 is a block diagram showing the configuration of the audio signal reproduction device 3 according to the present embodiment.
- the audio signal reproducing device 3 includes an audio signal receiving unit 31, a data buffer 32, a data amount monitoring unit 33, a voltage controlled oscillator 34, a DZA converter 35, and an audio signal reproducing unit 36.
- the audio signal receiving unit 31 receives the audio signal transmitted from the audio signal transmitting unit 24 (FIG. 3) of the audio signal transmitting device 2 via the power line 1.
- the audio signal receiving unit of the audio signal reproduction device 3a receives the left audio signal of the stereo sound and receives the audio signal of the audio signal reproduction device 3b (FIG. 2).
- the receiving unit receives an audio signal of right audio of stereo audio.
- the audio signal receiving unit 31 outputs the received audio signal to the data buffer 32.
- the data buffer 32 temporarily stores the audio signal output from the audio signal receiving unit 31.
- the data stored in the data buffer 32 is output to the DZA converter 35 under the control of a voltage control oscillator 34 described later.
- the data stored in the data buffer 32 overflows, the data stored first in the data buffer 32 is deleted, and data newly input from the audio signal receiving unit 31 is stored. Is done. When the data stored in the data buffer 32 becomes empty, the data stored last in the data buffer 32 is repeatedly output.
- the data amount monitoring unit 33 monitors the data amount of the audio signal stored in the data buffer 32 and supplies a voltage corresponding to the data amount stored in the data buffer 32 to the voltage controlled oscillator 34. Output.
- the voltage-controlled oscillator 34 of the audio signal reproduction device 3 stores a threshold value k in a predetermined range.
- the output is performed by increasing the voltage applied to the voltage controlled oscillator 34.
- Increase the amount of data By controlling in this way, it is possible to prevent the audio signal accumulated in the data buffer 32 from overflowing and the audio signal from being lost.
- the voltage applied to the voltage controlled oscillator 34 is set to a predetermined value. By maintaining this value, the output oscillation frequency is kept constant, and the data volume of the audio signal output from the data buffer 32 to the DZA converter 35 is kept constant.
- the voltage applied to the voltage controlled oscillator 34 is decreased. The output frequency of the audio signal output from the data buffer 32 to the DZ A converter 35 is reduced by reducing the output oscillation frequency.
- the DZ A converter 35 converts the audio signal output from the data buffer 32 into an analog signal based on an electrical signal having a predetermined oscillation frequency output from the voltage controlled oscillator 34.
- the audio signal converted into the analog signal in the DZA converter 35 is output to the audio signal reproducing unit 36.
- the audio signal reproduction unit 36 reproduces the audio signal input from the DZA converter 35 with a speaker.
- the audio signal reproduction unit of the audio signal reproduction device 3a (Fig. 2) reproduces the left audio signal of the stereo sound
- the audio signal reproduction unit of the audio signal reproduction device 3b (Fig. 2) Play the right audio signal of stereo sound.
- the audio signal reproduction device 3 (3a, 3b) is compensated for the data delay. Since the data buffer 32 to be compensated is provided, it is possible to reproduce sound and the like while being synchronized between the audio signal reproducing apparatuses 3a and 3b.
- FIG. 4 is a flowchart showing processing of the audio signal reproduction method in the audio signal reproduction device 3 of the present embodiment.
- the audio signal receiving unit 31 receives an audio signal packet transmitted from the audio signal transmitting unit 24 (FIG. 3) via the power line 1 (step S01).
- step S01 the audio signal packet received by the audio signal receiving unit 31 in step S01 is temporarily stored in the data buffer 32 (step S02).
- the data amount of the audio signal accumulated in the data buffer 32 is monitored by the data amount monitoring unit 33, and the data amount accumulated in the data buffer 32 is “larger” than the threshold value k in a predetermined range. , “Small” or “equal” is determined (step S03).
- step S03 If the amount of data stored in the data buffer 32 is larger than the threshold k in the predetermined range, it is determined “large” in step S03, and the process proceeds to step S04.
- step S04 the voltage applied to the voltage controlled oscillator 34 is increased so that the oscillation frequency output from the voltage controlled oscillator 34 is controlled to increase (step S04).
- the audio signal input to the DZ A converter 35 is also converted into an analog signal by the digital signal power and reproduced by the speaker of the audio signal reproducing unit 36.
- step S05 it is determined whether or not the audio signal reproducing device 3 has received all the audio signals. If the audio signal reproducing device 3 has not yet received all the audio signals, it is determined “NO” in step S05, and the process proceeds to step SO1 again. Thereafter, the process proceeds to step S03 via the process of step S02 as described above. If the amount of data stored in the data buffer 32 is within the threshold value k within a predetermined range, it is determined as “equal” in step S03, and the process proceeds to step S06.
- step S06 by applying a predetermined voltage to the voltage controlled oscillator 34, the oscillation frequency output from the voltage controlled oscillator 34 is controlled to be maintained at a predetermined value.
- the data amount of the audio signal read from the data buffer 32 can be kept constant.
- the audio signal input to the DZ A converter 35 is also converted into an analog signal by the digital signal power and reproduced by the speaker of the audio signal reproducing unit 36.
- step S05 it is determined whether or not the audio signal reproduction device 3 has received all the audio signals. If the audio signal reproducing device 3 has not yet received all the audio signals, it is determined “NO” in step S05, and the process proceeds to step SO1 again. Thereafter, the process proceeds to step S03 via the process of step S02 as described above.
- step S03 If the amount of data stored in the data buffer 32 is smaller than the threshold k in the predetermined range, it is determined as “small” in step S03, and the process proceeds to step S07.
- step S07 the voltage applied to the voltage controlled oscillator 34 is reduced to control the oscillation frequency force S output from the voltage controlled oscillator 34 to be reduced.
- the audio signal input to the DZ A converter 35 is also converted into an analog signal by the digital signal power and reproduced by the speaker of the audio signal reproducing unit 36.
- step S05 it is determined whether or not the audio signal reproduction device 3 has received all the audio signals. If the audio signal reproduction device 3 has received all the audio signals, “YES” is determined in step S05, and the process according to the flowchart shown in FIG. 4 is terminated.
- the audio signal can be phase-synchronized between the data reproducing devices 3a and 3b, it is possible to reproduce an acoustic signal with good sound quality.
- the data amount stored in the data notifier 32 is controlled so as to be constant, it is possible to prevent skipping of sound.
- the audio signal can be reproduced at a constant speed and phase related to the timing and packet length accompanying the sign of the audio signal.
- the force described in the case where audio signals are transmitted / received via the power line 1 is not limited to this.
- the data communication system 10 by transmitting and receiving visual data using the data communication system 10 according to the present embodiment, video and the like recorded in the visual data can be reproduced without interruption as in the case of the audio signal described above. It is also possible to do.
- the data amount monitoring unit 33, the voltage reference oscillator 34, the DZA comparator 35, and the audio signal reproduction unit 36 may be realized by dedicated hardware.
- the reference oscillator 34, DZA converter 35, and audio signal playback unit 36 are composed of a memory and CPU (central processing unit), and these functions are realized by loading the program to the memory and executing it. It may be a thing to let you.
- a program for realizing the functions of the reference oscillator 34, the DZA converter 35, and the audio signal reproduction unit 36 is recorded on a computer-readable recording medium, and the program recorded on the recording medium is read into a computer system and executed. By doing this, you can compensate for delays in audio signals and visual data.
- the “computer system” here includes the OS and hardware such as peripheral devices.
- the "computer system” includes a home page providing environment (or a display environment) if the WWW system is used! /.
- the “computer-readable recording medium” refers to a storage device such as a flexible disk, a magneto-optical disk, a portable medium such as a ROM and a CD-ROM, and a hard disk incorporated in a computer system. Furthermore, a “computer-readable recording medium” is a program that dynamically holds a program for a short time, like a communication line when transmitting a program via a network such as the Internet or a communication line such as a telephone line. And those that hold programs for a certain period of time, such as volatile memory inside computer systems that serve as servers and clients in that case. The program may be for realizing a part of the functions described above, or may be a program capable of realizing the functions described above in combination with a program already recorded in the computer system. .
- the data delay compensation system according to the present invention can be used for home appliances or the like that communicate data that is continuously reproduced, such as audio signals and visual data, via a power line.
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- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Power Engineering (AREA)
- Multimedia (AREA)
- Computer Hardware Design (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/576,087 US20080084936A1 (en) | 2004-09-29 | 2005-09-29 | Data Communication System, Data Reproducing Device, and Method of Reproducing Data |
EP05788407A EP1796306A1 (en) | 2004-09-29 | 2005-09-29 | Data communication system, data reproducing apparatus and data reproducing method |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004-284025 | 2004-09-29 | ||
JP2004284025A JP2006101119A (ja) | 2004-09-29 | 2004-09-29 | データ通信システム、データ再生装置及びデータ再生方法 |
Publications (1)
Publication Number | Publication Date |
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WO2006035869A1 true WO2006035869A1 (ja) | 2006-04-06 |
Family
ID=36119014
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/017942 WO2006035869A1 (ja) | 2004-09-29 | 2005-09-29 | データ通信システム、データ再生装置及びデータ再生方法 |
Country Status (6)
Country | Link |
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US (1) | US20080084936A1 (ja) |
EP (1) | EP1796306A1 (ja) |
JP (1) | JP2006101119A (ja) |
KR (1) | KR20070099523A (ja) |
CN (1) | CN101053196A (ja) |
WO (1) | WO2006035869A1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2006101496A (ja) * | 2004-09-02 | 2006-04-13 | Mitsubishi Materials Corp | オーディオ・ビジュアルデータ通信システム、オーディオ・ビジュアルデータ送信装置及びオーディオ・ビジュアルデータ再生装置 |
JP5475047B2 (ja) * | 2012-04-17 | 2014-04-16 | 株式会社半導体理工学研究センター | Ad変換回路 |
US20200059504A1 (en) | 2018-08-19 | 2020-02-20 | Pixart Imaging Inc. | Schemes capable of synchronizing native clocks and audio codec clocks of audio playing for bluetooth wireless devices |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07264107A (ja) * | 1994-03-24 | 1995-10-13 | Csk Corp | 電力線通信モデム |
JP2002152184A (ja) * | 2000-11-14 | 2002-05-24 | Nec Commun Syst Ltd | サーキットエミュレーションクロック再生装置及びその方法 |
JP2002165148A (ja) * | 2000-11-29 | 2002-06-07 | Sony Corp | データ処理装置および方法、並びに記録媒体 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050015805A1 (en) * | 2003-07-17 | 2005-01-20 | Sony Corporation | Power line home network |
-
2004
- 2004-09-29 JP JP2004284025A patent/JP2006101119A/ja not_active Withdrawn
-
2005
- 2005-09-29 EP EP05788407A patent/EP1796306A1/en not_active Withdrawn
- 2005-09-29 US US11/576,087 patent/US20080084936A1/en not_active Abandoned
- 2005-09-29 WO PCT/JP2005/017942 patent/WO2006035869A1/ja active Application Filing
- 2005-09-29 CN CNA2005800324599A patent/CN101053196A/zh active Pending
- 2005-09-29 KR KR1020077007772A patent/KR20070099523A/ko not_active Application Discontinuation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07264107A (ja) * | 1994-03-24 | 1995-10-13 | Csk Corp | 電力線通信モデム |
JP2002152184A (ja) * | 2000-11-14 | 2002-05-24 | Nec Commun Syst Ltd | サーキットエミュレーションクロック再生装置及びその方法 |
JP2002165148A (ja) * | 2000-11-29 | 2002-06-07 | Sony Corp | データ処理装置および方法、並びに記録媒体 |
Also Published As
Publication number | Publication date |
---|---|
US20080084936A1 (en) | 2008-04-10 |
EP1796306A1 (en) | 2007-06-13 |
JP2006101119A (ja) | 2006-04-13 |
CN101053196A (zh) | 2007-10-10 |
KR20070099523A (ko) | 2007-10-09 |
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