WO2006022017A1 - 論理回路 - Google Patents
論理回路 Download PDFInfo
- Publication number
- WO2006022017A1 WO2006022017A1 PCT/JP2004/012370 JP2004012370W WO2006022017A1 WO 2006022017 A1 WO2006022017 A1 WO 2006022017A1 JP 2004012370 W JP2004012370 W JP 2004012370W WO 2006022017 A1 WO2006022017 A1 WO 2006022017A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- electrode layer
- terminal
- voltage
- switching element
- predetermined
- Prior art date
Links
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- 239000010409 thin film Substances 0.000 claims description 13
- 229910052782 aluminium Inorganic materials 0.000 claims description 9
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 9
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- WFVBQIFDYSMSCI-UHFFFAOYSA-N cyanic acid 1H-imidazol-2-amine Chemical compound OC#N.OC#N.NC1=NC=CN1 WFVBQIFDYSMSCI-UHFFFAOYSA-N 0.000 claims description 3
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- WEVYAHXRMPXWCK-UHFFFAOYSA-N Acetonitrile Chemical compound CC#N WEVYAHXRMPXWCK-UHFFFAOYSA-N 0.000 description 3
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/313—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of semiconductor devices with two electrodes, one or two potential barriers, and exhibiting a negative resistance characteristic
Definitions
- the present invention relates to a logic circuit using a two-terminal switching element having two stable resistance values with respect to an applied voltage.
- organic EL displays and organic LED displays emit light from each pixel individually (that is, emit light by themselves), which has the advantage of having a wide viewing angle and eliminating the need for a color filter, and no backlight. It has many advantages over conventional liquid crystals, such as the advantage that it can be made thinner and the advantage that it can be formed on a flexible substrate such as plastic.
- RFID Radio Frequency IDentification
- data is recorded or read from a card-like or tag-like medium using radio waves, and the data is recognized by communication via an antenna. That is, data is exchanged wirelessly between a small medium such as a tag and a device called a reader.
- This RFID has the convenience that there is no need to bring the tag and reader into contact with each other within the communication range, so its use is expanding, but the current tag unit price is several tens of yen or more. For this reason, there was a problem that it was too expensive to attach to a small product.
- CMOS circuit including a transistor made of an organic electronic material has been proposed. This is conveniently used as a so-called “combination logic circuit” It is possible (see, for example, Patent Document 1-14).
- the organic electronic material is formed as a thin film on a substrate.
- This thin film made of an organic electronic material is formed to have a film thickness in the range of several tens of tens of lOOnm by means such as vacuum deposition or solution coating (spin coating method, ink jet method).
- the material for the substrate glass, silicon, and plastic are often used.
- metal electrodes, electrodes made of oxides such as IT ⁇ using vacuum deposition, solution coating (spin coating method, ink jet method), sputtering, CVD, PVD, etc.
- An insulating film or the like is formed.
- the merit of using an organic material as an electronic material in particular is that a flexible electrical device is manufactured using a plastic substrate due to a low manufacturing cost and a low process temperature. It becomes possible.
- Patent Document 1 JP-A-9-199732
- Patent Document 2 Japanese Patent Laid-Open No. 2001-177109
- Patent Document 3 Japanese Patent Laid-Open No. 2001-203364
- Patent Document 4 Japanese Patent Laid-Open No. 2002-324931
- an object of the present invention is to provide a simple flip-flop circuit (bistable circuit) necessary for a “sequential logic circuit” when a logic circuit is composed of organic electronic materials. It is to be realized by the configuration.
- the logic circuit according to the present invention has two stable resistance values for one applied voltage value, and applies a voltage equal to or lower than a predetermined first threshold voltage.
- the resistance value becomes a first state having a high resistance value, and a voltage equal to or higher than a predetermined second threshold voltage higher than the first threshold voltage is applied, the resistance value is changed.
- Enter the second pulse A second pulse input terminal configured to selectively cause the switching element to cause the first and second states by a combination of the first and second pulse inputs. is doing.
- the switching element includes a lower electrode layer and an upper electrode layer made of a thin film, and an organic bistable layer having a thin film force interposed between the lower electrode layer and the upper electrode layer. It is composed by.
- aluminum can be used as the material for the lower electrode layer and the upper electrode layer
- aminoimidazole dicynate can be used as the material for the organic bistable layer.
- the lower electrode layer and the upper electrode layer are formed so as to have a stripe shape and their longitudinal axes are orthogonal to each other, and the organic bistable layer includes the lower electrode layer It is formed so as to cover the intersection of the layer and the upper electrode layer.
- the logic circuit according to the present invention has two stable resistance values for one applied voltage value, and when a voltage equal to or lower than a predetermined first threshold voltage is applied, A first state having a high resistance value, and when a voltage equal to or higher than a predetermined second threshold voltage greater than the first threshold voltage is applied, the first resistance value has a lower resistance value among the respective resistance values.
- a first two-terminal switching element in a state of 2 and the first two-terminal switching element A second two-terminal switching element having the same electrical characteristics as the child and connected in series in a direction in which the polarity is uniform with respect to the first two-terminal switching element; and the first and second switching elements A terminal for applying a predetermined bias voltage to both ends of the series circuit, and a first pulse input terminal for inputting a first pulse of the predetermined voltage to one end of the series circuit of the first and second switching elements.
- a second pulse input terminal for inputting a second pulse of a predetermined voltage to a connection point of the first and second switching elements, and a series circuit of the first and second switching elements. Insert a third pulse of the specified voltage at the end.
- a third pulse input terminal that is connected to the first and second switching elements by a combination of the first, second, and third pulse inputs. Are selectively erected.
- the logic circuit according to the present invention has two stable resistance values with respect to one applied voltage value, and when a voltage equal to or lower than a predetermined first threshold voltage is applied, Among these resistance values, the first state having a high resistance value and a voltage equal to or higher than a predetermined second threshold voltage greater than the first threshold voltage have a low resistance value.
- the first two-terminal switching element in the second state has the same electrical characteristics as the first two-terminal switching element, and the polarity is aligned with respect to the first two-terminal switching element.
- a second two-terminal switching element connected in series, a terminal for applying a predetermined bias voltage across the series circuit of the first and second switching elements, and a series of the first and second switching elements Input a first pulse of a given voltage across the circuit And a second pulse input terminal for inputting a second node of a predetermined voltage to a connection point of the first and second switching elements.
- the first and second states are selectively generated in the first and second switching elements by a combination of the first and second pulse inputs.
- the first and second switching elements comprise a lower electrode layer and an upper electrode layer made of a thin film, and a thin film interposed between the lower electrode layer and the upper electrode layer. And an organic bistable layer.
- aluminum is used as the material of the lower electrode layer
- gold is used as the material of the upper electrode layer
- biskinomethane is used as the material of the organic bistable layer. You can power to use.
- the lower electrode layer and the upper electrode layer are formed so as to have a stripe shape and their longitudinal axes are orthogonal to each other, and the organic bistable layer includes the lower electrode layer It is formed so as to cover the intersection of the layer and the upper electrode layer.
- the flip-flop circuit (bistable circuit) necessary for the sequential logic circuit can be realized with a simple configuration.
- the two-terminal switching element applied to the present invention is not limited to one using an organic electronic material. That is, a two-terminal switching element formed of an inorganic electronic material can be used as long as it has the above-described electrical characteristics.
- FIG. 1 is a circuit diagram showing a first embodiment of a logic circuit according to the present invention.
- FIG. 2 is a graph illustrating the electrical characteristics and operating points of the two-terminal switching element used in the logic circuit of FIG.
- FIG. 3 is a circuit diagram showing a second embodiment of the logic circuit according to the present invention.
- FIG. 4 is a graph illustrating the electrical characteristics and operating points of the two-terminal switching element used in the logic circuit of FIG.
- FIG. 5 (a) shows an example of a pulse input circuit
- FIG. 5 (b) shows an example of a pulse waveform formed by this input circuit.
- FIG. 6 is a cross-sectional view conceptually showing the structure of a two-terminal switching element according to Examples 1, 2, and 3.
- FIG. 7 is a plan view showing a configuration of a logic circuit according to the first and second embodiments.
- FIG. 8 is a plan view illustrating a configuration of a logic circuit according to the third embodiment.
- FIG. 9 is a graph showing characteristics of a two-terminal switching element in the logic circuit according to the first embodiment.
- FIG. 10 is a graph showing characteristics of a two-terminal switching element in the logic circuits according to Examples 2 and 3.
- FIG. 1 shows an embodiment of a logic circuit according to the present invention having the simplest configuration.
- This logic circuit has a configuration in which a resistor 2 is connected in series to a two-terminal switching element 1.
- the two-terminal switching element 1 has electrical characteristics (current-voltage characteristics) as illustrated in FIG. In other words, it has electrical characteristics indicating two stable resistance values with respect to one applied voltage value, and when a voltage equal to or lower than the threshold voltage Vthl is applied, a high resistance state (current voltage as illustrated by reference numeral 11). When a voltage equal to or higher than the threshold voltage Vth2 is applied, a low resistance state (state showing current-voltage characteristics as illustrated by reference numeral 12) is obtained.
- Reference numeral 13 exemplifies the electrical characteristics of the resistor 2.
- the Q pin voltage will change as shown in Table 1.
- the pulses input to the R and S terminals can be of the same height as long as they satisfy the respective conditions.
- flip-flop circuits are classified according to their functions into RS (Reset / set) flip-flop circuits, JK flip-flop circuits, T (Trigger) flip-flop circuits, and D (Delay) flip-flop circuits.
- flip-flop circuits can be configured using other types of elements in combination based on RS flip-flop circuits (see the above document).
- FIG. 3 shows another embodiment of the logic circuit according to the present invention.
- the logic circuit shown in FIG. 3 has a configuration in which two-terminal switching elements 1A and IB having the electrical characteristics shown in FIG. 2 are connected in series.
- a DC bias voltage of Vt (Vthl + Vth2) is applied to both ends of this logic circuit, and the S terminal for pulse input and the 2-terminal switching element at one end of the 2-terminal switching element 1A (application point of the bias voltage Vt)
- Table 3 shows the logic when a positive pulse of sufficient voltage is selectively input to the R terminal for panelless input at the series connection point of 1A and IB and the T terminal for pulse input at the ground point.
- switching The states 0 and 1 of the elements 1A and IB represent the high resistance state and the low resistance state of these elements.
- this logic circuit operates logically as shown in Table 4.
- Table 4 is consistent with the operation in Table 1. This indicates that the logic circuit of FIG. 3 also has a function as an RS flip-flop circuit.
- a metal vapor deposition film such as aluminum can be used.
- the wiring can also be applied by applying or printing a carbon-based conductive material.
- polyimide As a substrate for forming the switching elements 1, 1A, IB according to the present invention, as a flexible substrate, polyimide, polyetherimide, polysulfone, polyethersulfone, polyphenylene sulfide, rose series Polymer plastic films such as aramid, polyether ketone, polyester, polycarbonate, polyimide, polyether sulfone, amorphous polyolefin, epoxy resin or fluororesin can be used.
- polyesters such as polyethylene terephthalate are particularly preferred because polyester or polycarbonate is preferred in terms of strength.
- the thickness of the substrate is preferably 0.05 mm to 2 mm, more preferably 0.1 mm to lmm.
- a non-glass substrate or a silicon substrate can be used as the flexible substrate.
- the organic thin film constituting the two-terminal switching elements 1, 1A, IB it is possible to use a coating method in addition to vacuum deposition.
- the coating method include spin coating and blade coating, screen printing, casting and dipping.
- the coating solution used in the coating method can be prepared by dissolving or dispersing an organic material in an appropriate solvent. Depending on the type of organic material, Is preferable because many organic materials can be dissolved. In addition, acetonitrile, benzene, butanol, cyclohexane, dichloroethane, ethanol, ethyl acetate and the like can be used, but are not limited thereto.
- the range of the bias voltage Vt will be described.
- Vth 1 ⁇ Von + Voff Vt ⁇ Vth2
- the value of the bias voltage Vt can be appropriately selected within the above range. In general, it is desirable to set the value as small as possible. This is because the smaller the value of the bias voltage Vt, the smaller the current flowing in the logic circuit and the lower the power consumption.
- a two-terminal switching element having a configuration as shown in Fig. 6 was prepared by the following procedure.
- the switching element is configured by sequentially forming a lower electrode layer 41 made of a thin film, an organic bistable layer 42 and an upper electrode layer 43 on a substrate 40 made of glass.
- the lower electrode layer 41 is formed by depositing aluminum on the surface of the substrate 40
- the organic bistable layer 42 is formed by depositing an aminoimidazole dicyanate represented by the following chemical formula on the lower electrode layer 41
- the upper electrode layer 43 was formed by depositing aluminum on the organic bistable layer 42, respectively.
- the lower electrode layer 41, the organic bistable layer 42, and the upper electrode layer 43 were formed to have thicknesses of about lOOnm, 80nm, and lOOnm, respectively.
- the vacuum degree of the vapor deposition system was set to about 3 X 10_6 toir by exhausting the diffusion pump.
- the lower electrode layer 41 and the upper electrode layer 43 are formed so as to form a stripe shape having a width of about 0.5 mm and their longitudinal axes are orthogonal to each other, and the organic bistable layer 42 is formed.
- the bias application electrode 44 and the pulse input S terminal 45 are connected to the upper electrode layer 43, and the pulse input R terminal 46, the resistance terminal 47, and the output Q terminal 48 are connected to the lower electrode layer 41. did.
- a resistor (not shown) (corresponding to resistor 2 in FIG. 1) is connected to the resistor terminal 47. The value of this resistor is set to 0.8 ⁇ , for example, and the other end is grounded.
- the logic circuit of Example 1 was obtained as described above. The equivalent circuit of this logic circuit is shown in Fig. 1.
- the logic circuit according to Example 2 uses the bisquinomethane compound represented by the following chemical formula as the material of the organic bistable layer 42 and the gold as the material of the upper electrode layer 43. Except for this, the logic circuit is the same as that of the first embodiment. [Chemical 2]
- the logic circuit according to the third embodiment includes two two-terminal switching elements.
- Each of the two-terminal switching elements is composed of aluminum as the material of the lower electrode layers 41 and 411, the biskinomethane-based compound as the material of the organic bistable layers 42 and 421, and the upper electrode layer 43, Gold is used for each of the 431 materials.
- the two electrode terminals are formed by sequentially forming the formation materials of the lower electrode layer 41, the organic bistable layer 42, and the upper electrode layer 43 so as to have thicknesses of about 100 nm, 80 nm, and lOOnm. A switching element was formed.
- the lower electrode layer 411 is formed on the upper electrode layer 43 of the one two-terminal switching element (the position of the lower electrode layer 411 in FIG. 8 is more than the position of the lower electrode layer 41 of the one two-terminal switching element). Furthermore, by sequentially forming the organic bistable layer 421 and the upper electrode layer 431 corresponding to the organic bistable layer 42 and the upper electrode layer 43 on the lower electrode layer 411, the other electrode 431 is shifted to the other side. A two-terminal switching element was formed.
- the material for forming the electrode layer 411, the organic bistable layer 421, and the upper electrode layer 431 is also formed to have a thickness of about 100 nm, 80 nm, and lOO nm, respectively.
- the electrode layers 41 and 43 of the one of the two-terminal switching elements are each formed to have a stripe shape having a width of about 0.5 mm and the longitudinal axes thereof being orthogonal to each other.
- the electrode layers 411 and 431 of the other two-terminal switching element are also formed in the same form.
- the bias application electrode 44 and the pulse input S terminal 45 are connected to the upper electrode layer 431, and the pulse input R terminal 46 and the output Q are connected to the lower electrode layer 411.
- Terminal 48 was connected, and ground electrode 50 and panoramic input T terminal 49 were connected to lower electrode layer 41.
- the grounding terminal 50 is grounded.
- the characteristics of the switching element 1 obtained in Example 1 are as shown in FIG. 9, and the switching elements 1 obtained in Example 2 and the switching elements obtained in Example 3 are shown in FIG.
- the device characteristics were as shown in FIG.
- the bias voltage and pulse input were given from an external circuit.
- Table 5 summarizes an example of the driving conditions of the logic circuit according to the first, second, and third examples, and the operating point voltages Von and Voff of each logic circuit under this condition.
- the logic circuit according to any of the examples confirmed good operation as an RS flip-flop circuit.
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200411002925 DE112004002925B4 (de) | 2004-08-27 | 2004-08-27 | Logikkreis |
US11/661,132 US7948291B2 (en) | 2004-08-27 | 2004-08-27 | Logic circuit |
JP2006531180A JP4400619B2 (ja) | 2004-08-27 | 2004-08-27 | 論理回路 |
PCT/JP2004/012370 WO2006022017A1 (ja) | 2004-08-27 | 2004-08-27 | 論理回路 |
GB0625731A GB2431786B (en) | 2004-08-27 | 2004-08-27 | Logic circuit |
US13/004,480 US8093935B2 (en) | 2004-08-27 | 2011-01-11 | Logic circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2004/012370 WO2006022017A1 (ja) | 2004-08-27 | 2004-08-27 | 論理回路 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11661132 A-371-Of-International | 2004-08-27 | ||
US13/004,480 Division US8093935B2 (en) | 2004-08-27 | 2011-01-11 | Logic circuit |
Publications (1)
Publication Number | Publication Date |
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WO2006022017A1 true WO2006022017A1 (ja) | 2006-03-02 |
Family
ID=35967240
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP2004/012370 WO2006022017A1 (ja) | 2004-08-27 | 2004-08-27 | 論理回路 |
Country Status (5)
Country | Link |
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US (2) | US7948291B2 (ja) |
JP (1) | JP4400619B2 (ja) |
DE (1) | DE112004002925B4 (ja) |
GB (1) | GB2431786B (ja) |
WO (1) | WO2006022017A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009122598A1 (ja) * | 2008-04-04 | 2009-10-08 | 富士電機ホールディングス株式会社 | 論理回路 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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US9621354B2 (en) | 2014-07-17 | 2017-04-11 | Cisco Systems, Inc. | Reconstructable content objects |
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JP2004513513A (ja) * | 2000-10-31 | 2004-04-30 | ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア | 有機物双安定デバイス及び有機物メモリセル |
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FR79541E (ja) * | 1960-04-15 | 1963-03-29 | ||
US3214605A (en) * | 1960-07-11 | 1965-10-26 | Bell Telephone Labor Inc | Logic arrangements |
US3122649A (en) * | 1960-09-20 | 1964-02-25 | Rca Corp | Tunnel diode flip-flop with tunnel rectifier cross-coupling |
US3040190A (en) * | 1960-12-23 | 1962-06-19 | Ibm | High speed, sensitive binary trigger utilizing two series connected negative resistance diodes with variable bias feedback |
US3142767A (en) * | 1961-01-24 | 1964-07-28 | Rca Corp | Resettable tunnel diode circuit |
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US5825240A (en) * | 1994-11-30 | 1998-10-20 | Massachusetts Institute Of Technology | Resonant-tunneling transmission line technology |
US5625199A (en) * | 1996-01-16 | 1997-04-29 | Lucent Technologies Inc. | Article comprising complementary circuit with inorganic n-channel and organic p-channel thin film transistors |
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US6323709B1 (en) * | 1999-05-18 | 2001-11-27 | The Regents Of The University Of Michigan | High-speed, compact, edge-triggered, flip-flop circuit |
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US6452207B1 (en) * | 2001-03-30 | 2002-09-17 | Lucent Technologies Inc. | Organic semiconductor devices |
EP1594176B1 (en) | 2003-02-14 | 2010-05-19 | Fuji Electric Holdings Co., Ltd. | Switching device |
US7098438B1 (en) * | 2003-11-19 | 2006-08-29 | Raytheon Company | Method and apparatus for resetting a high speed latch circuit |
KR100719310B1 (ko) * | 2005-09-23 | 2007-05-17 | 한국과학기술원 | 셋/리셋 래치 회로, 시미트 트리거 회로 및 셋/리셋 래치회로를 이용한 모바일 기반의 d형 플립 플롭 회로와주파수 분배기 회로 |
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2004
- 2004-08-27 GB GB0625731A patent/GB2431786B/en not_active Expired - Fee Related
- 2004-08-27 US US11/661,132 patent/US7948291B2/en not_active Expired - Fee Related
- 2004-08-27 DE DE200411002925 patent/DE112004002925B4/de not_active Expired - Fee Related
- 2004-08-27 WO PCT/JP2004/012370 patent/WO2006022017A1/ja active Application Filing
- 2004-08-27 JP JP2006531180A patent/JP4400619B2/ja not_active Expired - Fee Related
-
2011
- 2011-01-11 US US13/004,480 patent/US8093935B2/en not_active Expired - Fee Related
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JPH01214078A (ja) * | 1988-02-22 | 1989-08-28 | Canon Inc | スイッチング素子 |
US4985621A (en) * | 1989-04-11 | 1991-01-15 | Massachusetts Institute Of Technology | Electrooptical switch with separate detector and modulator modules |
JP2004513513A (ja) * | 2000-10-31 | 2004-04-30 | ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア | 有機物双安定デバイス及び有機物メモリセル |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009122598A1 (ja) * | 2008-04-04 | 2009-10-08 | 富士電機ホールディングス株式会社 | 論理回路 |
US7880502B2 (en) | 2008-04-04 | 2011-02-01 | Fuji Electric Holdings Co., Ltd. | Logic circuit |
JP5201489B2 (ja) * | 2008-04-04 | 2013-06-05 | 富士電機株式会社 | 論理回路 |
KR101398303B1 (ko) | 2008-04-04 | 2014-05-27 | 후지 덴키 가부시키가이샤 | 논리 회로 |
Also Published As
Publication number | Publication date |
---|---|
JPWO2006022017A1 (ja) | 2008-05-08 |
US20080258136A1 (en) | 2008-10-23 |
US8093935B2 (en) | 2012-01-10 |
GB2431786B (en) | 2008-09-24 |
DE112004002925T5 (de) | 2007-08-30 |
GB0625731D0 (en) | 2007-02-07 |
US7948291B2 (en) | 2011-05-24 |
JP4400619B2 (ja) | 2010-01-20 |
US20110109345A1 (en) | 2011-05-12 |
GB2431786A (en) | 2007-05-02 |
DE112004002925B4 (de) | 2015-05-13 |
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