WO2005120205A3 - Room temperature deposition of nanotube transistor networks - Google Patents

Room temperature deposition of nanotube transistor networks Download PDF

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Publication number
WO2005120205A3
WO2005120205A3 PCT/US2005/003821 US2005003821W WO2005120205A3 WO 2005120205 A3 WO2005120205 A3 WO 2005120205A3 US 2005003821 W US2005003821 W US 2005003821W WO 2005120205 A3 WO2005120205 A3 WO 2005120205A3
Authority
WO
WIPO (PCT)
Prior art keywords
nanotubes
room temperature
temperature deposition
liquid
nanotube transistor
Prior art date
Application number
PCT/US2005/003821
Other languages
French (fr)
Other versions
WO2005120205A2 (en
Inventor
George Gruner
J Fraser Stoddart
Kelly S Chichak
Original Assignee
Univ California
George Gruner
J Fraser Stoddart
Kelly S Chichak
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ California, George Gruner, J Fraser Stoddart, Kelly S Chichak filed Critical Univ California
Publication of WO2005120205A2 publication Critical patent/WO2005120205A2/en
Publication of WO2005120205A3 publication Critical patent/WO2005120205A3/en

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/20—Carbon compounds, e.g. carbon nanotubes or fullerenes
    • H10K85/221—Carbon nanotubes

Abstract

A method for forming networks of nanotubes on a surface. A liquid is provided that includes nanotubes that have been treated with a solubilization agent. The liquid is deposited onto a surface to form a layer of the liquid. The solvent is removed to form a network layer of treated nanotubes. The solubilization agent is then removed to provide the final network of nanotubes. The nanotube networks may be formed as the conducting media (18) between the source electrode (10) and the drain electrode (12) of a bottom-gated transistor and other electronic devices.
PCT/US2005/003821 2004-02-13 2005-02-07 Room temperature deposition of nanotube transistor networks WO2005120205A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US54484104P 2004-02-13 2004-02-13
US60/544,841 2004-02-13

Publications (2)

Publication Number Publication Date
WO2005120205A2 WO2005120205A2 (en) 2005-12-22
WO2005120205A3 true WO2005120205A3 (en) 2006-07-20

Family

ID=35503610

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/003821 WO2005120205A2 (en) 2004-02-13 2005-02-07 Room temperature deposition of nanotube transistor networks

Country Status (1)

Country Link
WO (1) WO2005120205A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7556746B2 (en) * 2004-06-03 2009-07-07 Nantero, Inc. Method of making an applicator liquid for electronics fabrication process
DE102006027880B4 (en) * 2006-06-09 2008-11-27 Advanced Micro Devices, Inc., Sunnyvale Use of carbon nanotubes as insulating layer material for microelectronics
WO2013184222A2 (en) * 2012-03-23 2013-12-12 Massachusetts Institute Of Technology Ethylene sensor
JP6758620B2 (en) * 2016-03-09 2020-09-23 国立大学法人東海国立大学機構 Nanowire device, analyzer containing the nanowire device, sample heat treatment method and sample separation method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020122765A1 (en) * 2001-03-02 2002-09-05 Fuji Xerox Co., Ltd. Carbon nanotube structures and method for manufacturing the same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020122765A1 (en) * 2001-03-02 2002-09-05 Fuji Xerox Co., Ltd. Carbon nanotube structures and method for manufacturing the same

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
BACHTOLD A. ET AL.: "Logic Circuits with Carbon Nanotube Transistors", SCIENCE, vol. 294, November 2001 (2001-11-01), pages 1317 - 1320, XP001157485 *
STAR A. ET AL.: "Noncovalent Side-Wall Functionalization of Single-Walled Carbon Nanotubes", MACROMOLECULAR, vol. 36, 2003, pages 553 - 560, XP002997490 *

Also Published As

Publication number Publication date
WO2005120205A2 (en) 2005-12-22

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