WO2005066792A3 - Non-volatile memory and method with memory planes alignment - Google Patents

Non-volatile memory and method with memory planes alignment Download PDF

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Publication number
WO2005066792A3
WO2005066792A3 PCT/US2004/043377 US2004043377W WO2005066792A3 WO 2005066792 A3 WO2005066792 A3 WO 2005066792A3 US 2004043377 W US2004043377 W US 2004043377W WO 2005066792 A3 WO2005066792 A3 WO 2005066792A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory
logical
logical unit
versions
plane
Prior art date
Application number
PCT/US2004/043377
Other languages
French (fr)
Other versions
WO2005066792A2 (en
Inventor
Sergey Anatolievich Gorobets
Peter John Smith
Alan David Bennett
Original Assignee
Sandisk Corp
Sergey Anatolievich Gorobets
Peter John Smith
Alan David Bennett
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/750,155 external-priority patent/US7139864B2/en
Application filed by Sandisk Corp, Sergey Anatolievich Gorobets, Peter John Smith, Alan David Bennett filed Critical Sandisk Corp
Priority to EP04815452A priority Critical patent/EP1704483A2/en
Priority to JP2006547386A priority patent/JP4933269B2/en
Publication of WO2005066792A2 publication Critical patent/WO2005066792A2/en
Publication of WO2005066792A3 publication Critical patent/WO2005066792A3/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/102External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G11C16/105Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7202Allocation control and policies
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7208Multiple device management, e.g. distributing data over multiple flash devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628Programming or writing circuits; Data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/102External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

A non-volatile memory is constituted from a set of memory planes, each having its own set of read/write circuits so that the memory planes can operate in parallel. The memory is further organized into erasable blocks, each for storing a logical group of logical units of data. In updating a logical unit, all versions of a logical unit are maintained in the same plane as the original. Preferably, all versions of a logical unit are aligned within a plane so that they are all serviced by the same set of sensing circuits. In a subsequent garbage collection operation, the latest version of the logical unit need not be retrieved from a different plane or a different set of sensing circuits, otherwise resulting in reduced performance. In one embodiment, any gaps left after alignment are padded by copying latest versions of logical units in sequential order thereto.
PCT/US2004/043377 2003-12-30 2004-12-21 Non-volatile memory and method with memory planes alignment WO2005066792A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP04815452A EP1704483A2 (en) 2003-12-30 2004-12-21 Non-volatile memory and method with memory planes alignment
JP2006547386A JP4933269B2 (en) 2003-12-30 2004-12-21 Non-volatile memory and method with memory plane array

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US10/750,155 US7139864B2 (en) 2003-12-30 2003-12-30 Non-volatile memory and method with block management system
US10/750,155 2003-12-30
US10/917,888 2004-08-13
US10/917,888 US20050141313A1 (en) 2003-12-30 2004-08-13 Non-volatile memory and method with memory planes alignment

Publications (2)

Publication Number Publication Date
WO2005066792A2 WO2005066792A2 (en) 2005-07-21
WO2005066792A3 true WO2005066792A3 (en) 2006-02-09

Family

ID=34753195

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/043377 WO2005066792A2 (en) 2003-12-30 2004-12-21 Non-volatile memory and method with memory planes alignment

Country Status (4)

Country Link
EP (1) EP1704483A2 (en)
KR (1) KR20060134011A (en)
TW (1) TWI272487B (en)
WO (1) WO2005066792A2 (en)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7139864B2 (en) 2003-12-30 2006-11-21 Sandisk Corporation Non-volatile memory and method with block management system
US9104315B2 (en) 2005-02-04 2015-08-11 Sandisk Technologies Inc. Systems and methods for a mass data storage system having a file-based interface to a host and a non-file-based interface to secondary storage
JP4751163B2 (en) * 2005-09-29 2011-08-17 株式会社東芝 Memory system
US7870231B2 (en) * 2006-07-21 2011-01-11 Qualcomm Incorporated Efficiently assigning precedence values to new and existing QoS filters
KR100825802B1 (en) * 2007-02-13 2008-04-29 삼성전자주식회사 Data write method of non-volatile memory device copying data having logical pages prior to logical page of write data from data block
US8898412B2 (en) * 2007-03-21 2014-11-25 Hewlett-Packard Development Company, L.P. Methods and systems to selectively scrub a system memory
US8634470B2 (en) 2007-07-24 2014-01-21 Samsung Electronics Co., Ltd. Multimedia decoding method and multimedia decoding apparatus based on multi-core processor
KR101297563B1 (en) 2007-11-15 2013-08-19 삼성전자주식회사 Storage management method and storage management system
KR100982440B1 (en) * 2008-06-12 2010-09-15 (주)명정보기술 System for managing data in single flash memory
US8285970B2 (en) * 2008-11-06 2012-10-09 Silicon Motion Inc. Method for managing a memory apparatus, and associated memory apparatus thereof
JP4956593B2 (en) 2009-09-08 2012-06-20 株式会社東芝 Memory system
US8626989B2 (en) * 2011-02-02 2014-01-07 Micron Technology, Inc. Control arrangements and methods for accessing block oriented nonvolatile memory
KR101419004B1 (en) * 2012-05-03 2014-07-11 주식회사 디에이아이오 Non-volatile memory system
WO2013171792A1 (en) * 2012-05-16 2013-11-21 Hitachi, Ltd. Storage control apparatus and storage control method
KR101987740B1 (en) 2012-07-09 2019-06-11 에스케이하이닉스 주식회사 Estimation method for channel characteristic of nonvolatile memory device
US9817593B1 (en) 2016-07-11 2017-11-14 Sandisk Technologies Llc Block management in non-volatile memory system with non-blocking control sync system
US10423353B2 (en) * 2016-11-11 2019-09-24 Micron Technology, Inc. Apparatuses and methods for memory alignment
TWI747349B (en) * 2020-06-30 2021-11-21 大陸商合肥沛睿微電子股份有限公司 Low-level formatting method of storage device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5860124A (en) * 1996-09-30 1999-01-12 Intel Corporation Method for performing a continuous over-write of a file in nonvolatile memory
US20020099904A1 (en) * 2001-01-19 2002-07-25 Conley Kevin M. Partial block data programming and reading operations in a non-volatile memory

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5860124A (en) * 1996-09-30 1999-01-12 Intel Corporation Method for performing a continuous over-write of a file in nonvolatile memory
US20020099904A1 (en) * 2001-01-19 2002-07-25 Conley Kevin M. Partial block data programming and reading operations in a non-volatile memory

Also Published As

Publication number Publication date
TW200601042A (en) 2006-01-01
TWI272487B (en) 2007-02-01
EP1704483A2 (en) 2006-09-27
WO2005066792A2 (en) 2005-07-21
KR20060134011A (en) 2006-12-27

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