WO2004111831A3 - Procede de contre-mesure par masquage de l'accumulateur - Google Patents

Procede de contre-mesure par masquage de l'accumulateur Download PDF

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Publication number
WO2004111831A3
WO2004111831A3 PCT/EP2004/051144 EP2004051144W WO2004111831A3 WO 2004111831 A3 WO2004111831 A3 WO 2004111831A3 EP 2004051144 W EP2004051144 W EP 2004051144W WO 2004111831 A3 WO2004111831 A3 WO 2004111831A3
Authority
WO
WIPO (PCT)
Prior art keywords
countermeasuring
masking
accumulator
exponentiation
algorithm
Prior art date
Application number
PCT/EP2004/051144
Other languages
English (en)
Other versions
WO2004111831A2 (fr
Inventor
Marc Joye
Original Assignee
Gemplus Card Int
Marc Joye
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card Int, Marc Joye filed Critical Gemplus Card Int
Priority to US10/561,234 priority Critical patent/US20060282491A1/en
Priority to EP04766054A priority patent/EP1639451A2/fr
Publication of WO2004111831A2 publication Critical patent/WO2004111831A2/fr
Publication of WO2004111831A3 publication Critical patent/WO2004111831A3/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/724—Finite field arithmetic
    • G06F7/725—Finite field arithmetic over elliptic curves
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/723—Modular exponentiation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7223—Randomisation as countermeasure against side channel attacks
    • G06F2207/7228—Random curve mapping, e.g. mapping to an isomorphous or projective curve
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7223—Randomisation as countermeasure against side channel attacks
    • G06F2207/7233—Masking, e.g. (A**e)+r mod n
    • G06F2207/7247—Modulo masking, e.g. A**e mod (n*r)
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7276—Additional details of aspects covered by group G06F7/723
    • G06F2207/7285—Additional details of aspects covered by group G06F7/723 using the window method, i.e. left-to-right k-ary exponentiation

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
  • Storage Device Security (AREA)

Abstract

La présente invention concerne un procédé de contremesure dans un composant électronique mettant en oeuvre un algorithme cryptographique à clé publique. Cette invention est remarquable en ce le procédé comprend un calcul d'exponentiation, avec un algorithme d'exponentiation de type gauche-droite, de type y=g^d où g et y sont des éléments du groupe déterminé G noté de façon multiplicative et d est un nombre prédéterminé, ledit procédé étant caractérisé en ce qu'il comprend une étape de tirage aléatoire, au début ou durant l'exécution dudit algorithme d'exponentiation de façon déterministe ou probabiliste, pour masquer l'accumulateur A.
PCT/EP2004/051144 2003-06-18 2004-06-17 Procede de contre-mesure par masquage de l'accumulateur WO2004111831A2 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US10/561,234 US20060282491A1 (en) 2003-06-18 2004-06-17 Method for countermeasuring by masking the accumulators in an electronic component while using a public key cryptographic algorithm
EP04766054A EP1639451A2 (fr) 2003-06-18 2004-06-17 Procédé de contre-mesure par masquage de l'accumulateur

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR03/07379 2003-06-18
FR0307379A FR2856537B1 (fr) 2003-06-18 2003-06-18 Procede de contre-mesure par masquage de l'accumulateur dans un composant electronique mettant en oeuvre un algorithme de cryptographie a cle publique

Publications (2)

Publication Number Publication Date
WO2004111831A2 WO2004111831A2 (fr) 2004-12-23
WO2004111831A3 true WO2004111831A3 (fr) 2005-12-22

Family

ID=33484551

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2004/051144 WO2004111831A2 (fr) 2003-06-18 2004-06-17 Procede de contre-mesure par masquage de l'accumulateur

Country Status (4)

Country Link
US (1) US20060282491A1 (fr)
EP (1) EP1639451A2 (fr)
FR (1) FR2856537B1 (fr)
WO (1) WO2004111831A2 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2862454A1 (fr) * 2003-11-18 2005-05-20 Atmel Corp Methode de reduction modulaire aleatoire et equipement associe
WO2006124160A2 (fr) * 2005-05-12 2006-11-23 Atmel Corporation Methode de reduction polynomiale modulaire randomisee et materiel destine a la mise en oeuvre de ce procede
FR2885711B1 (fr) * 2005-05-12 2007-07-06 Atmel Corp Procede et materiel modulaire et aleatoire pour la reduction polynomiale
FR2897963A1 (fr) 2006-02-28 2007-08-31 Atmel Corp Procede pour les conjectures de quotient rapide et une manip ulation de congruences
KR101527867B1 (ko) * 2007-07-11 2015-06-10 삼성전자주식회사 타원 곡선 암호 시스템에 대한 부채널 공격에 대응하는방법
EP2169535A1 (fr) * 2008-09-22 2010-03-31 Thomson Licensing Procédé, appareil et support de programme informatique pour le recodage régulier d'un entier positif
EP2535804A1 (fr) * 2011-06-17 2012-12-19 Thomson Licensing Algorithme de mise à la puissance résistant contre des fautes
DE102017002153A1 (de) * 2017-03-06 2018-09-06 Giesecke+Devrient Mobile Security Gmbh Übergang von einer booleschen Maskierung zu einer arithmetischen Maskierung

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002088934A1 (fr) * 2001-04-30 2002-11-07 Stmicroelectronics S.A. Brouillage d'un calcul mettant en oeuvre une fonction modulaire
EP1296224A1 (fr) * 2001-09-20 2003-03-26 Hitachi, Ltd. Système de multiplication elliptique scalaire
US20030079139A1 (en) * 1999-12-28 2003-04-24 Hermann Drexler Portable data carrier provide with access protection by rendering messages unfamiliar

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2784831B1 (fr) * 1998-10-16 2000-12-15 Gemplus Card Int Procede de contre-mesure dans un composant electronique mettant en oeuvre un algorithme de cryptographie a cle secrete
US7127063B2 (en) * 2001-12-31 2006-10-24 Certicom Corp. Method and apparatus for computing a shared secret key

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030079139A1 (en) * 1999-12-28 2003-04-24 Hermann Drexler Portable data carrier provide with access protection by rendering messages unfamiliar
WO2002088934A1 (fr) * 2001-04-30 2002-11-07 Stmicroelectronics S.A. Brouillage d'un calcul mettant en oeuvre une fonction modulaire
EP1296224A1 (fr) * 2001-09-20 2003-03-26 Hitachi, Ltd. Système de multiplication elliptique scalaire

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
LIARDET P-Y ET AL: "PREVENTING SPA/DPA IN ECC SYSTEMS USING THE JACOBI FORM", CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS. 3RD INTERNATIONAL WORKSHOP, CHES 2001, PARIS, FRANCCE, MAY 14 - 16, 2001 PROCEEDINGS, LECTURE NOTES IN COMPUTER SCIENCE, BERLIN : SPRINGER, DE, vol. VOL. 2162, 14 May 2001 (2001-05-14), pages 391 - 401, XP001061177, ISBN: 3-540-42521-7 *
TRICHINA E ET AL: "IMPLEMENTATION OF ELLIPTIC CURVE CRYPTOGRAPHY WITH BUILT-IN COUNTER MEASURES AGAINST SIDE CHANNEL ATTACKS", CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2002. 4TH INTERNATIONAL WORKSHOP REVISED PAPERS, REDWOOD SHORES, CA, USA, 13-15 AUG. 2002, 13 August 2002 (2002-08-13), BERLIN, GERMANY, SPRINGER VERLAG, pages 98 - 113, XP001160524 *

Also Published As

Publication number Publication date
WO2004111831A2 (fr) 2004-12-23
US20060282491A1 (en) 2006-12-14
FR2856537B1 (fr) 2005-11-04
EP1639451A2 (fr) 2006-03-29
FR2856537A1 (fr) 2004-12-24

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