WO2004097779A1

WO2004097779A1 - Driver apparatus for a display comprising integrated scan driving circuits

Info

Publication number: WO2004097779A1
Application number: PCT/IB2004/050534
Authority: WO
Inventors: Sander Derksen
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2003-04-29
Filing date: 2004-04-28
Publication date: 2004-11-11

Abstract

Described is a driving apparatus for driving a display panel (2), in particular a plasma display panel (PDP), for displaying an image, the display panel (2) having scan terminals (S) and a common terminal (C), the driving apparatus comprising discrete driving circuits (8) and integrated scan driving circuits (24) and being adapted to be connected to the scan terminals (S) and the common terminal (C) of the display panel (2). The particularity of the invention is that the integrated scan driving circuits (24) are adapted to be coupled to the scan terminals (S) of said display panel (2) only so that the scan terminals (S) are driven by the integrated scan driving circuits (24) only; and the discrete driving circuits (8) are adapted to be coupled to th/ common terminal (C) of the display panel (2).

Description

DRIVER APPARATUS FOR A DISPLAY PANEL COMPRISING INTEGRATED SCAN DRIVING CIRCUITS

FIELD OF THE INVENTION

The present invention relates to a driving apparatus for driving a display panel, in particular a plasma display panel (PDP), for displaying an image, said display panel having scan terminal means and common terminal means, said driving apparatus comprising discrete 5 driving circuits and integrated scan driving circuits.

The present invention also relates to a display apparatus for displaying an image, comprising a display panel, in particular a plasma display panel (PDP), and such a driving apparatus.

10 BACKGROUND OF THE INVENTION

In recent years, a thin display apparatus has been requested in conjunction with an increase in size of the display panel. The plasma display panel (hereinafter simply referred to as "PDP") is expected to become one of the most important display devices of the next generation which replaces the conventional cathode ray tube, because the PDP can

15 easily realize reduction of thickness and weight of the panel and the provision of a flat screen shape and a large screen surface.

In the PDP that makes a surface discharge, a pair of electrodes is formed on an inner surface of a front glass substrate and a rare gas is filled within the panel. When a voltage is applied across the electrodes, a surface discharge occurs at the surface of a

20 protection layer and a dielectric layer formed on the electrode surface, thereby generating ultraviolet rays. Fluorescent materials of the three primary colors red, green and blue are coated on an inner surface of a back glass substrate, and a color display is made by exciting . the light emission from the fluorescent materials responsive to the ultraviolet rays.

The PDP comprises a plurality of column electrodes (address electrodes) and a

25 plurality of row electrodes arranged so as to intersect the column electrodes. Each of the row electrodes pairs and the column electrodes are covered by a dielectric layer against a discharge space and have a structure such that a discharge cell corresponding to one pixel is formed at an intersecting point of the row electrode pair and the column electrode. Since the PDP provides a light emission display by using a discharge phenomenon, each of the discharge cells has only two states; a state where the light emission is performed and a state where it is not performed.

The discharge is achieved by adjusting voltages between the column and row electrodes of a cell composing a pixel. The amount of discharged light changes to adjust the number of discharges in the cell. The overall screen is obtained by driving in a matrix type a write pulse for inputting a digital video signal to the column and row electrodes of the respective cells, a scan pulse for scanning a sustain pulse for sustaining discharge, and an erase pulse for terminating discharge of a discharged cell.

So, in a PDP, different phases in time are used to create (moving) pictures. In general, there are three phases, namely an erase/setup phase for erasing the complete display panel, a programming/addressing phase for programming the picture to be displayed, and a sustain phase for showing the picture on the display panel.

During the sustain phase, the most power is consumed as the display panel is driven for producing light in this phase. In this phase, all rows or groups of rows are driven simultaneously. This is normally done with discrete electronics at the scan side and at the common side of the display panel, i.e. at the side of the scan terminal means and at the side of the of the common terminal means of the display panel.

During the programming or addressing phase, each row has to be addressed separately. So, all rows need their own driver at, at least, one side of the panel. Therefore, integrated driving circuits are normally used, because of their integration of a lot of drivers into one device.

EP 1,065,649 A2 discloses a display apparatus for displaying an image on a display panel by turning on pixels of said display panel, said display apparatus comprising a display panel provided with address electrodes driven by address pulses based on a video input signal, and sustain electrodes crossing said address electrodes and sandwiching electrical discharging units of pixels with said address electrodes and driven by sustain pulses, a sustain-electrode drive circuit for generating said sustain pulses and scan pulses, provided with a common circuit for generating said sustain pulses or said scan pulses in response to an operating state thereof and for supplying said scan pulses and said sustain pulses to said sustain electrodes, an address drive circuit for generating and outputting said address pulses, and a control-signal generation circuit for generating a control signal for changing the operating state of said sustain-electrode drive circuit, wherein, in order to display an image on the display panel, an address of a pixel on the display panel is specified by an electric field created between said sustain electrodes and said address electrodes by said scan pulses and said address pulses, and a pixel on the display panel at an address specified by an electric field of said sustain electrodes created by the sustain pulses is turned on.

US 5,654,728 A discloses an AC plasma display unit and its device circuit wherein a separating circuit is connected between a scanning voltage circuit which supplies a selected voltage to a first line and an unselected voltage to a second line, and a sustaining voltage circuit which selectively supplies a sustaining voltage and 0V to a third line. A power recovery circuit is connected to the third line. In the separating circuit, a first switch is connected between the second line and the third line, and a second switch is connected between the first line and the third line. During an address period, the switches are turned off and during a sustain period the first switch is turned on/off and the second switch is turned on. The first switch is constituted with a diode whereas the second switch is constituted with a MOS transistor. When the unselected voltage is negative, either the first switch or the second switch may be omitted. US 5,786,794 A describes an AC type panel display which comprises electrodes arranged in a matrix form, a push-pull type driver circuit having first and second transistors provided for each pair of plural pairs of power supply lines connected to a driver circuit for driving a plurality of display electrodes to be scanned, and a power supply which supplies a defined voltage to one of the respective power supply lines of each pair connected to the corresponding driver circuit, and a leakage control switch which leaks the defined voltage applied to the power supply line.

Accordingly, both US 5,654,728 A and US 5,786,794 A disclose a combination of discrete electronics and integrated circuits at one side of the display placed in series. However, such a series circuit of two drivers costs a lot of components and has a high series resistance. This resistance results in high power dissipation and a high voltage drop with relatively low margins.

From US 6,072,447 A it is known a plasma display panel drive circuit provided with series resonant circuits. A region of a plurality of surface discharge electrode pairs is divided such that the electrostatic capacitance between the surface discharge electrode pairs is divided into 2" equal portions (where n is a natural number). 2"^"1 series resonant circuits are formed by the capacitances of two each of the divided surface discharge electrode pair regions, a coil, and a plurality of switches. A first voltage state and a second voltage state between the plurality of surface discharge electrode pairs are shifted by the series resonant circuit. US 4,866,349 suggests an improved address driver circuit for plasma panels, particularly useful with an independent sustain and address plasma panel. Address pulse generators for one panel address axis are coupled to MOSFET driver devices and provide pulses of a first polarity; and address pulse generators for the other panel address axis are coupled to similar MOSFET driver devices and provide double pulses of a second polarity. With N-channel open-drain MOSFET drivers on both panel address axes, they only need to be designed to pull low. An improved power efficient sustain driver for plasma panels including an inductor through which the panel capacitance is charged an discharged, and switch means switched when the inductor current is zero, which permits recovery of the energy otherwise lost in driving the panel capacitance. An independent sustain and address plasma panel with such energy efficient address drivers and sustain drivers. The energy efficient sustain diver can be used with plasma display panels, electroluminescent panels and with liquid crystal panels having inherent panel capacitance. An independent sustain and address panel with N-channel MOSFET drivers on one address axis and P-channel MOSFET drivers on the other address axis, with an address pulse generator providing pulses of a first polarity to the N-channel MOSFETS, and another address pulse generator providing pulses of a second polarity to the P-channel MOSFETS.

US 5,670,974 A discloses an energy recovery driver for a dot matrix AC plasma display panel with a parallel resonant circuit allowing power reduction. The plasma display panel driver circuit includes a panel inter-electrode capacitor, a charging/discharging circuit, and a voltage clamp circuit. The panel inter-electrode capacitor is provided between scanning and sustain electrodes of a panel. The charging/discharging circuit is connected in parallel with the panel inter-electrode capacitor and formed by a combination of a coil, FET switches and reverse current blocking diodes. The voltage clamp circuit includes four switches connected to terminals of the panel inter-electrode capacitor. The panel inter- electrode capacitor, together with a series circuit of the coil and the FET switches, forms a parallel resonance circuit. The panel inter-electrodes capacitor is repeatedly charged and discharged through the control of the switches with switch drive inputs. In the driving of a plasma display panel, ineffective power is reduced when charging and discharging the panel inter-electrode capacitor. SUMMARY OF THE INVENTION

It is an object of the present invention to improve a driving apparatus so as to save production costs and area. The invention is defined by the independent claims. The dependent claims define advantageous embodiments. In the driving apparatus of the present invention, the drivers at the scan side of the display panel are formed by driver integrated circuits (ICs) only. So, one driver can be used to save costs and area which driver generates both sustain and scan pulses, needed for the programming phase and the sustain phase. This driver has to be a driver IC, because each row has to be addressed separately, and the specifications have to be sufficient to supply the sustain currents and voltages.

For a real one driver setup at the scan side of the display panel, the active part and in particular the complete active part of the energy recovery circuits is integrated resulting in a better control during the sustain phase.

In an embodiment, the integrated scan driving circuits are directly connected to a sustain power supply means. So, the driver ICs can directly be connected to the sustain supply power and can be decoupled close to the ICs, resulting in the provision of a stable output with a low voltage drop at the display panel. Usually important is that the supply voltage is essentially constant during all phases and corresponds or is equal to the sustain voltage. Moreover, the integrated scan driving circuits can be connected directly to the ground, too.

In a further preferred embodiment, the integrated scan driving circuits are additionally connected to a scan power supply means. So, an extra separate supply voltage is provided which is used for scanning. This voltage can be freely chosen, but has usually to remain between ground and sustain voltage. This embodiment normally requires an extra small switching device per output.

Moreover, an erase circuit for erasing the display panel is provided which erase circuit can be adapted to be coupled to said common terminal means of the display panel.

In a still further embodiment, ramp output circuits can additionally be included in the integrated scan driving circuits so as to generate output signals having a ramp wave form. BRIEF DESCRIPTION OF THE DRAWINGS

In the following, the present invention will be described in greater detail based on preferred embodiments with reference to the accompanying drawings, in which:

Fig. 1 shows a prior art PDP driving circuit; Fig. 2 schematically shows a circuit diagram of a high voltage half bridge driver;

Fig. 3 shows a PDP driving circuit in accordance with a first embodiment of the present invention;

Fig. 4 shows the circuit diagram of a first version of a single driving circuit provided in the circuit of Fig. 3;

Fig. 5 shows a PDP driving circuit in accordance with a second embodiment of the present invention;

Fig. 6 shows the circuit diagram of a second version of a single driving circuit provided in the circuit of Fig. 5; Figs. 7a-7c show different energy recovery topology options for the embodiment of Figs. 3 and 5; and

Fig. 8 shows the circuit diagram of a third version of a single driving circuit provided in the circuits of Figs. 7b and 7c.

DESCRIPTION OF PREFERRED EMBODIMENTS

Before driving circuits in accordance with preferred embodiments of the present invention are described, a driving circuit for a standard PDP is described for explanation purposes as a comparison example with reference to Fig. 1.

The left side of a display panel (PDP) 2 shown in Fig. 1 is the scan side S, and the right side is the common side C. During the programming phase, the common side C is held at a certain voltage level, while at the scan side S the rows are scanned one by one. For this purpose, scan driver ICs 4 are present at the scan side S and only during this programming phase the scan driver ICs 4 are supplied via appropriate switches 6 which connect a negative supply of the IC 4 to ground G and a positive supply of the IC 4 to a scan supply voltage (Vscan).

In the sustaining phase, sustain pulses are required at both sides of the display panel 2. At both sides, discrete drivers 8, 10 are used to generate these sustain pulses. In the comparison example of Fig. 1 at the common side C, the discrete driver 8 includes two gate- drivers 8a and switches 8b and 8c, wherein switch 8b directly connects the display panel 2 to the sustain supply and switch 8c directly connects the display panel 2 to ground. At the scan side S of the comparison example of Fig. 1, the discrete driver 10 includes two gate-drivers 10a and switches 10b and 10c. The scan driver ICs 4 are coupled in series to the display panel 2 and also connected via switch 10b of the discrete driver 10 to the sustain supply and via switch 10c to ground. The scan driver ICs 4 are however not active during this phase, they are only passive to conduct the current. To conduct this sustain current, diodes are present in the scan driver ICs 4 as shown in Fig. 1. To apply the sustain voltage at the scan side S of the display panel 2, the switch 10b between the sustain supply and the negative supply of the IC 4 is closed, and the current can flow through diodes (not shown) between this negative supply connection and the outputs of the IC 4 to the display panel 2. The scan side S of the display panel 2 can be pulled to ground G via the diodes between the IC outputs and the positive supply of the IC 4 and the switch 10c. An energy recovery circuit consisting of discrete drivers 12 and 14 is also used in the driving circuit of Fig. 1 during the sustain phase, wherein the discrete driver 12 includes two gate-drivers 12a and two switches 12b and the discrete driver 14 includes two gate-drivers 14a and two switches 14b. The currents during the energy recovery are also conducted via the scan driver ICs at the scan side.

To erase the display panel 2, special erase pulses should be applied to the display panel 2. In the example of Fig. 1, these pulses are applied at the scan side S from a special high erase supply voltage (Verase) via discrete switches 16 and via the passive conducting scan driver ICs 4 to the display panel 2.

Furthermore, it is needless to mention that inter alia a column driver IC 18 is provided which is connected to the column/address electrodes of the display panel 2.

As described above, the electronics of current PDPs consists of a combination of different drivers (both discrete and IC) applying different voltages at different moments in time, but driving the same electrodes of the display panel 2. To make this possible, drivers which are not used at a certain moment have to be in a high impedance state. The output can then be switched to another voltage by another driver.

Such drivers can be high voltage half bridge drivers that usually consist of two n-type devices instead of a n- and p-type device, because their conduction per area is higher than that of p-type devices. For high voltage devices, normally the drain source voltage can handle the high voltages, but the gate source voltage is limited to a lower voltage. An example of such a high voltage half bridge driver is schematically shown in Fig. 2.

The low-side device of a half bridge with two n-type devices can be easily controlled, because the source is connected to a constant voltage (e.g. ground) and the gate- source voltage is the voltage to be driven. But for the high-side device, the source is floating (from ground to the supply voltage e.g. 0 - 200 V) while the also floating gate-source voltage has to be controlled over a small voltage range e.g. 0 - 15 V. Controlling such a floating voltage is much more difficult. Especially turning it off, for a high impedance state of the driver, without influencing the output is a problem.

Often a bootstrap circuit is used for this purpose, but such a circuit is needed for each output. This becomes a problem for the scan-driver functionality of the display panel 2, because here all electrodes have to be driven separately, and this would require a huge amount of bootstrap circuits (with a discrete capacitor and an extra pin on the ICs for each electrode).

A resistor between the gate and source could be used to turn off the high-side device without influencing the output, but this has other disadvantages: The turn-off is slow, the maximum steepness of falling edges is limited, and power dissipation is higher.

Of all drivers for the scan electrodes used to generate the different voltages, including energy recovery, always one of them is conducting. Now, according to the present invention all these drivers are combined in a newly developed single driving circuit, wherein no high impedance state is necessary anymore. With this new developed circuit, all switches in the driver for the different voltages can be controlled in an appropriate way, without using bootstrap circuits for each output. There are also no 'static' currents flowing in the new circuit, keeping the dissipated power low in a high voltage application.

Energy recovery is used in PDPs to switch the voltage on the electrodes between ground and supply without dissipating to much energy. By far the most energy is to be gained during the sustaining phase, when the majority of switching is done. So it is only necessary to apply energy recovery during this sustaining phase. During sustaining it is normal to drive all electrodes or groups of electrodes with the same signals. So, energy recovery is the same for all electrodes that therefore can use the same energy recovery circuit(s). This simplifies the design of a complete driver IC.

Fig. 3 shows the whole PDP driving circuit according to a first preferred embodiment of the present invention, wherein the scan side S of the display panel 2 is driven by the above mentioned newly developed single driving IC 24 only. This scan, sustain and energy recovery driver IC 24 is directly connected to the sustain supply voltage (Vsustain). The IC 24 can be decoupled close to ICs with the ground G directly connected to the groundplane of the display panel 2, which gives a more stable output voltage and reduces EMC problems. Because the IC 24 is directly connected to the sustain supply, no voltages exceeding this voltage can be generated at this side of the display panel 2. Compared with the standard driving circuit of Fig. 1, this only causes a problem for generating the high erase pulses, which has to be replaced to the common side S of the display panel 2 (with only discrete drivers). The scan pulses can be generated by the same switches in the IC 24 which are used for sustaining, and the same voltage as for sustaining is used for scanning in this driving circuit.

The reason why no higher voltages than the sustain voltage are generated with the driver IC 24 is that the maximum output voltage of the IC is a major factor in die IC area used (because all 'switches', also those for sustaining which take the most area, have to be able to handle the highest output voltage present at the output in time), and so it is not cost effective to integrate those high erase pulse generating circuits that are only used a few times per frame. It is better and more cost effective to generate these pulses with discrete drivers 26 at the common side C of the display panel 2, as they are common for the whole panel. Energy recovery is needed at both sides of the display panel 2. Although at the scan side S each row is driven separately, for manufacturing cost and number of components it is not wise to recover energy for each row separately. This would require a lot of passive components (at least inductors) and extra IC pins to connect all these components for each row. All rows are sustained at the same time and have to recover energy at the same time; so common passive parts (inductor) and IC pins can be used for the energy recovery circuit. With all active parts of the energy recovery IC integrated there is a better control for the sustaining possible. At the common side C the discrete sustain drivers 8 and energy recovery circuit 12 is still the same as in the standard driving circuit of Fig. 1. The high voltage erase pulse driver 26 is now placed at this side of the display panel 2.

Fig. 4 shows a more detailed circuit diagram of a preferred version of the driver IC 24 included in the PDP driving circuit of Fig. 3. The output Outp of the driver IC 24 can be connected to ground, the High Voltage Supply HVS or the input or output of the energy recovery circuit(s). In Fig. 4 only the circuit diagram of one of many (e.g. 64) outputs of the driver IC 24 (inside the dashed line) is shown. All or groups of these circuits in the one driver IC 24 use the same ground, high voltage supply, energy recovery input and output, bootstrap capacitor BTC, and low voltage (12 V) supplies.

The circuit uses low voltage logic at all three 'levels': ground, high voltage, and energy recovery output ER-outp. For both the ground and high voltage level an external low voltage supply (e.g. 12 V) is required. The low voltage logic at the energy recovery output level is fed by a bootstrap capacitor. This bootstrap capacitor is charged while the energy recovery output is low. Because only one energy recovery output and thus one bootstrap capacitor is needed for all or groups of outputs, this is not a problem and only costs one pin extra on the driver IC 24.

In the circuit diagram of Fig. 4 the level shifter circuits needed to control the energy recovery input and output switches and the high voltage supply switches with logic signals from the 'ground level' are not shown. For both the energy recovery input and output controlled by buffers 30 and 32, only one level shifter per driver IC (or per group of outputs) is required as all outputs switch to the energy recovery at the same time. All high voltage supply switches are controlled with buffer 34 (one per output) separately and need their own logic signals at the high voltage supply level. In the most straightforward form, this is done with a level shifter per output.

Four large main switches implemented as MOSFETs 35 to 38 have a circle around them in the circuit diagram of Fig. 4. These switches connect the output to ground, the high voltage supply, the input or the output of the energy recovery circuit. Moreover two zener diodes 40 and 42 are present which limit the maximum gate source voltage of the MOSFETs 36 and 37 to about 0 - 15 V.

In the following, it is described how to generate all output levels. Ground:

When the output should be low (ground level), the MOSFET 35 should be conducting, while the others 36 to 38 are not. For this, the output of buffer 44 is high to make the gate of the MOSFET 35 high to let it conduct. At the same time also MOSFET 46 is conducting and via diodes 48 and 49 it pulls the gates of the MOSFETs 36 and 37 low, so they do not conduct. Via the zener diodes 40 and 42 the output is also pulled to ground, but this is the intention as the MOSFET 35 is doing the same. The output of the buffers 30 and 34 should be high, in order to prevent the MOSFETs 36 and 37 from conducting. MOSFET 38 will not conduct if the output of the buffer 32 is low. It is however allowed having both MOSFETs 35 and 38 on at the same time (e.g. at the end of energy recovery).

High voltage supply:

For a high output level, the MOSFET 36 should be conducting. So, the buffer 34 has a low output which makes the gate-source voltage of p-type MOSFET 50 negative to let it conduct. The gate of the MOSFET 36 is then pulled high, while the gate source is limited by the zener diode 40, and the MOSFET 36 will conduct. With low outputs of buffers 32 and 44, MOSFETs 35, 38, 46 and 52 are turned off. If the buffer 30 has a high output, MOSFET 54 is off, and the MOSFET 37 is not actively turned on. The MOSFET 37 is however not actively turned off in that case. So, current could still flow from the energy recovery (ER) input to the output (if the MOSFET 37 is still conducting), but the output voltage is limited by the backgate diode of the MOSFET 36. It is allowed to have the MOSFETs 36 and 37 on at the same time (e.g. at the end of energy recovery).

Energy recovery input ER-inp:

For energy recovery while going from a low to high output voltage, the MOSFET 37 should be conducting. This is accomplished by making the output of the buffer 30 low, to turn on MOSFET 54. If the MOSFET 54 is conducting, the gate of the MOSFET

37 is pulled high while the zener diode 42 limits the gate-source voltage, and MOSFET 37 will conduct. With low outputs of the buffers 32 and 44, the MOSFETs 35, 38, 46 and 52 are turned off. A high output of the buffer 34 will turn off the MOSFET 50, and so the MOSFET 36 is not turned on. It is however also not turned off actively. Normally the MOSFET 36 is off before the E.R input starts, because the output is at ground level then. If for some reason MOSFET 36 is on, while the energy recovery input is selected and this is not desired, it will be automatically turned if the output is going up because of the gate-drain capacitance. It is allowed to have the MOSFETs 36 and 37 on at the same time (e.g. at the end of energy recovery).

Energy recovery output ER-outp: For energy recovery from a high to low output voltage, the MOSFET 38 should be conducting. With a high output of the buffer 32, the MOSFETs 38 and 52 are turned on. The MOSFET 52 pulls the gates of the MOSFETs 36 and 37 low, to turn them off, via the diodes 48 and 49. This way these 'high side' MOSFETs 36 and 37 are turned off, without drawing too much current from these nodes and influencing the output, because the gates are pulled to the same level as the output itself. The MOSFET 35 can be turned off, by making the output of the buffer 44 high. It is however allowed having both MOSFETs 35 and

38 on at the same time (e.g. at the end of energy recovery). The energy recovery is used to switch energy friendly between high and low output levels. The energy recovery can only be used for all or groups of outputs at once. So the energy recovery will mainly be used during sustaining.

The normal sequence during sustaining is as follows, assuming a low level at each output:

The buffer 44 goes from a high to low output to turn off the MOSFETs 35 and 46. The output is now 'floating'. Then the energy recovery input is turned on by making the buffer 30 low, which switches on the MOSFETs 54 and 37. Because the output is low and has a capacitive load, the energy recovery input is pulled low, giving a voltage over the coil. A current starts flowing through the coil, the discrete diode, the energy recovery input and the MOSFET 37 to the output, where it will charge the load. When the output voltage reaches the voltage on the discrete energy recovery capacitor, the current remains flowing, because of the energy in the coil, until this energy is zero. Then the current stops and the discrete diode blocks the current for flowing back again. Because of losses the voltage at the output will not have reached the high voltage supply level, and the MOSFET 36 has to be turned on to make the output voltage equal to the supply voltage. The MOSFET 36, which is turned on with the buffer 34 and the MOSFET 50, can be turned on, while the MOSFET 37 is still conducting current or after the current through MOSFET 37 stopped. When both MOSFETs 36 and 37 are turned on, charge from both the energy recovery input and the supply flows to the output. During normal sustaining in a PDP there is probably a small overlap in current flowing through the MOSFETs 36 and 37 to make the transient fast enough.

Because the MOSFET 36 is turned on, the output becomes high and it will be kept high for a certain amount of time. In the meantime the MOSFET 54 can be switched off with the buffer 30, so that the MOSFET 37 is not kept on actively anymore. When the output has to go low again, first the MOSFET 50 is turned off with the buffer 34, so that the

MOSFET 36 is no longer actively turned on. Then the energy recovery output is activated by making the buffer 32 high, turning on the MOSFETs 38 and 52. The MOSFET 52 makes sure that the MOSFETs 36 and 37 are turned off via the diodes 48 and 49. The MOSFET 38 connects the energy recovery output to the output that is still high, and pulls this energy recovery output high also. Because of the voltage over the coil, a current starts flowing through the coil, the discrete diode, the energy recovery output and the MOSFET 38 from the output. The output voltage will 'swing' below the discrete capacitor voltage (half the high voltage supply voltage), but it will not reach the ground level. The discrete diode blocks current flowing back to the output again. By turning on the MOSFET 35 via the buffer 44 the output will be completely pulled to the ground level. This can be done, while the MOSFET 38 is still conducting current or after the current has stopped flowing. While the MOSFET 35 is conducting, the MOSFET 38 can be turned off with the buffer 32. Now a new cycle can start. For erasing and or setup of the display panel 2, sometimes ramps are necessary. At the common side C, conventional circuits can be used for this purpose (e.g. by providing a resistor and an extra switch connected in series). At the scan side S, such a circuit could also be integrated, but it is also possible to change the gate control of the sustain switch devices to make a ramp output possible by using the output voltage as a feedback signal to the gate control. The ramp signal is generated at the electrodes of the display panel 2 so that the display panel 2 can be erased and/or set up correctly for the programming phase.

For more flexibility during the programming phase, if margins require this, a separate scan supply can be added that is used for the scan pulses during this phase. The level of this scan supply voltage should lay between ground G and the sustain supply level (Vsustain), so there is no influence on the maximum voltage the sustain switch devices should be able to handle. The outputs are still pushed down to ground G by the sustain switch devices. To pull up the outputs to the scan supply voltage level extra switch devices are required. These extra devices, however, can be relatively small devices as the load during scanning is not high and the requirements on the rise time are not high, too. A driving circuit with such a separate scan supply (Vscan) is shown as a second embodiment in Fig. 5.

A detailed circuit diagram of the driver IC 24 of the driving circuit of Fig. 5 is shown in Fig. 6 which essentially corresponds to Fig. 4, but differs therefrom that an extra circuitry is added to make an extra output voltage level possible usable for e.g. scanning. This extra voltage supply should have a level in between the ground level and the high voltage supply level. This extra circuitry can only pull the output voltage from a lower level to the applied scan voltage supply level and not down from a higher level. This is provided for e.g. scanning with a lower voltage, when all outputs are at ground level, except the one that is 'scanned' which is pulled to the scan voltage supply level. There are however other circuit topologies possible too, where an extra switch is applied to pull the output down to a certain level, or combinations of this.

To pull the output from a lower level up to the scan voltage supply level, buffer 56 has a low output to turn on MOSFET 58; this then pulls the gate of MOSFET 60 high via a diode 62. The gate source voltage of the MOSFET 60 is protected by a zener diode 64. With a high gate, the MOSFET 60 will conduct, and current from the scan voltage supply can flow via the diode 63 and the MOSFET 60 to the output. The diodes 62 and 63 block currents from flowing to the scan voltage supply, when the output voltage is higher than the scan supply voltage itself. When the MOSFET 58 is turned off with the buffer 56, the MOSFET 60 is not actively turned on anymore. It is really turned off when the output is switched to ground or to the energy recovery output, because then the MOSFET 46 or 52 pulls the gate of the MOSFET 60 low via a diode 66.

In Fig. 3 and 5 a new driving circuit is given, where an energy recovery topology is used which is already known per se from US 4,866,349 A, as also shown in Fig. 7a. But other energy recovery topologies can be used also, as given in Figs. 7b and 7c as further examples, wherein the energy recovery topology as shown in Fig. 7b is known per se from US 5,670,974 A, and the topology shown in Fig. 7c is known per se from US 6,072,447 A. These other energy recovery topologies in fact require a more simple driver IC with less components in the energy recovery part. So, these two energy recovery topologies are preferred implementations.

In Fig. 8 another, more simple, version of the driver IC 24 is given which is intended for the energy recovery topologies as shown in Figs. 7b and 7c. The difference is at the energy recovery input. Here the MOSFET 37 of Fig. 4 is replaced by a diode 70. The energy recovery input can not be controlled within this driver IC anymore and it depends on the rest of the energy recovery circuit when current will flow into the energy recovery input via the diode 70 to the output. Current in the other direction is blocked by the diode 70. In Fig. 8 the energy recovery input and energy recovery output are both connected to the same coil 80 of the energy recovery circuit, but they can also be connected to separate coils of an energy recovery circuit, depending on the energy recovery circuit topology.

In all driving circuits given so far it is spoken about switches or switching devices. In standard applications normally MOSFETs are used for this purpose, both for the discrete drivers and in the scan driver ICs. In the scan driver IC of Fig. 3 and 5 MOSFETs can also be used. It is however more interesting to use IGBTs (Insulated Gate Bipolar Transistors) as switching devices in this driver, because of their much higher current conduction per area. With these devices, it is possible to lower die manufacturing costs for the driving circuit of Fig. 3 and 5. However, the use of IGBTs in standard scan ICs has fewer advantages. Namely, the area for the switching device will decrease, but in standard scan ICs still a large diode is needed to conduct currents in the sustain phase; often the backgate diode of the MOSFETs is used for this purpose, so no area would be gained by using an IGBT here. But in the scan driver IC of Fig. 3 and 5 these diodes are not needed anymore, because the panel is actively driven with the IC during sustaining and so the use of IGBTs can save considerable area here.

Although the invention is described above with reference to examples shown in the attached drawings, it is apparent that the invention is not restricted to them, but can vary in many ways within the scope disclosed in the attached claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps other than those listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the device claim enumerating several means, several of these means may be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

Claims

CLAIMS:

1. A driving apparatus for driving a display panel (2, PDP) having scan terminal means (S) and common terminal means (C), said driving apparatus comprising: discrete driving circuits (8) adapted to be coupled to said common terminal means (C) of said display panel (2); and integrated scan driving circuits (24) adapted to be coupled to said scan terminal means (S) of said display panel (2) only so that said scan terminal means (S) are driven by said integrated scan driving circuits (24) only.

2. A driving apparatus as claimed in claim 1, further comprising energy recovering circuits (26) having active portions that are included in said integrated scan driving circuits (24).

3. The apparatus according to claim 1, further comprising sustain power supply means (Vsustain), said integrated scan driving circuits (24) being directly connected to said sustain power supply means (Vsustain).

4. The apparatus according to claim 1, further comprising scan power supply means (Vscan), said integrated scan driving circuits (24) being connected to said scan power supply means (Vscan).

5. The apparatus according to claim 1, further comprising an erase circuit (26) for erasing said display panel (2), said erase circuit (26) being adapted to be coupled to said common terminal means (C) of said display panel (2).

6. The apparatus according to claim 1, further comprising ramp output circuits included in said integrated scan driving circuits (24).

7. A display apparatus for displaying an image, the display apparatus comprising a display panel (2), in particular a plasma display panel (PDP), and a driving apparatus according to claim 1.