WO2004068665A3 - Wafer scale packaging technique for sealed optical elements and sealed packages produced thereby - Google Patents
Wafer scale packaging technique for sealed optical elements and sealed packages produced thereby Download PDFInfo
- Publication number
- WO2004068665A3 WO2004068665A3 PCT/US2004/001790 US2004001790W WO2004068665A3 WO 2004068665 A3 WO2004068665 A3 WO 2004068665A3 US 2004001790 W US2004001790 W US 2004001790W WO 2004068665 A3 WO2004068665 A3 WO 2004068665A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- sealed
- optical elements
- wafer
- wafer scale
- packaging technique
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 238000004806 packaging method and process Methods 0.000 title abstract 2
- 230000003287 optical effect Effects 0.000 title 1
- 235000012431 wafers Nutrition 0.000 abstract 5
- 239000004065 semiconductor Substances 0.000 abstract 3
- 239000004020 conductor Substances 0.000 abstract 2
- 239000002184 metal Substances 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
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- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Semiconductor Lasers (AREA)
- Led Device Packages (AREA)
- Packaging Frangible Articles (AREA)
Abstract
A wafer scale method for packaging semiconductor die or other devices in a sealed environment uses a plurality of wafers that are aligned and attached to each other to form an assembly. A front surface of a first wafer (10) has via regions (14) and laterally-extending conductors (15) electrically connected to metal at the via regions. Semiconductor die (25) or other devices are attached to thr front surface and electrically connected (28) to the conductors. A second wafer (20) has holes (22) which form recesses in which the semiconductor die or other devices and the vias are located. A third wafer (30) forms a cap for the recesses to provide a sealed environment (35) therein.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US44206403P | 2003-01-24 | 2003-01-24 | |
US60/442,064 | 2003-01-24 |
Publications (2)
Publication Number | Publication Date |
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WO2004068665A2 WO2004068665A2 (en) | 2004-08-12 |
WO2004068665A3 true WO2004068665A3 (en) | 2005-09-22 |
Family
ID=32825181
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/US2004/001790 WO2004068665A2 (en) | 2003-01-24 | 2004-01-23 | Wafer scale packaging technique for sealed optical elements and sealed packages produced thereby |
Country Status (1)
Country | Link |
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WO (1) | WO2004068665A2 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102007002725A1 (en) | 2007-01-18 | 2008-07-31 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Housing for micromechanical and micro-optical components used in mobile applications |
DE102007034888B3 (en) * | 2007-07-16 | 2009-01-22 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Microsystem and method of manufacturing a microsystem |
DE102008012384A1 (en) | 2008-03-04 | 2009-09-10 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Lid for microsystems and method of making a lid |
DE102009042479A1 (en) * | 2009-09-24 | 2011-03-31 | Msg Lithoglas Ag | Method for producing an arrangement having a component on a carrier substrate and arrangement, and method for producing a semifinished product and semifinished product |
DE102011119610A1 (en) | 2011-11-29 | 2013-05-29 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Process for producing structured optical components |
DE102012217793A1 (en) | 2012-09-28 | 2014-04-03 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | PRODUCTION METHOD |
DE102016105440A1 (en) | 2016-03-23 | 2017-09-28 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Process for producing optical components using functional elements |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4144516A (en) * | 1976-03-29 | 1979-03-13 | Aine Harry E | Solid state transducer and method of making same |
US5100480A (en) * | 1990-04-18 | 1992-03-31 | Mitsubishi Denki Kabushiki Kaisha | Solar cell and method for manufacturing the same |
US5668033A (en) * | 1995-05-18 | 1997-09-16 | Nippondenso Co., Ltd. | Method for manufacturing a semiconductor acceleration sensor device |
US6059188A (en) * | 1993-10-25 | 2000-05-09 | Symbol Technologies | Packaged mirror including mirror travel stops |
US6096155A (en) * | 1996-09-27 | 2000-08-01 | Digital Optics Corporation | Method of dicing wafer level integrated multiple optical elements |
US20020180016A1 (en) * | 2001-04-09 | 2002-12-05 | Vernon Shrauger | Critically aligned optical MEMS dies for large packaged substrate arrays and method of manufacture |
US20030010431A1 (en) * | 1996-09-27 | 2003-01-16 | Feldman Michael R. | Method of mass producing and packaging integrated subsystems |
US6620731B1 (en) * | 1997-12-18 | 2003-09-16 | Micron Technology, Inc. | Method for fabricating semiconductor components and interconnects with contacts on opposing sides |
US6753199B2 (en) * | 2001-06-29 | 2004-06-22 | Xanoptix, Inc. | Topside active optical device apparatus and method |
US6798931B2 (en) * | 2001-03-06 | 2004-09-28 | Digital Optics Corp. | Separating of optical integrated modules and structures formed thereby |
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2004
- 2004-01-23 WO PCT/US2004/001790 patent/WO2004068665A2/en active Application Filing
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4144516A (en) * | 1976-03-29 | 1979-03-13 | Aine Harry E | Solid state transducer and method of making same |
US5100480A (en) * | 1990-04-18 | 1992-03-31 | Mitsubishi Denki Kabushiki Kaisha | Solar cell and method for manufacturing the same |
US6059188A (en) * | 1993-10-25 | 2000-05-09 | Symbol Technologies | Packaged mirror including mirror travel stops |
US6257491B1 (en) * | 1993-10-25 | 2001-07-10 | Symbol Technologies, Inc. | Packaged mirror including mirror travel stops |
US5668033A (en) * | 1995-05-18 | 1997-09-16 | Nippondenso Co., Ltd. | Method for manufacturing a semiconductor acceleration sensor device |
US6096155A (en) * | 1996-09-27 | 2000-08-01 | Digital Optics Corporation | Method of dicing wafer level integrated multiple optical elements |
US20030010431A1 (en) * | 1996-09-27 | 2003-01-16 | Feldman Michael R. | Method of mass producing and packaging integrated subsystems |
US6620731B1 (en) * | 1997-12-18 | 2003-09-16 | Micron Technology, Inc. | Method for fabricating semiconductor components and interconnects with contacts on opposing sides |
US6798931B2 (en) * | 2001-03-06 | 2004-09-28 | Digital Optics Corp. | Separating of optical integrated modules and structures formed thereby |
US20020180016A1 (en) * | 2001-04-09 | 2002-12-05 | Vernon Shrauger | Critically aligned optical MEMS dies for large packaged substrate arrays and method of manufacture |
US6753199B2 (en) * | 2001-06-29 | 2004-06-22 | Xanoptix, Inc. | Topside active optical device apparatus and method |
Also Published As
Publication number | Publication date |
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WO2004068665A2 (en) | 2004-08-12 |
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