Self-Oscillating Power Supply
The invention relates to a Self-Oscillating Power Supply (further referred to as SOPS), and to an electronic apparatus comprising such a SOPS.
JP-A-6377376 discloses a SOPS which comprises a transformer with a primary winding, a secondary winding and an auxiliary winding. A series arrangement of a measurement resistor, a collector-emitter path of a first transistor and the primary winding receives a DC-input voltage. The first transistor periodically connects the DC-input voltage to the primary winding. The voltage across the measurement resistor represents the current flowing through the collector-emitter path during an on-period of the first transistor. A base of the first transistor is connected to the DC-input voltage via a resistor to receive a start-up current. A collector-emitter path of a second transistor is arranged across the series arrangement of the base-emitter path of the first transistor and the measurement resistor. The base of the second transistor is connected to a junction of the emitter of the first transistor and the measurement resistor.
The secondary winding supplies an output voltage via a rectifier diode to a load.
The auxiliary winding generates an auxiliary voltage which is supplied to the base of the first transistor via a series arrangement of a capacitor and a resistor. The auxiliary voltage has a positive polarity when the first transistor is conductive and a negative polarity when the first transistor is non-conductive. The value of the voltage supplied by the auxiliary winding depends on the value of the input voltage during the positive polarity period, and on the value of an output voltage during the negative polarity period.
During the positive polarity of the auxiliary voltage a first capacitor is charged via a first diode, and during the negative polarity of the auxiliary voltage a second capacitor is charged via a second diode. The voltage on the second capacitor is supplied to the base of the second transistor via a second resistor, the voltage on the first capacitor is supplied to the base of the second transistor via a series arrangement of a zenerdiode and a resistor.
In the now following, the operation of the prior art power supply is elucidated. At a particular instant, the first transistor becomes conductive and the DC-input voltage across the primary winding causes an increasing current in the primary inductor. The voltage across the measurement resistor increases due to this current. At a particular value of this voltage, the second transistor will become conductive, and the base-emitter voltage across the first transistor will become too low to keep the first transistor conductive.
When the first transistor becomes non-conductive, the voltage across the primary winding will change polarity, and will have a value determined by the output voltage and a turn ratio between the secondary winding and the primary winding. The voltage across the auxiliary winding will provide a negative voltage jump to the base of the first transistor via the series arrangement of the capacitor and the resistor to support the switching-off of the first transistor.
During the off-time of the first transistor, no current will flow through the measurement resistor and the second transistor will become non-conductive. The first transistor becomes conductive again when the voltage at its base becomes high enough due to the current flowing through the start-up resistor.
Now, a positive voltage jump will be provided to the base of the first transistor via the series arrangement of the capacitor and the resistor to support the switching-on of the first transistor. The first transistor will become non-conductive again when the second transistor becomes conductive at the instant the current through the measurement resistor is large enough.
The voltage on the first capacitor is proportional to the DC-input voltage, and the voltage on the second capacitor is proportional to the output voltage across the load connected to the secondary winding. The capacitors are electrolytic capacitors which have relatively large values and thus the voltage across the first capacitor is the average value of the DC-input voltage and the voltage across the second capacitor is the average value of the output voltage.
The voltages on the first and second capacitors will influence the switch-on instant of the second transistor via a series arrangement of the zenerdiode and the resistor, and via a resistor, respectively. When the output voltage decreases due to an overload, the voltage across the second capacitor becomes less negative and thus the second transistor will become conductive at a lower voltage across the measurement resistor and thus at a lower peak value of the current through the primary winding. When the input voltage increases, the
voltage across the first capacitor becomes more positive, and again the second transistor will become conductive at a lower peak value of the current through the primary winding.
It is essential to this type of over-current protection that both the average input voltage and the average output voltage act on the instant the second transistor becomes conductive.
This feedback of the voltage across the first capacitor allows to limit the short- circuit current without being subject to the effect of the input voltage. However, this prior art circuit is not able to prevent an over-current through the first transistor in dynamical (short lasting) situations such as during start-up of the SOPS.
It is an object of the invention to provide a SOPS which is able to substantially instantaneously prevent an over-current in the main semiconductor switch.
A first aspect of the invention provides a SOPS comprising: an inductor, a main current path of a main semiconductor switch being arranged in series with the inductor for periodically coupling a DC-input voltage to the inductor, a measurement circuit for supplying a measurement signal representing a current through the inductor, a feedback circuit for generating a feedback signal representing a substantially instantaneous value of the DC-input voltage, a means for switching off the main semiconductor switch, the means for switching off comprising an input for receiving the measurement signal and the feedback signal to determine a switch-off instant of the main semiconductor switch based on the measurement signal and the feedback signal.
The SOPS in accordance with the invention comprises an inductor, a main semiconductor switch (the first switch of the prior art), a measurement circuit, a feedback circuit, and means for switching off the main semiconductor switch.
A main current path of the main semiconductor switch is arranged in series with the inductor for periodically coupling an input voltage to the inductor. The measurement circuit supplies a measurement signal representing a current through the inductor. The feedback circuit generates a feedback signal representing a substantially instantaneous value of the input voltage. The means for switching off the main semiconductor switch comprise an input to receive the measurement signal and the feedback signal to determine a switch-off instant of the main semiconductor switch based on the measurement signal and the feedback signal.
JP-A-6377376 discloses that the capacitor Cl should have a relatively large value, the "+" near this capacitor indicates that it is an electrolytic capacitor. Electrolytic capacitors are available in relative high values only. Therefore, although this circuit will decrease the dependency on the input voltage of the short-circuit current, it will act too slow to perform fast dynamic compensation of the influence of the DC-input voltage on the current through the main switch such as required for example during start-up of the SOPS.
The circuit in accordance with the invention uses a feedback signal which represents the substantially instantaneous value of the DC-input voltage instead of the average DC-value which is present on the prior art capacitor, and thus is able to react fast enough to provide dynamic compensation of variations of the DC-input voltage instantaneously. These fast dynamic variations, for example, occur during the start-up of the power supply when the value of the DC-input voltage may rise steeply, or if relatively high frequent ripple occurs on the DC-input voltage. The DC-input voltage usually is a rectified and smoothened mains voltage. This ripple may be caused by disturbances on the DC-input voltage due to disturbances on the mains voltage, or this ripple may be caused by sudden large load changes.
In an embodiment of the invention as defined in claim 4, a filter capacitor is present at the input of the means for switching off the main semiconductor switch. This relatively small filtering capacitor filters small disturbances only. The time constant of the filter capacitor is selected small with respect to the switching period of the SOPS, such that the dynamic compensation of the influence of the DC-input voltage (further also referred to as input voltage) within one switching period, or within a few switching periods of the SOPS remains possible. Thus, even at start-up of the SOPS, an over-current through the main semiconductor switch is prevented. In an embodiment as defined in claim 5, the SOPS in accordance with the invention comprises the filter capacitor and a series circuit which comprises a series arrangement of a diode, a zenerdiode and a resistor, which series arrangement is arranged between the auxiliary winding and the base of a control semiconductor switch (the second transistor of the prior art). The diode is poled to conduct, and the zenerdiode is poled to zener when the main semiconductor switch is conductive, and thus when the voltage across the auxiliary winding is determined by the DC-input voltage.
The extra current through this series arrangement, which current depends on the value of the input voltage, will cause the control semiconductor switch to switch off at a smaller value of the current through the primary winding. Thus, the value of the current
through the primary winding at which the control semiconductor switch will become conductive and thus the main semiconductor switch will be switched off decreases with an increasing value of the input voltage. Thus, an increase of the input voltage which allows the SOPS to supply more power, is compensated by a decreasing peak value of the current through the primary winding, and consequently, the power which the SOPS is able to supply does depend less on the value of the input voltage.
Due to the fact that the series arrangement should supply a feedback signal that represents substantially the instantaneous value of the input voltage, it is clear that this series arrangement cannot comprise a large smoothing capacitor as used in the prior art. In an embodiment as defined in claim 6, in a preferred simple embodiment in accordance with the invention, it is explicitly claimed that the series arrangement does not comprise other elements than the diode, the zenerdiode and the resistor.
Although the prior art SOPS shows a series arrangement of a diode, a zenerdiode and a resistor between the auxiliary winding and the base of the second transistor, the prior art does not disclose the capacitor at the base of the second transistor.
These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiments described hereinafter.
In the drawings:
Fig. 1 shows a circuit diagram of a SOPS in accordance with an embodiment of the invention, and
Figs. 2A - 2F show signals for elucidating the operation of the SOPS shown in Fig. 1. The same references in different Figs, refer to the same signals or to the same elements performing the same function.
Fig. 1 shows a circuit diagram of a SOPS in accordance with an embodiment of the invention.
A transformer T has a primary winding Lp, a secondary winding Ls, and an auxiliary winding Ld. A series arrangement of a measurement resistor RS, a drain-source path (the main current path) of a main transistor Ml and the primary winding Lp receives a DC-input voltage Vi. The main transistor Ml periodically connects the DC-input voltage Vi
to the primary winding Lp. The DC-input voltage Vi is usually a rectified and smoothened mains voltage which is supplied via a switch. The DC-input voltage Vi may also be a battery voltage which is supplied via a switch. The DC-input voltage increases steeply when the switch is closed and the SOPS should start operating. The circuit in accordance with the invention is able to react correctly on such a steep increase of the DC-input voltage.
The voltage VS across the measurement resistor RS represents the current IL flowing through the primary winding Lp and source-drain path of the main transistor Ml . A gate of the main transistor Ml is connected to the input voltage Vi via a resistor RI to receive a start-up current. A collector-emitter path of a control transistor Ql is arranged across the series arrangement of the gate-source path of the main transistor Ml and the measurement resistor RS. The base of the control transistor Ql is connected to a junction of the source of the main transistor Ml and the measurement resistor RS via a resistor Rl . A resistor R2 is arranged between the base of the control transistor Ql and ground RP. The resistors Rland RS are part of a measurement circuit MC which supplies a measurement current VM through the resistor Rl , which measurement current VM represents the current IL through the primary winding Lp during the on-time Ton (see Fig. 2) of the main switch Ml.
The secondary winding Ls supplies an output voltage Vo via a rectifier diode D3 across a parallel arrangement of a smoothing capacitor C5 and a load L.
The auxiliary winding Ld generates an auxiliary voltage Vd which is supplied to the gate of the main transistor Ml via a series arrangement of a capacitor C2 and a resistor R3. The auxiliary voltage Vd has a positive polarity when the main transistor Ml is conductive and a negative polarity when the main transistor Ml is non-conductive. The value of the auxiliary voltage Vd depends on the value of the input voltage Vi during the positive polarity period, and on the value of the output voltage Vo during the negative polarity period. A feedback circuit FBC comprises a series arrangement of a zenerdiode DZ, a diode DR, and a resistor RA. The series arrangement is arranged between the base of the control transistor Ql and the junction of the auxiliary winding Ld and the capacitor C2 to supply a feedback current FS.
A switching circuit CM comprises the control transistor Ql, a relatively small capacitor Cl which is arranged between the base of the control transistor Ql and ground RP, and the resistor R2 which is arranged in parallel with the capacitor Cl . The feedback current FS and the measurement current VM both are supplied to the input II of the switching circuit CM.
The voltage across the primary winding Lp is denoted by VL, the control voltage at the gate of the main transistor Ml is denoted by VC1, and the control voltage at the base of the control transistor Ql is denoted by VC2.
Figs. 2 show signals as a function of the time t for elucidating the operation of the SOPS shown in Fig. 1. Fig. 2A shows the voltage VL across the primary winding Lp. Fig. 2B shows the current IL through the primary winding Lp. Fig. 2C shows the auxiliary voltage Vd supplied by the auxiliary winding Ld. Fig. 2D shows the measurement current VM. Fig. 2E shows the control signal VC2 at the base of the control transistor Ql. Fig. 2F shows the control signal VC1 at the gate of the main transistor Ml . In Fig. 2A, during the on-time Ton of the main transistor Ml, substantially the
DC-input voltage Vi is present across the primary winding Lp and thus the current IL through the primary winding Lp increases substantially linear as is shown in Fig. 2B. During the off- time Toff of the main transistor Ml, an oppositely poled transformed output voltage nVo is present across the primary winding Lp and thus the current IL through the primary winding Lp decreases substantially linear as is shown in Fig. 2B. The factor n is the turn ratio of the primary winding Lp and the secondary winding Ls.
The on-time Ton lasts from instant tl to instant t2, the off-time Toff of the main transistor Ml lasts from instant t2 to instant t3. One switching period Tr of the SOPS comprises one successive on-time Ton and off-time Toff and lasts from tl to t3. At instant t3 a next switching period starts.
As shown in Fig. 2C, the auxiliary voltage Vd supplied by the auxiliary winding Ld has substantially the same shape as the voltage VL across the primary winding Lp. This is due to the fact that the primary winding Lp and the auxiliary winding Ld are equally poled, as indicated by the dots near these windings. The ratio of the amplitudes of the voltage Vd and the voltage VL depends on the turns ratio of the auxiliary winding Ld and the primary winding Lp.
Fig. 2D shows that the measurement current VM through the resistor Rl (which is related to the voltage VS across the measurement resistor RS) which represents the current IL through the primary winding Lp during the on-time Ton of the main transistor Ml. In the series arrangement of the zenerdiode DZ, the diode DR and the resistor
RA, the diode DR takes care that only the voltage Vd of the auxiliary winding Ld which has a positive polarity (thus during the on-time Ton of the main transistor Ml, when the voltage Vd is representative for the value of the DC-input voltage Vi) will be supplied to the base of the control transistor Qlas a control current FS. The zenerdiode DZ provides a threshold, the
control current FS will be supplied to the base of the control transistor Ql only when the DC- input voltage Vi crosses a predetermined value. The resistor RA is selected to have a value such that the influence of the value of the DC-input voltage Vi has the desired effect.
Fig. 2E shows the control voltage VC2 at the base of the control transistor Ql. The control voltage VC2 is substantially the resulting voltage due to a superposition of the measurement current VM through resistor Rl (resulting from the voltage Vs across the measurement resistor RS) and the control current FS supplied by the auxiliary winding Ld via the feedback circuit FBC during the on-time Ton of the main transistor Ml . At instant t2, the control transistor Ql will be switched on, and consequently, the main transistor Ml will be switched off, because the control voltage VC2 reaches the base-emitter voltage VBE at which the control transistor Ql starts conducting.
If the DC-input voltage Vi increases, the control current FS through the series arrangement of the zenerdiode DZ, the diode DR, and the resistor RA increases, and the level VBE will be reached earlier, consequently, the main transistor Ml will be switched off earlier. As the instantaneous value of the DC-input voltage Vi is used, the reaction on a variation of the DC-input voltage Vi is instantaneous.
The value of the capacitor Cl is selected to be so low that the variations of the DC-input voltage are substantially not integrated. This small capacitor Cl is provided to filter small high frequent disturbances on the base of the control transistor Ql only. Fig. 2F shows the voltage VC1 at the gate of the main transistor Ml . At the instant tl when the main transistor Ml becomes conductive, the voltage VC1 at the gate of the main transistor Ml jumps to a higher level due to the feed- forward of the auxiliary voltage Vd via the capacitor C2 and the resistor R3. At the instant t2, the control switch Ql becomes conductive and the voltage VC1 changes to substantially the ground level. Now, the voltage VC1 is below the voltage level VG above which the main transistor Ml is conductive, and the main transistor Ml will become non-conductive. As the control transistor Ql becomes non-conductive too, the voltage VC1 starts rising due to the start-up current through the start-up resistor RI. At the instant t3, the voltage VC1 reaches the level VG, and the main transistor Ml becomes conductive again. The series arrangement of the resistor R3 and the capacitor C2 provides a forward feedback to support the switching of the main transistor Ml. h a practical embodiment, the components used may have next values:
Lp = 380 micro Henry, Ld = 18 micro Henry, Ls = 380 micro Henry,
Cl = 220 pico Farad, C2 = 2.2 nano Farad, C5 = 47 micro Farad, Rl = 470 ohms, R2 = 330 ohms, R3 = 1500 ohms, RA = 33 kilo ohms, RI = 1 mega ohms, RS = 0,47 ohms.
DR - BYV95C, DZ = BZX79C-39, D3 = BYV95C, and Ml = STP3NA60, Ql = BC817-25.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. For example, the transistors Ml and Ql shown in Fig. 1 may both either be a bipolar transistor, a field effect transistor or any other suitable controllable semiconductor switching element.
The measurement resistor RS for measuring the current IL through the primary winding Lp during the on-time Ton of the main transistor Ml may be positioned anywhere in series with the primary winding Lp. It is even possible to use the impedance of the drain- source path of the main transistor Ml as the measurement resistor RS. The current IL through the primary winding Lp can be measured in other ways, for example via a current transformer.
The control transistor Ql may be replaced be a plurality of transistors. The feedback circuit FBC may contain other elements than the series arrangement of the zenerdiode DZ, the diode DR, and the resistor RA and need not be connected to the auxiliary winding Ld. What counts is that the feedback circuit FBC provides information about the instantaneous value of the DC-input voltage Vi. For example, the feedback circuit may be connected to the DC-input voltage Vi directly, or may contain an operational amplifier which receives a tapped DC-input voltage Vi.
Relevant to the invention is that the instant at which the main switch Ml is switched off depends on both the current IL through the primary winding and on the actual instantaneous value of the DC-input voltage Vi. hi the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps other than those listed in a claim. In the device claim enumerating several means, several of these means can be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.