WO2003071601A2 - Module de circuit et procede de fabrication - Google Patents
Module de circuit et procede de fabrication Download PDFInfo
- Publication number
- WO2003071601A2 WO2003071601A2 PCT/DE2003/000430 DE0300430W WO03071601A2 WO 2003071601 A2 WO2003071601 A2 WO 2003071601A2 DE 0300430 W DE0300430 W DE 0300430W WO 03071601 A2 WO03071601 A2 WO 03071601A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit carrier
- circuit
- circuit module
- carrier sections
- electronic components
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/49531—Additional leads the additional leads being a wiring board
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4905—Shape
- H01L2224/49051—Connectors having different shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0101—Neon [Ne]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01058—Cerium [Ce]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01061—Promethium [Pm]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/1016—Shape being a cuboid
- H01L2924/10161—Shape being a cuboid with a rectangular active surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Definitions
- the invention relates to a circuit module with a plurality of electronic components and a manufacturing method of the same according to the preamble of the independent claims.
- a device for packaging electronic components by means of injection molding technology is known from patent application 1026508.5.
- a large number of electronic components are packaged on a first side of a circuit carrier made of a large-area ceramic substrate in a plastic housing.
- a size of more than 4 cm 2 is defined as a large area.
- the known device In order to compensate for the difference in the coefficient of expansion between the ceramic substrate and the plastic housing, the known device is used to bulge the large-area ceramic substrate before the plastic housing compound is applied, and is therefore exposed to a high load and risk of breakage.
- a circuit module In the shrinking of the plastic compound for the housing after the molten application of the same to the bulging ceramic substrate, a circuit module can be implemented that at room temperature and at the operating temperatures of the
- Circuit module despite a large ceramic substrate has a flat and stress-free housing.
- the known device thus achieves a balance between the different thermal expansion coefficients of plastic and ceramic in that the large-area ceramic substrate is bulged out before the application of a plastic compound using a complex device becomes. It is desirable to avoid the elaborate bulging with the associated risk of breakage of a large-area ceramic and nevertheless to create a possibility of accommodating a large-area circuit board in a plastic housing without stress, especially since the number of electronic components on the ceramic circuit board increases the need for large-area Ceramic carriers are constantly increasing.
- the object of the invention is to specify a circuit module with several electronic components and to provide a corresponding method for producing the circuit module, in which a compensation of the different thermal expansion coefficients of ceramic and plastic mass is created.
- the circuit module with a plurality of electronic components has a circuit carrier made of ceramic and a housing made of plastic.
- the thermal expansion coefficient of the circuit carrier is smaller than that of the plastic housing in which the circuit carrier is packaged with the electronic components, the circuit carrier is separated into a plurality of circuit carrier sections, each of which is electrically connected to one another via bond connections in the plastic housing.
- the segmentation of the large-area circuit carrier sections, which are electrically connected to one another by flexible bond connections in the plastic housing reduces the thermal stresses due to the different coefficients of thermal expansion and compensates. which makes it possible to provide circuit carriers of any size for a circuit module without complex devices and techniques.
- circuit carrier It is only necessary to separate the circuit carrier into circuit carrier sections before packaging the circuit carrier in a plastic housing compound, and the individual circuit carrier sections are to be electrically connected to one another with bond connections. This effort is less than the effort for bulging the large-area ceramic substrate.
- circuit carrier area can be expanded as desired by adding further circuit carrier sections.
- the area size per circuit carrier section should not exceed the value of 4 cm 2 .
- the circuit carrier sections can be arranged in rows and columns, so that there remains a distance between 1 and 5 mm, which is to be bridged by the electrical bond connections. In the circuit module according to the invention, this distance is also filled with plastic housing compound.
- the back of the circuit carrier sections can protrude from the plastic housing compound or is at least kept free of plastic housing compound in order to ensure an intensive heat exchange of the ceramic with the surroundings.
- Ceramic because of its crystallinity, has a higher thermal conductivity than the plastic housing mass, the electronic components can be cooled more intensively from the back of the circuit carrier.
- the rear side of the circuit module can be connected to a metallic heat sink by possibly arranging a cooling plate with heat sinks on the rear side of the circuit module.
- circuit carrier sections As the size of the electronic components increases, it becomes necessary for circuit carrier sections to have at least one surface size, which makes it possible for at least one electronic component to be accommodated in each case on a circuit carrier section.
- Such electronic components have semiconductor chips with active semiconductor components which generate a limited heat loss and are therefore not only electrically connected to other semiconductor chips via the circuit carrier section, but are also thermally balanced with the surroundings in terms of thermal engineering. This thermal compensation is particularly important for circuit modules whose electronic components have power diodes, power transistors, bipolar power transistors with an insulated gate and / or MOS transistors.
- each circuit carrier section made of ceramic already means a heat sink, via which the power loss can be effectively reduced.
- each circuit carrier section can also have passive components and / or rewiring lines, it being possible for passive components, such as resistors, capacitors and coils, to be introduced directly on the surface of the circuit carrier section by structuring a metallic coating of the circuit carrier section.
- the Rewiring lines on the circuit carrier section can be connected to the electrodes of the electronic components or to their external contacts via bond connections.
- Aluminum bond wires can be used for this purpose, which are ultrasonically
- Bonding methods can realize bond connections for signal and / or data transmission, whereby aluminum bond wires with a diameter between 18 and 100 ⁇ m can be used for these small signals, while for supply connections the aluminum bond wire has diameters between 100 and 750 ⁇ m.
- the diameter of the bond connections between the ceramic circuit carrier sections can be adapted to the respective current load, supply connections having diameters between 100 and 750 ⁇ m being realized.
- the arrangement has a notching tool which is arranged in a region of an aluminum bond wire guide.
- the cooling of the circuit module on its rear side can be further intensified by forming cooling fins on a heat sink.
- a method for producing a circuit module with a plurality of electronic components has the following method steps: First, a plurality of circuit carrier sections, which have contact connection areas for flat conductors of a flat conductor frame and for bond connections, are equipped with a plurality of electronic components. Then the printed circuit board sections are arranged next to one another with joints between the circuit board sections. After that, flat conductors become a flat conductor frame attached to corresponding contact pads and the circuit carrier sections additionally connected to one another via bond connections between corresponding contact pads to form a multi-substrate module. Finally, the multi-substrate module is packed into a circuit module in a plastic mass.
- the electronic components can either be soldered onto correspondingly provided metallic contact areas of a rewiring line pattern that can be applied to each circuit carrier section, or can be fixed at predetermined positions on a rewiring line pattern with a semiconductor chip brush using an electrically conductive adhesive.
- the electrodes of the electronic components can then be bonded to this rewiring line pattern on the circuit carrier section.
- relatively thin aluminum bonding wires are used for signal and data lines microns with a diameter between 25 and 100, while power supply lines relatively "thick aluminum bonding wires microns with a diameter from 100 to 750 are used.
- the joints created when the circuit carrier is arranged are then again electrically bridged by bonding aluminum wires using a wedge-wedge ultrasonic bond at room temperature.
- outer flat conductors of a flat conductor frame are brought up to the individual circuit carrier sections and connected to contact connection surfaces of the rewiring line pattern, so that during the subsequent packaging in a plastic housing mass, these flat conductors as Protrude external connections from the plastic housing mass, but at least have exposed surfaces for contacting from the outside.
- Circuit carrier of such a multi-chip module is separated m individual circuit carrier sections. This prevents an impermissibly high deflection of the circuit module and also increases the reliability, which was previously impaired by the difference between a ceramic material and a plastic material, because high thermal stresses and thus mechanical forces could occur.
- each circuit carrier section is limited in order to keep the mechanical stresses and thus the deflection in an acceptable frame, so that they do not take effect externally and the dissipation of power losses due to deflection or delamination is not hindered.
- the mechanical stresses are significantly reduced by dividing the circuit carrier into several small ceramic individual substrates.
- the deflection of the circuit module through the use of several individual substrates is reduced in such a way that it can no longer be ascertained with the naked eye.
- FIG. 1 shows a schematic top view of a circuit module 1 of a first embodiment of the invention
- FIG. 2 shows a schematic cross section through the circuit module 1 of the first embodiment of the invention along the section line A-A of FIG. 1,
- Figure 3 shows a schematic plan view of a circuit module of a second embodiment of the invention.
- FIG. 1 shows a schematic top view of a circuit module 1 of a first embodiment of the invention.
- Reference number 2 denotes electronic components which are arranged in the circuit module.
- the reference symbol 3 denotes the circuit carrier made of ceramic, which in this embodiment of the invention is divided into three circuit carrier sections 5 and carries the electronic components 2.
- the reference numeral 6 denotes bond connections between the circuit carrier sections 5 in order to electrically connect them to one another.
- the reference symbol 8 denotes a ne plastic mass, which forms the housing 4 made of plastic, in which electronic components 2 are embedded.
- the reference symbol 9 denotes semiconductor chips which belong to the electronic components 2 of the circuit module shown here.
- the reference number 10 denotes power diodes and the reference number 11 power transistors.
- the reference numeral 16 denotes separating joints between the circuit carrier sections 5, which occur when a plurality of circuit carrier sections 5 are arranged to form a circuit carrier 3.
- the reference numeral 17 designates aluminum bonding wires, which ensure the bonding connections between the individual circuit carrier sections 5 and bridge the joints.
- Supply services are supplied to the circuit module 1 shown in FIG. 1 via wide outer flat conductors 18, which are electrically connected with their inner flat conductor ends to corresponding contact connection areas of a rewiring line pattern on the circuit carrier sections 5.
- the rewiring line pattern on the circuit carrier sections 5 made of ceramic is omitted.
- the active electronic components composed of diodes 10 and power transistors 11 are supplied with corresponding currents via the supply flat conductor 18.
- Control signals and data are supplied to the circuit module 1 via the narrower outer flat conductors 19 of the circuit module 1 shown in FIG.
- circuit carrier 3 made of ceramic By separating the circuit carrier 3 made of ceramic into three circuit carrier sections 5 and then twisting the circuit carrier sections 5 via the bond connections 6 to form a multi-substrate component, that the different coefficient of thermal expansion between the ceramic and the plastic mass of the housing does not have the effect that a substantial deflection of the entire component occurs.
- the circuit carrier sections made of ceramic are kept smaller than 4 cm 2 , so that the thermal stresses between ceramic carrier shield 5 and plastic housing mass 8 m remain within permissible limits without impairing the reliability of the circuit module.
- the plastic housing compound and the plastic housing are only indicated in outline with a dashed line m in this FIG. 1 in order to increase the clarity of the illustration.
- Figure 2 shows a schematic cross section through the circuit module 1 of the first embodiment of the invention along the section line A-A of Figure 1.
- Components with the same functions as m figure are identified by the same reference numerals and not discussed separately.
- the plastic housing compound 8 includes the three ceramic circuit carrier sections 5 shown in FIG. 1, a power diode 10 and a power transistor 11 being visible on each of the circuit carrier sections 5 on the carrier sections 5 m of this cross section.
- the power components that is to say the diode 10 and the power transistor 11, are connected to one another via bonding wires 15.
- the output electrode 20 of the power transistor 11 is connected via a further bonding wire 15 to a rewiring line 21, which in turn forms a contact connection area 22 on which a correspondingly thick aluminum bonding wire 17 establishes the electrical connection to the adjacent circuit carrier section 5.
- a flat conductor 18 is fastened on the circuit carrier 3, which in turn is electrically connected to a contact connection area 22.
- Figure 3 shows a schematic plan view of a circuit module 1 of a second embodiment of the invention.
- Components with the same functions as in the previous figures are identified by the same reference numerals and are not discussed separately.
- the only difference between the first embodiment of the invention and the second embodiment of the invention is that here a larger circuit carrier 3 made of ceramic is divided into six circuit carrier sections 5, which are arranged in rows and columns to form a rectangular circuit module 1.
- the distances or joints 16 between the individual circuit carrier sections 5 are overcome in the plastic housing compound 8 by means of corresponding bond connections 6 made of an aluminum wire 18.
- the mechanical separation of the large circuit carrier 3 into six small circuit carrier sections 5 ensures that the difference in the coefficient of thermal expansion between ceramic and plastic is kept within reasonable limits, so that the reliability of such a large circuit module is improved.
- 12 thicker bond wires with a diameter between 100 ⁇ m and 750 ⁇ m are used for supply connections than for signal and data lines with a diameter between 18 ⁇ m and 100 ⁇ m.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
L'invention concerne un module de circuit (1) comportant plusieurs composants électroniques (2) et un procédé de fabrication de celui-ci. Ledit module de circuit (1) comporte un porte-circuit en céramique (3) et un boîtier en plastique (4), et les différences au sein des coefficients de dilatation thermique sont minimisées du fait que le porte-circuit (3) comportant les composants électroniques (2) est divisé en plusieurs sections de porte-circuit (5). Les fentes de séparation sont pontées électriquement par des connexions de liaison (6) dans le boîtier en plastique (4).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10206817 | 2002-02-18 | ||
DE10206817.8 | 2002-02-18 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2003071601A2 true WO2003071601A2 (fr) | 2003-08-28 |
WO2003071601A3 WO2003071601A3 (fr) | 2003-11-27 |
Family
ID=27740244
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2003/000430 WO2003071601A2 (fr) | 2002-02-18 | 2003-02-13 | Module de circuit et procede de fabrication |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2003071601A2 (fr) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004090977A1 (fr) * | 2003-04-09 | 2004-10-21 | Ixys Semiconductor Gmbh | Ensemble semi-conducteur de puissance encapsule |
DE102009044933A1 (de) * | 2009-09-24 | 2011-04-07 | Infineon Technologies Ag | Leistungshalbleitermodul mit mindestens zwei verbundenen Schaltungsträgern und Verfahren zur Herstellung eines Leistungshalbleitermoduls mit mindestens zwei verbundenen Schaltungsträgern |
EP2525397A1 (fr) * | 2011-05-17 | 2012-11-21 | IXYS Semiconductor GmbH | Semi-conducteur de puissance |
DE102011080153A1 (de) * | 2011-07-29 | 2013-01-31 | Infineon Technologies Ag | Flexible verbindung von substraten in leistungshalbleitermodulen |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4554613A (en) * | 1983-10-31 | 1985-11-19 | Kaufman Lance R | Multiple substrate circuit package |
US5075759A (en) * | 1989-07-21 | 1991-12-24 | Motorola, Inc. | Surface mounting semiconductor device and method |
US5332921A (en) * | 1992-04-27 | 1994-07-26 | Kabushiki Kaisha Toshiba | Resin-seal type semiconductor device |
DE19522173C1 (de) * | 1995-06-19 | 1996-10-17 | Eupec Gmbh & Co Kg | Leistungs-Halbleitermodul |
DE19707514A1 (de) * | 1997-02-25 | 1998-08-27 | Eupec Gmbh & Co Kg | Halbleitermodul |
US6060772A (en) * | 1997-06-30 | 2000-05-09 | Kabushiki Kaisha Toshiba | Power semiconductor module with a plurality of semiconductor chips |
US6272015B1 (en) * | 1997-11-24 | 2001-08-07 | International Rectifier Corp. | Power semiconductor module with insulation shell support for plural separate substrates |
DE10125697A1 (de) * | 2001-05-25 | 2002-12-05 | Eupec Gmbh & Co Kg | Leistungshalbleitermodul und Verfahren zum Herstellen eines Leistungshalbleitermoduls |
WO2003021680A2 (fr) * | 2001-09-01 | 2003-03-13 | Eupec Gmbh | Module de puissance a semi-conducteur |
-
2003
- 2003-02-13 WO PCT/DE2003/000430 patent/WO2003071601A2/fr not_active Application Discontinuation
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4554613A (en) * | 1983-10-31 | 1985-11-19 | Kaufman Lance R | Multiple substrate circuit package |
US5075759A (en) * | 1989-07-21 | 1991-12-24 | Motorola, Inc. | Surface mounting semiconductor device and method |
US5332921A (en) * | 1992-04-27 | 1994-07-26 | Kabushiki Kaisha Toshiba | Resin-seal type semiconductor device |
DE19522173C1 (de) * | 1995-06-19 | 1996-10-17 | Eupec Gmbh & Co Kg | Leistungs-Halbleitermodul |
DE19707514A1 (de) * | 1997-02-25 | 1998-08-27 | Eupec Gmbh & Co Kg | Halbleitermodul |
US6060772A (en) * | 1997-06-30 | 2000-05-09 | Kabushiki Kaisha Toshiba | Power semiconductor module with a plurality of semiconductor chips |
US6272015B1 (en) * | 1997-11-24 | 2001-08-07 | International Rectifier Corp. | Power semiconductor module with insulation shell support for plural separate substrates |
DE10125697A1 (de) * | 2001-05-25 | 2002-12-05 | Eupec Gmbh & Co Kg | Leistungshalbleitermodul und Verfahren zum Herstellen eines Leistungshalbleitermoduls |
WO2003021680A2 (fr) * | 2001-09-01 | 2003-03-13 | Eupec Gmbh | Module de puissance a semi-conducteur |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004090977A1 (fr) * | 2003-04-09 | 2004-10-21 | Ixys Semiconductor Gmbh | Ensemble semi-conducteur de puissance encapsule |
DE102009044933A1 (de) * | 2009-09-24 | 2011-04-07 | Infineon Technologies Ag | Leistungshalbleitermodul mit mindestens zwei verbundenen Schaltungsträgern und Verfahren zur Herstellung eines Leistungshalbleitermoduls mit mindestens zwei verbundenen Schaltungsträgern |
DE102009044933B4 (de) | 2009-09-24 | 2023-03-30 | Infineon Technologies Ag | Leistungshalbleitermodul mit mindestens zwei verbundenen Schaltungsträgern und Verfahren zur Herstellung eines Leistungshalbleitermoduls mit mindestens zwei verbundenen Schaltungsträgern |
EP2525397A1 (fr) * | 2011-05-17 | 2012-11-21 | IXYS Semiconductor GmbH | Semi-conducteur de puissance |
US9042103B2 (en) | 2011-05-17 | 2015-05-26 | Ixys Semiconductor Gmbh | Power semiconductor module with asymmetrical lead spacing |
EP2525397B1 (fr) | 2011-05-17 | 2015-10-21 | IXYS Semiconductor GmbH | Semi-conducteur de puissance |
US9210818B2 (en) | 2011-05-17 | 2015-12-08 | Ixys Semiconductor Gmbh | Power semiconductor module with asymmetrical lead spacing |
DE102011080153A1 (de) * | 2011-07-29 | 2013-01-31 | Infineon Technologies Ag | Flexible verbindung von substraten in leistungshalbleitermodulen |
Also Published As
Publication number | Publication date |
---|---|
WO2003071601A3 (fr) | 2003-11-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0221399B1 (fr) | Module semi-conducteur de puissance | |
EP1255299B1 (fr) | Module semiconducteur de puissance avec contact à pression | |
DE68920767T2 (de) | Halbleiterpackung. | |
EP0931346B1 (fr) | Composant microelectronique a structure sandwich | |
DE112007001249B4 (de) | Kühlbares Halbleitergehäuse | |
DE102006037118B3 (de) | Halbleiterschaltmodul für Bordnetze mit mehreren Halbleiterchips, Verwendung eines solchen Halbleiterschaltmoduls und Verfahren zur Herstellung desselben | |
DE10033977B4 (de) | Zwischenverbindungsstruktur zum Einsatz von Halbleiterchips auf Schichtträgern | |
EP1450404B1 (fr) | Assemblage en contact à pression avec module semi-conducteur de puissance | |
DE19700963C2 (de) | Verfahren zur Herstellung eines Leistungsmoduls mit einer aktive Halbleiterbauelemente und passive Halbleiterbauelemente aufweisenden Schaltungsanordnung | |
DE102015110653A1 (de) | Doppelseitiges Kühl-Chipgehäuse und Verfahren zum Herstellen desselben | |
DE3616494A1 (de) | Integrierte schaltungspackung und verfahren zur herstellung einer integrierten schaltungspackung | |
WO1998015005A9 (fr) | Composant microelectronique a structure sandwich | |
DE10142119B4 (de) | Elektronisches Bauteil und Verfahren zu seiner Herstellung | |
EP1378008A2 (fr) | Module de puissance | |
DE69004581T2 (de) | Plastikumhüllte Hybrid-Halbleiteranordnung. | |
DE112016007562B4 (de) | Halbleitervorrichtung | |
DE102007032775B4 (de) | Leistungsverstärker | |
EP1192841A1 (fr) | Module de puissance intelligent | |
DE102004041088A1 (de) | Halbleiterbauteil in Flachleitertechnik mit einem Halbleiterchip | |
DE10205698A1 (de) | Leuchtdiode und Verfahren zur Herstellung Derselben | |
DE10157362B4 (de) | Leistungsmodul und Verfahren zu seiner Herstellung | |
WO2003071601A2 (fr) | Module de circuit et procede de fabrication | |
DE19821916A1 (de) | Gehäusekonstruktion einer Halbleitereinrichtung | |
DE10042839B4 (de) | Elektronisches Bauteil mit Wärmesenke und Verfahren zu seiner Herstellung | |
DE102013226989A1 (de) | Halbleiter-Bauteil mit Chip für den Hochfrequenzbereich |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): BR CN JP KR US |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT SE SI SK TR |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
122 | Ep: pct application non-entry in european phase | ||
NENP | Non-entry into the national phase |
Ref country code: JP |
|
WWW | Wipo information: withdrawn in national office |
Country of ref document: JP |