WO2003043212A1 - Receiver and its tracking adjusting method - Google Patents

Receiver and its tracking adjusting method Download PDF

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Publication number
WO2003043212A1
WO2003043212A1 PCT/JP2001/010039 JP0110039W WO03043212A1 WO 2003043212 A1 WO2003043212 A1 WO 2003043212A1 JP 0110039 W JP0110039 W JP 0110039W WO 03043212 A1 WO03043212 A1 WO 03043212A1
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WO
WIPO (PCT)
Prior art keywords
frequency
voltage
circuit
value
receiver
Prior art date
Application number
PCT/JP2001/010039
Other languages
French (fr)
Japanese (ja)
Inventor
Hiroshi Miyagi
Original Assignee
Niigata Seimitsu Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP2000301768A priority Critical patent/JP2002111527A/en
Application filed by Niigata Seimitsu Co., Ltd. filed Critical Niigata Seimitsu Co., Ltd.
Priority to PCT/JP2001/010039 priority patent/WO2003043212A1/en
Priority to EP01274708A priority patent/EP1450495A4/en
Priority to US10/494,654 priority patent/US7120407B2/en
Publication of WO2003043212A1 publication Critical patent/WO2003043212A1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
    • H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor
    • H03J1/0033—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor for voltage synthesis with a D/A converter
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
    • H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor
    • H03J1/0041—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor for frequency synthesis with counters or frequency dividers
    • H03J1/005—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor for frequency synthesis with counters or frequency dividers in a loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J3/00—Continuous tuning
    • H03J3/24—Continuous tuning of more than one resonant circuit simultaneously, the circuits being tuned to substantially the same frequency, e.g. for single-knob tuning

Definitions

  • the present invention relates to a receiver employing a superheterodyne system and a tracking adjustment method thereof.
  • receivers that receive broadcast waves such as AM broadcasts and FM broadcasts employ a superheterodyne method as a receiving method.
  • a received broadcast signal is mixed with a predetermined local oscillation signal to convert the signal into an intermediate frequency signal having a fixed frequency independent of the frequency of the received signal (reception frequency).
  • This is a receiving system that reproduces audio signals by performing processing, amplification, etc., and has the characteristics of superior sensitivity and selectivity compared to other receiving systems.
  • FIG. 8 is a diagram showing the configuration of a conventional receiver employing the superheterodyne method.
  • the conventional receiver shown in the figure is composed of an antenna 200, a high-frequency receiving circuit 202, a local oscillator 204, a mixing circuit 206, an intermediate frequency amplifying circuit 208, an MPU 210, a memory 211, an operation part 214, and a digital It consists of an analog converter (DAC) 216.
  • DAC analog converter
  • the MPU 210 calculates data necessary for generating a tuning voltage based on the data stored in the memory 212 and inputs the data to the DAC 216.
  • a tuning voltage having a desired value is generated by the DAC 2 16 and applied to the high-frequency tuning circuit 202.
  • FIG. 9 is a diagram showing the contents of data stored in the memory 2 12.
  • the variable range of the reception frequency is f.
  • some receiving frequency f. , F 1, f 2 , f 3 , f 4, f 5 Tuning voltage V. , V 1 , V 2 , V 3 , V 4 , and V 5 are pre-measured, and the input data of the DAC 216 required to generate these multiple tuning voltages is stored in the memory 212.
  • the reception frequency of the high-frequency reception circuit 202 is represented by f described above.
  • the MPU 210 stores the input data of the DAC 211 corresponding to the two reception frequencies in the vicinity from the memory 211.
  • the input data necessary to generate a desired reception frequency is obtained by reading the data and performing a linear interpolation operation, and the input data is input to the DAC 216. In this way, a predetermined tuning voltage is applied from the DAC 216 to the high-frequency receiving circuit 202, and a desired receiving frequency is set.
  • the tuning frequency of the high-frequency receiving circuit 202 is set in conjunction with the oscillation frequency of the local oscillator 204 using the conventional method described above, (1) it takes time to adjust the tracking, (2) (3) It is vulnerable to power supply voltage fluctuations.
  • tuning voltage V As described above, to set an appropriate tuning voltage using the DAC 216, a plurality of tuning voltages V as shown in FIG. , V, V 2 , V 3 , V 4 , V 5 need to be adjusted in advance for tracking adjustment.
  • tuning voltage V It means that the tuning frequency f.
  • the tuning voltage V that changes the value of the input data of the DAC 216 while the local oscillator signal of the frequency corresponding to the frequency is output from the local oscillator 204 and minimizes the tracking error. Will be required. Normally, whether or not the tracking error is minimum is measured using a strain meter and a level meter, and the strain measurement using a strain meter is 10 to 20 to wait for the output value to stabilize. It takes about seconds. Since such measurement is required for each tuning voltage, the time required for tracking adjustment becomes longer.
  • the local oscillator 204 generally has a PLL (Phase Locked Loop) configuration including a voltage controlled oscillator and a variable frequency divider, so that even if the characteristics of the element used change with temperature, the local oscillator 204 The frequency of the local oscillation signal, which is determined by the frequency division ratio of the frequency divider, does not change. In this way, in conjunction with temperature changes Since only the tuning frequency changes and the frequency of the local oscillation signal does not change, the tracking error increases with temperature. In order to avoid such inconveniences, it is necessary to provide a separate temperature compensation circuit. However, it is not easy to perform temperature compensation over the entire tuning frequency to prevent an increase in tracking error. A new problem of increasing the size also arises.
  • PLL Phase Locked Loop
  • the DAC 2 16 Since the output voltage of the MPU 210 decreases in conjunction with the decrease of the power supply voltage, even if the MPU 210 attempts to set a desired tuning frequency, the tuning voltage decreases and the tracking error increases. Disclosure of the invention
  • the present invention has been made in view of the above points, and its object is to reduce the time required for tracking adjustment, do not require temperature compensation, and reduce tracking errors caused by fluctuations in power supply voltage.
  • An object of the present invention is to provide a receiver capable of preventing an increase and a tracking adjustment method thereof.
  • a receiver includes a high-frequency receiving circuit, a local oscillator, a mixing circuit, an offset circuit, and a multiplication circuit.
  • the high frequency receiving circuit receives a broadcast wave having a receiving frequency according to the tuning voltage.
  • the local oscillator generates a local oscillation signal having a frequency according to the control voltage.
  • the mixing circuit mixes the signal output from the high-frequency receiving circuit with the local oscillation signal and outputs an intermediate frequency signal corresponding to the difference frequency.
  • the offset circuit sets a predetermined offset voltage for the control voltage.
  • the multiplication circuit performs an analog multiplication of the control voltage by a predetermined multiplier.
  • the tuning voltage is generated based on the control voltage, there is no need to measure multiple tuning voltages that minimize the tracking error as in a conventional receiver using a digital-to-analog converter.
  • the time required for adjustment can be reduced.
  • the multiplier of the multiplication circuit be set based on the variable range of the frequency of the local oscillation signal generated by the local oscillator and the variable range of the reception frequency of the high-frequency receiving circuit. Since the center frequency of the variable range of the local oscillation signal and the center frequency of the variable range of the reception frequency of the high-frequency receiving circuit are shifted by the intermediate frequency, even if the respective variable widths are the same, they are not equal.
  • the variable width of the control voltage and the variable width of the tuning voltage corresponding to the variable range are not the same, but the control voltage must be analog-multiplied by a predetermined multiplier to match the difference in the variable width of each voltage. There is a monkey.
  • the above-described offset circuit is realized by a digital-analog converter using a control voltage as a reference voltage, and the offset voltage is set by adjusting the input data.
  • the offset voltage value can be varied by adjusting the value of the digital input data, so that the offset voltage can be adjusted using a processor or the like, which reduces the time required for setting the offset voltage. Can be reduced.
  • the control voltage value fluctuates due to a change in the ambient temperature
  • the value of the tuning voltage applied to the high-frequency receiving circuit also fluctuates in conjunction with the control voltage, so that the high-frequency receiving circuit and the local oscillator are similar.
  • the temperature compensation can be performed simply by adopting the configuration described above, and the temperature compensation by a complicated circuit is not required.
  • the above-described offset voltage is set so that the tracking error is minimized when the frequency of the local oscillation signal is set to an arbitrary value included in the variable range.
  • a plurality of values for the offset voltage which can be switched according to the frequency of the local oscillation signal, are prepared so that the tracking error corresponding to the entire variable range of the frequency of the local oscillation signal is equal to or less than a predetermined value. It is desirable to set. Optimal tracking adjustment at the center value of the frequency variable range of the local oscillation signal is performed and a predetermined offset voltage corresponding to this nearby frequency range is set, but the frequency of the local oscillation signal is shifted from this center value. The tracking error tends to increase with deviation. For this reason, the entire frequency variable range of the local oscillation signal is divided into a plurality of regions, and an offset voltage having a different value is set for each of the divided regions. By switching the offset voltage for each area, the tracking error can be easily reduced in the entire frequency variable range.
  • a memory for storing input data necessary for generating an offset voltage set so that a tracking error corresponding to the entire variable range of the frequency of the local oscillation signal is equal to or less than a predetermined value and a memory for storing the input data. It is desirable to provide voltage value setting means for setting the offset voltage value corresponding to the frequency of the local oscillation signal by reading the input data set in advance and inputting it to the digital-analog converter. . By reading the input data stored in the memory and inputting it to the digital-to-analog converter, it is possible to generate the optimal offset voltage, so that the offset voltage can be set after the optimal adjustment has been made. Becomes easier.
  • the reception frequency of the receiver is set to an arbitrary value included in the variable range, and has the same frequency as the reception frequency at this time.
  • a predetermined test signal is input to the high-frequency receiving circuit.
  • the value of the offset voltage set by the offset circuit is set so that the tracking error of the receiver after various settings in the first step are minimized.
  • the measurement of the tracking error one is carried out at any value that is part of the variable range of the receiving frequency, by reducing the number of times the measurement, also c it is possible to shorten the time required for the tracking adjustment, the above-described After the second step, when the tracking error near the upper limit or the lower limit of the variable range of the reception frequency is large, the offset voltage of some frequency bands including the upper limit or the lower limit is reduced. It is desirable to have a third step to change and set the value.
  • tracking error at one point alone may not reduce the tracking error in the entire reception band below a specified value.
  • a part including the upper limit or lower limit of the reception frequency where the tracking error is the largest By changing the value of the offset voltage corresponding to this frequency band, it is possible to easily suppress the tracking error in the entire reception band within a predetermined allowable range.
  • the reception frequency of the receiver is set to an arbitrary value included in the variable range.
  • the tracking error of the receiver after performing various settings in the fourth step is minimized.
  • Set the input data of the digital-analog converter so that In a sixth step, the input data set in the fifth step is stored in a memory. Since the tracking error is measured at an arbitrary value included in the variable range of the reception frequency, the time required for the tracking adjustment can be reduced by reducing the number of times of the measurement. In addition, since the tracking adjustment result is stored in the memory, it is easy to save the result data and use it later.
  • the digital-analog converter may convert some of the frequency bands including the upper limit or the lower limit.
  • FIG. 1 is a diagram showing a configuration of an FM receiver according to one embodiment
  • FIG. 2 is a diagram showing the relationship between the output values of the distortion meter and the level meter and the tuning point.
  • FIG. 3 is a flowchart showing the operation procedure of tracking adjustment performed by controlling the PC.
  • FIG. 4 is a flowchart showing an operation procedure of tracking adjustment performed by controlling the PC.
  • FIG. 9 is a diagram showing a configuration of a conventional receiver, and FIG. 9 is a diagram showing contents of data stored in a memory.
  • FIG. 1 is a diagram illustrating a configuration of an FM receiver according to the present embodiment.
  • the FM receiver 100 shown in the figure consists of an antenna 1, a high-frequency receiving circuit 2, a local oscillator 3, two digital-to-analog converters (DACs) 4, 6, two multiplying circuits 5, 7, a control unit 8, It includes a mixing circuit 9, an intermediate frequency amplification circuit 10, a detection circuit 11, a low frequency amplification circuit 12, and a speed 13.
  • DACs digital-to-analog converters
  • the high-frequency receiving circuit 2 performs a tuning operation for selectively transmitting only a component near a predetermined tuning frequency to a broadcast wave input from the antenna 1, and performs a high-frequency amplification on the tuned signal. And includes two high-frequency tuning circuits 20 and 24 and a high-frequency amplifier circuit 22.
  • the output of the first-stage high-frequency tuning circuit 20 to which the antenna 1 is connected is amplified by the high-frequency amplifier circuit 22 and the amplified output is passed through the second-stage high-frequency tuning circuit 24 to improve selectivity.
  • Each of the two high-frequency tuning circuits 20 and 24 includes a variable capacitance diode for changing the tuning frequency, and changes the tuning voltage of the reverse bias applied to the variable capacitance diode. Thereby, the tuning frequency of each of the high-frequency tuning circuits 20 and 24 is changed in conjunction. That is, the high-frequency receiving circuit 2 selects a broadcast wave having a receiving frequency (tuning frequency) according to the tuning voltage applied to the two high-frequency tuning circuits 20 and 24.
  • the local oscillator 3 includes a voltage controlled oscillator (VCO) 31, a frequency divider 32, a reference signal generator 33, a phase comparator 34, and a low-pass filter (LPF) 35.
  • VCO voltage controlled oscillator
  • LPF low-pass filter
  • VCO 31 corresponds to the control voltage generated by low pass filter 35 It performs a frequency oscillation operation and outputs a local oscillation signal, and includes a VC ⁇ resonance circuit 91 and an amplifier 92.
  • the VCO resonance circuit 91 is a parallel resonance circuit including an inductor and a capacitor, and two variable capacitance diodes for varying the resonance frequency are connected in parallel with the capacitor. Then, the resonance frequency of the VCO resonance circuit 91 changes as the capacitance of the variable capacitance diode changes according to the applied reverse bias control voltage.
  • the amplifier 92 performs a predetermined amplification operation required for oscillation.
  • the divider 32 divides the local oscillation signal input from V C ⁇ 31 by a predetermined dividing ratio N and outputs the result.
  • the value of the dividing ratio N is variably set by the control unit 8.
  • the reference signal generator 33 outputs a reference signal of a predetermined frequency with high frequency stability.
  • the phase comparator 34 compares the phase between the reference signal output from the reference signal generator 33 and the signal output from the frequency divider 32 (the divided local oscillation signal), and A pulse-like error signal corresponding to the difference is output.
  • the one-pass filter 35 generates a control voltage by removing and smoothing the high-frequency component of the pulse-like error signal output from the phase comparator 34.
  • variable capacitance diodes included in each of the high frequency tuning circuits 20 and 24 in the high frequency receiving circuit 2 and the variable capacitance diodes included in the VCO resonance circuit 91 in the local oscillator 3 are respectively The ones with almost the same voltage versus capacitance characteristics are used.
  • the DAC 4 and the multiplying circuit 5 are used to generate a tuning voltage to be applied to the high-frequency tuning circuit 20 in the high-frequency receiving circuit 2.
  • the DAC 4 of the present embodiment uses the control voltage Vc output from the low-pass filter 35 in the local oscillator 3 as a reference voltage at the time of digital-to-analog conversion, and is input from the control unit 8. A voltage corresponding to the value of the digital data is generated.
  • the digital data input from the control unit 8 to each of the DACs 4 and 6 will be referred to as “DAC input data”.
  • V a V c X (D / 2 ") (1)
  • the output voltage Va of the DAC 4 changes according to the control voltage Vc output from the one-pass filter 35. The method of setting the value of the DAC input data input to the DAC 4 Will be described later.
  • the multiplication circuit 5 performs an analog multiplication of the output voltage Va of the DAC 4 by a predetermined multiplier K. Specifically, the output voltage Vr of the multiplication circuit 5 is expressed by the following equation.
  • V r V a XK... (2)
  • multiplier K of the multiplication circuit 5 for example, several candidate values such as “1”, “1.5”, and “2” are prepared. Can be set arbitrarily. Then, the value of multiplier ⁇ is set based on the variable range of the frequency of the local oscillation signal and the variable range of the reception frequency in high-frequency reception circuit 2.
  • the frequency of the local oscillation signal output from the local oscillator 3 is set to a value 10.7 MHz higher than the reception frequency in the high-frequency reception circuit 2, and the variable range of the reception frequency and the local oscillation
  • the variable range of the tuning voltage applied to the high-frequency receiving circuit 2 it is necessary to set the variable range of the tuning voltage applied to the high-frequency receiving circuit 2 larger than the variable range of the control voltage generated in the local oscillator 3, and
  • multiplication circuits 5 and 7 are used.
  • the output voltage Vr of the multiplication circuit 5 is applied to the high-frequency tuning circuit 20 as a tuning voltage Vtl.
  • the DAC 6 and the multiplying circuit 7 are used to generate a tuning voltage applied to the high-frequency tuning circuit 24 in the high-frequency receiving circuit 2.
  • the DAC 6 outputs the DAC input data input from the control unit 8 and the output voltage Va corresponding to the control voltage Vc output from the low-pass filter 35, similarly to the DAC 4 described above.
  • the multiplication circuit 7 performs analog multiplication of the output voltage Va of the DAC 6 by a predetermined multiplier K, similarly to the multiplication circuit 5 described above.
  • the output voltage Vr of the multiplying circuit 7 is applied to the high frequency tuning circuit 24 as a tuning voltage Vt2.
  • the control unit 8 controls the overall operation of the FM receiver 100, and includes an MPU 81, an interface unit (IZF) 82, an operation unit 83, and an EE PROM 84.
  • the MPU 81 sets the frequency division ratio N of the frequency divider 32 in the local oscillator 3 according to the setting value of the reception frequency input from the operation unit 83, and sets the DACs corresponding to DACs 4 and 6 respectively. A predetermined control operation such as setting input data is performed.
  • the interface unit 82 connects the external PC (personal computer) 128 to the MPU 81 in the control unit 8. Various instructions can be given from the PC 128 to the MPU 81 via the interface unit 82.
  • the operation unit 83 includes various operation keys, and is used for setting a reception frequency and the like.
  • the EEPROM 84 is a memory capable of electrically storing and erasing data, and stores DAC input data necessary for generating a predetermined offset voltage.
  • the mixing circuit 9 mixes the reception signal output from the high-frequency reception circuit 2 and the local oscillation signal output from the local oscillator 3, and outputs a signal corresponding to the difference component.
  • An intermediate frequency signal is generated by amplifying the signal output from the mixing circuit 9 and passing only a frequency component near a predetermined intermediate frequency (10.7 MHz).
  • the detection circuit 11 performs a detection process on the intermediate frequency signal output from the intermediate frequency amplification circuit 10 to demodulate the audio signal.
  • the low-frequency amplifier 12 amplifies the audio signal output from the detector 11 with a predetermined gain.
  • the speaker 13 performs audio output based on the amplified audio signal output from the low frequency amplification circuit 12.
  • the test signal input terminal 14 is for inputting a test signal of a predetermined frequency for performing tracking adjustment.
  • the test signal input through the test signal input terminal 14 is input to the high frequency receiving circuit 2.
  • each of the distortion meter 120, level meter 122, test signal generator 126, and PC 128 shown in FIG. 1 are connected to the DACs 4 and 6 in the FM receiver 100 described above. Used to perform a predetermined tracking adjustment that sets the value of the input data. It is something that can be done.
  • the distortion factor meter 120 measures the distortion factor based on the amplified audio signal output from the low frequency amplifier circuit 12 in the FM receiver 100.
  • the level meter 122 measures the signal level of the amplified audio signal output from the low-frequency amplifier circuit 12.
  • FIG. 2 is a diagram showing the relationship between the output values of the distortion meter 120 and the level meter 122 and the tuning point.
  • the horizontal axis corresponds to the tuning frequency
  • the left vertical axis corresponds to the output value of the level meter 122
  • the right vertical axis corresponds to the output value of the distortion meter 120.
  • a curve a indicates a change in the output value of the strain meter 1 or 20
  • a curve b indicates a change in the output value of the level meter 1. 2.
  • the output value (distortion rate) of the strain meter 120 becomes minimum and the output value of the level meter 122 becomes maximum. . Therefore, in order to find the tuning voltage corresponding to the optimum tuning point, it is necessary to detect the tuning voltage at which the output value of the level meter 122 becomes maximum. Since the degree of change near the tuning point is gentle, it is not easy to extract the optimal tuning point. For this reason, usually, a tuning voltage that minimizes the output value of the distortion meter 120 is detected and set as a tuning voltage corresponding to an optimum tuning point. However, since the output value of the distortion meter 120 becomes minimum even in the no-signal state, also refer to the output value of the level meter 122 to prevent detection of an incorrect tuning point in such a state. There is a need to.
  • the test signal generator 126 outputs a test signal generated by applying FM modulation to a carrier having a predetermined frequency based on an instruction from the PC 128. This test signal is input to the high-frequency amplifier circuit 2 in the FM receiver 100 via the test signal input terminal 14 described above.
  • the PC 128 controls a series of operations for performing tracking adjustment. More specifically, the PC 128 sends an instruction to the test signal generator 126 to input a predetermined test signal to the FM receiver 100, and the frequency divider 3 in the local oscillator 3 By setting the dividing ratio of 2 to a predetermined value, the receiving frequency of the FM receiver 100 is set to the frequency of the test signal. In this state, the PC 128 changes the value of the DAC input data input to each of the DACs 4 and 6 while varying the distortion meter 120 and the level. The output value of the meter 122 is read, and the DAC input data at which the output value of the level meter 122 is equal to or more than a predetermined value and the output value of the distortion meter 120 becomes minimum is measured.
  • the DAC input data obtained by this measurement is sent to the control unit 8 of the FM receiver 100 and stored in the EPP ROM 84 by the MPU 81.
  • the above-described MPU 81 corresponds to the voltage value setting means. The detailed procedure of the tracking adjustment will be described later.
  • the FM receiver 100 of the present embodiment has such a configuration. Next, details of the tracking adjustment operation performed by the PC 128 will be described.
  • FIG. 3 and FIG. 4 are flowcharts showing the operation procedure of the tracking adjustment performed by the control of the PC 128. Since the FM receiver 100 of the present embodiment includes two DACs 4 and 6 to be tracked, a case will be described in which tracking adjustment is performed by focusing on one of the DACs.
  • the PC 128 sends an instruction to the test signal generator 126 to input a test signal having the same frequency as the center frequency of the variable range of the reception frequency of the FM receiver 100 to the FM receiver 100 (step 100). ).
  • a test signal of 83.0 MHz which is the same frequency as the center frequency of this variable range, generates a test signal. generated by vessels 1 2 6 and c is input to the test signal input terminal 14 of the FM receiver 1 00
  • PC 128 may send an instruction to the control unit 8, the oscillation frequency of the local oscillator 3
  • (Local oscillation frequency) is set to a frequency corresponding to the center frequency of the variable range of the reception frequency of the FM receiver 100 (step 101). For example, assuming that the FM receiver 100 of the present embodiment uses a local oscillation signal having a frequency 10.7 MHz higher than the reception frequency, the local oscillation frequency of 93.7 MHz is obtained. The frequency division ratio of the frequency divider 32 required for generation is set.
  • the PC 128 next changes the value of the DAC input data corresponding to one DAC 4 within a predetermined range, and the tracking error is reduced.
  • Minimum D The value D of the AC input data.
  • Step 102 write this measured value to the EE PROM 84 in the control unit 8.
  • Step 103 As described above, when the tracking error is set to the optimum tuning point and the tracking error is minimized, the output value of the distortion meter 120 is also minimized.
  • the value of the DAC input data is varied in one direction, and the value of the DAC input data at which the output value of the distortion meter 120 becomes the smallest is measured.
  • the PC 128 confirms that the output value of the level meter 122 is equal to or more than a predetermined value, and displays a predetermined error when the output value is equal to or less than the predetermined value.
  • FIG. 5 is a diagram showing the relationship between the local oscillation frequency and the tuning frequency. If there is no tracking error in the entire reception band, the tuning frequency is set to a frequency 10.7 MHz lower than this when the local oscillation frequency is varied. The relationship shown in FIG. However, since tracking errors generally occur due to differences in the circuit configurations of the local oscillator 3 and the high-frequency receiving circuit 2, the oscillation frequency, the difference in the tuning frequency, and the like, the relationship of the curve d different from the straight line c described above is obtained. Will have.
  • the DAC input data D 0 that minimizes the output value of the distortion meter 120 when the local oscillation frequency is adjusted to the center frequency of the variable range is measured. Input data overnight D. After passing the voltage generated by the DAC 4 in response to the multiplication circuit 5, the output voltage is applied to the high-frequency tuning circuit 20 as the tuning voltage Vtl, whereby the tracking corresponding to the local oscillation frequency and the tuning frequency is performed. Errors can be minimized. In other words, by performing the measurement in step 102 and setting the value of the DAC input data corresponding to one DAC 4, the relationship between the local oscillation frequency and the tuning frequency as shown by curve e in FIG. 5 is obtained. You can meet the clerk.
  • the PC 128 checks whether or not the tracking error is equal to or less than a predetermined value for the entire reception band, and if the tracking error is large in some frequency bands, the frequency range in which this band is included In, the process of changing the value of the DAC input data is performed.
  • the PC 128 sends an instruction to the test signal generator 126 and inputs a test signal having the same frequency as the upper limit of the variable range of the reception frequency of the FM receiver 100 to the FM receiver 100 (step 1 04). Further, the PC 128 sends an instruction to the control unit 8 to set the value of the local oscillation frequency so as to be a frequency corresponding to the upper limit value f max of the variable range of the local oscillation frequency (step 105). After the various settings corresponding to the upper limit of the reception frequency are completed in this way, the PC 128 takes in the output value of the level meter 122 and determines whether or not this value is equal to or higher than a predetermined value. (Step 106).
  • the present embodiment it is determined whether or not the tracking error is included in the allowable range equal to or less than the predetermined value at the upper limit value of the reception frequency by checking the output value of the level meter 122. .
  • the output value of the level meter 122 gradually changes in the vicinity of the optimum tuning point, but the output value of the level meter 122 decreases so as to deviate from the optimum tuning point. Therefore, whether or not the tracking error has increased beyond the allowable range can be easily determined only by referring to the output value of the level meter 122 alone.
  • step 106 If the tracking error increases and the output value of the level meter 122 falls below a predetermined value, a negative determination is made in the determination of step 106, and then the PC 128 sets the local oscillation frequency to the median value of the variable range fc And the DAC input data D corresponding to the above-mentioned median value fc as the DAC input data D L set when it is higher than the upper intermediate value fu corresponding to almost the middle of the upper limit value fmax.
  • Predetermined value d. Is set (step 107), and the set value is written to the EE PROM 84 in the control section 8 (step 108).
  • DAC input data D For this predetermined value d.
  • the value of d0 such that the tracking error is less than or equal to a predetermined value at the upper limit value fmax of the variable range of the local oscillation frequency is obtained in advance. If the tracking error at the upper limit f max is large, set the value of the DAC input data to a frequency within a predetermined range including the upper limit f max. By simply changing from to, the tracking error in the range from the median value f c to the upper limit value f max can be suppressed to a predetermined value or less.
  • step 106 If the tracking error corresponding to the upper limit value f max of the local oscillation frequency is small and the output value of the level meter 122 is equal to or more than a predetermined value, an affirmative determination is made in the determination of step 106, and then the PC 128 Is higher than the upper intermediate value fu, which corresponds to the local oscillation frequency approximately halfway between the median value fc and the upper limit value fmax of the variable range.
  • the PC 128 sends an instruction to the test signal generator 126 to input a test signal having the same frequency as the lower limit of the variable range of the reception frequency of the FM receiver 100 to the FM receiver 100 (step 1 1 1 ). Further, the PC 128 sends an instruction to the control unit 8 to set the local oscillation frequency so as to be a frequency corresponding to the lower limit value f min of the variable range of the local oscillation frequency (Step 112).
  • the PC 128 takes in the output value of the level meter 122 and determines whether or not this value is equal to or greater than a predetermined value. Yes (steps 1 1 3). If the tracking error increases and the output value of the level meter 122 falls below a predetermined value, a negative determination is made in the determination of step 113, and the PC 128 then determines that the local oscillation frequency is within the variable range.
  • DAC input data D 2 that is set to lower than the lower intermediate value f L corresponding to approximately the middle of the median fc and the lower limit value f min
  • DAC input data D. corresponding to the central value fc described above Is set to the value obtained by adding and subtracting the predetermined value di (step 11)
  • step 113 If the tracking error corresponding to the lower limit value f min of the local oscillation frequency is small and the output value of the level meter 122 is equal to or more than a predetermined value, an affirmative judgment is made in the judgment of step 113, and then the PC 1 28 as DAC input data D 2 that is set to lower than the lower intermediate value f L of the local oscillation frequency corresponding to approximately the middle of the median fc and the lower limit value f min of the variable range, the above-described DAC input data D corresponding to median fc. The same value is set (step 116), and this set value is written to the EEPROM 84 in the control unit 8 (step 117).
  • 6 and 7 are diagrams showing the relationship between the variable range of the local oscillation frequency and the tracking error in the FM receiver 100 of the present embodiment.
  • DAC input data input to DACs 4 and 6 is adjusted so that tracking error is minimized. Is set, so there is almost no tracking error at this frequency.
  • the tracking error increases. If the tracking error at the upper limit f max or the lower limit f min of the local oscillation frequency exceeds a predetermined value ⁇ , as shown in FIG. 6, the DAC input corresponding to the frequency range including the median fc Data D.
  • Different values of the DAC input data Di, D 2 is to be set in the upper intermediate value fu or more frequency ranges or lower intermediate value f L or less in the frequency range, as shown in FIG. 7, each of these frequency ranges
  • the tracking adjustment is performed so that the tracking error at is not more than the predetermined value ⁇ .
  • the tracking adjustment of the FM receiver 100 of the present embodiment is only performed by using the distortion meter 120 and the level meter 122 at the central value fc of the local oscillation frequency, and the measurement is relatively long.
  • the reduction of the number of time-consuming strain rate measurements can greatly reduce the measurement time.
  • the MPU 81 in the control unit 8 operates the operation unit 83 to change the reception frequency. Determine whether or not it has been instructed. If an instruction to change the reception frequency is issued, MPU81 The frequency division ratio of the frequency divider 32 required to generate the local oscillation frequency corresponding to the later reception frequency is calculated, and the calculated frequency division ratio is set in the frequency divider 32. Also, the MPU 81 determines which frequency band shown in FIG. 7 the local oscillation frequency corresponding to the changed reception frequency belongs to, and outputs the corresponding DAC input data D.
  • One of,, or D 2 is input to each of DACs 4 and 6. As a result, a tracking error when an FM broadcast wave of a new reception frequency is received is suppressed to a predetermined value or less, and a good reception state can be maintained over the entire reception band.
  • the FM receiver 100 of the present embodiment is realized by a similar configuration of the VC ⁇ resonance circuit 91 included in the local oscillator 3 and the two high-frequency tuning circuits 20 and 24 included in the high-frequency reception circuit 2.
  • the tuning voltages Vtl and Vt2 applied to the respective high-frequency tuning circuits 20 and 24 also change so that the control voltage Vc changes in synchronization with the change. Changes in frequency are suppressed. This eliminates the need for a special temperature compensation circuit.
  • each of the DACs 4 and 6 operates using the control voltage Vc applied from the local oscillator 3 as a reference voltage, even if the power supply voltage of the FM receiver 100 is unstable, it is affected.
  • the present invention is not limited to the above embodiment, and various modifications can be made within the scope of the present invention.
  • the local oscillation frequency DAC input data D set corresponding to the median value fc.
  • advance tracking error D AC input had been determined to be equal to or less than the predetermined value data D, it has been to use a D 2, Reberume Isseki in these upper limit value f max or lower limit f min 1 Obtain the output value of 22 and vary the value of the DAC input data while monitoring the amount of tracking error, and measure the appropriate value of the DAC input data each time the tracking error becomes less than the specified value. It may be.
  • the local oscillation frequency is higher than the upper intermediate value fu, or when lower than the lower intermediate value f L, the value of D AC input data as required D. From to once, or D. It switched only once to the D 2 from However, the value of the DAC input data may be switched twice or more in each case.
  • the tuning voltages Vtl and Vt2 applied to the two high-frequency tuning circuits 20 and 24 in the high-frequency receiving circuit 2 are separately generated.
  • each tuning frequency may be set using a common tuning voltage Vtl.
  • the DAC 6 and the multiplying circuit 7 are not required, which simplifies the circuit configuration and reduces the time required for tracking adjustment by about half. The time required for the adjustment work performed in the process can be greatly reduced.
  • the local oscillation frequency when performing tracking adjustment, is set to the median value fc, and the measurement is performed using the distortion meter 120 and the level meter 122 to perform tracking. DAC input data D with minimum error.
  • the set value of the local oscillation frequency is not limited to the median value fc, and may be any value included in the variable range of the frequency. Specifically, as shown in FIG. 6, depending on the characteristics of the variable capacitance diodes included in the high-frequency tuning circuits 20 and 24 and the VC ⁇ resonant circuit 91, as shown in FIG.
  • the frequency at which the tracking error amount becomes 0 may deviate from the central value fc of the local oscillation frequency.
  • tracking error can be reduced over the entire variable range of the local oscillation frequency.
  • Proper DAC input data D that can be reduced. Can be obtained.
  • the tuning voltage is generated based on the control voltage, the tracking error is minimized as in the conventional receiver using the digital-to-analog converter. It is not necessary to obtain a plurality of tuning voltages by measurement, and the time required for tracking adjustment can be reduced.
  • the tracking error is measured at almost the center value of the variable range of the reception frequency. Can be shortened.

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Abstract

A receiver such that the period required for tracking adjustment, temperature compensation is not needed, and tracking errors due to fluctuation of the power supply voltage are prevented from increasing, and a tracking adjusting method for the receiver. A DAC (4) generates a voltage according to the value of data (Do) inputted from an MPU (81) by using a control voltage outputted from a low-pass filter (35) in a local oscillator (3) as a reference voltage used during digital-analog conversion. A multiplier circuit (5) analog-multiplies the output voltage of the DAC (4) by a predetermined multiplier. The output voltage of the multiplier circuit (5) is applied as a tuning voltage to a high-frequency tuning circuit (20). In an EEPROM (84) stored is the value of the input data (Do) of the DAC (4) which has been measured in advance and corresponds to the tuned voltage of when the tracking error is the minimum at the central value of the local oscillation frequency, and the MPU (81) reads the data (Do) from the EEPROM (84) and inputs it to the DAC (4).

Description

明 細 書 受信機およびそのトラツキング調整方法 技術分野  Description Receiver and its tracking adjustment method
本発明は、 スーパーヘテロダイン方式を採用した受信機およびそのトラツキン グ調整方法に関する。 背景技術  The present invention relates to a receiver employing a superheterodyne system and a tracking adjustment method thereof. Background art
一般に、 AM放送や FM放送等の放送波を受信する受信機では、 その受信方式 としてスーパーヘテロダイン方式が採用されている。 スーパーヘテロダイン方式 は、 受信した放送信号に対して所定の局部発振信号を混合することにより、 受信 信号の周波数 （受信周波数） には依存しない一定の周波数を有する中間周波信号 に変換し、 その後、 検波処理や増幅などを行って音声信号を再生する受信方式で あり、 他の受信方式に比べて感度や選択度等が優れているという特徴をもってい る。  Generally, receivers that receive broadcast waves such as AM broadcasts and FM broadcasts employ a superheterodyne method as a receiving method. In the superheterodyne method, a received broadcast signal is mixed with a predetermined local oscillation signal to convert the signal into an intermediate frequency signal having a fixed frequency independent of the frequency of the received signal (reception frequency). This is a receiving system that reproduces audio signals by performing processing, amplification, etc., and has the characteristics of superior sensitivity and selectivity compared to other receiving systems.
図 8は、 スーパーヘテロダイン方式を採用した従来の受信機の構成を示す図で ある。 同図に示す従来の受信機は、 アンテナ 200、 高周波受信回路 202、 局 部発振器 204、 混合回路 206、 中間周波増幅回路 208、 MPU2 1 0, メ モリ 2 1 2、 操作部 2 14、 デジタル—アナログ変換器 （DAC) 2 1 6を含ん で構成されている。  FIG. 8 is a diagram showing the configuration of a conventional receiver employing the superheterodyne method. The conventional receiver shown in the figure is composed of an antenna 200, a high-frequency receiving circuit 202, a local oscillator 204, a mixing circuit 206, an intermediate frequency amplifying circuit 208, an MPU 210, a memory 211, an operation part 214, and a digital It consists of an analog converter (DAC) 216.
従来の受信機では、 高周波受信回路 202に対して印加される同調電圧と受信 周波数との関係を示すデータがメモリ 2 1 2に格納されている。 MPU2 10は、 メモリ 2 1 2に格納されているデータに基づいて、 同調電圧を生成するために必 要なデータを算出し、 DAC 2 16に入力する。 この DAC 2 1 6によって所望 の値を有する同調電圧が生成され、 高周波同調回路 202に印加される。  In the conventional receiver, data indicating the relationship between the tuning voltage applied to the high-frequency receiving circuit 202 and the receiving frequency is stored in the memory 212. The MPU 210 calculates data necessary for generating a tuning voltage based on the data stored in the memory 212 and inputs the data to the DAC 216. A tuning voltage having a desired value is generated by the DAC 2 16 and applied to the high-frequency tuning circuit 202.
図 9は、 メモリ 2 1 2に格納されるデータの内容を示す図である。 同図に示す ように、 受信周波数の可変範囲を f 。 〜 f 5 とすると、 この可変範囲内において、 例えば、 いくつかの受信周波数 f 。 、 f 1 , f 2 、 f 3 、 f 4 、 f 5 に対応した 同調電圧 V。 、 V1 、 V2 、 V3 、 V4 、 V5 が予め測定されており、 これら複 数の同調電圧を生成するために必要な D AC 216の入力データがメモリ 2 12 に格納されている。 そして、 高周波受信回路 202の受信周波数を上述した f 。 、 f x , f 2 、 、 f 4 、 f 5 以外の値に設定する場合には、 MPU 2 10は、 その近傍の 2つの受信周波数に対応する DAC 2 1 6の入力データをメモリ 2 1 2から読み出して直線補間演算を行って所望の受信周波数を生成するために必要 な入力データを求め、 これを D AC 2 1 6に入力する。 このようにして所定の同 調電圧が DAC 2 16から高周波受信回路 202に印加され、 所望の受信周波数 が設定される。 FIG. 9 is a diagram showing the contents of data stored in the memory 2 12. As shown in the figure, the variable range of the reception frequency is f. When ~ f 5, within the variable range, for example, some receiving frequency f. , F 1, f 2 , f 3 , f 4, f 5 Tuning voltage V. , V 1 , V 2 , V 3 , V 4 , and V 5 are pre-measured, and the input data of the DAC 216 required to generate these multiple tuning voltages is stored in the memory 212. . Then, the reception frequency of the high-frequency reception circuit 202 is represented by f described above. , Fx, f 2 , f 4 , and f 5 , the MPU 210 stores the input data of the DAC 211 corresponding to the two reception frequencies in the vicinity from the memory 211. The input data necessary to generate a desired reception frequency is obtained by reading the data and performing a linear interpolation operation, and the input data is input to the DAC 216. In this way, a predetermined tuning voltage is applied from the DAC 216 to the high-frequency receiving circuit 202, and a desired receiving frequency is set.
ところで、 上述した従来方式を用いて局部発振器 204の発振周波数に連動さ せて高周波受信回路 202の同調周波数を設定する場合には、 （1) トラツキン グ調整に時間がかかる、 （2) 温度補償が難しい、 （3) 電源電圧の変動に弱い、 などの問題があった。  By the way, when the tuning frequency of the high-frequency receiving circuit 202 is set in conjunction with the oscillation frequency of the local oscillator 204 using the conventional method described above, (1) it takes time to adjust the tracking, (2) (3) It is vulnerable to power supply voltage fluctuations.
上述したように、 DAC 2 16を用いて適切な同調電圧を設定するためには、 図 9に示したような複数の同調電圧 V。 、 V 、 V2 、 V3 、 V4 、 V5 を予め 測定するトラッキング調整を行う必要がある。 例えば、 同調電圧 V。 を測定する ということは、 同調周波数 f 。 に対応する周波数の局部発振信号を局部発振器 2 04から出力した状態で、 DAC 2 16の入力データの値を可変し、 トラツキン グエラーが最小になる同調電圧 V。 を求めることになる。 通常、 トラッキングェ ラーが最小であるか否かは歪率計とレベルメータを用いて測定されており、 歪率 計を用いた歪率測定は、 出力値の安定を待っために 1 0〜20秒程度の時間が必 要になる。 このような測定が各同調電圧毎に必要になるため、 トラッキング調整 にかかる時間が長くなる。 As described above, to set an appropriate tuning voltage using the DAC 216, a plurality of tuning voltages V as shown in FIG. , V, V 2 , V 3 , V 4 , V 5 need to be adjusted in advance for tracking adjustment. For example, tuning voltage V. It means that the tuning frequency f. The tuning voltage V that changes the value of the input data of the DAC 216 while the local oscillator signal of the frequency corresponding to the frequency is output from the local oscillator 204 and minimizes the tracking error. Will be required. Normally, whether or not the tracking error is minimum is measured using a strain meter and a level meter, and the strain measurement using a strain meter is 10 to 20 to wait for the output value to stabilize. It takes about seconds. Since such measurement is required for each tuning voltage, the time required for tracking adjustment becomes longer.
また、 一般に高周波受信回路 202は、 使用される素子の特性が温度によって 変化するため、 DAC 2 1 6から出力される同調電圧が一定であっても同調周波 数が温度とともに変化する。 これに対し、 局部発振器 204は、 一般には電圧制 御発振器や可変分周器を含む PL L (位相同期ループ） 構成を有するため、 使用 される素子の特性が温度によって変化しても、 可変分周器の分周比によって決ま る局部発振信号の周波数が変化することはない。 このように、 温度変化に連動し て同調周波数のみが変化し、 局部発振信号の周波数は変化しないため、 温度変化 に伴ってトラッキングエラーが増大する。 このような不都合を回避するためには， 別に温度補償回路を備える必要があるが、 同調周波数の全域において温度補償を 行って、 トラッキングエラーの増大を防止することは容易ではなく、 しかも回路 規模が大きくなつてしまうという問題も新たに生じる。 In general, since the characteristics of elements used in the high-frequency receiving circuit 202 change with temperature, the tuning frequency changes with temperature even when the tuning voltage output from the DAC 216 is constant. On the other hand, the local oscillator 204 generally has a PLL (Phase Locked Loop) configuration including a voltage controlled oscillator and a variable frequency divider, so that even if the characteristics of the element used change with temperature, the local oscillator 204 The frequency of the local oscillation signal, which is determined by the frequency division ratio of the frequency divider, does not change. In this way, in conjunction with temperature changes Since only the tuning frequency changes and the frequency of the local oscillation signal does not change, the tracking error increases with temperature. In order to avoid such inconveniences, it is necessary to provide a separate temperature compensation circuit. However, it is not easy to perform temperature compensation over the entire tuning frequency to prevent an increase in tracking error. A new problem of increasing the size also arises.
さらに、 図 8に示した受信機の電源電圧が変動する場合、 例えば電池で駆動さ れる携帯受信機や車載バッテリで駆動されるカーラジオ等においてその駆動電圧 が低下した場合に、 D A C 2 1 6の出力電圧が電源電圧の低下に連動して低くな るため、 M P U 2 1 0が所望の同調周波数を設定しょうとしても同調電圧が低下 してしまい、 トラッキングエラーが大きくなる。 発明の開示  Further, when the power supply voltage of the receiver shown in FIG. 8 fluctuates, for example, when the driving voltage of a portable receiver driven by a battery or a car radio driven by an on-vehicle battery decreases, the DAC 2 16 Since the output voltage of the MPU 210 decreases in conjunction with the decrease of the power supply voltage, even if the MPU 210 attempts to set a desired tuning frequency, the tuning voltage decreases and the tracking error increases. Disclosure of the invention
本発明はこのような点に鑑みて創作されたものであり、 その目的は、 トラツキ ング調整に要する時間を短縮することができ、 温度補償が不要であり、 電源電圧 の変動によるトラッキングエラ一の増大を防止することができる受信機およびそ のトラッキング調整方法を提供することにある。  The present invention has been made in view of the above points, and its object is to reduce the time required for tracking adjustment, do not require temperature compensation, and reduce tracking errors caused by fluctuations in power supply voltage. An object of the present invention is to provide a receiver capable of preventing an increase and a tracking adjustment method thereof.
上述した課題を解決するために、 本発明の受信機は、 高周波受信回路、 局部発 振器、 混合回路、 オフセット回路、 掛算回路を備えている。 高周波受信回路は、 同調電圧に応じた受信周波数の放送波を受信する。 局部発振器は、 制御電圧に応 じた周波数の局部発振信号を生成する。 混合回路は、 高周波受信回路から出力さ れる信号と局部発振信号とを混合してその差分周波数に対応する中間周波信号を 出力する。 オフセット回路は、 制御電圧に対して所定のオフセット電圧を設定す る。 掛算回路は、 制御電圧に対して所定の乗数のアナログ掛算を行う。 本発明の 受信回路は、 これらの構成により、 制御電圧をオフセット回路と掛算回路に通し た電圧を同調電圧として高周波受信回路に印加している。  In order to solve the above-described problems, a receiver according to the present invention includes a high-frequency receiving circuit, a local oscillator, a mixing circuit, an offset circuit, and a multiplication circuit. The high frequency receiving circuit receives a broadcast wave having a receiving frequency according to the tuning voltage. The local oscillator generates a local oscillation signal having a frequency according to the control voltage. The mixing circuit mixes the signal output from the high-frequency receiving circuit with the local oscillation signal and outputs an intermediate frequency signal corresponding to the difference frequency. The offset circuit sets a predetermined offset voltage for the control voltage. The multiplication circuit performs an analog multiplication of the control voltage by a predetermined multiplier. With these configurations, the receiving circuit of the present invention applies the control voltage, which has been passed through the offset circuit and the multiplication circuit, to the high-frequency receiving circuit as a tuning voltage.
制御電圧に基づいて同調電圧を生成しているため、 デジタル一アナログ変換器 を用いた従来の受信機のように、 トラッキングエラーが最小となる複数の同調電 圧を測定によって求める必要がなく、 トラッキング調整に要する時間を短縮する ことができる。 また、 上述した掛算回路の乗数は、 局部発振器によって生成する局部発振信号 の周波数の可変範囲と、 高周波受信回路の受信周波数の可変範囲とに基づいて設 定することが望ましい。 局部発振信号の可変範囲の中心周波数と高周波受信回路 の受信周波数の可変範囲の中心周波数とは中間周波数分だけずれているため、 そ れぞれの可変幅を一致させた場合であってもこれらの可変範囲に対応する制御電 圧の可変幅と同調電圧の可変幅は同じにならないが、 制御電圧に所定の乗数をァ ナログ乗算することにより、 これら各電圧の可変幅の相違を一致させることがで さる。 Since the tuning voltage is generated based on the control voltage, there is no need to measure multiple tuning voltages that minimize the tracking error as in a conventional receiver using a digital-to-analog converter. The time required for adjustment can be reduced. Further, it is desirable that the multiplier of the multiplication circuit be set based on the variable range of the frequency of the local oscillation signal generated by the local oscillator and the variable range of the reception frequency of the high-frequency receiving circuit. Since the center frequency of the variable range of the local oscillation signal and the center frequency of the variable range of the reception frequency of the high-frequency receiving circuit are shifted by the intermediate frequency, even if the respective variable widths are the same, they are not equal. The variable width of the control voltage and the variable width of the tuning voltage corresponding to the variable range are not the same, but the control voltage must be analog-multiplied by a predetermined multiplier to match the difference in the variable width of each voltage. There is a monkey.
また、 上述したオフセット回路を、 制御電圧を参照電圧として用いたデジタル —アナログ変換器で実現し、 入力デ一夕を調整することによりオフセット電圧を 設定することが望ましい。 デジタルの入力データの値を調整することによりオフ セット電圧の値を可変することができるため、 プロセッサ等を用いてオフセット 電圧の調整を行うことができるようになり、 オフセット電圧の設定に要する手間 を低減することができる。 また、 周囲温度が変化して制御電圧の値が変動したと きに、 高周波受信回路に印加される同調電圧の値も制御電圧に連動して変動する ため、 高周波受信回路と局部発振器とを類似した構成にするだけで温度補償を行 うことができるようになり、 複雑な回路による温度補償が不要になる。  In addition, it is desirable that the above-described offset circuit is realized by a digital-analog converter using a control voltage as a reference voltage, and the offset voltage is set by adjusting the input data. The offset voltage value can be varied by adjusting the value of the digital input data, so that the offset voltage can be adjusted using a processor or the like, which reduces the time required for setting the offset voltage. Can be reduced. Also, when the control voltage value fluctuates due to a change in the ambient temperature, the value of the tuning voltage applied to the high-frequency receiving circuit also fluctuates in conjunction with the control voltage, so that the high-frequency receiving circuit and the local oscillator are similar. The temperature compensation can be performed simply by adopting the configuration described above, and the temperature compensation by a complicated circuit is not required.
また、 上述したオフセット電圧は、 局部発振信号の周波数をその可変範囲に含 まれる任意の値に設定したときにトラッキングエラーが最小となるように設定す ることが望ましい。 歪率計等を用いて行われるトラッキング調整の回数を減らす ことにより、 この調整に要する時間を短縮することができる。  Further, it is desirable that the above-described offset voltage is set so that the tracking error is minimized when the frequency of the local oscillation signal is set to an arbitrary value included in the variable range. By reducing the number of tracking adjustments performed using a distortion meter or the like, the time required for this adjustment can be reduced.
また、 オフセット電圧は、 局部発振信号の周波数に応じて切り替えられる複数 の値を用意しておいて、 局部発振信号の周波数の可変範囲の全域に対応するトラ ッキングエラ一が所定値以下となるように設定することが望ましい。 局部発振信 号の周波数可変範囲の中心値における最適なトラッキング調整が行われてこの近 傍の周波数範囲に対応する所定のオフセット電圧が設定されているが、 局部発振 信号の周波数がこの中心値からずれるにしたがってトラッキングエラ一が大きく なる傾向がある。 このため、 局部発振信号の周波数可変範囲の全域を複数の領域 に区切って、 各区分領域毎に異なる値を有するオフセット電圧を設定し、 各区分 領域毎にオフセット電圧を切り替えることにより、 周波数可変範囲の全域におい て容易にトラッキングエラーを小さくすることができる。 In addition, a plurality of values for the offset voltage, which can be switched according to the frequency of the local oscillation signal, are prepared so that the tracking error corresponding to the entire variable range of the frequency of the local oscillation signal is equal to or less than a predetermined value. It is desirable to set. Optimal tracking adjustment at the center value of the frequency variable range of the local oscillation signal is performed and a predetermined offset voltage corresponding to this nearby frequency range is set, but the frequency of the local oscillation signal is shifted from this center value. The tracking error tends to increase with deviation. For this reason, the entire frequency variable range of the local oscillation signal is divided into a plurality of regions, and an offset voltage having a different value is set for each of the divided regions. By switching the offset voltage for each area, the tracking error can be easily reduced in the entire frequency variable range.
また、 上述した局部発振信号の周波数の可変範囲の全域に対応するトラツキン グエラーが所定値以下となるように設定されたオフセット電圧の生成に必要な入 力データを格納するメモリと、 このメモリに格納されている入力デ一夕を読み出 してデジタル—アナログ変換器に入力することにより、 局部発振信号の周波数に 対応するオフセット電圧の値を設定する電圧値設定手段とを備えることが望まし い。 メモリに格納されている入力デ一夕を読み出してデジタル—アナログ変換器 に入力することにより、 最適なオフセット電圧を生成することができるため、 最 適な調整がなされた後のオフセッ卜電圧の設定が容易となる。  Also, a memory for storing input data necessary for generating an offset voltage set so that a tracking error corresponding to the entire variable range of the frequency of the local oscillation signal is equal to or less than a predetermined value, and a memory for storing the input data. It is desirable to provide voltage value setting means for setting the offset voltage value corresponding to the frequency of the local oscillation signal by reading the input data set in advance and inputting it to the digital-analog converter. . By reading the input data stored in the memory and inputting it to the digital-to-analog converter, it is possible to generate the optimal offset voltage, so that the offset voltage can be set after the optimal adjustment has been made. Becomes easier.
また、 本発明の受信機のトラッキング調整方法では、 第 1のステップにおいて、 受信機の受信周波数をその可変範囲に含まれる任意の値に設定するとともに、 こ のときの受信周波数と同じ周波数を有する所定のテスト信号を高周波受信回路に 入力する。 第 2のステップにおいて、 第 1のステップにおいて各種の設定が行わ れた後の受信機のトラッキングエラーが最小となるように、 オフセット回路によ つて設定されるオフセット電圧の値を設定する。 受信周波数の可変範囲に含まれ る任意の値においてトラッキングエラ一の測定が実施されるため、 この測定の回 数を減らすことにより、 トラッキング調整に要する時間を短縮することができる c また、 上述した第 2のステップの後に、 受信周波数の可変範囲の上限値あるい は下限値近傍におけるトラッキングエラーが大きいときにこれらの上限値あるい は下限値が含まれる一部の周波数帯域についてオフセッ卜電圧の値を変更して設 定する第 3のステツプを有することが望ましい。 任意の値 1点におけるトラツキ ング調整のみでは受信帯域全体におけるトラッキングエラーが所定値以下になら ないような場合もあるが、 最もトラッキングエラーが大きくなる受信周波数の上 限値あるいは下限値を含む一部の周波数帯域に対応するオフセット電圧の値を変 更することにより、 容易に受信帯域全体におけるトラッキングエラ一を所定の許 容範囲内に抑えることができる。 In the tracking adjustment method for a receiver according to the present invention, in the first step, the reception frequency of the receiver is set to an arbitrary value included in the variable range, and has the same frequency as the reception frequency at this time. A predetermined test signal is input to the high-frequency receiving circuit. In the second step, the value of the offset voltage set by the offset circuit is set so that the tracking error of the receiver after various settings in the first step are minimized. Since the measurement of the tracking error one is carried out at any value that is part of the variable range of the receiving frequency, by reducing the number of times the measurement, also c it is possible to shorten the time required for the tracking adjustment, the above-described After the second step, when the tracking error near the upper limit or the lower limit of the variable range of the reception frequency is large, the offset voltage of some frequency bands including the upper limit or the lower limit is reduced. It is desirable to have a third step to change and set the value. In some cases, tracking error at one point alone may not reduce the tracking error in the entire reception band below a specified value.However, a part including the upper limit or lower limit of the reception frequency where the tracking error is the largest By changing the value of the offset voltage corresponding to this frequency band, it is possible to easily suppress the tracking error in the entire reception band within a predetermined allowable range.
また、 本発明の受信機のトラッキング調整方法では、 第 4のステップにおいて、 受信機の受信周波数をその可変範囲に含まれる任意の値に設定するとともに、 こ のときの受信周波数と同じ周波数を有する所定のテスト信号を受信機に入力する c 第 5のステツプにおいて、 第 4のステツプにおいて各種の設定が行われた後の受 信機のトラツキングェラーが最小となるように、 デジタル—アナ口グ変換器の入 力データを設定する。 第 6のステップにおいて、 第 5のステップにおいて設定さ れた入力データをメモリに格納する。 受信周波数の可変範囲に含まれる任意の値 においてトラッキングエラ一の測定が実施されるため、 この測定の回数を減らす ことにより、 トラッキング調整に要する時間を短縮することができる。 また、 ト ラッキング調整の結果がメモリに格納されるため、 この結果データの保存および その後における利用が容易となる。 Further, in the tracking adjustment method for a receiver according to the present invention, in the fourth step, the reception frequency of the receiver is set to an arbitrary value included in the variable range. ( C) In the fifth step, the tracking error of the receiver after performing various settings in the fourth step is minimized. Set the input data of the digital-analog converter so that In a sixth step, the input data set in the fifth step is stored in a memory. Since the tracking error is measured at an arbitrary value included in the variable range of the reception frequency, the time required for the tracking adjustment can be reduced by reducing the number of times of the measurement. In addition, since the tracking adjustment result is stored in the memory, it is easy to save the result data and use it later.
また、 上述した第 6のステップの後に、 可変範囲の上限値あるいは下限値近傍 におけるトラッキングエラ一が大きいときに、 これらの上限値あるいは下限値が 含まれる一部の周波数帯域についてデジタル—アナログ変換器の入力データの内 容を変更して設定する第 7のステップと、 この第 7のステップにおいて設定され た変更後のデジタル—アナログ変換器の入力データをメモリに格納する第 8のス テツプを有することが望ましい。 受信帯域の全体について共通の値を有するオフ セット電圧を設定しただけではトラッキングエラーを所定の許容値以下に抑制す ることができない場合に、 異なる値を有する複数のオフセット電圧を設定する必 要があるが、 このような場合であっても、 複数のオフセット電圧の値に対応する デ一夕をメモリに格納しておくだけでよいため、 トラッキング調整の結果データ の保存および利用が容易となる。 図面の簡単な説明  If the tracking error near the upper limit or the lower limit of the variable range is large after the sixth step described above, the digital-analog converter may convert some of the frequency bands including the upper limit or the lower limit. A seventh step of changing and setting the content of the input data of the digital-analog converter, and an eighth step of storing the input data of the digital-analog converter after the change set in the seventh step in a memory. It is desirable. If it is not possible to suppress the tracking error below a predetermined allowable value by simply setting an offset voltage having a common value for the entire reception band, it is necessary to set multiple offset voltages having different values. However, even in such a case, it is only necessary to store the data corresponding to the plurality of offset voltage values in the memory, so that the tracking adjustment result data can be easily stored and used. BRIEF DESCRIPTION OF THE FIGURES
図 1は、 一実施形態の F M受信機の構成を示す図、  FIG. 1 is a diagram showing a configuration of an FM receiver according to one embodiment,
図 2は、 歪率計およびレベルメータの出力値と同調点との関係を示す図、 図 3は、 P Cの制御によって行われるトラッキング調整の動作手順を示す流れ 図、  FIG. 2 is a diagram showing the relationship between the output values of the distortion meter and the level meter and the tuning point. FIG. 3 is a flowchart showing the operation procedure of tracking adjustment performed by controlling the PC.
図 4は、 P Cの制御によって行われるトラッキング調整の動作手順を示す流れ 図、  FIG. 4 is a flowchart showing an operation procedure of tracking adjustment performed by controlling the PC.
図 5は、 局部発振周波数と同調周波数の関係を示す図、 図 6は、 局部発振周波数の可変範囲とトラッキングエラーとの関係を示す図、 図 7は、 局部発振周波数の可変範囲とトラッキングエラーとの関係を示す図、 図 8は、 スーパーヘテロダイン方式を採用した従来の受信機の構成を示す図、 図 9は、 メモリに格納されるデ一夕の内容を示す図である。 発明を実施するための最良の形態 Figure 5 shows the relationship between local oscillation frequency and tuning frequency. Fig. 6 shows the relationship between the local oscillation frequency variable range and tracking error. Fig. 7 shows the relationship between the local oscillation frequency variable range and tracking error. Fig. 8 shows the superheterodyne method. FIG. 9 is a diagram showing a configuration of a conventional receiver, and FIG. 9 is a diagram showing contents of data stored in a memory. BEST MODE FOR CARRYING OUT THE INVENTION
以下、 本発明を適用した一実施形態の F M受信機について、 図面を参照しなが ら説明する。  Hereinafter, an FM receiver according to an embodiment of the present invention will be described with reference to the drawings.
図 1は、 本実施形態の F M受信機の構成を示す図である。 同図に示す F M受信 機 1 0 0は、 アンテナ 1、 高周波受信回路 2、 局部発振器 3、 2つのデジタル— アナログ変換器 （D A C ) 4、 6、 2つの掛算回路 5、 7、 制御部 8、 混合回路 9、 中間周波増幅回路 1 0、 検波回路 1 1、 低周波増幅回路 1 2、 スピー力 1 3 を含んで構成されている。  FIG. 1 is a diagram illustrating a configuration of an FM receiver according to the present embodiment. The FM receiver 100 shown in the figure consists of an antenna 1, a high-frequency receiving circuit 2, a local oscillator 3, two digital-to-analog converters (DACs) 4, 6, two multiplying circuits 5, 7, a control unit 8, It includes a mixing circuit 9, an intermediate frequency amplification circuit 10, a detection circuit 11, a low frequency amplification circuit 12, and a speed 13.
高周波受信回路 2は、 アンテナ 1から入力される放送波に対して、 所定の同調 周波数近傍の成分のみを選択的に通過させる同調動作を行うとともに、 同調後の 信号に対して高周波増幅を行うものであり、 2つの高周波同調回路 2 0、 2 4と 高周波増幅回路 2 2を含んで構成されている。  The high-frequency receiving circuit 2 performs a tuning operation for selectively transmitting only a component near a predetermined tuning frequency to a broadcast wave input from the antenna 1, and performs a high-frequency amplification on the tuned signal. And includes two high-frequency tuning circuits 20 and 24 and a high-frequency amplifier circuit 22.
アンテナ 1が接続された初段の高周波同調回路 2 0の出力を高周波増幅回路 2 2で増幅し、 さらにその増幅出力を 2段目の高周波同調回路 2 4に通すことによ り、 選択性を向上させている。 また、 2つの高周波同調回路 2 0、 2 4のそれぞ れには、 同調周波数を可変するための可変容量ダイオードが含まれており、 可変 容量ダイォ一ドに印加する逆バイアスの同調電圧を変えることにより、 各高周波 同調回路 2 0、 2 4の同調周波数が連動して変更される。 すなわち、 高周波受信 回路 2では、 2つの高周波同調回路 2 0、 2 4に印加される同調電圧に応じた受 信周波数 （同調周波数） の放送波が選択される。  The output of the first-stage high-frequency tuning circuit 20 to which the antenna 1 is connected is amplified by the high-frequency amplifier circuit 22 and the amplified output is passed through the second-stage high-frequency tuning circuit 24 to improve selectivity. Let me. Each of the two high-frequency tuning circuits 20 and 24 includes a variable capacitance diode for changing the tuning frequency, and changes the tuning voltage of the reverse bias applied to the variable capacitance diode. Thereby, the tuning frequency of each of the high-frequency tuning circuits 20 and 24 is changed in conjunction. That is, the high-frequency receiving circuit 2 selects a broadcast wave having a receiving frequency (tuning frequency) according to the tuning voltage applied to the two high-frequency tuning circuits 20 and 24.
局部発振器 3は、 電圧制御発振器 （V C O) 3 1、 分周器 3 2、 基準信号発生 器 3 3、 位相比較器 3 4、 ローパスフィルタ （L P F ) 3 5を含んで構成されて いる。  The local oscillator 3 includes a voltage controlled oscillator (VCO) 31, a frequency divider 32, a reference signal generator 33, a phase comparator 34, and a low-pass filter (LPF) 35.
V C O 3 1は、 ローパスフィルタ 3 5によって生成される制御電圧に対応した 周波数の発振動作を行って局部発振信号を出力するものであり、 V C〇共振回路 9 1と増幅器 9 2を備えている。 V C O共振回路 9 1は、 インダク夕とコンデン ザからなる並列共振回路であり、 共振周波数を可変するための 2つの可変容量ダ ィオードがコンデンサと並列に接続されている。 そして、 印加される逆バイアス の制御電圧に応じて可変容量ダイォードの容量が変化することにより、 V C O共 振回路 9 1の共振周波数が変化する。 また、 増幅器 9 2は、 発振に必要な所定の 増幅動作を行う。 VCO 31 corresponds to the control voltage generated by low pass filter 35 It performs a frequency oscillation operation and outputs a local oscillation signal, and includes a VC〇resonance circuit 91 and an amplifier 92. The VCO resonance circuit 91 is a parallel resonance circuit including an inductor and a capacitor, and two variable capacitance diodes for varying the resonance frequency are connected in parallel with the capacitor. Then, the resonance frequency of the VCO resonance circuit 91 changes as the capacitance of the variable capacitance diode changes according to the applied reverse bias control voltage. The amplifier 92 performs a predetermined amplification operation required for oscillation.
分周器 3 2は、 V C〇3 1から入力される局部発振信号を所定の分周比 Nで分 周して出力する。 分周比 Nの値は、 制御部 8によって可変に設定される。 基準信 号発生器 3 3は、 周波数安定度の高い所定周波数の基準信号を出力する。  The divider 32 divides the local oscillation signal input from V C 〇31 by a predetermined dividing ratio N and outputs the result. The value of the dividing ratio N is variably set by the control unit 8. The reference signal generator 33 outputs a reference signal of a predetermined frequency with high frequency stability.
位相比較器 3 4は、 基準信号発生器 3 3から出力される基準信号と分周器 3 2 から出力される信号 （分周後の局部発振信号） との間で位相の比較を行い、 位相 差に応じたパルス状の誤差信号を出力する。 口一パスフィル夕 3 5は、 位相比較 器 3 4から出力されるパルス状の誤差信号の高周波成分を除去して平滑化するこ とにより、 制御電圧を生成する。 これらの V C〇3 1、 分周器 3 2、 位相比較器 3 4、 口一パスフィルタ 3 5がループ状に接続されて、 P L L (位相同期ル一 プ） が構成されている。  The phase comparator 34 compares the phase between the reference signal output from the reference signal generator 33 and the signal output from the frequency divider 32 (the divided local oscillation signal), and A pulse-like error signal corresponding to the difference is output. The one-pass filter 35 generates a control voltage by removing and smoothing the high-frequency component of the pulse-like error signal output from the phase comparator 34. These V C〇31, frequency divider 32, phase comparator 34, and single-pass filter 35 are connected in a loop to form a PLL (phase-locked loop).
なお、 上述した高周波受信回路 2内の高周波同調回路 2 0、 2 4のそれぞれに 含まれる可変容量ダイオード、 および局部発振器 3内の V C O共振回路 9 1に含 まれる可変容量ダイォ一ドのそれぞれは、 電圧対容量の特性がほぼ同じなものが 用いられている。  The variable capacitance diodes included in each of the high frequency tuning circuits 20 and 24 in the high frequency receiving circuit 2 and the variable capacitance diodes included in the VCO resonance circuit 91 in the local oscillator 3 are respectively The ones with almost the same voltage versus capacitance characteristics are used.
D A C 4および掛算回路 5は、 高周波受信回路 2内の高周波同調回路 2 0に対 して印加する同調電圧を生成するために用いられる。 具体的には、 本実施形態の D A C 4は、 局部発振器 3内のローパスフィル夕 3 5から出力される制御電圧 V cをデジタル一アナログ変換時の参照電圧として用い、 制御部 8から入力される デジタルデータの値に応じた電圧を生成する。 なお、 以後の説明では、 D A C 4、 6のそれぞれに対して制御部 8から入力されるデジ夕ルデー夕を 「D A C入力デ —夕」 と称するものとする。  The DAC 4 and the multiplying circuit 5 are used to generate a tuning voltage to be applied to the high-frequency tuning circuit 20 in the high-frequency receiving circuit 2. Specifically, the DAC 4 of the present embodiment uses the control voltage Vc output from the low-pass filter 35 in the local oscillator 3 as a reference voltage at the time of digital-to-analog conversion, and is input from the control unit 8. A voltage corresponding to the value of the digital data is generated. In the following description, the digital data input from the control unit 8 to each of the DACs 4 and 6 will be referred to as “DAC input data”.
制御部 8によって nビッ卜の D A C入力データ Dが入力される場合に、 D A C 4の出力電圧 V aは次式のように表される。 When n-bit DAC input data D is input by the control unit 8, the DAC The output voltage Va of 4 is expressed by the following equation.
V a=V c X (D/2 " ) ··· (1) (1) 式において、 D AC 4に入力される D AC入力データ Dの値が所定値に 固定されているものとすると、 DAC 4の出力電圧 V aは、 口一パスフィルタ 3 5から出力される制御電圧 Vcに応じて変化することとなる。 なお、 DAC 4に 入力される D AC入力データの値を設定する方法については後述する。  V a = V c X (D / 2 ") (1) In the equation (1), assuming that the value of D AC input data D input to D AC 4 is fixed to a predetermined value, The output voltage Va of the DAC 4 changes according to the control voltage Vc output from the one-pass filter 35. The method of setting the value of the DAC input data input to the DAC 4 Will be described later.
掛算回路 5は、 D AC 4の出力電圧 V aに対して所定の乗数 Kのアナログ掛算 を行う。 具体的には、 掛算回路 5の出力電圧 V rは次式のように表される。  The multiplication circuit 5 performs an analog multiplication of the output voltage Va of the DAC 4 by a predetermined multiplier K. Specifically, the output voltage Vr of the multiplication circuit 5 is expressed by the following equation.
V r =V a XK … （2) この掛算回路 5の乗数 Kは、 例えば、 "1" 、 "1. 5" 、 "2" などいくつ かの候補値が用意されており、 いずれかの値を任意に設定できるようになつてい る。 そして、 乗数 Κの値は、 局部発振信号の周波数の可変範囲と、 高周波受信回 路 2における受信周波数の可変範囲とに基づいて設定される。 本実施形態では、 局部発振器 3から出力される局部発振信号の周波数は、 高周波受信回路 2におけ る受信周波数よりも 10. 7 MHz高い値に設定されており、 受信周波数の可変 範囲と局部発振信号の周波数の可変範囲とを一致させようとすると、 局部発振器 3内で生成される制御電圧の可変範囲よりも高周波受信回路 2に印加される同調 電圧の可変範囲を大きく設定する必要があり、 このために掛算回路 5、 7が用い られる。 掛算回路 5の出力電圧 V rは、 同調電圧 Vtlとして高周波同調回路 20 に印加される。  V r = V a XK… (2) For the multiplier K of the multiplication circuit 5, for example, several candidate values such as “1”, “1.5”, and “2” are prepared. Can be set arbitrarily. Then, the value of multiplier Κ is set based on the variable range of the frequency of the local oscillation signal and the variable range of the reception frequency in high-frequency reception circuit 2. In the present embodiment, the frequency of the local oscillation signal output from the local oscillator 3 is set to a value 10.7 MHz higher than the reception frequency in the high-frequency reception circuit 2, and the variable range of the reception frequency and the local oscillation In order to match the variable range of the signal frequency, it is necessary to set the variable range of the tuning voltage applied to the high-frequency receiving circuit 2 larger than the variable range of the control voltage generated in the local oscillator 3, and For this purpose, multiplication circuits 5 and 7 are used. The output voltage Vr of the multiplication circuit 5 is applied to the high-frequency tuning circuit 20 as a tuning voltage Vtl.
また、 DAC 6および掛算回路 7は、 高周波受信回路 2内の高周波同調回路 2 4に印加する同調電圧を生成するために用いられる。 DAC 6は、 上述した DA C4と同様に、 制御部 8から入力される DAC入力デ一夕と、 ローパスフィル夕 35から出力される制御電圧 V cに応じた出力電圧 V aを出力する。 掛算回路 7 は、 上述した掛算回路 5と同様に、 DAC 6の出力電圧 Vaに対して所定の乗数 Kのアナログ掛算を行う。 掛算回路 7の出力電圧 V rは、 同調電圧 Vt2として高 周波同調回路 24に印加される。  The DAC 6 and the multiplying circuit 7 are used to generate a tuning voltage applied to the high-frequency tuning circuit 24 in the high-frequency receiving circuit 2. The DAC 6 outputs the DAC input data input from the control unit 8 and the output voltage Va corresponding to the control voltage Vc output from the low-pass filter 35, similarly to the DAC 4 described above. The multiplication circuit 7 performs analog multiplication of the output voltage Va of the DAC 6 by a predetermined multiplier K, similarly to the multiplication circuit 5 described above. The output voltage Vr of the multiplying circuit 7 is applied to the high frequency tuning circuit 24 as a tuning voltage Vt2.
上述した DAC4、 6がオフセット回路に対応しており、 これらの DAC4、 6のそれぞれにおける出力電圧と入力電圧の差がオフセット電圧に対応している c 制御部 8は、 FM受信機 100の全体動作を制御するものであり、 MPU8 1 , インタフェース部 （ I ZF) 82、 操作部 83、 EE PROM84を含んで構成 されている。 Above DAC 4, 6 corresponds to the offset circuit, c the difference of these DAC 4, the output voltage at each input voltage of 6 corresponds to the offset voltage The control unit 8 controls the overall operation of the FM receiver 100, and includes an MPU 81, an interface unit (IZF) 82, an operation unit 83, and an EE PROM 84.
MPU8 1は、 操作部 83から入力される受信周波数の設定値に応じて局部発 振器 3内の分周器 32の分周比 Nを設定したり、 DAC4、 6のそれぞれに対応 する D AC入力データを設定する等の所定の制御動作を行う。  The MPU 81 sets the frequency division ratio N of the frequency divider 32 in the local oscillator 3 according to the setting value of the reception frequency input from the operation unit 83, and sets the DACs corresponding to DACs 4 and 6 respectively. A predetermined control operation such as setting input data is performed.
インタフェース部 82は、 外部の PC (パーソナルコンピュータ） 1 28と制 御部 8内の MP U 8 1との間を接続するためのものである。 このインタフェース 部 82を介して、 PC 128から MPU8 1に対して各種指示を与えることがで さる。  The interface unit 82 connects the external PC (personal computer) 128 to the MPU 81 in the control unit 8. Various instructions can be given from the PC 128 to the MPU 81 via the interface unit 82.
操作部 83は、 各種の操作キーを備えており、 受信周波数の設定等を行うため に用いられる。 EEPROM84は、 データの記憶および消去を電気的に行うこ とが可能なメモリであり、 所定のオフセット電圧を生成するために必要な D AC 入力データを格納する。  The operation unit 83 includes various operation keys, and is used for setting a reception frequency and the like. The EEPROM 84 is a memory capable of electrically storing and erasing data, and stores DAC input data necessary for generating a predetermined offset voltage.
混合回路 9は、 高周波受信回路 2から出力される受信信号と、 局部発振器 3か ら出力される局部発振信号とを混合して、 その差成分に対応する信号を出力する 中間周波増幅回路 10は、 混合回路 9から出力される信号を増幅するとともに 所定の中間周波数 （10. 7MHz) 近傍の周波数成分のみを通過させることに より、 中間周波信号を生成する。  The mixing circuit 9 mixes the reception signal output from the high-frequency reception circuit 2 and the local oscillation signal output from the local oscillator 3, and outputs a signal corresponding to the difference component. An intermediate frequency signal is generated by amplifying the signal output from the mixing circuit 9 and passing only a frequency component near a predetermined intermediate frequency (10.7 MHz).
検波回路 1 1は、 中間周波増幅回路 10から出力される中間周波信号に対して 検波処理を行い、 音声信号を復調する。 低周波増幅回路 1 2は、 検波回路 1 1か ら出力される音声信号を所定のゲインで増幅する。 スピーカ 1 3は、 低周波増幅 回路 1 2から出力される増幅後の音声信号に基づいて音声出力を行う。  The detection circuit 11 performs a detection process on the intermediate frequency signal output from the intermediate frequency amplification circuit 10 to demodulate the audio signal. The low-frequency amplifier 12 amplifies the audio signal output from the detector 11 with a predetermined gain. The speaker 13 performs audio output based on the amplified audio signal output from the low frequency amplification circuit 12.
テスト信号入力端子 14は、 トラッキング調整を行うために所定周波数のテス ト信号を入力するためのものである。 このテスト信号入力端子 14を介して入力 されたテスト信号は、 高周波受信回路 2に入力される。  The test signal input terminal 14 is for inputting a test signal of a predetermined frequency for performing tracking adjustment. The test signal input through the test signal input terminal 14 is input to the high frequency receiving circuit 2.
また、 図 1に示す歪率計 120、 レベルメ一夕 122、 テスト信号発生器 1 2 6、 PC 1 28のそれぞれは、 上述した FM受信機 100内の D AC 4、 6に入 力する D AC入力データの値を設定する所定のトラッキング調整を行うために用 いられるものである。 In addition, each of the distortion meter 120, level meter 122, test signal generator 126, and PC 128 shown in FIG. 1 are connected to the DACs 4 and 6 in the FM receiver 100 described above. Used to perform a predetermined tracking adjustment that sets the value of the input data. It is something that can be done.
歪率計 1 2 0は、 F M受信機 1 0 0内の低周波増幅回路 1 2から出力される増 幅後の音声信号に基づいて歪率を計測する。 レベルメータ 1 2 2は、 低周波増幅 回路 1 2から出力される増幅後の音声信号の信号レベルを計測する。  The distortion factor meter 120 measures the distortion factor based on the amplified audio signal output from the low frequency amplifier circuit 12 in the FM receiver 100. The level meter 122 measures the signal level of the amplified audio signal output from the low-frequency amplifier circuit 12.
図 2は、 歪率計 1 2 0およびレベルメ一夕 1 2 2の出力値と同調点との関係を 示す図である。 同図において、 横軸が同調周波数に、 左側の縦軸がレベルメータ 1 2 2の出力値に、 右側の縦軸が歪率計 1 2 0の出力値にそれぞれ対応している。 また、 曲線 aが歪率計 1 , 2 0の出力値の変化の様子を、 曲線 bがレベルメータ 1 . 2 2の出力値の変化の様子をそれぞれ示している。  FIG. 2 is a diagram showing the relationship between the output values of the distortion meter 120 and the level meter 122 and the tuning point. In the figure, the horizontal axis corresponds to the tuning frequency, the left vertical axis corresponds to the output value of the level meter 122, and the right vertical axis corresponds to the output value of the distortion meter 120. A curve a indicates a change in the output value of the strain meter 1 or 20, and a curve b indicates a change in the output value of the level meter 1. 2.
図 2に示すように、 中央近傍の点線で示された最適な同調点では、 歪率計 1 2 0の出力値 （歪率） が最小となり、 レベルメータ 1 2 2の出力値が最大となる。 したがって、 最適な同調点に対応する同調電圧を調べるには、 レベルメータ 1 2 2の出力値が最大となるような同調電圧を検出すればよいことになるが、 レベル メータ 1 2 2の出力値の同調点近傍における変化の度合いはなだらかであるため、 最適な同調点を抽出することは容易ではない。 このため、 通常は歪率計 1 2 0の 出力値が最小となるような同調電圧を検出して、 最適な同調点に対応する同調電 圧として設定している。 但し、 無信号状態においても歪率計 1 2 0の出力値が最 小となるため、 このような状態で誤つた同調点の検出を行わないためにレベルメ 一夕 1 2 2の出力値も参照する必要がある。  As shown in Fig. 2, at the optimum tuning point indicated by the dotted line near the center, the output value (distortion rate) of the strain meter 120 becomes minimum and the output value of the level meter 122 becomes maximum. . Therefore, in order to find the tuning voltage corresponding to the optimum tuning point, it is necessary to detect the tuning voltage at which the output value of the level meter 122 becomes maximum. Since the degree of change near the tuning point is gentle, it is not easy to extract the optimal tuning point. For this reason, usually, a tuning voltage that minimizes the output value of the distortion meter 120 is detected and set as a tuning voltage corresponding to an optimum tuning point. However, since the output value of the distortion meter 120 becomes minimum even in the no-signal state, also refer to the output value of the level meter 122 to prevent detection of an incorrect tuning point in such a state. There is a need to.
テスト信号発生器 1 2 6は、 P C 1 2 8からの指示に基づいて、 所定周波数の 搬送波に対して F M変調をかけることにより生成したテスト信号を出力する。 こ のテスト信号は、 上述したテスト信号入力端子 1 4を介して、 F M受信機 1 0 0 内の高周波増幅回路 2に入力される。  The test signal generator 126 outputs a test signal generated by applying FM modulation to a carrier having a predetermined frequency based on an instruction from the PC 128. This test signal is input to the high-frequency amplifier circuit 2 in the FM receiver 100 via the test signal input terminal 14 described above.
P C 1 2 8は、 トラッキング調整を行う一連の動作を制御する。 具体的には、 P C 1 2 8は、 テスト信号発生器 1 2 6に対して指示を送って所定のテスト信号 を F M受信機 1 0 0に入力するとともに、 局部発振器 3内の分周器 3 2の分周比 を所定値に設定することにより F M受信機 1 0 0の受信周波数をテスト信号の周 波数に設定する。 また、 P C 1 2 8は、 この状態において、 D A C 4、 6のそれ ぞれに入力する D A C入力データの値を可変しながら歪率計 1 2 0およびレベル メータ 1 22の各出力値を読み取り、 レベルメ一夕 1 22の出力値が所定値以上 であって歪率計 1 20の出力値が最小となる DAC入力データを測定する。 この 測定によって求められた D AC入力データは、 FM受信機 100の制御部 8に送 られ、 MPU 8 1によって EE P ROM84に格納される。 上述した MPU8 1 が電圧値設定手段に対応する。 トラッキング調整の詳細手順については後述する。 本実施形態の FM受信機 100はこのような構成を有しており、 次に、 PC 1 28によって行われるトラッキング調整動作の詳細について説明する。 The PC 128 controls a series of operations for performing tracking adjustment. More specifically, the PC 128 sends an instruction to the test signal generator 126 to input a predetermined test signal to the FM receiver 100, and the frequency divider 3 in the local oscillator 3 By setting the dividing ratio of 2 to a predetermined value, the receiving frequency of the FM receiver 100 is set to the frequency of the test signal. In this state, the PC 128 changes the value of the DAC input data input to each of the DACs 4 and 6 while varying the distortion meter 120 and the level. The output value of the meter 122 is read, and the DAC input data at which the output value of the level meter 122 is equal to or more than a predetermined value and the output value of the distortion meter 120 becomes minimum is measured. The DAC input data obtained by this measurement is sent to the control unit 8 of the FM receiver 100 and stored in the EPP ROM 84 by the MPU 81. The above-described MPU 81 corresponds to the voltage value setting means. The detailed procedure of the tracking adjustment will be described later. The FM receiver 100 of the present embodiment has such a configuration. Next, details of the tracking adjustment operation performed by the PC 128 will be described.
図 3および図 4は、 PC 128の制御によって行われるトラッキング調整の動 作手順を示す流れ図である。 なお、 本実施形態の FM受信機 100には、 トラッ キング調整の対象となる 2つの DAC 4、 6が含まれるため、 いずれか一方の D ACに着目してトラッキング調整を行う場合について説明する。  FIG. 3 and FIG. 4 are flowcharts showing the operation procedure of the tracking adjustment performed by the control of the PC 128. Since the FM receiver 100 of the present embodiment includes two DACs 4 and 6 to be tracked, a case will be described in which tracking adjustment is performed by focusing on one of the DACs.
まず、 PC 128は、 テスト信号発生器 1 26に指示を送って、 FM受信機 1 00の受信周波数の可変範囲の中心周波数と同じ周波数のテス卜信号を FM受信 機 100に入力する （ステップ 100) 。 例えば、 FM受信機 1 00の受信周波 数帯域が 76. 0〜90. OMH zである場合を考えると、 この可変範囲の中心 周波数と同じ周波数である 83. 0 MHzのテスト信号がテスト信号発生器 1 2 6によって生成され、 FM受信機 1 00のテスト信号入力端子 14に入力される c また、 PC 128は、 制御部 8に指示を送って、 局部発振器 3の発振周波数First, the PC 128 sends an instruction to the test signal generator 126 to input a test signal having the same frequency as the center frequency of the variable range of the reception frequency of the FM receiver 100 to the FM receiver 100 (step 100). ). For example, when the receiving frequency band of the FM receiver 100 is 76.0 to 90. OMHz, a test signal of 83.0 MHz, which is the same frequency as the center frequency of this variable range, generates a test signal. generated by vessels 1 2 6 and c is input to the test signal input terminal 14 of the FM receiver 1 00, PC 128 may send an instruction to the control unit 8, the oscillation frequency of the local oscillator 3
(局部発振周波数） が、 FM受信機 1 00の受信周波数の可変範囲の中心周波数 に対応する周波数になるように設定する （ステップ 10 1) 。 例えば、 本実施形 態の FM受信機 1 00では、 受信周波数よりも 10. 7 MHz高い周波数を有す る局部発振信号が用いられているものとすると、 93. 7 MHzの局部発振周波 数を生成するために必要な分周器 32の分周比が設定される。 (Local oscillation frequency) is set to a frequency corresponding to the center frequency of the variable range of the reception frequency of the FM receiver 100 (step 101). For example, assuming that the FM receiver 100 of the present embodiment uses a local oscillation signal having a frequency 10.7 MHz higher than the reception frequency, the local oscillation frequency of 93.7 MHz is obtained. The frequency division ratio of the frequency divider 32 required for generation is set.
このようにしてテスト信号の入力と局部発振周波数の設定が終了すると、 次に P C 1 28は、 一方の D AC 4に対応する D A C入力データの値を所定範囲で可 変して、 トラッキングエラーが最小となる D AC入力データの値 D。 を測定し、 When the input of the test signal and the setting of the local oscillation frequency are completed in this way, the PC 128 next changes the value of the DAC input data corresponding to one DAC 4 within a predetermined range, and the tracking error is reduced. Minimum D The value D of the AC input data. Measure
(ステップ 1 02) 、 この測定値を制御部 8内の EE PROM 84に書き込む(Step 102), write this measured value to the EE PROM 84 in the control unit 8.
(ステップ 1 03) 。 上述したように、 最適な同調点に設定されてトラッキング エラーが最小になると、 歪率計 1 20の出力値も最小となるため、 PC 1 28は、 一方向に DAC入力データの値を可変していって、 この歪率計 1 20の出力値が 最も小さくなる DAC入力データの値を測定する。 また、 このとき、 PC 1 28 は、 レベルメ一夕 1 22の出力値が所定値以上であることを確認し、 所定値以下 である場合には所定のエラー表示を行う。 (Step 103). As described above, when the tracking error is set to the optimum tuning point and the tracking error is minimized, the output value of the distortion meter 120 is also minimized. The value of the DAC input data is varied in one direction, and the value of the DAC input data at which the output value of the distortion meter 120 becomes the smallest is measured. At this time, the PC 128 confirms that the output value of the level meter 122 is equal to or more than a predetermined value, and displays a predetermined error when the output value is equal to or less than the predetermined value.
図 5は、 局部発振周波数と同調周波数の関係を示す図である。 受信帯域の全域 においてトラッキングエラ一がない場合には、 局部発振周波数を可変したときに 同調周波数はこれよりも 10. 7 MHz低い周波数に設定されるため、 局部発振 周波数と同調周波数とは、 図 5において直線 cで示したような関係となる。 とこ ろが、 一般には局部発振器 3と高周波受信回路 2の各回路構成や発振周波数、 同 調周波数の違い等に起因するトラッキングエラーが発生するため、 上述した直線 cとは異なる曲線 dの関係を有することになる。  FIG. 5 is a diagram showing the relationship between the local oscillation frequency and the tuning frequency. If there is no tracking error in the entire reception band, the tuning frequency is set to a frequency 10.7 MHz lower than this when the local oscillation frequency is varied. The relationship shown in FIG. However, since tracking errors generally occur due to differences in the circuit configurations of the local oscillator 3 and the high-frequency receiving circuit 2, the oscillation frequency, the difference in the tuning frequency, and the like, the relationship of the curve d different from the straight line c described above is obtained. Will have.
上述したステップ 102の測定では、 局部発振周波数を可変範囲の中心周波数 に合わせたときに歪率計 120の出力値を最小にするような D AC入力データ D 0 を測定しているため、 この DAC入力デ一夕 D。 に対応して DAC 4によって 生成される電圧を掛算回路 5に通した後に、 その出力電圧を同調電圧 Vtlとして 高周波同調回路 20に印加することにより、 この局部発振周波数および同調周波 数に対応するトラッキングエラーを最小にすることができる。 すなわち、 ステツ プ 102の測定を実施して一方の D AC 4に対応する DAC入力デ一夕の値を設 定することにより、 図 5の曲線 eに示すような局部発振周波数と同調周波数の関 係を満たすことができる。  In the measurement in step 102 described above, the DAC input data D 0 that minimizes the output value of the distortion meter 120 when the local oscillation frequency is adjusted to the center frequency of the variable range is measured. Input data overnight D. After passing the voltage generated by the DAC 4 in response to the multiplication circuit 5, the output voltage is applied to the high-frequency tuning circuit 20 as the tuning voltage Vtl, whereby the tracking corresponding to the local oscillation frequency and the tuning frequency is performed. Errors can be minimized. In other words, by performing the measurement in step 102 and setting the value of the DAC input data corresponding to one DAC 4, the relationship between the local oscillation frequency and the tuning frequency as shown by curve e in FIG. 5 is obtained. You can meet the clerk.
次に、 PC 128は、 受信帯域の全体についてトラッキングエラーが所定値以 下となるか否かを調べ、 一部の周波数帯においてトラッキングエラーが大きくな る場合には、 この帯域が含まれる周波数範囲において D AC入力データの値を変 更する処理を行う。  Next, the PC 128 checks whether or not the tracking error is equal to or less than a predetermined value for the entire reception band, and if the tracking error is large in some frequency bands, the frequency range in which this band is included In, the process of changing the value of the DAC input data is performed.
具体的には、 まず PC 128は、 テスト信号発生器 126に指示を送って、 F M受信機 100の受信周波数の可変範囲の上限値と同じ周波数のテスト信号を F M受信機 100に入力する （ステップ 1 04) 。 また、 PC 128は、 制御部 8 に指示を送って、 局部発振周波数の可変範囲の上限値 f max に対応する周波数に なるように局部発振周波数の値を設定する （ステップ 105) 。 このようにして受信周波数の上限値に対応する各種の設定が終了した後、 PC 128は、 レベルメータ 1 22の出力値を取り込んで、 この値が所定値以上であ るか否かを判定する （ステップ 106) 。 このように、 本実施形態では、 受信周 波数の上限値において、 トラッキングエラーが所定値以下の許容範囲に含まれて いるか否かを、 レベルメータ 1 22の出力値を調べることにより判定している。 図 2に示したように、 最適な同調点近傍においてはレベルメ一夕 122の出力値 の変化がなだらかになるが、 最適な同調点から外れるにしたがってレベルメータ 122の出力値が大きく低下するようになるため、 トラッキングエラーが許容範 囲を超えて大きくなつたか否かはこのレベルメータ 122の出力値のみを参照す るだけで容易に判定することができる。 Specifically, first, the PC 128 sends an instruction to the test signal generator 126 and inputs a test signal having the same frequency as the upper limit of the variable range of the reception frequency of the FM receiver 100 to the FM receiver 100 (step 1 04). Further, the PC 128 sends an instruction to the control unit 8 to set the value of the local oscillation frequency so as to be a frequency corresponding to the upper limit value f max of the variable range of the local oscillation frequency (step 105). After the various settings corresponding to the upper limit of the reception frequency are completed in this way, the PC 128 takes in the output value of the level meter 122 and determines whether or not this value is equal to or higher than a predetermined value. (Step 106). As described above, in the present embodiment, it is determined whether or not the tracking error is included in the allowable range equal to or less than the predetermined value at the upper limit value of the reception frequency by checking the output value of the level meter 122. . As shown in FIG. 2, the output value of the level meter 122 gradually changes in the vicinity of the optimum tuning point, but the output value of the level meter 122 decreases so as to deviate from the optimum tuning point. Therefore, whether or not the tracking error has increased beyond the allowable range can be easily determined only by referring to the output value of the level meter 122 alone.
トラッキングエラーが大きくなつてレベルメータ 122の出力値が所定値以下 に低下した場合にはステップ 106の判定において否定判断が行われ、 次に PC 128は、 局部発振周波数がその可変範囲の中央値 f c と上限値 fmax のほぼ中 間に対応する上側中間値 f u よりも高い場合に設定される D AC入力データ DL として、 上述した中央値 f c に対応する DAC入力データ D。 に所定値 d。 を加 減算した値を設定し （ステップ 1 07) 、 この設定値を制御部 8内の EE PRO M 84に書き込む （ステップ 108) 。 If the tracking error increases and the output value of the level meter 122 falls below a predetermined value, a negative determination is made in the determination of step 106, and then the PC 128 sets the local oscillation frequency to the median value of the variable range fc And the DAC input data D corresponding to the above-mentioned median value fc as the DAC input data D L set when it is higher than the upper intermediate value fu corresponding to almost the middle of the upper limit value fmax. Predetermined value d. Is set (step 107), and the set value is written to the EE PROM 84 in the control section 8 (step 108).
なお、 DAC入力データ D。 に対してこの所定値 d。 を加算あるいは減算した DAC入力データ を DAC4に入力することにより、 局部発振周波数の可変 範囲の上限値 f max においてトラツキングェラーが所定値以下となるような d 0 の値が予め求められており、 上限値 f max におけるトラッキングエラーが大きい 場合には、 DAC入力データの値をこの上限値 f max を含む所定範囲の周波数に おいて D。 から に変更するだけで、 中央値 f c から上限値 f max 値までの範 囲におけるトラッキングエラーを所定値以下に抑えることができるようになって いる。  Note that DAC input data D. For this predetermined value d. By inputting the DAC input data obtained by adding or subtracting to the DAC4, the value of d0 such that the tracking error is less than or equal to a predetermined value at the upper limit value fmax of the variable range of the local oscillation frequency is obtained in advance. If the tracking error at the upper limit f max is large, set the value of the DAC input data to a frequency within a predetermined range including the upper limit f max. By simply changing from to, the tracking error in the range from the median value f c to the upper limit value f max can be suppressed to a predetermined value or less.
また、 局部発振周波数の上限値 f max に対応するトラッキングエラーが小さく てレベルメータ 122の出力値が所定値以上である場合にはステップ 106の判 定において肯定判断が行われ、 次に PC 1 28は、 局部発振周波数がその可変範 囲の中央値 f c と上限値 f max のほぼ中間に対応する上側中間値 f u よりも高い 場合に設定される D AC入力データ Di として、 上述した中央値 fc に対応する DAC入力デ一夕 D。 と同じ値を設定し （ステップ 109) 、 この設定値を制御 部 8内の EEPROM84に書き込む （ステップ 1 1 0) 。 If the tracking error corresponding to the upper limit value f max of the local oscillation frequency is small and the output value of the level meter 122 is equal to or more than a predetermined value, an affirmative determination is made in the determination of step 106, and then the PC 128 Is higher than the upper intermediate value fu, which corresponds to the local oscillation frequency approximately halfway between the median value fc and the upper limit value fmax of the variable range. The DAC input data D corresponding to the median fc described above as the DAC input data Di set in the case. Is set (step 109), and the set value is written to the EEPROM 84 in the control section 8 (step 110).
このようにして、 局部発振周波数の上限値 f max に対応する DAC入力デ一夕 の設定処理が終了すると、 同じ要領で、 局部発振周波数の下限値 f min に対応す る D AC入力デ一夕の設定処理が実行される。 すなわち、 PC 1 28は、 テスト 信号発生器 126に指示を送って、 FM受信機 100の受信周波数の可変範囲の 下限値と同じ周波数のテスト信号を FM受信機 100に入力する （ステップ 1 1 1) 。 また、 PC 1 28は、 制御部 8に指示を送って、 局部発振周波数の可変範 囲の下限値 f min に対応する周波数になるように局部発振周波数を設定する （ス テツプ 1 12) 。  In this way, when the setting process of the DAC input data corresponding to the local oscillation frequency upper limit f max is completed, the DAC input data corresponding to the local oscillation frequency lower limit f min is processed in the same manner. Is performed. That is, the PC 128 sends an instruction to the test signal generator 126 to input a test signal having the same frequency as the lower limit of the variable range of the reception frequency of the FM receiver 100 to the FM receiver 100 (step 1 1 1 ). Further, the PC 128 sends an instruction to the control unit 8 to set the local oscillation frequency so as to be a frequency corresponding to the lower limit value f min of the variable range of the local oscillation frequency (Step 112).
このようにして受信周波数の下限値 f min に対応する各種の設定が終了した後、 PC 128は、 レベルメータ 1 22の出力値を取り込んで、 この値が所定値以上 であるか否かを判定する （ステップ 1 1 3) 。 トラッキングエラーが大きくなつ てレベルメータ 122の出力値が所定値以下に低下した場合にはステップ 1 1 3 の判定において否定判断が行われ、 次に PC 128は、 局部発振周波数がその可 変範囲の中央値 f c と下限値 f min のほぼ中間に対応する下側中間値 f L よりも 低い場合に設定される DAC入力データ D2 として、 上述した中央値 f c に対応 する DAC入力データ D。 に所定値 di を加減算した値を設定し （ステップ 1 1After completing the various settings corresponding to the lower limit value f min of the reception frequency in this way, the PC 128 takes in the output value of the level meter 122 and determines whether or not this value is equal to or greater than a predetermined value. Yes (steps 1 1 3). If the tracking error increases and the output value of the level meter 122 falls below a predetermined value, a negative determination is made in the determination of step 113, and the PC 128 then determines that the local oscillation frequency is within the variable range. as DAC input data D 2 that is set to lower than the lower intermediate value f L corresponding to approximately the middle of the median fc and the lower limit value f min, DAC input data D. corresponding to the central value fc described above Is set to the value obtained by adding and subtracting the predetermined value di (step 11)
4) 、 この設定値を制御部 8内の E E P ROM 84に書き込む （ステップ 1 14) Write this setting value to the EEPROM 84 in the control unit 8 (step 11).
5) 。 Five) .
なお、 上述した加減算値 d。 と同様に、 DAC入力デ一夕 D。 に対してこの d ！ を加算あるいは減算した DAC入力データ D2 を DAC 4に入力することによ り、 局部発振周波数の可変範囲の下限値 f min においてトラッキングエラーが所 定値以下となるような の値が予め求められており、 下限値 f min におけるト ラッキングェラーが大きい場合には、 D A C入力データの値をこの下限値 f m i n を含む所定範囲の周波数において D。 から D2 に変更するだけで、 中央値 f c か ら下限値 f min 値までの範囲におけるトラッキングエラ一を所定値以下に抑える ことができるようになつている。 また、 局部発振周波数の下限値 f min に対応するトラッキングエラーが小さく てレベルメータ 1 22の出力値が所定値以上である場合にはステップ 1 13の判 定において肯定判断が行われ、 次に PC 1 28は、 局部発振周波数がその可変範 囲の中央値 f c と下限値 f min のほぼ中間に対応する下側中間値 f L よりも低い 場合に設定される DAC入力データ D2 として、 上述した中央値 fc に対応する DAC入力データ D。 と同じ値を設定し （ステップ 1 16) 、 この設定値を制御 部 8内の EEPROM84に書き込む （ステップ 1 17) 。 The above-mentioned addition / subtraction value d. Similarly, DAC input data overnight. Against this d! By inputting DAC input data D 2 obtained by adding or subtracting to the DAC 4, a value such that the tracking error becomes equal to or less than a predetermined value at the lower limit value f min of the variable range of the local oscillation frequency is obtained in advance. If the tracking error at the lower limit f min is large, the value of the DAC input data is set to D at a predetermined range of frequencies including the lower limit f min. From simply changed to D 2, and summer to be able to suppress the tracking error one in the range of up to a median fc or limit value f min value to a predetermined value or less. If the tracking error corresponding to the lower limit value f min of the local oscillation frequency is small and the output value of the level meter 122 is equal to or more than a predetermined value, an affirmative judgment is made in the judgment of step 113, and then the PC 1 28 as DAC input data D 2 that is set to lower than the lower intermediate value f L of the local oscillation frequency corresponding to approximately the middle of the median fc and the lower limit value f min of the variable range, the above-described DAC input data D corresponding to median fc. The same value is set (step 116), and this set value is written to the EEPROM 84 in the control unit 8 (step 117).
図 6および図 7は、 本実施形態の FM受信機 100における局部発振周波数の 可変範囲とトラッキングエラ一との関係を示す図である。  6 and 7 are diagrams showing the relationship between the variable range of the local oscillation frequency and the tracking error in the FM receiver 100 of the present embodiment.
図 6に示すように、 局部発振周波数の中央値 f c においては、 トラッキングェ ラーが最小になるように調整が行われて D AC 4、 6に入力する DAC入力デ一 タ 。 が設定されるため、 この周波数におけるトラッキングエラーはほとんど存 在しない。 また、 この中央値 f c と実際の局部発振周波数との差が大きくなるに しがたつてトラッキングエラーも大きくなる。 そして、 図 6に示したように、 局 部発振周波数の上限値 f max あるいは下限値 f min におけるトラッキングエラー が所定値 εを超える場合には、 中央値 f c を含む周波数範囲に対応する DAC入 力データ D。 と異なる値の DAC入力データ Di 、 D2 が、 上側中間値 f u 以上 の周波数範囲あるいは下側中間値 f L 以下の周波数範囲において設定されるため、 図 7に示すように、 これらの各周波数範囲におけるトラッキングエラーが所定値 ε以下となるようにトラッキング調整がなされる。 As shown in FIG. 6, at the central value fc of the local oscillation frequency, DAC input data input to DACs 4 and 6 is adjusted so that tracking error is minimized. Is set, so there is almost no tracking error at this frequency. In addition, as the difference between the median value fc and the actual local oscillation frequency increases, the tracking error increases. If the tracking error at the upper limit f max or the lower limit f min of the local oscillation frequency exceeds a predetermined value ε, as shown in FIG. 6, the DAC input corresponding to the frequency range including the median fc Data D. Different values of the DAC input data Di, D 2 is to be set in the upper intermediate value fu or more frequency ranges or lower intermediate value f L or less in the frequency range, as shown in FIG. 7, each of these frequency ranges The tracking adjustment is performed so that the tracking error at is not more than the predetermined value ε.
このように、 本実施形態の FM受信機 100のトラッキング調整は、 局部発振 周波数の中央値 f c において歪率計 1 20とレベルメータ 122を用いた測定が 行われるだけであり、 測定に比較的長い時間がかかる歪率測定の回数を減らした ことによる測定時間の大幅な短縮が可能になる。  As described above, the tracking adjustment of the FM receiver 100 of the present embodiment is only performed by using the distortion meter 120 and the level meter 122 at the central value fc of the local oscillation frequency, and the measurement is relatively long. The reduction of the number of time-consuming strain rate measurements can greatly reduce the measurement time.
次に、 このようにしてトラッキング調整が行われた FM受信機 100を用いて FM放送波を受信する場合の動作を簡単に説明する。 所定の電源スィッチ （図示 せず） が操作されて FM受信機 1 00が動作可能な状態にある場合に、 制御部 8 内の MPU8 1は、 操作部 83が操作されて、 受信周波数の変更が指示されたか 否かを判定する。 受信周波数の変更が指示された場合には、 MPU8 1は、 変更 後の受信周波数に対応する局部発振周波数を生成するために必要な分周器 32の 分周比を計算し、 この計算した分周比を分周器 32にセットする。 また、 MPU 8 1は、 この変更後の受信周波数に対応する局部発振周波数が、 図 7に示すどの 周波数帯に属するかを判定し、 対応する DAC入力データ D。 、 、 D2 のい ずれかを D AC 4、 6のそれぞれに入力する。 これにより、 新たな受信周波数の FM放送波を受信した場合のトラッキングエラーが所定値以下に抑制され、 受信 帯域の全域において、 良好な受信状態を維持することができる。 Next, an operation in the case where an FM broadcast wave is received using the FM receiver 100 on which tracking adjustment has been performed in this manner will be briefly described. When a predetermined power switch (not shown) is operated and the FM receiver 100 is in an operable state, the MPU 81 in the control unit 8 operates the operation unit 83 to change the reception frequency. Determine whether or not it has been instructed. If an instruction to change the reception frequency is issued, MPU81 The frequency division ratio of the frequency divider 32 required to generate the local oscillation frequency corresponding to the later reception frequency is calculated, and the calculated frequency division ratio is set in the frequency divider 32. Also, the MPU 81 determines which frequency band shown in FIG. 7 the local oscillation frequency corresponding to the changed reception frequency belongs to, and outputs the corresponding DAC input data D. One of,, or D 2 is input to each of DACs 4 and 6. As a result, a tracking error when an FM broadcast wave of a new reception frequency is received is suppressed to a predetermined value or less, and a good reception state can be maintained over the entire reception band.
特に、 本実施形態の FM受信機 1 00は、 局部発振器 3に含まれる VC〇共振 回路 9 1と高周波受信回路 2に含まれる 2つの高周波同調回路 20、 24とを類 似した構成によって実現しており、 しかも局部発振器 3内で生成される制御電圧 Vcが変化したときに、 これに連動するように各高周波同調回路 20、 24に印 加される同調電圧 Vtl、 Vt2も変化して、 同調周波数の変化が抑制される。 この ため、 特別な温度補償回路が不要になる。 また、 DAC4、 6のそれぞれは、 局 部発振器 3から印加される制御電圧 Vcを参照電圧として動作しているため、 F M受信機 100の電源電圧が不安定な場合であってもその影響を受けることがな く、 電源電圧の変動によるトラッキングエラーの増大を防止することができる。 なお、 本発明は上記実施形態に限定されるものではなく、 本発明の要旨の範囲 内において種々の変形実施が可能である。 例えば、 上述した実施形態では、 局部 発振周波数の上限値 f max あるいは下限値 fmin において、 レベルメータ 122 の出力値に基づいて測定したトラッキングエラ一が所定値を越える場合には、 局 部発振周波数の中央値 f c に対応して設定された DAC入力データ D。 の代わり に、 予めトラッキングエラーが所定値以下になるように求めておいた D AC入力 データ D, 、 D2 を用いるようにしたが、 これら上限値 f max あるいは下限値 f min においてレベルメ一夕 1 22の出力値を取得してトラッキングエラ一量を監 視しながら D AC入力データの値を可変し、 トラッキングエラ一が所定値以下と なる適切な D AC入力データの値をその都度測定するようにしてもよい。 In particular, the FM receiver 100 of the present embodiment is realized by a similar configuration of the VC〇 resonance circuit 91 included in the local oscillator 3 and the two high-frequency tuning circuits 20 and 24 included in the high-frequency reception circuit 2. In addition, when the control voltage Vc generated in the local oscillator 3 changes, the tuning voltages Vtl and Vt2 applied to the respective high-frequency tuning circuits 20 and 24 also change so that the control voltage Vc changes in synchronization with the change. Changes in frequency are suppressed. This eliminates the need for a special temperature compensation circuit. Further, since each of the DACs 4 and 6 operates using the control voltage Vc applied from the local oscillator 3 as a reference voltage, even if the power supply voltage of the FM receiver 100 is unstable, it is affected. Therefore, it is possible to prevent the tracking error from increasing due to the fluctuation of the power supply voltage. The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the present invention. For example, in the above-described embodiment, when the tracking error measured based on the output value of the level meter 122 exceeds the predetermined value at the local oscillation frequency upper limit value f max or the lower limit value f min, the local oscillation frequency DAC input data D set corresponding to the median value fc. Instead of, advance tracking error D AC input had been determined to be equal to or less than the predetermined value data D,, it has been to use a D 2, Reberume Isseki in these upper limit value f max or lower limit f min 1 Obtain the output value of 22 and vary the value of the DAC input data while monitoring the amount of tracking error, and measure the appropriate value of the DAC input data each time the tracking error becomes less than the specified value. It may be.
また、 上述した実施形態では、 局部発振周波数が上側中間値 f u よりも高いと き、 あるいは下側中間値 f L よりも低いときに、 必要に応じて D AC入力データ の値を D。 から へ 1回だけ、 あるいは D。 から D2 へ 1回だけ切り替えるよ うにしたが、 それぞれにおいて 2回以上 D A C入力データの値を切り替えるよう にしてもよい。 Further, in the above embodiment, can the local oscillation frequency is higher than the upper intermediate value fu, or when lower than the lower intermediate value f L, the value of D AC input data as required D. From to once, or D. It switched only once to the D 2 from However, the value of the DAC input data may be switched twice or more in each case.
また、 上述した実施形態では、 F M受信機 1 0 0のトラッキング調整を行う場 合について説明したが、 スーパ一ヘテロダイン方式を採用したその他の受信機、 例えば A M受信機、 テレビジョン受信機、 携帯電話等についても本発明を適用す ることができる。  In the above-described embodiment, the case where the tracking adjustment of the FM receiver 100 is performed has been described. However, other receivers employing the super heterodyne method, such as an AM receiver, a television receiver, and a mobile phone The present invention can be applied to such cases.
また、 上述した実施形態では、 高周波受信回路 2内の 2つの高周波同調回路 2 0、 2 4のそれぞれに印加する同調電圧 V t l、 V t 2を別々に生成したが、 2つの 高周波同調回路 2 0、 2 4内の構成部品の素子定数を調整することにより、 共通 の同調電圧 V t lを用いてそれぞれの同調周波数を設定するようにしてもよい。 こ の場合には、 D A C 6および掛算回路 7が不要になるため、 回路構成の簡略化が 可能になるとともに、 トラッキング調整に必要な手間も約半分になるため、 F M 受信機 1 0 0の製造工程において行われる調整作業時間の大幅な低減が可能にな る。  In the above-described embodiment, the tuning voltages Vtl and Vt2 applied to the two high-frequency tuning circuits 20 and 24 in the high-frequency receiving circuit 2 are separately generated. By adjusting the element constants of the components in 0 and 24, each tuning frequency may be set using a common tuning voltage Vtl. In this case, the DAC 6 and the multiplying circuit 7 are not required, which simplifies the circuit configuration and reduces the time required for tracking adjustment by about half. The time required for the adjustment work performed in the process can be greatly reduced.
また、 上述した実施形態では、 トラッキング調整を行う際には、 局部発振周波 数を中央値 f c に設定し、 歪率計 1 2 0とレベルメ一夕 1 2 2を用いた測定を行 つて、 トラッキングエラーが最小となる D A C入力データ D。 の値を求めていた が、 局部発振周波数の設定値は中央値 f c に限定されるものではなく、 これ以外 の周波数の可変範囲に含まれる任意の値にしてもよい。 具体的には、 高周波同調 回路 2 0、 2 4や V C〇共振回路 9 1に含まれる可変容量ダイオードの特性等に よっては、 図 6に示したように、 局部発振周波数の上限値 f max におけるトラッ キングエラー量と下限値 f min におけるトラッキングエラー量とが等しくなるよ うにした場合に、 トラッキングエラー量が 0となる周波数が局部発振周波数の中 央値 f c からずれる場合がある。 このような場合には、 局部発振周波数を中央値 f c から上側あるいは下側に所定量だけずらした値に設定してトラッキング調整 を行うことにより、 局部発振周波数の可変範囲の全域でトラッキングエラーをよ り少なくすることができる適切な D A C入力データ D。 の値を求めることができ る。 産業上の利用可能性 Further, in the above-described embodiment, when performing tracking adjustment, the local oscillation frequency is set to the median value fc, and the measurement is performed using the distortion meter 120 and the level meter 122 to perform tracking. DAC input data D with minimum error. However, the set value of the local oscillation frequency is not limited to the median value fc, and may be any value included in the variable range of the frequency. Specifically, as shown in FIG. 6, depending on the characteristics of the variable capacitance diodes included in the high-frequency tuning circuits 20 and 24 and the VC〇resonant circuit 91, as shown in FIG. When the tracking error amount is equal to the tracking error amount at the lower limit f min, the frequency at which the tracking error amount becomes 0 may deviate from the central value fc of the local oscillation frequency. In such a case, by performing tracking adjustment by setting the local oscillation frequency to a value shifted upward or downward from the center value fc by a predetermined amount, tracking error can be reduced over the entire variable range of the local oscillation frequency. Proper DAC input data D that can be reduced. Can be obtained. Industrial applicability
上述したように、 本発明の受信機によれば、 制御電圧に基づいて同調電圧を生 成しているため、 デジタル一アナログ変換器を用いた従来の受信機のように、 ト ラッキングエラーが最小となる複数の同調電圧を測定によって求める必要がなく、 トラッキング調整に要する時間を短縮することができる。  As described above, according to the receiver of the present invention, since the tuning voltage is generated based on the control voltage, the tracking error is minimized as in the conventional receiver using the digital-to-analog converter. It is not necessary to obtain a plurality of tuning voltages by measurement, and the time required for tracking adjustment can be reduced.
また、 本発明の受信機のトラッキング調整方法によれば、 受信周波数の可変範 囲のほぼ中央値においてトラッキングエラーの測定が実施されるため、 この測定 の回数を減らすことにより、 トラッキング調整に要する時間を短縮することがで さる。  In addition, according to the tracking adjustment method of the receiver of the present invention, the tracking error is measured at almost the center value of the variable range of the reception frequency. Can be shortened.

Claims

請 求 の 範 囲 The scope of the claims
1 . 同調電圧に応じた受信周波数の放送波を受信する高周波受信回路と、 制御電圧に応じた周波数の局部発振信号を生成する局部発振器と、  1. A high-frequency receiving circuit that receives a broadcast wave having a reception frequency according to a tuning voltage, a local oscillator that generates a local oscillation signal having a frequency according to a control voltage,
前記高周波受信回路から出力される信号と前記局部発振信号とを混合してその 差分周波数に対応する中間周波信号を出力する混合回路と、  A mixing circuit that mixes the signal output from the high-frequency receiving circuit and the local oscillation signal and outputs an intermediate frequency signal corresponding to a difference frequency between the signal and the local oscillation signal;
前記制御電圧に対して所定のオフセット電圧を設定するオフセット回路と、 前記制御電圧に対して所定の乗数のアナログ掛算を行う掛算回路と、 を備え、 前記制御電圧を前記オフセット回路と前記掛算回路に通した電圧を前 記同調電圧として前記高周波受信回路に印加することを特徴とする受信機。 An offset circuit that sets a predetermined offset voltage with respect to the control voltage; and a multiplication circuit that performs analog multiplication of a predetermined multiplier with respect to the control voltage, wherein the control voltage is applied to the offset circuit and the multiplication circuit. A receiver which applies the passed voltage as the tuning voltage to the high frequency receiving circuit.
2 . 前記掛算回路の乗数は、 前記局部発振器によって生成する前記局部発振信号 の周波数の可変範囲と、 前記高周波受信回路の受信周波数の可変範囲とに基づい て設定することを特徴とする請求の範囲第 1項記載の受信機。 2. The multiplier of the multiplication circuit is set based on a variable range of a frequency of the local oscillation signal generated by the local oscillator and a variable range of a reception frequency of the high-frequency receiving circuit. Receiver according to clause 1.
3 . 前記オフセット回路は、 デジタル—アナログ変換器であり、 前記制御電圧を 参照電圧として用いるとともに、 入力デ一夕を調整することにより前記オフセッ ト電圧を設定することを特徴とする請求の範囲第 1項記載の受信機。  3. The offset circuit is a digital-analog converter, uses the control voltage as a reference voltage, and sets the offset voltage by adjusting an input voltage. The receiver according to item 1.
4 . 前記オフセット電圧は、 前記局部発振信号の周波数をその可変範囲に含まれ る任意の値に設定したときにトラッキングエラーが最小となるように設定されて いることを特徴とする請求の範囲第 3項記載の受信機。  4. The offset voltage is set such that a tracking error is minimized when the frequency of the local oscillation signal is set to an arbitrary value included in the variable range. Receiver according to item 3.
5 . 前記オフセット電圧は、 前記局部発振信号の周波数に応じて切り替えられる 複数の値が用意されており、 前記局部発振信号の周波数の可変範囲の全域に対応 するトラッキングエラーが所定値以下となるように設定されていることを特徴と する請求の範囲第 4項記載の受信機。  5. The offset voltage is provided with a plurality of values that are switched according to the frequency of the local oscillation signal, so that the tracking error corresponding to the entire variable range of the frequency of the local oscillation signal is equal to or less than a predetermined value. The receiver according to claim 4, wherein the receiver is set to:
6 . 前記局部発振信号の周波数の可変範囲の全域に対応するトラッキングエラ一 が所定値以下となるように設定された前記オフセット電圧の生成に必要な前記入 力データを格納するメモリと、  6. A memory for storing the input data required to generate the offset voltage set so that tracking errors corresponding to the entire variable range of the frequency of the local oscillation signal are equal to or less than a predetermined value.
前記メモリに格納されている前記入力データを読み出して前記デジ夕ルーアナ 口グ変換器に入力することにより、 前記局部発振信号の周波数に対応する前記ォ フセット電圧の値を設定する電圧値設定手段と、  Voltage value setting means for setting the value of the offset voltage corresponding to the frequency of the local oscillation signal by reading the input data stored in the memory and inputting the input data to the digital analog converter; ,
を備えることを特徴とする請求の範囲第 3項記載の受信機。 4. The receiver according to claim 3, comprising:
7 . 同調電圧に応じた受信周波数の放送波を受信する高周波受信回路と、 制御電圧に応じた周波数の局部発振信号を生成する局部発振器と、 7. A high-frequency receiving circuit that receives a broadcast wave having a reception frequency according to the tuning voltage, a local oscillator that generates a local oscillation signal having a frequency according to the control voltage,
前記高周波受信回路から出力される信号と前記局部発振信号とを混合してその 差分周波数に対応する中間周波信号を出力する混合回路と、  A mixing circuit that mixes the signal output from the high-frequency receiving circuit and the local oscillation signal and outputs an intermediate frequency signal corresponding to a difference frequency between the signal and the local oscillation signal;
前記制御電圧に対して所定のオフセット電圧を設定するオフセット回路と、 前記制御電圧に対して所定の乗数のアナログ掛算を行う掛算回路と、 を備え、 前記制御電圧を前記オフセット回路と前記掛算回路に通した電圧を前 記同調電圧として前記高周波受信回路に印加する受信機のトラッキング調整を行 うトラッキング調整方法であって、  An offset circuit that sets a predetermined offset voltage with respect to the control voltage; and a multiplication circuit that performs analog multiplication of a predetermined multiplier with respect to the control voltage, wherein the control voltage is applied to the offset circuit and the multiplication circuit. A tracking adjustment method for performing tracking adjustment of a receiver that applies the passed voltage as the tuning voltage to the high-frequency reception circuit,
前記受信機の受信周波数をその可変範囲に含まれる任意の値に設定するととも に、 このときの受信周波数と同じ周波数を有する所定のテスト信号を前記高周波 受信回路に入力する第 1のステップと、  A first step of setting the reception frequency of the receiver to an arbitrary value included in the variable range and inputting a predetermined test signal having the same frequency as the reception frequency at this time to the high-frequency reception circuit;
前記第 1のステップにおいて各種の設定が行われた後の前記受信機のトラツキ ングエラ一が最小となるように、 前記オフセット回路によって設定される前記ォ フセット電圧の値を設定する第 2のステップと、  A second step of setting a value of the offset voltage set by the offset circuit so that a tracking error of the receiver after various settings are made in the first step is minimized; ,
を有することを特徴とする受信機のトラッキング調整方法。  A tracking adjustment method for a receiver, comprising:
8 . 前記可変範囲の上限値あるいは下限値近傍におけるトラッキングエラーが大 きいときに、 これらの上限値あるいは下限値が含まれる一部の周波数帯域につい て前記オフセット電圧の値を変更して設定する第 3のステップを有することを特 徴とする請求の範囲第 7項記載の受信機のトラッキング調整方法。  8. When the tracking error near the upper limit or the lower limit of the variable range is large, the value of the offset voltage is changed and set for some frequency bands including the upper limit or the lower limit. 8. The tracking adjustment method for a receiver according to claim 7, wherein the method includes three steps.
9 . 同調電圧に応じた受信周波数の放送波を受信する高周波受信回路と、 制御電圧に応じた周波数の局部発振信号を生成する局部発振器と、  9. A high-frequency receiving circuit that receives a broadcast wave having a reception frequency according to the tuning voltage, a local oscillator that generates a local oscillation signal having a frequency according to the control voltage,
前記高周波受信回路から出力される信号と前記局部発振信号とを混合してその 差分周波数に対応する中間周波信号を出力する混合回路と、  A mixing circuit that mixes the signal output from the high-frequency receiving circuit and the local oscillation signal and outputs an intermediate frequency signal corresponding to a difference frequency between the signal and the local oscillation signal;
前記制御電圧を参照電圧として用いるとともに、 入力データを調整することに より前記オフセット電圧を設定するデジタル一アナログ変換器と、  A digital-to-analog converter that sets the offset voltage by using the control voltage as a reference voltage and adjusting input data;
前記制御電圧に対して所定の乗数のアナログ掛算を行う掛算回路と、 前記局部発振信号の周波数の可変範囲の全域に対応するトラッキングエラーが 所定値以下となるように設定された前記オフセット電圧の生成に必要な前記入力 データを格納するメモリと、 A multiplying circuit that performs analog multiplication of a predetermined multiplier on the control voltage; and generating the offset voltage set so that a tracking error corresponding to the entire variable range of the frequency of the local oscillation signal is equal to or less than a predetermined value. Input required for A memory for storing data,
前記メモリに格納されている前記入力データを読み出して前記デジタル一アナ 口グ変換器に入力することにより、 前記局部発振信号の周波数に対応する前記ォ フセット電圧の値を設定する電圧値設定手段と、  Voltage value setting means for setting the value of the offset voltage corresponding to the frequency of the local oscillation signal by reading the input data stored in the memory and inputting the input data to the digital-to-analog converter; ,
を備え、 前記制御電圧を前記デジタル一アナログ変換器と前記掛算回路に通し た電圧を前記同調電圧として前記高周波受信回路に印加する受信機のトラツキン グ調整を行うトラッキング調整方法であって、  A tracking adjustment method for performing tracking adjustment of a receiver that applies the control voltage to the digital-to-analog converter and the multiplication circuit and applies the voltage as the tuning voltage to the high-frequency reception circuit.
前記受信機の受信周波数をその可変範囲に含まれる任意の値に設定するととも に、 このときの受信周波数と同じ周波数を有する所定のテスト信号を前記受信機 に入力する第 4のステップと、  A fourth step of setting the reception frequency of the receiver to an arbitrary value included in the variable range and inputting a predetermined test signal having the same frequency as the reception frequency at this time to the receiver;
前記第 4のステップにおいて各種の設定が行われた後の前記受信機のトラツキ ングエラ一が最小となるように、 前記デジタル—アナログ変換器の入力デ一夕を 設定する第 5のステップと、  A fifth step of setting the input / output of the digital-analog converter so that tracking errors of the receiver after various settings are made in the fourth step are minimized;
前記第 5のステップにおいて設定された前記入力デ一夕を前記メモリに格納す る第 6のステップと、  A sixth step of storing the input data set in the fifth step in the memory;
を有することを特徴とする受信機のトラッキング調整方法。  A tracking adjustment method for a receiver, comprising:
1 0 . 前記可変範囲の上限値あるいは下限値近傍におけるトラッキングエラーが 大きいときに、 これらの上限値あるいは下限値が含まれる一部の周波数帯域につ いて前記デジタル—アナログ変換器の入力データの内容を変更して設定する第 7 のステップと、 10. When the tracking error near the upper limit or lower limit of the variable range is large, the contents of the input data of the digital-analog converter for a part of the frequency band including these upper limit or lower limit. A seventh step to change and set the
前記第 7のステップにおいて設定された変更後の前記デジタル一アナログ変換 器の入力データを前記メモリに格納する第 8のステップと、  An eighth step of storing the input data of the digital-to-analog converter after the change set in the seventh step in the memory;
を有することを特徴とする請求の範囲第 9項記載の受信機のトラッキング調整 方法。  10. The tracking adjustment method for a receiver according to claim 9, comprising:
PCT/JP2001/010039 2000-10-02 2001-11-16 Receiver and its tracking adjusting method WO2003043212A1 (en)

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EP01274708A EP1450495A4 (en) 2001-11-16 2001-11-16 Receiver and its tracking adjusting method
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JPS5978730U (en) * 1982-11-16 1984-05-28 アルパイン株式会社 electronically tuned radio receiver
JPH07500718A (en) * 1992-08-28 1995-01-19 トムソン　コンシューマ　エレクトロニクス　インコーポレイテッド television tuning device
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JPS5978730U (en) * 1982-11-16 1984-05-28 アルパイン株式会社 electronically tuned radio receiver
JPH07500718A (en) * 1992-08-28 1995-01-19 トムソン　コンシューマ　エレクトロニクス　インコーポレイテッド television tuning device
JPH1051345A (en) * 1996-07-31 1998-02-20 Sanyo Electric Co Ltd Fm radio receiver
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